Ben Widawsky | d0a7e0a | 2011-07-28 15:07:28 -0700 | [diff] [blame] | 1 | /* |
Oscar Mateo | 5032e7b | 2013-11-12 11:50:42 +0000 | [diff] [blame] | 2 | * Copyright © 2011 Intel Corporation |
Ben Widawsky | d0a7e0a | 2011-07-28 15:07:28 -0700 | [diff] [blame] | 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice (including the next |
| 12 | * paragraph) shall be included in all copies or substantial portions of the |
| 13 | * Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS |
| 21 | * IN THE SOFTWARE. |
| 22 | * |
| 23 | * Authors: |
| 24 | * Ben Widawsky <ben@bwidawsk.net> |
| 25 | * |
| 26 | */ |
| 27 | |
| 28 | #include <stdio.h> |
| 29 | #include <stdarg.h> |
| 30 | #include <stdlib.h> |
| 31 | #include <sys/types.h> |
Daniel Vetter | 71ac5de | 2014-08-26 15:13:06 +0200 | [diff] [blame] | 32 | |
Daniel Vetter | c03c6ce | 2014-03-22 21:34:29 +0100 | [diff] [blame] | 33 | #include "intel_io.h" |
Daniel Vetter | 6cfcd71 | 2014-03-22 20:07:35 +0100 | [diff] [blame] | 34 | #include "intel_chipset.h" |
Daniel Vetter | 71ac5de | 2014-08-26 15:13:06 +0200 | [diff] [blame] | 35 | #include "igt_core.h" |
Ben Widawsky | d0a7e0a | 2011-07-28 15:07:28 -0700 | [diff] [blame] | 36 | |
| 37 | static struct intel_register_range gen_bwcl_register_map[] = { |
| 38 | {0x00000000, 0x00000fff, INTEL_RANGE_RW}, |
| 39 | {0x00001000, 0x00000fff, INTEL_RANGE_RSVD}, |
| 40 | {0x00002000, 0x00000fff, INTEL_RANGE_RW}, |
| 41 | {0x00003000, 0x000001ff, INTEL_RANGE_RW}, |
| 42 | {0x00003200, 0x00000dff, INTEL_RANGE_RW}, |
| 43 | {0x00004000, 0x000003ff, INTEL_RANGE_RSVD}, |
| 44 | {0x00004400, 0x00000bff, INTEL_RANGE_RSVD}, |
| 45 | {0x00005000, 0x00000fff, INTEL_RANGE_RW}, |
| 46 | {0x00006000, 0x00000fff, INTEL_RANGE_RW}, |
| 47 | {0x00007000, 0x000003ff, INTEL_RANGE_RW}, |
| 48 | {0x00007400, 0x000014ff, INTEL_RANGE_RW}, |
| 49 | {0x00008900, 0x000006ff, INTEL_RANGE_RSVD}, |
| 50 | {0x00009000, 0x00000fff, INTEL_RANGE_RSVD}, |
| 51 | {0x0000a000, 0x00000fff, INTEL_RANGE_RW}, |
| 52 | {0x0000b000, 0x00004fff, INTEL_RANGE_RSVD}, |
| 53 | {0x00010000, 0x00003fff, INTEL_RANGE_RW}, |
| 54 | {0x00014000, 0x0001bfff, INTEL_RANGE_RSVD}, |
| 55 | {0x00030000, 0x0000ffff, INTEL_RANGE_RW}, |
| 56 | {0x00040000, 0x0001ffff, INTEL_RANGE_RSVD}, |
| 57 | {0x00060000, 0x0000ffff, INTEL_RANGE_RW}, |
| 58 | {0x00070000, 0x00002fff, INTEL_RANGE_RW}, |
| 59 | {0x00073000, 0x00000fff, INTEL_RANGE_RW}, |
| 60 | {0x00074000, 0x0000bfff, INTEL_RANGE_RSVD}, |
| 61 | {0x00000000, 0x00000000, INTEL_RANGE_END} |
| 62 | }; |
| 63 | |
| 64 | static struct intel_register_range gen4_register_map[] = { |
| 65 | {0x00000000, 0x00000fff, INTEL_RANGE_RW}, |
| 66 | {0x00001000, 0x00000fff, INTEL_RANGE_RSVD}, |
| 67 | {0x00002000, 0x00000fff, INTEL_RANGE_RW}, |
| 68 | {0x00003000, 0x000001ff, INTEL_RANGE_RW}, |
| 69 | {0x00003200, 0x00000dff, INTEL_RANGE_RW}, |
| 70 | {0x00004000, 0x000003ff, INTEL_RANGE_RW}, |
| 71 | {0x00004400, 0x00000bff, INTEL_RANGE_RW}, |
| 72 | {0x00005000, 0x00000fff, INTEL_RANGE_RW}, |
| 73 | {0x00006000, 0x00000fff, INTEL_RANGE_RW}, |
| 74 | {0x00007000, 0x000003ff, INTEL_RANGE_RW}, |
| 75 | {0x00007400, 0x000014ff, INTEL_RANGE_RW}, |
| 76 | {0x00008900, 0x000006ff, INTEL_RANGE_RSVD}, |
| 77 | {0x00009000, 0x00000fff, INTEL_RANGE_RSVD}, |
| 78 | {0x0000a000, 0x00000fff, INTEL_RANGE_RW}, |
| 79 | {0x0000b000, 0x00004fff, INTEL_RANGE_RSVD}, |
| 80 | {0x00010000, 0x00003fff, INTEL_RANGE_RW}, |
| 81 | {0x00014000, 0x0001bfff, INTEL_RANGE_RSVD}, |
| 82 | {0x00030000, 0x0000ffff, INTEL_RANGE_RW}, |
| 83 | {0x00040000, 0x0001ffff, INTEL_RANGE_RSVD}, |
| 84 | {0x00060000, 0x0000ffff, INTEL_RANGE_RW}, |
| 85 | {0x00070000, 0x00002fff, INTEL_RANGE_RW}, |
| 86 | {0x00073000, 0x00000fff, INTEL_RANGE_RW}, |
| 87 | {0x00074000, 0x0000bfff, INTEL_RANGE_RSVD}, |
| 88 | {0x00000000, 0x00000000, INTEL_RANGE_END} |
| 89 | }; |
| 90 | |
| 91 | /* The documentation is a little sketchy on these register ranges. */ |
| 92 | static struct intel_register_range gen6_gt_register_map[] = { |
| 93 | {0x00000000, 0x00000fff, INTEL_RANGE_RW}, |
| 94 | {0x00001000, 0x00000fff, INTEL_RANGE_RSVD}, |
| 95 | {0x00002000, 0x00000fff, INTEL_RANGE_RW}, |
| 96 | {0x00003000, 0x000001ff, INTEL_RANGE_RW}, |
| 97 | {0x00003200, 0x00000dff, INTEL_RANGE_RW}, |
| 98 | {0x00004000, 0x00000fff, INTEL_RANGE_RW}, |
| 99 | {0x00005000, 0x0000017f, INTEL_RANGE_RW}, |
| 100 | {0x00005180, 0x00000e7f, INTEL_RANGE_RW}, |
| 101 | {0x00006000, 0x00001fff, INTEL_RANGE_RW}, |
| 102 | {0x00008000, 0x000007ff, INTEL_RANGE_RW}, |
| 103 | {0x00008800, 0x000000ff, INTEL_RANGE_RSVD}, |
| 104 | {0x00008900, 0x000006ff, INTEL_RANGE_RW}, |
| 105 | {0x00009000, 0x00000fff, INTEL_RANGE_RSVD}, |
| 106 | {0x0000a000, 0x00000fff, INTEL_RANGE_RW}, |
| 107 | {0x0000b000, 0x00004fff, INTEL_RANGE_RSVD}, |
| 108 | {0x00010000, 0x00001fff, INTEL_RANGE_RW}, |
| 109 | {0x00012000, 0x000003ff, INTEL_RANGE_RW}, |
| 110 | {0x00012400, 0x00000bff, INTEL_RANGE_RW}, |
| 111 | {0x00013000, 0x00000fff, INTEL_RANGE_RW}, |
| 112 | {0x00014000, 0x00000fff, INTEL_RANGE_RW}, |
| 113 | {0x00015000, 0x0000cfff, INTEL_RANGE_RW}, |
| 114 | {0x00022000, 0x00000fff, INTEL_RANGE_RW}, |
| 115 | {0x00023000, 0x00000fff, INTEL_RANGE_RSVD}, |
| 116 | {0x00024000, 0x00000fff, INTEL_RANGE_RW}, |
| 117 | {0x00025000, 0x0000afff, INTEL_RANGE_RSVD}, |
| 118 | {0x00030000, 0x0000ffff, INTEL_RANGE_RW}, |
| 119 | {0x00040000, 0x0000ffff, INTEL_RANGE_RW}, |
| 120 | {0x00050000, 0x0000ffff, INTEL_RANGE_RW}, |
| 121 | {0x00060000, 0x0000ffff, INTEL_RANGE_RW}, |
| 122 | {0x00070000, 0x00003fff, INTEL_RANGE_RW}, |
| 123 | {0x00074000, 0x0008bfff, INTEL_RANGE_RSVD}, |
| 124 | {0x00100000, 0x00007fff, INTEL_RANGE_RW}, |
| 125 | {0x00108000, 0x00037fff, INTEL_RANGE_RSVD}, |
| 126 | {0x00140000, 0x0003ffff, INTEL_RANGE_RW}, |
| 127 | {0x00000000, 0x00000000, INTEL_RANGE_END} |
| 128 | }; |
| 129 | |
| 130 | struct intel_register_map |
| 131 | intel_get_register_map(uint32_t devid) |
| 132 | { |
| 133 | struct intel_register_map map; |
Kenneth Graunke | 90a6f75 | 2012-02-08 12:05:05 -0800 | [diff] [blame] | 134 | const int gen = intel_gen(devid); |
Ben Widawsky | d0a7e0a | 2011-07-28 15:07:28 -0700 | [diff] [blame] | 135 | |
Kenneth Graunke | 90a6f75 | 2012-02-08 12:05:05 -0800 | [diff] [blame] | 136 | if (gen >= 6) { |
Ben Widawsky | d0a7e0a | 2011-07-28 15:07:28 -0700 | [diff] [blame] | 137 | map.map = gen6_gt_register_map; |
| 138 | map.top = 0x180000; |
| 139 | } else if (IS_BROADWATER(devid) || IS_CRESTLINE(devid)) { |
| 140 | map.map = gen_bwcl_register_map; |
| 141 | map.top = 0x80000; |
Kenneth Graunke | 90a6f75 | 2012-02-08 12:05:05 -0800 | [diff] [blame] | 142 | } else if (gen >= 4) { |
Ben Widawsky | d0a7e0a | 2011-07-28 15:07:28 -0700 | [diff] [blame] | 143 | map.map = gen4_register_map; |
| 144 | map.top = 0x80000; |
| 145 | } else { |
Daniel Vetter | 71ac5de | 2014-08-26 15:13:06 +0200 | [diff] [blame] | 146 | igt_fail_on("Gen2/3 Ranges are not supported. Please use ""unsafe access."); |
Ben Widawsky | d0a7e0a | 2011-07-28 15:07:28 -0700 | [diff] [blame] | 147 | } |
| 148 | |
| 149 | map.alignment_mask = 0x3; |
| 150 | |
| 151 | return map; |
| 152 | } |
| 153 | |
| 154 | struct intel_register_range * |
Oscar Mateo | 5032e7b | 2013-11-12 11:50:42 +0000 | [diff] [blame] | 155 | intel_get_register_range(struct intel_register_map map, uint32_t offset, uint32_t mode) |
Ben Widawsky | d0a7e0a | 2011-07-28 15:07:28 -0700 | [diff] [blame] | 156 | { |
| 157 | struct intel_register_range *range = map.map; |
| 158 | uint32_t align = map.alignment_mask; |
| 159 | |
| 160 | if (offset & map.alignment_mask) |
| 161 | return NULL; |
| 162 | |
| 163 | if (offset >= map.top) |
| 164 | return NULL; |
| 165 | |
| 166 | while (!(range->flags & INTEL_RANGE_END)) { |
| 167 | /* list is assumed to be in order */ |
| 168 | if (offset < range->base) |
| 169 | break; |
| 170 | |
| 171 | if ( (offset >= range->base) && |
| 172 | (offset + align) <= (range->base + range->size)) { |
| 173 | if ((mode & range->flags) == mode) |
| 174 | return range; |
| 175 | } |
| 176 | range++; |
| 177 | } |
| 178 | |
| 179 | return NULL; |
| 180 | } |