Daniel Vetter | 7dc0001 | 2014-03-22 15:31:15 +0100 | [diff] [blame] | 1 | #include <assert.h> |
| 2 | #include <stdlib.h> |
| 3 | #include <sys/ioctl.h> |
| 4 | #include <stdio.h> |
| 5 | #include <string.h> |
| 6 | #include <assert.h> |
| 7 | #include <fcntl.h> |
| 8 | #include <inttypes.h> |
| 9 | #include <errno.h> |
| 10 | #include <sys/stat.h> |
| 11 | #include <sys/time.h> |
Daniel Vetter | f5daeec | 2014-03-23 13:35:09 +0100 | [diff] [blame] | 12 | |
| 13 | #include <drm.h> |
| 14 | #include <i915_drm.h> |
| 15 | |
Daniel Vetter | 7dc0001 | 2014-03-22 15:31:15 +0100 | [diff] [blame] | 16 | #include "drmtest.h" |
| 17 | #include "intel_bufmgr.h" |
| 18 | #include "intel_batchbuffer.h" |
Daniel Vetter | c03c6ce | 2014-03-22 21:34:29 +0100 | [diff] [blame] | 19 | #include "intel_io.h" |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 20 | #include "rendercopy.h" |
| 21 | #include "gen8_render.h" |
Daniel Vetter | 6cfcd71 | 2014-03-22 20:07:35 +0100 | [diff] [blame] | 22 | #include "intel_reg.h" |
Daniel Vetter | f5daeec | 2014-03-23 13:35:09 +0100 | [diff] [blame] | 23 | #include "igt_aux.h" |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 24 | |
Tomeu Vizoso | a0b774f | 2016-11-09 15:15:43 +0100 | [diff] [blame] | 25 | #include <intel_aub.h> |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 26 | |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 27 | #define VERTEX_SIZE (3*4) |
| 28 | |
| 29 | #if DEBUG_RENDERCPY |
Damien Lespiau | 91e5897 | 2013-02-27 14:51:34 +0000 | [diff] [blame] | 30 | static void dump_batch(struct intel_batchbuffer *batch) { |
| 31 | int fd = open("/tmp/i965-batchbuffers.dump", O_WRONLY | O_CREAT, 0666); |
| 32 | if (fd != -1) { |
Thomas Wood | 47f6b13 | 2015-03-25 16:42:57 +0000 | [diff] [blame] | 33 | igt_assert_eq(write(fd, batch->buffer, 4096), 4096); |
Damien Lespiau | 91e5897 | 2013-02-27 14:51:34 +0000 | [diff] [blame] | 34 | fd = close(fd); |
| 35 | } |
| 36 | } |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 37 | #else |
| 38 | #define dump_batch(x) do { } while(0) |
| 39 | #endif |
| 40 | |
| 41 | struct { |
| 42 | uint32_t cc_state; |
| 43 | uint32_t blend_state; |
| 44 | } cc; |
| 45 | |
| 46 | struct { |
| 47 | uint32_t cc_state; |
| 48 | uint32_t sf_clip_state; |
| 49 | } viewport; |
| 50 | |
| 51 | /* see shaders/ps/blit.g7a */ |
| 52 | static const uint32_t ps_kernel[][4] = { |
| 53 | #if 1 |
| 54 | { 0x0060005a, 0x21403ae8, 0x3a0000c0, 0x008d0040 }, |
| 55 | { 0x0060005a, 0x21603ae8, 0x3a0000c0, 0x008d0080 }, |
| 56 | { 0x0060005a, 0x21803ae8, 0x3a0000d0, 0x008d0040 }, |
| 57 | { 0x0060005a, 0x21a03ae8, 0x3a0000d0, 0x008d0080 }, |
| 58 | { 0x02800031, 0x2e0022e8, 0x0e000140, 0x08840001 }, |
| 59 | { 0x05800031, 0x200022e0, 0x0e000e00, 0x90031000 }, |
| 60 | #else |
| 61 | /* Write all -1 */ |
Damien Lespiau | 91e5897 | 2013-02-27 14:51:34 +0000 | [diff] [blame] | 62 | { 0x00600001, 0x2e000608, 0x00000000, 0x3f800000 }, |
| 63 | { 0x00600001, 0x2e200608, 0x00000000, 0x3f800000 }, |
| 64 | { 0x00600001, 0x2e400608, 0x00000000, 0x3f800000 }, |
| 65 | { 0x00600001, 0x2e600608, 0x00000000, 0x3f800000 }, |
| 66 | { 0x00600001, 0x2e800608, 0x00000000, 0x3f800000 }, |
| 67 | { 0x00600001, 0x2ea00608, 0x00000000, 0x3f800000 }, |
| 68 | { 0x00600001, 0x2ec00608, 0x00000000, 0x3f800000 }, |
| 69 | { 0x00600001, 0x2ee00608, 0x00000000, 0x3f800000 }, |
| 70 | { 0x05800031, 0x200022e0, 0x0e000e00, 0x90031000 }, |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 71 | #endif |
| 72 | }; |
| 73 | |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 74 | /* AUB annotation support */ |
| 75 | #define MAX_ANNOTATIONS 33 |
| 76 | struct annotations_context { |
| 77 | drm_intel_aub_annotation annotations[MAX_ANNOTATIONS]; |
| 78 | int index; |
| 79 | uint32_t offset; |
Chris Wilson | 14c6615 | 2014-12-18 11:44:52 +0000 | [diff] [blame] | 80 | }; |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 81 | |
Chris Wilson | 14c6615 | 2014-12-18 11:44:52 +0000 | [diff] [blame] | 82 | static void annotation_init(struct annotations_context *aub) |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 83 | { |
Chris Wilson | 14c6615 | 2014-12-18 11:44:52 +0000 | [diff] [blame] | 84 | /* aub->annotations is an array keeping a list of annotations of the |
| 85 | * batch buffer ordered by offset. aub->annotations[0] is thus left |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 86 | * for the command stream and will be filled just before executing |
| 87 | * the batch buffer with annotations_add_batch() */ |
Chris Wilson | 14c6615 | 2014-12-18 11:44:52 +0000 | [diff] [blame] | 88 | aub->index = 1; |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 89 | } |
| 90 | |
| 91 | static void add_annotation(drm_intel_aub_annotation *a, |
| 92 | uint32_t type, uint32_t subtype, |
| 93 | uint32_t ending_offset) |
| 94 | { |
| 95 | a->type = type; |
| 96 | a->subtype = subtype; |
| 97 | a->ending_offset = ending_offset; |
| 98 | } |
| 99 | |
Chris Wilson | 14c6615 | 2014-12-18 11:44:52 +0000 | [diff] [blame] | 100 | static void annotation_add_batch(struct annotations_context *aub, size_t size) |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 101 | { |
Chris Wilson | 14c6615 | 2014-12-18 11:44:52 +0000 | [diff] [blame] | 102 | add_annotation(&aub->annotations[0], AUB_TRACE_TYPE_BATCH, 0, size); |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 103 | } |
| 104 | |
Chris Wilson | 14c6615 | 2014-12-18 11:44:52 +0000 | [diff] [blame] | 105 | static void annotation_add_state(struct annotations_context *aub, |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 106 | uint32_t state_type, |
| 107 | uint32_t start_offset, |
| 108 | size_t size) |
| 109 | { |
Chris Wilson | 14c6615 | 2014-12-18 11:44:52 +0000 | [diff] [blame] | 110 | igt_assert(aub->index < MAX_ANNOTATIONS); |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 111 | |
Chris Wilson | 14c6615 | 2014-12-18 11:44:52 +0000 | [diff] [blame] | 112 | add_annotation(&aub->annotations[aub->index++], |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 113 | AUB_TRACE_TYPE_NOTYPE, 0, |
| 114 | start_offset); |
Chris Wilson | 14c6615 | 2014-12-18 11:44:52 +0000 | [diff] [blame] | 115 | add_annotation(&aub->annotations[aub->index++], |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 116 | AUB_TRACE_TYPE(state_type), |
| 117 | AUB_TRACE_SUBTYPE(state_type), |
| 118 | start_offset + size); |
| 119 | } |
| 120 | |
Chris Wilson | 14c6615 | 2014-12-18 11:44:52 +0000 | [diff] [blame] | 121 | static void annotation_flush(struct annotations_context *aub, |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 122 | struct intel_batchbuffer *batch) |
| 123 | { |
Daniel Vetter | 018f8c3 | 2014-03-22 22:42:35 +0100 | [diff] [blame] | 124 | if (!igt_aub_dump_enabled()) |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 125 | return; |
| 126 | |
| 127 | drm_intel_bufmgr_gem_set_aub_annotations(batch->bo, |
Chris Wilson | 14c6615 | 2014-12-18 11:44:52 +0000 | [diff] [blame] | 128 | aub->annotations, |
| 129 | aub->index); |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 130 | } |
| 131 | |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 132 | static uint32_t |
| 133 | batch_used(struct intel_batchbuffer *batch) |
| 134 | { |
| 135 | return batch->ptr - batch->buffer; |
| 136 | } |
| 137 | |
| 138 | static uint32_t |
| 139 | batch_align(struct intel_batchbuffer *batch, uint32_t align) |
| 140 | { |
| 141 | uint32_t offset = batch_used(batch); |
| 142 | offset = ALIGN(offset, align); |
| 143 | batch->ptr = batch->buffer + offset; |
| 144 | return offset; |
| 145 | } |
| 146 | |
| 147 | static void * |
| 148 | batch_alloc(struct intel_batchbuffer *batch, uint32_t size, uint32_t align) |
| 149 | { |
| 150 | uint32_t offset = batch_align(batch, align); |
| 151 | batch->ptr += size; |
| 152 | return memset(batch->buffer + offset, 0, size); |
| 153 | } |
| 154 | |
| 155 | static uint32_t |
| 156 | batch_offset(struct intel_batchbuffer *batch, void *ptr) |
| 157 | { |
| 158 | return (uint8_t *)ptr - batch->buffer; |
| 159 | } |
| 160 | |
| 161 | static uint32_t |
| 162 | batch_copy(struct intel_batchbuffer *batch, const void *ptr, uint32_t size, uint32_t align) |
| 163 | { |
| 164 | return batch_offset(batch, memcpy(batch_alloc(batch, size, align), ptr, size)); |
| 165 | } |
| 166 | |
| 167 | static void |
Ville Syrjälä | 725da6e | 2013-11-21 19:05:17 +0200 | [diff] [blame] | 168 | gen6_render_flush(struct intel_batchbuffer *batch, |
| 169 | drm_intel_context *context, uint32_t batch_end) |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 170 | { |
| 171 | int ret; |
| 172 | |
| 173 | ret = drm_intel_bo_subdata(batch->bo, 0, 4096, batch->buffer); |
| 174 | if (ret == 0) |
Ville Syrjälä | 725da6e | 2013-11-21 19:05:17 +0200 | [diff] [blame] | 175 | ret = drm_intel_gem_bo_context_exec(batch->bo, context, |
| 176 | batch_end, 0); |
Daniel Vetter | baa6f8b | 2014-08-26 15:03:40 +0200 | [diff] [blame] | 177 | igt_assert(ret == 0); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 178 | } |
| 179 | |
| 180 | /* Mostly copy+paste from gen6, except height, width, pitch moved */ |
| 181 | static uint32_t |
Chris Wilson | 14c6615 | 2014-12-18 11:44:52 +0000 | [diff] [blame] | 182 | gen8_bind_buf(struct intel_batchbuffer *batch, |
| 183 | struct annotations_context *aub, |
| 184 | struct igt_buf *buf, |
| 185 | uint32_t format, int is_dst) |
| 186 | { |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 187 | struct gen8_surface_state *ss; |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 188 | uint32_t write_domain, read_domain, offset; |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 189 | int ret; |
| 190 | |
| 191 | if (is_dst) { |
| 192 | write_domain = read_domain = I915_GEM_DOMAIN_RENDER; |
| 193 | } else { |
| 194 | write_domain = 0; |
| 195 | read_domain = I915_GEM_DOMAIN_SAMPLER; |
| 196 | } |
| 197 | |
Damien Lespiau | 91e5897 | 2013-02-27 14:51:34 +0000 | [diff] [blame] | 198 | ss = batch_alloc(batch, sizeof(*ss), 64); |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 199 | offset = batch_offset(batch, ss); |
Chris Wilson | 14c6615 | 2014-12-18 11:44:52 +0000 | [diff] [blame] | 200 | annotation_add_state(aub, AUB_TRACE_SURFACE_STATE, offset, sizeof(*ss)); |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 201 | |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 202 | ss->ss0.surface_type = GEN6_SURFACE_2D; |
| 203 | ss->ss0.surface_format = format; |
| 204 | ss->ss0.render_cache_read_write = 1; |
Damien Lespiau | 91e5897 | 2013-02-27 14:51:34 +0000 | [diff] [blame] | 205 | ss->ss0.vertical_alignment = 1; /* align 4 */ |
| 206 | ss->ss0.horizontal_alignment = 1; /* align 4 */ |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 207 | if (buf->tiling == I915_TILING_X) |
| 208 | ss->ss0.tiled_mode = 2; |
| 209 | else if (buf->tiling == I915_TILING_Y) |
| 210 | ss->ss0.tiled_mode = 3; |
| 211 | |
| 212 | ss->ss8.base_addr = buf->bo->offset; |
| 213 | |
| 214 | ret = drm_intel_bo_emit_reloc(batch->bo, |
Damien Lespiau | 91e5897 | 2013-02-27 14:51:34 +0000 | [diff] [blame] | 215 | batch_offset(batch, ss) + 8 * 4, |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 216 | buf->bo, 0, |
| 217 | read_domain, write_domain); |
Daniel Vetter | baa6f8b | 2014-08-26 15:03:40 +0200 | [diff] [blame] | 218 | igt_assert(ret == 0); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 219 | |
Daniel Vetter | 83a4c7d | 2014-03-22 15:44:48 +0100 | [diff] [blame] | 220 | ss->ss2.height = igt_buf_height(buf) - 1; |
| 221 | ss->ss2.width = igt_buf_width(buf) - 1; |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 222 | ss->ss3.pitch = buf->stride - 1; |
| 223 | |
Damien Lespiau | 91e5897 | 2013-02-27 14:51:34 +0000 | [diff] [blame] | 224 | ss->ss7.shader_chanel_select_r = 4; |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 225 | ss->ss7.shader_chanel_select_g = 5; |
| 226 | ss->ss7.shader_chanel_select_b = 6; |
| 227 | ss->ss7.shader_chanel_select_a = 7; |
| 228 | |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 229 | return offset; |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 230 | } |
| 231 | |
| 232 | static uint32_t |
| 233 | gen8_bind_surfaces(struct intel_batchbuffer *batch, |
Chris Wilson | 14c6615 | 2014-12-18 11:44:52 +0000 | [diff] [blame] | 234 | struct annotations_context *aub, |
Daniel Vetter | 83a4c7d | 2014-03-22 15:44:48 +0100 | [diff] [blame] | 235 | struct igt_buf *src, |
| 236 | struct igt_buf *dst) |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 237 | { |
| 238 | uint32_t *binding_table, offset; |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 239 | |
| 240 | binding_table = batch_alloc(batch, 8, 32); |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 241 | offset = batch_offset(batch, binding_table); |
Chris Wilson | 14c6615 | 2014-12-18 11:44:52 +0000 | [diff] [blame] | 242 | annotation_add_state(aub, AUB_TRACE_BINDING_TABLE, offset, 8); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 243 | |
| 244 | binding_table[0] = |
Chris Wilson | 14c6615 | 2014-12-18 11:44:52 +0000 | [diff] [blame] | 245 | gen8_bind_buf(batch, aub, |
| 246 | dst, GEN6_SURFACEFORMAT_B8G8R8A8_UNORM, 1); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 247 | binding_table[1] = |
Chris Wilson | 14c6615 | 2014-12-18 11:44:52 +0000 | [diff] [blame] | 248 | gen8_bind_buf(batch, aub, |
| 249 | src, GEN6_SURFACEFORMAT_B8G8R8A8_UNORM, 0); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 250 | |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 251 | return offset; |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 252 | } |
| 253 | |
| 254 | /* Mostly copy+paste from gen6, except wrap modes moved */ |
| 255 | static uint32_t |
Chris Wilson | 14c6615 | 2014-12-18 11:44:52 +0000 | [diff] [blame] | 256 | gen8_create_sampler(struct intel_batchbuffer *batch, |
| 257 | struct annotations_context *aub) |
| 258 | { |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 259 | struct gen8_sampler_state *ss; |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 260 | uint32_t offset; |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 261 | |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 262 | ss = batch_alloc(batch, sizeof(*ss), 64); |
| 263 | offset = batch_offset(batch, ss); |
Chris Wilson | 14c6615 | 2014-12-18 11:44:52 +0000 | [diff] [blame] | 264 | annotation_add_state(aub, AUB_TRACE_SAMPLER_STATE, |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 265 | offset, sizeof(*ss)); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 266 | |
| 267 | ss->ss0.min_filter = GEN6_MAPFILTER_NEAREST; |
| 268 | ss->ss0.mag_filter = GEN6_MAPFILTER_NEAREST; |
| 269 | ss->ss3.r_wrap_mode = GEN6_TEXCOORDMODE_CLAMP; |
| 270 | ss->ss3.s_wrap_mode = GEN6_TEXCOORDMODE_CLAMP; |
| 271 | ss->ss3.t_wrap_mode = GEN6_TEXCOORDMODE_CLAMP; |
| 272 | |
| 273 | /* I've experimented with non-normalized coordinates and using the LD |
| 274 | * sampler fetch, but couldn't make it work. */ |
| 275 | ss->ss3.non_normalized_coord = 0; |
| 276 | |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 277 | return offset; |
| 278 | } |
| 279 | |
| 280 | static uint32_t |
| 281 | gen8_fill_ps(struct intel_batchbuffer *batch, |
Chris Wilson | 14c6615 | 2014-12-18 11:44:52 +0000 | [diff] [blame] | 282 | struct annotations_context *aub, |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 283 | const uint32_t kernel[][4], |
| 284 | size_t size) |
| 285 | { |
| 286 | uint32_t offset; |
| 287 | |
| 288 | offset = batch_copy(batch, kernel, size, 64); |
Chris Wilson | 14c6615 | 2014-12-18 11:44:52 +0000 | [diff] [blame] | 289 | annotation_add_state(aub, AUB_TRACE_KERNEL_INSTRUCTIONS, offset, size); |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 290 | |
| 291 | return offset; |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 292 | } |
| 293 | |
Thomas Wood | 1e5c878 | 2014-06-09 14:02:04 +0100 | [diff] [blame] | 294 | /* |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 295 | * gen7_fill_vertex_buffer_data populate vertex buffer with data. |
| 296 | * |
| 297 | * The vertex buffer consists of 3 vertices to construct a RECTLIST. The 4th |
| 298 | * vertex is implied (automatically derived by the HW). Each element has the |
| 299 | * destination offset, and the normalized texture offset (src). The rectangle |
| 300 | * itself will span the entire subsurface to be copied. |
| 301 | * |
| 302 | * see gen6_emit_vertex_elements |
| 303 | */ |
| 304 | static uint32_t |
| 305 | gen7_fill_vertex_buffer_data(struct intel_batchbuffer *batch, |
Chris Wilson | 14c6615 | 2014-12-18 11:44:52 +0000 | [diff] [blame] | 306 | struct annotations_context *aub, |
Daniel Vetter | 83a4c7d | 2014-03-22 15:44:48 +0100 | [diff] [blame] | 307 | struct igt_buf *src, |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 308 | uint32_t src_x, uint32_t src_y, |
| 309 | uint32_t dst_x, uint32_t dst_y, |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 310 | uint32_t width, uint32_t height) |
| 311 | { |
| 312 | void *start; |
| 313 | uint32_t offset; |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 314 | |
Damien Lespiau | 91e5897 | 2013-02-27 14:51:34 +0000 | [diff] [blame] | 315 | batch_align(batch, 8); |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 316 | start = batch->ptr; |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 317 | |
| 318 | emit_vertex_2s(batch, dst_x + width, dst_y + height); |
Daniel Vetter | 83a4c7d | 2014-03-22 15:44:48 +0100 | [diff] [blame] | 319 | emit_vertex_normalized(batch, src_x + width, igt_buf_width(src)); |
| 320 | emit_vertex_normalized(batch, src_y + height, igt_buf_height(src)); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 321 | |
| 322 | emit_vertex_2s(batch, dst_x, dst_y + height); |
Daniel Vetter | 83a4c7d | 2014-03-22 15:44:48 +0100 | [diff] [blame] | 323 | emit_vertex_normalized(batch, src_x, igt_buf_width(src)); |
| 324 | emit_vertex_normalized(batch, src_y + height, igt_buf_height(src)); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 325 | |
| 326 | emit_vertex_2s(batch, dst_x, dst_y); |
Daniel Vetter | 83a4c7d | 2014-03-22 15:44:48 +0100 | [diff] [blame] | 327 | emit_vertex_normalized(batch, src_x, igt_buf_width(src)); |
| 328 | emit_vertex_normalized(batch, src_y, igt_buf_height(src)); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 329 | |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 330 | offset = batch_offset(batch, start); |
Chris Wilson | 14c6615 | 2014-12-18 11:44:52 +0000 | [diff] [blame] | 331 | annotation_add_state(aub, AUB_TRACE_VERTEX_BUFFER, |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 332 | offset, 3 * VERTEX_SIZE); |
| 333 | return offset; |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 334 | } |
| 335 | |
Thomas Wood | 1e5c878 | 2014-06-09 14:02:04 +0100 | [diff] [blame] | 336 | /* |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 337 | * gen6_emit_vertex_elements - The vertex elements describe the contents of the |
| 338 | * vertex buffer. We pack the vertex buffer in a semi weird way, conforming to |
| 339 | * what gen6_rendercopy did. The most straightforward would be to store |
| 340 | * everything as floats. |
| 341 | * |
| 342 | * see gen7_fill_vertex_buffer_data() for where the corresponding elements are |
| 343 | * packed. |
| 344 | */ |
| 345 | static void |
| 346 | gen6_emit_vertex_elements(struct intel_batchbuffer *batch) { |
| 347 | /* |
| 348 | * The VUE layout |
| 349 | * dword 0-3: pad (0, 0, 0. 0) |
| 350 | * dword 4-7: position (x, y, 0, 1.0), |
| 351 | * dword 8-11: texture coordinate 0 (u0, v0, 0, 1.0) |
| 352 | */ |
| 353 | OUT_BATCH(GEN6_3DSTATE_VERTEX_ELEMENTS | (3 * 2 + 1 - 2)); |
| 354 | |
| 355 | /* Element state 0. These are 4 dwords of 0 required for the VUE format. |
| 356 | * We don't really know or care what they do. |
| 357 | */ |
| 358 | OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | |
| 359 | GEN6_SURFACEFORMAT_R32G32B32A32_FLOAT << VE0_FORMAT_SHIFT | |
| 360 | 0 << VE0_OFFSET_SHIFT); /* we specify 0, but it's really does not exist */ |
| 361 | OUT_BATCH(GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_0_SHIFT | |
| 362 | GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_1_SHIFT | |
| 363 | GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT | |
| 364 | GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_3_SHIFT); |
| 365 | |
| 366 | /* Element state 1 - Our "destination" vertices. These are passed down |
| 367 | * through the pipeline, and eventually make it to the pixel shader as |
| 368 | * the offsets in the destination surface. It's packed as the 16 |
| 369 | * signed/scaled because of gen6 rendercopy. I see no particular reason |
| 370 | * for doing this though. |
| 371 | */ |
| 372 | OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | |
| 373 | GEN6_SURFACEFORMAT_R16G16_SSCALED << VE0_FORMAT_SHIFT | |
| 374 | 0 << VE0_OFFSET_SHIFT); /* offsets vb in bytes */ |
| 375 | OUT_BATCH(GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT | |
| 376 | GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT | |
| 377 | GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT | |
| 378 | GEN6_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT); |
| 379 | |
| 380 | /* Element state 2. Last but not least we store the U,V components as |
| 381 | * normalized floats. These will be used in the pixel shader to sample |
| 382 | * from the source buffer. |
| 383 | */ |
| 384 | OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | |
| 385 | GEN6_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT | |
| 386 | 4 << VE0_OFFSET_SHIFT); /* offset vb in bytes */ |
| 387 | OUT_BATCH(GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT | |
| 388 | GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT | |
| 389 | GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT | |
| 390 | GEN6_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT); |
| 391 | } |
| 392 | |
Thomas Wood | 1e5c878 | 2014-06-09 14:02:04 +0100 | [diff] [blame] | 393 | /* |
Chris Wilson | f473a55 | 2014-09-01 07:23:30 +0100 | [diff] [blame] | 394 | * gen8_emit_vertex_buffer emit the vertex buffers command |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 395 | * |
| 396 | * @batch |
| 397 | * @offset - bytw offset within the @batch where the vertex buffer starts. |
| 398 | */ |
Chris Wilson | f473a55 | 2014-09-01 07:23:30 +0100 | [diff] [blame] | 399 | static void gen8_emit_vertex_buffer(struct intel_batchbuffer *batch, |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 400 | uint32_t offset) { |
Damien Lespiau | 91e5897 | 2013-02-27 14:51:34 +0000 | [diff] [blame] | 401 | OUT_BATCH(GEN6_3DSTATE_VERTEX_BUFFERS | (1 + (4 * 1) - 2)); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 402 | OUT_BATCH(0 << VB0_BUFFER_INDEX_SHIFT | /* VB 0th index */ |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 403 | GEN7_VB0_BUFFER_ADDR_MOD_EN | /* Address Modify Enable */ |
| 404 | VERTEX_SIZE << VB0_BUFFER_PITCH_SHIFT); |
| 405 | OUT_RELOC(batch->bo, I915_GEM_DOMAIN_VERTEX, 0, offset); |
Damien Lespiau | 91e5897 | 2013-02-27 14:51:34 +0000 | [diff] [blame] | 406 | OUT_BATCH(3 * VERTEX_SIZE); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 407 | } |
| 408 | |
| 409 | static uint32_t |
Chris Wilson | 14c6615 | 2014-12-18 11:44:52 +0000 | [diff] [blame] | 410 | gen6_create_cc_state(struct intel_batchbuffer *batch, |
| 411 | struct annotations_context *aub) |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 412 | { |
| 413 | struct gen6_color_calc_state *cc_state; |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 414 | uint32_t offset; |
| 415 | |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 416 | cc_state = batch_alloc(batch, sizeof(*cc_state), 64); |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 417 | offset = batch_offset(batch, cc_state); |
Chris Wilson | 14c6615 | 2014-12-18 11:44:52 +0000 | [diff] [blame] | 418 | annotation_add_state(aub, AUB_TRACE_CC_STATE, |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 419 | offset, sizeof(*cc_state)); |
| 420 | |
| 421 | return offset; |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 422 | } |
| 423 | |
| 424 | static uint32_t |
Chris Wilson | 14c6615 | 2014-12-18 11:44:52 +0000 | [diff] [blame] | 425 | gen8_create_blend_state(struct intel_batchbuffer *batch, |
| 426 | struct annotations_context *aub) |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 427 | { |
| 428 | struct gen8_blend_state *blend; |
| 429 | int i; |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 430 | uint32_t offset; |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 431 | |
| 432 | blend = batch_alloc(batch, sizeof(*blend), 64); |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 433 | offset = batch_offset(batch, blend); |
Chris Wilson | 14c6615 | 2014-12-18 11:44:52 +0000 | [diff] [blame] | 434 | annotation_add_state(aub, AUB_TRACE_BLEND_STATE, |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 435 | offset, sizeof(*blend)); |
| 436 | |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 437 | for (i = 0; i < 16; i++) { |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 438 | blend->bs[i].dest_blend_factor = GEN6_BLENDFACTOR_ZERO; |
| 439 | blend->bs[i].source_blend_factor = GEN6_BLENDFACTOR_ONE; |
| 440 | blend->bs[i].color_blend_func = GEN6_BLENDFUNCTION_ADD; |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 441 | blend->bs[i].pre_blend_color_clamp = 1; |
| 442 | blend->bs[i].color_buffer_blend = 0; |
| 443 | } |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 444 | |
| 445 | return offset; |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 446 | } |
| 447 | |
| 448 | static uint32_t |
Chris Wilson | 14c6615 | 2014-12-18 11:44:52 +0000 | [diff] [blame] | 449 | gen6_create_cc_viewport(struct intel_batchbuffer *batch, |
| 450 | struct annotations_context *aub) |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 451 | { |
| 452 | struct gen6_cc_viewport *vp; |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 453 | uint32_t offset; |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 454 | |
| 455 | vp = batch_alloc(batch, sizeof(*vp), 32); |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 456 | offset = batch_offset(batch, vp); |
Chris Wilson | 14c6615 | 2014-12-18 11:44:52 +0000 | [diff] [blame] | 457 | annotation_add_state(aub, AUB_TRACE_CC_VP_STATE, |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 458 | offset, sizeof(*vp)); |
| 459 | |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 460 | /* XXX I don't understand this */ |
| 461 | vp->min_depth = -1.e35; |
| 462 | vp->max_depth = 1.e35; |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 463 | |
| 464 | return offset; |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 465 | } |
| 466 | |
| 467 | static uint32_t |
Chris Wilson | 14c6615 | 2014-12-18 11:44:52 +0000 | [diff] [blame] | 468 | gen7_create_sf_clip_viewport(struct intel_batchbuffer *batch, |
| 469 | struct annotations_context *aub) |
| 470 | { |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 471 | /* XXX these are likely not needed */ |
| 472 | struct gen7_sf_clip_viewport *scv_state; |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 473 | uint32_t offset; |
| 474 | |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 475 | scv_state = batch_alloc(batch, sizeof(*scv_state), 64); |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 476 | offset = batch_offset(batch, scv_state); |
Chris Wilson | 14c6615 | 2014-12-18 11:44:52 +0000 | [diff] [blame] | 477 | annotation_add_state(aub, AUB_TRACE_CLIP_VP_STATE, |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 478 | offset, sizeof(*scv_state)); |
| 479 | |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 480 | scv_state->guardband.xmin = 0; |
| 481 | scv_state->guardband.xmax = 1.0f; |
| 482 | scv_state->guardband.ymin = 0; |
| 483 | scv_state->guardband.ymax = 1.0f; |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 484 | |
| 485 | return offset; |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 486 | } |
| 487 | |
| 488 | static uint32_t |
Chris Wilson | 14c6615 | 2014-12-18 11:44:52 +0000 | [diff] [blame] | 489 | gen6_create_scissor_rect(struct intel_batchbuffer *batch, |
| 490 | struct annotations_context *aub) |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 491 | { |
| 492 | struct gen6_scissor_rect *scissor; |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 493 | uint32_t offset; |
| 494 | |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 495 | scissor = batch_alloc(batch, sizeof(*scissor), 64); |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 496 | offset = batch_offset(batch, scissor); |
Chris Wilson | 14c6615 | 2014-12-18 11:44:52 +0000 | [diff] [blame] | 497 | annotation_add_state(aub, AUB_TRACE_SCISSOR_STATE, |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 498 | offset, sizeof(*scissor)); |
| 499 | |
| 500 | return offset; |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 501 | } |
| 502 | |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 503 | static void |
Damien Lespiau | ffff68f | 2013-11-22 17:36:54 +0000 | [diff] [blame] | 504 | gen8_emit_sip(struct intel_batchbuffer *batch) { |
| 505 | OUT_BATCH(GEN6_STATE_SIP | (3 - 2)); |
| 506 | OUT_BATCH(0); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 507 | OUT_BATCH(0); |
| 508 | } |
| 509 | |
| 510 | static void |
| 511 | gen7_emit_push_constants(struct intel_batchbuffer *batch) { |
| 512 | OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS); |
| 513 | OUT_BATCH(0); |
| 514 | OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS); |
| 515 | OUT_BATCH(0); |
| 516 | OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS); |
| 517 | OUT_BATCH(0); |
| 518 | OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS); |
| 519 | OUT_BATCH(0); |
| 520 | OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS); |
| 521 | OUT_BATCH(0); |
| 522 | } |
| 523 | |
| 524 | static void |
Damien Lespiau | 91e5897 | 2013-02-27 14:51:34 +0000 | [diff] [blame] | 525 | gen8_emit_state_base_address(struct intel_batchbuffer *batch) { |
| 526 | OUT_BATCH(GEN6_STATE_BASE_ADDRESS | (16 - 2)); |
| 527 | |
| 528 | /* general */ |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 529 | OUT_BATCH(0 | BASE_ADDRESS_MODIFY); |
Damien Lespiau | 91e5897 | 2013-02-27 14:51:34 +0000 | [diff] [blame] | 530 | OUT_BATCH(0); |
| 531 | |
| 532 | /* stateless data port */ |
| 533 | OUT_BATCH(0 | BASE_ADDRESS_MODIFY); |
| 534 | |
| 535 | /* surface */ |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 536 | OUT_RELOC(batch->bo, I915_GEM_DOMAIN_SAMPLER, 0, BASE_ADDRESS_MODIFY); |
Damien Lespiau | 91e5897 | 2013-02-27 14:51:34 +0000 | [diff] [blame] | 537 | |
| 538 | /* dynamic */ |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 539 | OUT_RELOC(batch->bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION, |
| 540 | 0, BASE_ADDRESS_MODIFY); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 541 | |
Damien Lespiau | 91e5897 | 2013-02-27 14:51:34 +0000 | [diff] [blame] | 542 | /* indirect */ |
| 543 | OUT_BATCH(0); |
| 544 | OUT_BATCH(0); |
| 545 | |
| 546 | /* instruction */ |
| 547 | OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); |
Damien Lespiau | 91e5897 | 2013-02-27 14:51:34 +0000 | [diff] [blame] | 548 | |
| 549 | /* general state buffer size */ |
| 550 | OUT_BATCH(0xfffff000 | 1); |
| 551 | /* dynamic state buffer size */ |
| 552 | OUT_BATCH(1 << 12 | 1); |
| 553 | /* indirect object buffer size */ |
| 554 | OUT_BATCH(0xfffff000 | 1); |
| 555 | /* intruction buffer size */ |
Xiang, Haihao | adbd83c | 2013-12-06 16:54:45 +0800 | [diff] [blame] | 556 | OUT_BATCH(1 << 12 | 1); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 557 | } |
| 558 | |
| 559 | static void |
| 560 | gen7_emit_urb(struct intel_batchbuffer *batch) { |
| 561 | /* XXX: Min valid values from mesa */ |
Damien Lespiau | 91e5897 | 2013-02-27 14:51:34 +0000 | [diff] [blame] | 562 | const int vs_entries = 64; |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 563 | const int vs_size = 2; |
| 564 | const int vs_start = 2; |
| 565 | |
| 566 | OUT_BATCH(GEN7_3DSTATE_URB_VS); |
| 567 | OUT_BATCH(vs_entries | ((vs_size - 1) << 16) | (vs_start << 25)); |
| 568 | OUT_BATCH(GEN7_3DSTATE_URB_GS); |
| 569 | OUT_BATCH(vs_start << 25); |
| 570 | OUT_BATCH(GEN7_3DSTATE_URB_HS); |
| 571 | OUT_BATCH(vs_start << 25); |
| 572 | OUT_BATCH(GEN7_3DSTATE_URB_DS); |
| 573 | OUT_BATCH(vs_start << 25); |
| 574 | } |
| 575 | |
| 576 | static void |
| 577 | gen8_emit_cc(struct intel_batchbuffer *batch) { |
| 578 | OUT_BATCH(GEN7_3DSTATE_BLEND_STATE_POINTERS); |
| 579 | OUT_BATCH(cc.blend_state | 1); |
| 580 | |
| 581 | OUT_BATCH(GEN6_3DSTATE_CC_STATE_POINTERS); |
| 582 | OUT_BATCH(cc.cc_state | 1); |
| 583 | } |
| 584 | |
| 585 | static void |
Damien Lespiau | 91e5897 | 2013-02-27 14:51:34 +0000 | [diff] [blame] | 586 | gen8_emit_multisample(struct intel_batchbuffer *batch) { |
Damien Lespiau | e824fdd | 2013-11-22 18:11:03 +0000 | [diff] [blame] | 587 | OUT_BATCH(GEN8_3DSTATE_MULTISAMPLE); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 588 | OUT_BATCH(0); |
| 589 | |
| 590 | OUT_BATCH(GEN6_3DSTATE_SAMPLE_MASK); |
| 591 | OUT_BATCH(1); |
| 592 | } |
| 593 | |
| 594 | static void |
Damien Lespiau | e824fdd | 2013-11-22 18:11:03 +0000 | [diff] [blame] | 595 | gen8_emit_vs(struct intel_batchbuffer *batch) { |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 596 | OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS); |
| 597 | OUT_BATCH(0); |
| 598 | |
| 599 | OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS); |
| 600 | OUT_BATCH(0); |
| 601 | |
Damien Lespiau | e824fdd | 2013-11-22 18:11:03 +0000 | [diff] [blame] | 602 | OUT_BATCH(GEN6_3DSTATE_CONSTANT_VS | (11 - 2)); |
| 603 | OUT_BATCH(0); |
| 604 | OUT_BATCH(0); |
| 605 | OUT_BATCH(0); |
| 606 | OUT_BATCH(0); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 607 | OUT_BATCH(0); |
| 608 | OUT_BATCH(0); |
| 609 | OUT_BATCH(0); |
| 610 | OUT_BATCH(0); |
| 611 | OUT_BATCH(0); |
| 612 | OUT_BATCH(0); |
| 613 | |
Kenneth Graunke | f034817 | 2013-12-09 23:29:36 -0800 | [diff] [blame] | 614 | OUT_BATCH(GEN6_3DSTATE_VS | (9-2)); |
| 615 | OUT_BATCH(0); |
| 616 | OUT_BATCH(0); |
| 617 | OUT_BATCH(0); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 618 | OUT_BATCH(0); |
| 619 | OUT_BATCH(0); |
| 620 | OUT_BATCH(0); |
| 621 | OUT_BATCH(0); |
| 622 | OUT_BATCH(0); |
| 623 | } |
| 624 | |
| 625 | static void |
Damien Lespiau | e824fdd | 2013-11-22 18:11:03 +0000 | [diff] [blame] | 626 | gen8_emit_hs(struct intel_batchbuffer *batch) { |
| 627 | OUT_BATCH(GEN7_3DSTATE_CONSTANT_HS | (11 - 2)); |
| 628 | OUT_BATCH(0); |
| 629 | OUT_BATCH(0); |
| 630 | OUT_BATCH(0); |
| 631 | OUT_BATCH(0); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 632 | OUT_BATCH(0); |
| 633 | OUT_BATCH(0); |
| 634 | OUT_BATCH(0); |
| 635 | OUT_BATCH(0); |
| 636 | OUT_BATCH(0); |
| 637 | OUT_BATCH(0); |
| 638 | |
Kenneth Graunke | f034817 | 2013-12-09 23:29:36 -0800 | [diff] [blame] | 639 | OUT_BATCH(GEN7_3DSTATE_HS | (9-2)); |
| 640 | OUT_BATCH(0); |
| 641 | OUT_BATCH(0); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 642 | OUT_BATCH(0); |
| 643 | OUT_BATCH(0); |
| 644 | OUT_BATCH(0); |
| 645 | OUT_BATCH(0); |
| 646 | OUT_BATCH(0); |
| 647 | OUT_BATCH(0); |
| 648 | |
| 649 | OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS); |
| 650 | OUT_BATCH(0); |
| 651 | |
| 652 | OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS); |
| 653 | OUT_BATCH(0); |
| 654 | } |
| 655 | |
| 656 | static void |
Damien Lespiau | e824fdd | 2013-11-22 18:11:03 +0000 | [diff] [blame] | 657 | gen8_emit_gs(struct intel_batchbuffer *batch) { |
| 658 | OUT_BATCH(GEN7_3DSTATE_CONSTANT_GS | (11 - 2)); |
| 659 | OUT_BATCH(0); |
| 660 | OUT_BATCH(0); |
| 661 | OUT_BATCH(0); |
| 662 | OUT_BATCH(0); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 663 | OUT_BATCH(0); |
| 664 | OUT_BATCH(0); |
| 665 | OUT_BATCH(0); |
| 666 | OUT_BATCH(0); |
| 667 | OUT_BATCH(0); |
| 668 | OUT_BATCH(0); |
| 669 | |
Kenneth Graunke | f034817 | 2013-12-09 23:29:36 -0800 | [diff] [blame] | 670 | OUT_BATCH(GEN7_3DSTATE_GS | (10-2)); |
| 671 | OUT_BATCH(0); |
| 672 | OUT_BATCH(0); |
| 673 | OUT_BATCH(0); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 674 | OUT_BATCH(0); |
| 675 | OUT_BATCH(0); |
| 676 | OUT_BATCH(0); |
| 677 | OUT_BATCH(0); |
| 678 | OUT_BATCH(0); |
| 679 | OUT_BATCH(0); |
| 680 | |
| 681 | OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS); |
| 682 | OUT_BATCH(0); |
| 683 | |
| 684 | OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS); |
| 685 | OUT_BATCH(0); |
| 686 | } |
| 687 | |
| 688 | static void |
Damien Lespiau | e824fdd | 2013-11-22 18:11:03 +0000 | [diff] [blame] | 689 | gen8_emit_ds(struct intel_batchbuffer *batch) { |
| 690 | OUT_BATCH(GEN7_3DSTATE_CONSTANT_DS | (11 - 2)); |
| 691 | OUT_BATCH(0); |
| 692 | OUT_BATCH(0); |
| 693 | OUT_BATCH(0); |
| 694 | OUT_BATCH(0); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 695 | OUT_BATCH(0); |
| 696 | OUT_BATCH(0); |
| 697 | OUT_BATCH(0); |
| 698 | OUT_BATCH(0); |
| 699 | OUT_BATCH(0); |
| 700 | OUT_BATCH(0); |
| 701 | |
Kenneth Graunke | f034817 | 2013-12-09 23:29:36 -0800 | [diff] [blame] | 702 | OUT_BATCH(GEN7_3DSTATE_DS | (9-2)); |
| 703 | OUT_BATCH(0); |
| 704 | OUT_BATCH(0); |
| 705 | OUT_BATCH(0); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 706 | OUT_BATCH(0); |
| 707 | OUT_BATCH(0); |
| 708 | OUT_BATCH(0); |
| 709 | OUT_BATCH(0); |
| 710 | OUT_BATCH(0); |
| 711 | |
| 712 | OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS); |
| 713 | OUT_BATCH(0); |
| 714 | |
| 715 | OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS); |
| 716 | OUT_BATCH(0); |
| 717 | } |
| 718 | |
| 719 | static void |
Kenneth Graunke | fdbdc7f | 2013-12-09 23:29:35 -0800 | [diff] [blame] | 720 | gen8_emit_wm_hz_op(struct intel_batchbuffer *batch) { |
| 721 | OUT_BATCH(GEN8_3DSTATE_WM_HZ_OP | (5-2)); |
| 722 | OUT_BATCH(0); |
| 723 | OUT_BATCH(0); |
| 724 | OUT_BATCH(0); |
| 725 | OUT_BATCH(0); |
| 726 | } |
| 727 | |
| 728 | static void |
Damien Lespiau | e824fdd | 2013-11-22 18:11:03 +0000 | [diff] [blame] | 729 | gen8_emit_null_state(struct intel_batchbuffer *batch) { |
Kenneth Graunke | fdbdc7f | 2013-12-09 23:29:35 -0800 | [diff] [blame] | 730 | gen8_emit_wm_hz_op(batch); |
Damien Lespiau | e824fdd | 2013-11-22 18:11:03 +0000 | [diff] [blame] | 731 | gen8_emit_hs(batch); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 732 | OUT_BATCH(GEN7_3DSTATE_TE | (4-2)); |
| 733 | OUT_BATCH(0); |
| 734 | OUT_BATCH(0); |
| 735 | OUT_BATCH(0); |
Damien Lespiau | e824fdd | 2013-11-22 18:11:03 +0000 | [diff] [blame] | 736 | gen8_emit_gs(batch); |
| 737 | gen8_emit_ds(batch); |
| 738 | gen8_emit_vs(batch); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 739 | } |
| 740 | |
| 741 | static void |
| 742 | gen7_emit_clip(struct intel_batchbuffer *batch) { |
| 743 | OUT_BATCH(GEN6_3DSTATE_CLIP | (4 - 2)); |
| 744 | OUT_BATCH(0); |
| 745 | OUT_BATCH(0); /* pass-through */ |
| 746 | OUT_BATCH(0); |
| 747 | } |
| 748 | |
| 749 | static void |
Damien Lespiau | 91e5897 | 2013-02-27 14:51:34 +0000 | [diff] [blame] | 750 | gen8_emit_sf(struct intel_batchbuffer *batch) |
| 751 | { |
| 752 | int i; |
| 753 | |
| 754 | OUT_BATCH(GEN7_3DSTATE_SBE | (4 - 2)); |
| 755 | OUT_BATCH(1 << GEN7_SBE_NUM_OUTPUTS_SHIFT | |
| 756 | GEN8_SBE_FORCE_URB_ENTRY_READ_LENGTH | |
| 757 | GEN8_SBE_FORCE_URB_ENTRY_READ_OFFSET | |
| 758 | 1 << GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT | |
| 759 | 1 << GEN8_SBE_URB_ENTRY_READ_OFFSET_SHIFT); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 760 | OUT_BATCH(0); |
| 761 | OUT_BATCH(0); |
Damien Lespiau | 91e5897 | 2013-02-27 14:51:34 +0000 | [diff] [blame] | 762 | |
| 763 | OUT_BATCH(GEN8_3DSTATE_SBE_SWIZ | (11 - 2)); |
| 764 | for (i = 0; i < 8; i++) |
| 765 | OUT_BATCH(0); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 766 | OUT_BATCH(0); |
| 767 | OUT_BATCH(0); |
Damien Lespiau | 91e5897 | 2013-02-27 14:51:34 +0000 | [diff] [blame] | 768 | |
| 769 | OUT_BATCH(GEN8_3DSTATE_RASTER | (5 - 2)); |
| 770 | OUT_BATCH(GEN8_RASTER_FRONT_WINDING_CCW | GEN8_RASTER_CULL_NONE); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 771 | OUT_BATCH(0); |
| 772 | OUT_BATCH(0); |
| 773 | OUT_BATCH(0); |
| 774 | |
Damien Lespiau | 91e5897 | 2013-02-27 14:51:34 +0000 | [diff] [blame] | 775 | OUT_BATCH(GEN6_3DSTATE_SF | (4 - 2)); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 776 | OUT_BATCH(0); |
| 777 | OUT_BATCH(0); |
| 778 | OUT_BATCH(0); |
| 779 | } |
| 780 | |
| 781 | static void |
| 782 | gen8_emit_ps(struct intel_batchbuffer *batch, uint32_t kernel) { |
Damien Lespiau | 91e5897 | 2013-02-27 14:51:34 +0000 | [diff] [blame] | 783 | const int max_threads = 63; |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 784 | |
Damien Lespiau | 91e5897 | 2013-02-27 14:51:34 +0000 | [diff] [blame] | 785 | OUT_BATCH(GEN6_3DSTATE_WM | (2 - 2)); |
| 786 | OUT_BATCH(/* XXX: I don't understand the BARYCENTRIC stuff, but it |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 787 | * appears we need it to put our setup data in the place we |
| 788 | * expect (g6, see below) */ |
| 789 | GEN7_3DSTATE_PS_PERSPECTIVE_PIXEL_BARYCENTRIC); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 790 | |
Damien Lespiau | 91e5897 | 2013-02-27 14:51:34 +0000 | [diff] [blame] | 791 | OUT_BATCH(GEN6_3DSTATE_CONSTANT_PS | (11-2)); |
| 792 | OUT_BATCH(0); |
| 793 | OUT_BATCH(0); |
| 794 | OUT_BATCH(0); |
| 795 | OUT_BATCH(0); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 796 | OUT_BATCH(0); |
| 797 | OUT_BATCH(0); |
| 798 | OUT_BATCH(0); |
| 799 | OUT_BATCH(0); |
| 800 | OUT_BATCH(0); |
| 801 | OUT_BATCH(0); |
| 802 | |
Damien Lespiau | 91e5897 | 2013-02-27 14:51:34 +0000 | [diff] [blame] | 803 | OUT_BATCH(GEN7_3DSTATE_PS | (12-2)); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 804 | OUT_BATCH(kernel); |
| 805 | OUT_BATCH(0); /* kernel hi */ |
Mika Kuoppala | f0023fa | 2014-08-01 21:19:53 +0300 | [diff] [blame] | 806 | OUT_BATCH(1 << GEN6_3DSTATE_WM_SAMPLER_COUNT_SHIFT | |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 807 | 2 << GEN6_3DSTATE_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT); |
| 808 | OUT_BATCH(0); /* scratch space stuff */ |
| 809 | OUT_BATCH(0); /* scratch hi */ |
Damien Lespiau | 91e5897 | 2013-02-27 14:51:34 +0000 | [diff] [blame] | 810 | OUT_BATCH((max_threads - 1) << GEN8_3DSTATE_PS_MAX_THREADS_SHIFT | |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 811 | GEN6_3DSTATE_WM_16_DISPATCH_ENABLE); |
| 812 | OUT_BATCH(6 << GEN6_3DSTATE_WM_DISPATCH_START_GRF_0_SHIFT); |
| 813 | OUT_BATCH(0); // kernel 1 |
| 814 | OUT_BATCH(0); /* kernel 1 hi */ |
Damien Lespiau | 91e5897 | 2013-02-27 14:51:34 +0000 | [diff] [blame] | 815 | OUT_BATCH(0); // kernel 2 |
| 816 | OUT_BATCH(0); /* kernel 2 hi */ |
| 817 | |
| 818 | OUT_BATCH(GEN8_3DSTATE_PS_BLEND | (2 - 2)); |
| 819 | OUT_BATCH(GEN8_PS_BLEND_HAS_WRITEABLE_RT); |
| 820 | |
| 821 | OUT_BATCH(GEN8_3DSTATE_PS_EXTRA | (2 - 2)); |
| 822 | OUT_BATCH(GEN8_PSX_PIXEL_SHADER_VALID | GEN8_PSX_ATTRIBUTE_ENABLE); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 823 | } |
| 824 | |
| 825 | static void |
| 826 | gen8_emit_depth(struct intel_batchbuffer *batch) { |
Kenneth Graunke | badb026 | 2014-06-03 14:52:30 -0700 | [diff] [blame] | 827 | OUT_BATCH(GEN8_3DSTATE_WM_DEPTH_STENCIL | (3 - 2)); |
| 828 | OUT_BATCH(0); |
| 829 | OUT_BATCH(0); |
| 830 | |
Kenneth Graunke | f034817 | 2013-12-09 23:29:36 -0800 | [diff] [blame] | 831 | OUT_BATCH(GEN7_3DSTATE_DEPTH_BUFFER | (8-2)); |
| 832 | OUT_BATCH(0); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 833 | OUT_BATCH(0); |
| 834 | OUT_BATCH(0); |
| 835 | OUT_BATCH(0); |
| 836 | OUT_BATCH(0); |
| 837 | OUT_BATCH(0); |
| 838 | OUT_BATCH(0); |
| 839 | |
Damien Lespiau | 09f144b | 2013-11-22 18:12:35 +0000 | [diff] [blame] | 840 | OUT_BATCH(GEN7_3DSTATE_HIER_DEPTH_BUFFER | (5 - 2)); |
| 841 | OUT_BATCH(0); |
| 842 | OUT_BATCH(0); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 843 | OUT_BATCH(0); |
| 844 | OUT_BATCH(0); |
| 845 | |
Damien Lespiau | 34f104a | 2013-11-22 18:14:26 +0000 | [diff] [blame] | 846 | OUT_BATCH(GEN7_3DSTATE_STENCIL_BUFFER | (5 - 2)); |
| 847 | OUT_BATCH(0); |
| 848 | OUT_BATCH(0); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 849 | OUT_BATCH(0); |
| 850 | OUT_BATCH(0); |
| 851 | } |
| 852 | |
| 853 | static void |
| 854 | gen7_emit_clear(struct intel_batchbuffer *batch) { |
| 855 | OUT_BATCH(GEN7_3DSTATE_CLEAR_PARAMS | (3-2)); |
| 856 | OUT_BATCH(0); |
| 857 | OUT_BATCH(1); // clear valid |
| 858 | } |
| 859 | |
| 860 | static void |
Daniel Vetter | 83a4c7d | 2014-03-22 15:44:48 +0100 | [diff] [blame] | 861 | gen6_emit_drawing_rectangle(struct intel_batchbuffer *batch, struct igt_buf *dst) |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 862 | { |
| 863 | OUT_BATCH(GEN6_3DSTATE_DRAWING_RECTANGLE | (4 - 2)); |
| 864 | OUT_BATCH(0); |
Daniel Vetter | 83a4c7d | 2014-03-22 15:44:48 +0100 | [diff] [blame] | 865 | OUT_BATCH((igt_buf_height(dst) - 1) << 16 | (igt_buf_width(dst) - 1)); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 866 | OUT_BATCH(0); |
| 867 | } |
| 868 | |
Damien Lespiau | 91e5897 | 2013-02-27 14:51:34 +0000 | [diff] [blame] | 869 | static void gen8_emit_vf_topology(struct intel_batchbuffer *batch) |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 870 | { |
Damien Lespiau | 91e5897 | 2013-02-27 14:51:34 +0000 | [diff] [blame] | 871 | OUT_BATCH(GEN8_3DSTATE_VF_TOPOLOGY); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 872 | OUT_BATCH(_3DPRIM_RECTLIST); |
Damien Lespiau | 91e5897 | 2013-02-27 14:51:34 +0000 | [diff] [blame] | 873 | } |
| 874 | |
| 875 | /* Vertex elements MUST be defined before this according to spec */ |
| 876 | static void gen8_emit_primitive(struct intel_batchbuffer *batch, uint32_t offset) |
| 877 | { |
| 878 | OUT_BATCH(GEN8_3DSTATE_VF_INSTANCING | (3 - 2)); |
| 879 | OUT_BATCH(0); |
| 880 | OUT_BATCH(0); |
| 881 | |
| 882 | OUT_BATCH(GEN6_3DPRIMITIVE | (7-2)); |
| 883 | OUT_BATCH(0); /* gen8+ ignore the topology type field */ |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 884 | OUT_BATCH(3); /* vertex count */ |
| 885 | OUT_BATCH(0); /* We're specifying this instead with offset in GEN6_3DSTATE_VERTEX_BUFFERS */ |
| 886 | OUT_BATCH(1); /* single instance */ |
| 887 | OUT_BATCH(0); /* start instance location */ |
| 888 | OUT_BATCH(0); /* index buffer offset, ignored */ |
| 889 | } |
| 890 | |
| 891 | /* The general rule is if it's named gen6 it is directly copied from |
| 892 | * gen6_render_copyfunc. |
| 893 | * |
| 894 | * This sets up most of the 3d pipeline, and most of that to NULL state. The |
| 895 | * docs aren't specific about exactly what must be set up NULL, but the general |
| 896 | * rule is we could be run at any time, and so the most state we set to NULL, |
| 897 | * the better our odds of success. |
| 898 | * |
| 899 | * +---------------+ <---- 4096 |
| 900 | * | ^ | |
| 901 | * | | | |
| 902 | * | various | |
| 903 | * | state | |
| 904 | * | | | |
| 905 | * |_______|_______| <---- 2048 + ? |
| 906 | * | ^ | |
| 907 | * | | | |
| 908 | * | batch | |
| 909 | * | commands | |
| 910 | * | | | |
| 911 | * | | | |
| 912 | * +---------------+ <---- 0 + ? |
| 913 | * |
| 914 | * The batch commands point to state within tthe batch, so all state offsets should be |
| 915 | * 0 < offset < 4096. Both commands and state build upwards, and are constructed |
| 916 | * in that order. This means too many batch commands can delete state if not |
| 917 | * careful. |
| 918 | * |
| 919 | */ |
| 920 | |
| 921 | #define BATCH_STATE_SPLIT 2048 |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 922 | |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 923 | void gen8_render_copyfunc(struct intel_batchbuffer *batch, |
Ville Syrjälä | 725da6e | 2013-11-21 19:05:17 +0200 | [diff] [blame] | 924 | drm_intel_context *context, |
Daniel Vetter | 83a4c7d | 2014-03-22 15:44:48 +0100 | [diff] [blame] | 925 | struct igt_buf *src, unsigned src_x, unsigned src_y, |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 926 | unsigned width, unsigned height, |
Daniel Vetter | 83a4c7d | 2014-03-22 15:44:48 +0100 | [diff] [blame] | 927 | struct igt_buf *dst, unsigned dst_x, unsigned dst_y) |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 928 | { |
Chris Wilson | 14c6615 | 2014-12-18 11:44:52 +0000 | [diff] [blame] | 929 | struct annotations_context aub_annotations; |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 930 | uint32_t ps_sampler_state, ps_kernel_off, ps_binding_table; |
| 931 | uint32_t scissor_state; |
| 932 | uint32_t vertex_buffer; |
| 933 | uint32_t batch_end; |
| 934 | |
Ville Syrjälä | 725da6e | 2013-11-21 19:05:17 +0200 | [diff] [blame] | 935 | intel_batchbuffer_flush_with_context(batch, context); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 936 | |
| 937 | batch_align(batch, 8); |
| 938 | |
| 939 | batch->ptr = &batch->buffer[BATCH_STATE_SPLIT]; |
| 940 | |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 941 | annotation_init(&aub_annotations); |
| 942 | |
Chris Wilson | 14c6615 | 2014-12-18 11:44:52 +0000 | [diff] [blame] | 943 | ps_binding_table = gen8_bind_surfaces(batch, &aub_annotations, |
| 944 | src, dst); |
| 945 | ps_sampler_state = gen8_create_sampler(batch, &aub_annotations); |
| 946 | ps_kernel_off = gen8_fill_ps(batch, &aub_annotations, |
| 947 | ps_kernel, sizeof(ps_kernel)); |
| 948 | vertex_buffer = gen7_fill_vertex_buffer_data(batch, &aub_annotations, |
| 949 | src, |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 950 | src_x, src_y, |
| 951 | dst_x, dst_y, |
| 952 | width, height); |
Chris Wilson | 14c6615 | 2014-12-18 11:44:52 +0000 | [diff] [blame] | 953 | cc.cc_state = gen6_create_cc_state(batch, &aub_annotations); |
| 954 | cc.blend_state = gen8_create_blend_state(batch, &aub_annotations); |
| 955 | viewport.cc_state = gen6_create_cc_viewport(batch, &aub_annotations); |
| 956 | viewport.sf_clip_state = gen7_create_sf_clip_viewport(batch, &aub_annotations); |
| 957 | scissor_state = gen6_create_scissor_rect(batch, &aub_annotations); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 958 | /* TODO: theree is other state which isn't setup */ |
| 959 | |
Daniel Vetter | baa6f8b | 2014-08-26 15:03:40 +0200 | [diff] [blame] | 960 | igt_assert(batch->ptr < &batch->buffer[4095]); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 961 | |
| 962 | batch->ptr = batch->buffer; |
| 963 | |
| 964 | /* Start emitting the commands. The order roughly follows the mesa blorp |
| 965 | * order */ |
| 966 | OUT_BATCH(GEN6_PIPELINE_SELECT | PIPELINE_SELECT_3D); |
| 967 | |
Damien Lespiau | ffff68f | 2013-11-22 17:36:54 +0000 | [diff] [blame] | 968 | gen8_emit_sip(batch); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 969 | |
| 970 | gen7_emit_push_constants(batch); |
| 971 | |
Damien Lespiau | 91e5897 | 2013-02-27 14:51:34 +0000 | [diff] [blame] | 972 | gen8_emit_state_base_address(batch); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 973 | |
| 974 | OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC); |
| 975 | OUT_BATCH(viewport.cc_state); |
| 976 | OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP); |
| 977 | OUT_BATCH(viewport.sf_clip_state); |
| 978 | |
| 979 | gen7_emit_urb(batch); |
| 980 | |
| 981 | gen8_emit_cc(batch); |
| 982 | |
Damien Lespiau | 91e5897 | 2013-02-27 14:51:34 +0000 | [diff] [blame] | 983 | gen8_emit_multisample(batch); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 984 | |
Damien Lespiau | e824fdd | 2013-11-22 18:11:03 +0000 | [diff] [blame] | 985 | gen8_emit_null_state(batch); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 986 | |
Kenneth Graunke | f034817 | 2013-12-09 23:29:36 -0800 | [diff] [blame] | 987 | OUT_BATCH(GEN7_3DSTATE_STREAMOUT | (5-2)); |
| 988 | OUT_BATCH(0); |
| 989 | OUT_BATCH(0); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 990 | OUT_BATCH(0); |
| 991 | OUT_BATCH(0); |
| 992 | |
| 993 | gen7_emit_clip(batch); |
| 994 | |
Damien Lespiau | 91e5897 | 2013-02-27 14:51:34 +0000 | [diff] [blame] | 995 | gen8_emit_sf(batch); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 996 | |
| 997 | OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS); |
| 998 | OUT_BATCH(ps_binding_table); |
| 999 | |
| 1000 | OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS); |
| 1001 | OUT_BATCH(ps_sampler_state); |
| 1002 | |
| 1003 | gen8_emit_ps(batch, ps_kernel_off); |
| 1004 | |
| 1005 | OUT_BATCH(GEN6_3DSTATE_SCISSOR_STATE_POINTERS); |
| 1006 | OUT_BATCH(scissor_state); |
| 1007 | |
| 1008 | gen8_emit_depth(batch); |
| 1009 | |
| 1010 | gen7_emit_clear(batch); |
| 1011 | |
| 1012 | gen6_emit_drawing_rectangle(batch, dst); |
| 1013 | |
Chris Wilson | f473a55 | 2014-09-01 07:23:30 +0100 | [diff] [blame] | 1014 | gen8_emit_vertex_buffer(batch, vertex_buffer); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 1015 | gen6_emit_vertex_elements(batch); |
| 1016 | |
Damien Lespiau | 91e5897 | 2013-02-27 14:51:34 +0000 | [diff] [blame] | 1017 | gen8_emit_vf_topology(batch); |
| 1018 | gen8_emit_primitive(batch, vertex_buffer); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 1019 | |
| 1020 | OUT_BATCH(MI_BATCH_BUFFER_END); |
| 1021 | |
| 1022 | batch_end = batch_align(batch, 8); |
Daniel Vetter | baa6f8b | 2014-08-26 15:03:40 +0200 | [diff] [blame] | 1023 | igt_assert(batch_end < BATCH_STATE_SPLIT); |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 1024 | annotation_add_batch(&aub_annotations, batch_end); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 1025 | |
| 1026 | dump_batch(batch); |
| 1027 | |
Damien Lespiau | c82872b | 2013-02-27 14:51:48 +0000 | [diff] [blame] | 1028 | annotation_flush(&aub_annotations, batch); |
| 1029 | |
Ville Syrjälä | 725da6e | 2013-11-21 19:05:17 +0200 | [diff] [blame] | 1030 | gen6_render_flush(batch, context, batch_end); |
Jesse Barnes | 3edfff1 | 2013-02-27 14:51:32 +0000 | [diff] [blame] | 1031 | intel_batchbuffer_reset(batch); |
| 1032 | } |