Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1 | %{ |
| 2 | /* |
| 3 | * Copyright © 2006 Intel Corporation |
| 4 | * |
| 5 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 6 | * copy of this software and associated documentation files (the "Software"), |
| 7 | * to deal in the Software without restriction, including without limitation |
| 8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 9 | * and/or sell copies of the Software, and to permit persons to whom the |
| 10 | * Software is furnished to do so, subject to the following conditions: |
| 11 | * |
| 12 | * The above copyright notice and this permission notice (including the next |
| 13 | * paragraph) shall be included in all copies or substantial portions of the |
| 14 | * Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 22 | * SOFTWARE. |
| 23 | * |
| 24 | * Authors: |
| 25 | * Eric Anholt <eric@anholt.net> |
| 26 | * |
| 27 | */ |
| 28 | |
| 29 | #include <stdio.h> |
Eric Anholt | f2f1856 | 2006-08-22 12:46:37 -0700 | [diff] [blame] | 30 | #include <string.h> |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 31 | #include <stdlib.h> |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 32 | #include <assert.h> |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 33 | #include "gen4asm.h" |
| 34 | #include "brw_defines.h" |
| 35 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 36 | #define DEFAULT_EXECSIZE (ffs(program_defaults.execute_size) - 1) |
| 37 | #define DEFAULT_DSTREGION -1 |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 38 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 39 | extern long int gen_level; |
| 40 | extern int advanced_flag; |
| 41 | extern int yylineno; |
| 42 | extern int need_export; |
Homer Hsing | 88dfdf3 | 2012-09-24 10:06:35 +0800 | [diff] [blame] | 43 | static struct src_operand src_null_reg = |
| 44 | { |
| 45 | .reg_file = BRW_ARCHITECTURE_REGISTER_FILE, |
| 46 | .reg_nr = BRW_ARF_NULL, |
Homer Hsing | b899aba | 2012-09-27 14:56:30 +0800 | [diff] [blame] | 47 | .reg_type = BRW_REGISTER_TYPE_UD, |
Homer Hsing | 88dfdf3 | 2012-09-24 10:06:35 +0800 | [diff] [blame] | 48 | }; |
| 49 | static struct dst_operand dst_null_reg = |
| 50 | { |
| 51 | .reg_file = BRW_ARCHITECTURE_REGISTER_FILE, |
| 52 | .reg_nr = BRW_ARF_NULL, |
| 53 | }; |
Homer Hsing | 7e2461b | 2012-09-27 14:48:14 +0800 | [diff] [blame] | 54 | static struct dst_operand ip_dst = |
| 55 | { |
| 56 | .reg_file = BRW_ARCHITECTURE_REGISTER_FILE, |
| 57 | .reg_nr = BRW_ARF_IP, |
| 58 | .reg_type = BRW_REGISTER_TYPE_UD, |
| 59 | .address_mode = BRW_ADDRESS_DIRECT, |
| 60 | .horiz_stride = 1, |
| 61 | .writemask = 0xF, |
| 62 | }; |
| 63 | static struct src_operand ip_src = |
| 64 | { |
| 65 | .reg_file = BRW_ARCHITECTURE_REGISTER_FILE, |
| 66 | .reg_nr = BRW_ARF_IP, |
| 67 | .reg_type = BRW_REGISTER_TYPE_UD, |
| 68 | .address_mode = BRW_ADDRESS_DIRECT, |
| 69 | .swizzle_x = BRW_CHANNEL_X, |
| 70 | .swizzle_y = BRW_CHANNEL_Y, |
| 71 | .swizzle_z = BRW_CHANNEL_Z, |
| 72 | .swizzle_w = BRW_CHANNEL_W, |
| 73 | }; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 74 | |
| 75 | static int get_type_size(GLuint type); |
Eric Anholt | c8939ed | 2006-08-30 10:50:56 -0700 | [diff] [blame] | 76 | int set_instruction_dest(struct brw_instruction *instr, |
| 77 | struct dst_operand *dest); |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 78 | int set_instruction_src0(struct brw_instruction *instr, |
Eric Anholt | c8939ed | 2006-08-30 10:50:56 -0700 | [diff] [blame] | 79 | struct src_operand *src); |
| 80 | int set_instruction_src1(struct brw_instruction *instr, |
| 81 | struct src_operand *src); |
Homer Hsing | a034bcb | 2012-09-07 14:38:13 +0800 | [diff] [blame] | 82 | int set_instruction_dest_three_src(struct brw_instruction *instr, |
| 83 | struct dst_operand *dest); |
| 84 | int set_instruction_src0_three_src(struct brw_instruction *instr, |
| 85 | struct src_operand *src); |
| 86 | int set_instruction_src1_three_src(struct brw_instruction *instr, |
| 87 | struct src_operand *src); |
| 88 | int set_instruction_src2_three_src(struct brw_instruction *instr, |
| 89 | struct src_operand *src); |
Eric Anholt | c8939ed | 2006-08-30 10:50:56 -0700 | [diff] [blame] | 90 | void set_instruction_options(struct brw_instruction *instr, |
| 91 | struct brw_instruction *options); |
| 92 | void set_instruction_predicate(struct brw_instruction *instr, |
| 93 | struct brw_instruction *predicate); |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 94 | void set_direct_dst_operand(struct dst_operand *dst, struct direct_reg *reg, |
| 95 | int type); |
Eric Anholt | c8939ed | 2006-08-30 10:50:56 -0700 | [diff] [blame] | 96 | void set_direct_src_operand(struct src_operand *src, struct direct_reg *reg, |
| 97 | int type); |
| 98 | |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 99 | %} |
| 100 | |
| 101 | %start ROOT |
| 102 | |
| 103 | %union { |
Zou Nanhai | be9bcee | 2008-12-09 18:38:54 -0800 | [diff] [blame] | 104 | char *string; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 105 | int integer; |
| 106 | double number; |
| 107 | struct brw_instruction instruction; |
| 108 | struct brw_program program; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 109 | struct region region; |
| 110 | struct regtype regtype; |
Eric Anholt | 74c81af | 2006-08-30 11:10:45 -0700 | [diff] [blame] | 111 | struct direct_reg direct_reg; |
| 112 | struct indirect_reg indirect_reg; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 113 | struct condition condition; |
| 114 | struct declared_register symbol_reg; |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 115 | imm32_t imm32; |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 116 | |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 117 | struct dst_operand dst_operand; |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 118 | struct src_operand src_operand; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 119 | } |
| 120 | |
Zou Nanhai | be9bcee | 2008-12-09 18:38:54 -0800 | [diff] [blame] | 121 | %token COLON |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 122 | %token SEMICOLON |
| 123 | %token LPAREN RPAREN |
| 124 | %token LANGLE RANGLE |
| 125 | %token LCURLY RCURLY |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 126 | %token LSQUARE RSQUARE |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 127 | %token COMMA EQ |
| 128 | %token ABS DOT |
| 129 | %token PLUS MINUS MULTIPLY DIVIDE |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 130 | |
Eric Anholt | c8939ed | 2006-08-30 10:50:56 -0700 | [diff] [blame] | 131 | %token <integer> TYPE_UD TYPE_D TYPE_UW TYPE_W TYPE_UB TYPE_B |
| 132 | %token <integer> TYPE_VF TYPE_HF TYPE_V TYPE_F |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 133 | |
Eric Anholt | 908f37d | 2006-08-25 17:33:02 -0700 | [diff] [blame] | 134 | %token ALIGN1 ALIGN16 SECHALF COMPR SWITCH ATOMIC NODDCHK NODDCLR |
Xiang, Haihao | 55d81c4 | 2010-10-08 13:53:22 +0800 | [diff] [blame] | 135 | %token MASK_DISABLE BREAKPOINT ACCWRCTRL EOT |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 136 | |
Keith Packard | 2033aea | 2008-04-23 23:10:40 -0700 | [diff] [blame] | 137 | %token SEQ ANY2H ALL2H ANY4H ALL4H ANY8H ALL8H ANY16H ALL16H ANYV ALLV |
| 138 | %token <integer> ZERO EQUAL NOT_ZERO NOT_EQUAL GREATER GREATER_EQUAL LESS LESS_EQUAL |
| 139 | %token <integer> ROUND_INCREMENT OVERFLOW UNORDERED |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 140 | %token <integer> GENREG MSGREG ADDRESSREG ACCREG FLAGREG |
| 141 | %token <integer> MASKREG AMASK IMASK LMASK CMASK |
| 142 | %token <integer> MASKSTACKREG LMS IMS MASKSTACKDEPTHREG IMSD LMSD |
| 143 | %token <integer> NOTIFYREG STATEREG CONTROLREG IPREG |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 144 | %token GENREGFILE MSGREGFILE |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 145 | |
Eric Anholt | f914c6a | 2006-08-25 11:05:10 -0700 | [diff] [blame] | 146 | %token <integer> MOV FRC RNDU RNDD RNDE RNDZ NOT LZD |
| 147 | %token <integer> MUL MAC MACH LINE SAD2 SADA2 DP4 DPH DP3 DP2 |
Xiang, Haihao | f1f5208 | 2010-10-19 13:26:24 +0800 | [diff] [blame] | 148 | %token <integer> AVG ADD SEL AND OR XOR SHR SHL ASR CMP CMPN PLN |
Homer Hsing | 9e711a4 | 2012-09-14 08:56:36 +0800 | [diff] [blame] | 149 | %token <integer> ADDC BFI1 BFREV CBIT F16TO32 F32TO16 FBH FBL |
Eric Anholt | c8939ed | 2006-08-30 10:50:56 -0700 | [diff] [blame] | 150 | %token <integer> SEND NOP JMPI IF IFF WHILE ELSE BREAK CONT HALT MSAVE |
Eric Anholt | f914c6a | 2006-08-25 11:05:10 -0700 | [diff] [blame] | 151 | %token <integer> PUSH MREST POP WAIT DO ENDIF ILLEGAL |
Xiang, Haihao | 5405532 | 2010-10-27 09:42:56 +0800 | [diff] [blame] | 152 | %token <integer> MATH_INST |
Homer Hsing | b1ef3bc | 2012-09-14 09:02:01 +0800 | [diff] [blame] | 153 | %token <integer> MAD LRP BFE BFI2 SUBB |
Homer Hsing | a7b1c09 | 2012-09-21 12:33:13 +0800 | [diff] [blame] | 154 | %token <integer> CALL RET |
Homer Hsing | 88dfdf3 | 2012-09-24 10:06:35 +0800 | [diff] [blame] | 155 | %token <integer> BRD BRC |
Eric Anholt | f914c6a | 2006-08-25 11:05:10 -0700 | [diff] [blame] | 156 | |
Zhao Yakui | 93f2a4f | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 157 | %token NULL_TOKEN MATH SAMPLER GATEWAY READ WRITE URB THREAD_SPAWNER VME DATA_PORT CRE |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 158 | |
| 159 | %token MSGLEN RETURNLEN |
Eric Anholt | e865196 | 2006-08-24 16:37:04 -0700 | [diff] [blame] | 160 | %token <integer> ALLOCATE USED COMPLETE TRANSPOSE INTERLEAVE |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 161 | %token SATURATE |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 162 | |
| 163 | %token <integer> INTEGER |
Zou Nanhai | be9bcee | 2008-12-09 18:38:54 -0800 | [diff] [blame] | 164 | %token <string> STRING |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 165 | %token <number> NUMBER |
| 166 | |
Eric Anholt | 3d36079 | 2006-08-25 09:36:28 -0700 | [diff] [blame] | 167 | %token <integer> INV LOG EXP SQRT RSQ POW SIN COS SINCOS INTDIV INTMOD |
| 168 | %token <integer> INTDIVMOD |
| 169 | %token SIGNED SCALAR |
| 170 | |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 171 | %token <integer> X Y Z W |
| 172 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 173 | %token <integer> KERNEL_PRAGMA END_KERNEL_PRAGMA CODE_PRAGMA END_CODE_PRAGMA |
| 174 | %token <integer> REG_COUNT_PAYLOAD_PRAGMA REG_COUNT_TOTAL_PRAGMA DECLARE_PRAGMA |
| 175 | %token <integer> BASE ELEMENTSIZE SRCREGION DSTREGION TYPE |
| 176 | |
| 177 | %token <integer> DEFAULT_EXEC_SIZE_PRAGMA DEFAULT_REG_TYPE_PRAGMA |
| 178 | %nonassoc SUBREGNUM |
| 179 | %nonassoc SNDOPR |
| 180 | %left PLUS MINUS |
| 181 | %left MULTIPLY DIVIDE |
| 182 | %right UMINUS |
| 183 | %nonassoc DOT |
| 184 | %nonassoc STR_SYMBOL_REG |
| 185 | %nonassoc EMPTEXECSIZE |
| 186 | %nonassoc LPAREN |
| 187 | |
| 188 | %type <integer> exp sndopr |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 189 | %type <integer> simple_int |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 190 | %type <instruction> instruction unaryinstruction binaryinstruction |
Homer Hsing | a034bcb | 2012-09-07 14:38:13 +0800 | [diff] [blame] | 191 | %type <instruction> binaryaccinstruction trinaryinstruction sendinstruction |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 192 | %type <instruction> jumpinstruction |
| 193 | %type <instruction> breakinstruction syncinstruction |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 194 | %type <instruction> msgtarget |
Eric Anholt | 0ed5d93 | 2006-08-28 23:05:51 -0700 | [diff] [blame] | 195 | %type <instruction> instoptions instoption_list predicate |
Xiang, Haihao | 5405532 | 2010-10-27 09:42:56 +0800 | [diff] [blame] | 196 | %type <instruction> mathinstruction |
Homer Hsing | a7b1c09 | 2012-09-21 12:33:13 +0800 | [diff] [blame] | 197 | %type <instruction> subroutineinstruction |
Homer Hsing | 88dfdf3 | 2012-09-24 10:06:35 +0800 | [diff] [blame] | 198 | %type <instruction> multibranchinstruction |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 199 | %type <instruction> nopinstruction loopinstruction ifelseinstruction haltinstruction |
Zou Nanhai | be9bcee | 2008-12-09 18:38:54 -0800 | [diff] [blame] | 200 | %type <string> label |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 201 | %type <program> instrseq |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 202 | %type <integer> instoption |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 203 | %type <integer> unaryop binaryop binaryaccop breakop |
Homer Hsing | a034bcb | 2012-09-07 14:38:13 +0800 | [diff] [blame] | 204 | %type <integer> trinaryop |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 205 | %type <condition> conditionalmodifier |
| 206 | %type <integer> condition saturate negate abs chansel |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 207 | %type <integer> writemask_x writemask_y writemask_z writemask_w |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 208 | %type <integer> srcimmtype execsize dstregion immaddroffset |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 209 | %type <integer> subregnum sampler_datatype |
Eric Anholt | e865196 | 2006-08-24 16:37:04 -0700 | [diff] [blame] | 210 | %type <integer> urb_swizzle urb_allocate urb_used urb_complete |
Eric Anholt | 3d36079 | 2006-08-25 09:36:28 -0700 | [diff] [blame] | 211 | %type <integer> math_function math_signed math_scalar |
Eric Anholt | 0ed5d93 | 2006-08-28 23:05:51 -0700 | [diff] [blame] | 212 | %type <integer> predctrl predstate |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 213 | %type <region> region region_wh indirectregion declare_srcregion; |
| 214 | %type <regtype> regtype |
Eric Anholt | 1d7d042 | 2006-08-25 16:52:09 -0700 | [diff] [blame] | 215 | %type <direct_reg> directgenreg directmsgreg addrreg accreg flagreg maskreg |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 216 | %type <direct_reg> maskstackreg notifyreg |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 217 | /* %type <direct_reg> maskstackdepthreg */ |
Eric Anholt | 1d7d042 | 2006-08-25 16:52:09 -0700 | [diff] [blame] | 218 | %type <direct_reg> statereg controlreg ipreg nullreg |
| 219 | %type <direct_reg> dstoperandex_typed srcarchoperandex_typed |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 220 | %type <direct_reg> sendleadreg |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 221 | %type <indirect_reg> indirectgenreg indirectmsgreg addrparam |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 222 | %type <integer> mask_subreg maskstack_subreg |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 223 | %type <integer> declare_elementsize declare_dstregion declare_type |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 224 | /* %type <intger> maskstackdepth_subreg */ |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 225 | %type <symbol_reg> symbol_reg symbol_reg_p; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 226 | %type <imm32> imm32 |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 227 | %type <dst_operand> dst dstoperand dstoperandex dstreg post_dst writemask |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 228 | %type <dst_operand> declare_base |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 229 | %type <src_operand> directsrcoperand srcarchoperandex directsrcaccoperand |
Eric Anholt | 2d29874 | 2006-08-30 09:57:20 -0700 | [diff] [blame] | 230 | %type <src_operand> indirectsrcoperand |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 231 | %type <src_operand> src srcimm imm32reg payload srcacc srcaccimm swizzle |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 232 | %type <src_operand> relativelocation relativelocation2 |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 233 | %% |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 234 | simple_int: INTEGER { $$ = $1; } |
| 235 | | MINUS INTEGER { $$ = -$2;} |
| 236 | ; |
| 237 | |
Zou Nan hai | 5608d27 | 2009-10-20 14:51:04 +0800 | [diff] [blame] | 238 | exp: INTEGER { $$ = $1; } |
Zou Nan hai | 5608d27 | 2009-10-20 14:51:04 +0800 | [diff] [blame] | 239 | | exp PLUS exp { $$ = $1 + $3; } |
| 240 | | exp MINUS exp { $$ = $1 - $3; } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 241 | | exp MULTIPLY exp { $$ = $1 * $3; } |
| 242 | | exp DIVIDE exp { if ($3) $$ = $1 / $3; else YYERROR;} |
| 243 | | MINUS exp %prec UMINUS { $$ = -$2;} |
Zou Nan hai | 5608d27 | 2009-10-20 14:51:04 +0800 | [diff] [blame] | 244 | | LPAREN exp RPAREN { $$ = $2; } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 245 | ; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 246 | |
| 247 | ROOT: instrseq |
| 248 | { |
| 249 | compiled_program = $1; |
| 250 | } |
| 251 | ; |
| 252 | |
Zou Nanhai | be9bcee | 2008-12-09 18:38:54 -0800 | [diff] [blame] | 253 | |
| 254 | label: STRING COLON |
Zou Nanhai | be9bcee | 2008-12-09 18:38:54 -0800 | [diff] [blame] | 255 | ; |
| 256 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 257 | declare_base: BASE EQ dstreg |
| 258 | { |
| 259 | $$ = $3; |
| 260 | } |
| 261 | ; |
| 262 | declare_elementsize: ELEMENTSIZE EQ exp |
| 263 | { |
| 264 | $$ = $3; |
| 265 | } |
| 266 | ; |
| 267 | declare_srcregion: /* empty */ |
| 268 | { |
| 269 | /* XXX is this default correct?*/ |
| 270 | memset (&$$, '\0', sizeof ($$)); |
| 271 | $$.vert_stride = ffs(0); |
| 272 | $$.width = ffs(1) - 1; |
| 273 | $$.horiz_stride = ffs(0); |
| 274 | } |
| 275 | | SRCREGION EQ region |
| 276 | { |
| 277 | $$ = $3; |
| 278 | } |
| 279 | ; |
| 280 | declare_dstregion: /* empty */ |
| 281 | { |
| 282 | $$ = 1; |
| 283 | } |
| 284 | | DSTREGION EQ dstregion |
| 285 | { |
| 286 | $$ = $3; |
| 287 | } |
| 288 | ; |
| 289 | declare_type: TYPE EQ regtype |
| 290 | { |
| 291 | $$ = $3.type; |
| 292 | } |
| 293 | ; |
| 294 | declare_pragma: DECLARE_PRAGMA STRING declare_base declare_elementsize declare_srcregion declare_dstregion declare_type |
| 295 | { |
Homer Hsing | e6d61ac | 2012-09-17 13:34:38 +0800 | [diff] [blame] | 296 | struct declared_register *reg; |
| 297 | int defined; |
| 298 | defined = (reg = find_register($2)) != NULL; |
| 299 | if (defined) { |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 300 | fprintf(stderr, "WARNING: %s already defined\n", $2); |
Homer Hsing | 2ab4c0d | 2012-09-20 14:04:20 +0800 | [diff] [blame] | 301 | free($2); // $2 has been malloc'ed by strdup |
Homer Hsing | e6d61ac | 2012-09-17 13:34:38 +0800 | [diff] [blame] | 302 | } else { |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 303 | reg = calloc(sizeof(struct declared_register), 1); |
Homer Hsing | 2ab4c0d | 2012-09-20 14:04:20 +0800 | [diff] [blame] | 304 | reg->name = $2; |
Homer Hsing | e6d61ac | 2012-09-17 13:34:38 +0800 | [diff] [blame] | 305 | } |
Homer Hsing | e6d61ac | 2012-09-17 13:34:38 +0800 | [diff] [blame] | 306 | reg->base.reg_file = $3.reg_file; |
| 307 | reg->base.reg_nr = $3.reg_nr; |
| 308 | reg->base.subreg_nr = $3.subreg_nr; |
| 309 | reg->element_size = $4; |
| 310 | reg->src_region = $5; |
| 311 | reg->dst_region = $6; |
| 312 | reg->type = $7; |
| 313 | if (!defined) { |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 314 | insert_register(reg); |
| 315 | } |
| 316 | } |
| 317 | ; |
| 318 | |
| 319 | reg_count_total_pragma: REG_COUNT_TOTAL_PRAGMA exp |
| 320 | ; |
| 321 | reg_count_payload_pragma: REG_COUNT_PAYLOAD_PRAGMA exp |
| 322 | ; |
| 323 | |
| 324 | default_exec_size_pragma: DEFAULT_EXEC_SIZE_PRAGMA exp |
| 325 | { |
| 326 | program_defaults.execute_size = $2; |
| 327 | } |
| 328 | ; |
| 329 | default_reg_type_pragma: DEFAULT_REG_TYPE_PRAGMA regtype |
| 330 | { |
| 331 | program_defaults.register_type = $2.type; |
| 332 | } |
| 333 | ; |
| 334 | pragma: reg_count_total_pragma |
| 335 | |reg_count_payload_pragma |
| 336 | |default_exec_size_pragma |
| 337 | |default_reg_type_pragma |
| 338 | |declare_pragma |
| 339 | ; |
| 340 | |
| 341 | instrseq: instrseq pragma |
| 342 | { |
| 343 | $$ = $1; |
| 344 | } |
| 345 | | instrseq instruction SEMICOLON |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 346 | { |
| 347 | struct brw_program_instruction *list_entry = |
| 348 | calloc(sizeof(struct brw_program_instruction), 1); |
Zou Nan hai | db8aedc | 2010-04-21 11:02:21 +0800 | [diff] [blame] | 349 | list_entry->instruction = $2; |
| 350 | list_entry->next = NULL; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 351 | if ($1.last) { |
| 352 | $1.last->next = list_entry; |
| 353 | } else { |
| 354 | $1.first = list_entry; |
| 355 | } |
Zou Nan hai | db8aedc | 2010-04-21 11:02:21 +0800 | [diff] [blame] | 356 | $1.last = list_entry; |
| 357 | $$ = $1; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 358 | } |
| 359 | | instruction SEMICOLON |
| 360 | { |
| 361 | struct brw_program_instruction *list_entry = |
| 362 | calloc(sizeof(struct brw_program_instruction), 1); |
| 363 | list_entry->instruction = $1; |
| 364 | |
| 365 | list_entry->next = NULL; |
| 366 | |
| 367 | $$.first = list_entry; |
Zou Nan hai | db8aedc | 2010-04-21 11:02:21 +0800 | [diff] [blame] | 368 | $$.last = list_entry; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 369 | } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 370 | | instrseq SEMICOLON |
| 371 | { |
| 372 | $$ = $1; |
| 373 | } |
| 374 | | instrseq label |
| 375 | { |
| 376 | struct brw_program_instruction *list_entry = |
| 377 | calloc(sizeof(struct brw_program_instruction), 1); |
| 378 | list_entry->string = strdup($2); |
| 379 | list_entry->islabel = 1; |
Zou Nan hai | db8aedc | 2010-04-21 11:02:21 +0800 | [diff] [blame] | 380 | list_entry->next = NULL; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 381 | if ($1.last) { |
| 382 | $1.last->next = list_entry; |
| 383 | } else { |
| 384 | $1.first = list_entry; |
| 385 | } |
Zou Nan hai | db8aedc | 2010-04-21 11:02:21 +0800 | [diff] [blame] | 386 | $1.last = list_entry; |
| 387 | $$ = $1; |
| 388 | } |
| 389 | | label |
| 390 | { |
| 391 | struct brw_program_instruction *list_entry = |
| 392 | calloc(sizeof(struct brw_program_instruction), 1); |
Zou Nan hai | c6f2da4 | 2009-10-28 10:14:19 +0800 | [diff] [blame] | 393 | list_entry->string = strdup($1); |
Zou Nanhai | be9bcee | 2008-12-09 18:38:54 -0800 | [diff] [blame] | 394 | list_entry->islabel = 1; |
Zou Nan hai | db8aedc | 2010-04-21 11:02:21 +0800 | [diff] [blame] | 395 | |
| 396 | list_entry->next = NULL; |
| 397 | |
| 398 | $$.first = list_entry; |
| 399 | $$.last = list_entry; |
| 400 | } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 401 | | pragma |
| 402 | { |
| 403 | $$.first = NULL; |
| 404 | $$.last = NULL; |
| 405 | } |
Chen, Yangyang | 66649d7 | 2010-12-13 15:36:02 +0800 | [diff] [blame] | 406 | | instrseq error SEMICOLON { |
| 407 | $$ = $1; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 408 | } |
| 409 | ; |
| 410 | |
| 411 | /* 1.4.1: Instruction groups */ |
Homer Hsing | 74383f4 | 2012-09-18 13:25:53 +0800 | [diff] [blame] | 412 | // binaryinstruction: Source operands cannot be accumulators |
| 413 | // binaryaccinstruction: Source operands can be accumulators |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 414 | instruction: unaryinstruction |
| 415 | | binaryinstruction |
| 416 | | binaryaccinstruction |
Homer Hsing | a034bcb | 2012-09-07 14:38:13 +0800 | [diff] [blame] | 417 | | trinaryinstruction |
| 418 | | sendinstruction |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 419 | | jumpinstruction |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 420 | | ifelseinstruction |
Eric Anholt | 4ee9c3d | 2006-09-01 13:37:51 -0700 | [diff] [blame] | 421 | | breakinstruction |
Eric Anholt | 1f58efa | 2006-09-01 11:56:12 -0700 | [diff] [blame] | 422 | | syncinstruction |
Xiang, Haihao | 5405532 | 2010-10-27 09:42:56 +0800 | [diff] [blame] | 423 | | mathinstruction |
Homer Hsing | a7b1c09 | 2012-09-21 12:33:13 +0800 | [diff] [blame] | 424 | | subroutineinstruction |
Homer Hsing | 88dfdf3 | 2012-09-24 10:06:35 +0800 | [diff] [blame] | 425 | | multibranchinstruction |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 426 | | nopinstruction |
| 427 | | haltinstruction |
| 428 | | loopinstruction |
Homer Hsing | 88dfdf3 | 2012-09-24 10:06:35 +0800 | [diff] [blame] | 429 | ; |
| 430 | |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 431 | ifelseinstruction: ENDIF |
| 432 | { |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 433 | // for Gen4 |
| 434 | if(IS_GENp(6)) { // For gen6+. |
Homer Hsing | c56d786 | 2012-09-28 13:46:21 +0800 | [diff] [blame] | 435 | fprintf(stderr, "ENDIF Syntax error: should be 'ENDIF execsize relativelocation'\n"); |
| 436 | YYERROR; |
| 437 | } |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 438 | memset(&$$, 0, sizeof($$)); |
| 439 | $$.header.opcode = $1; |
| 440 | $$.header.thread_control |= BRW_THREAD_SWITCH; |
| 441 | $$.bits1.da1.dest_horiz_stride = 1; |
| 442 | $$.bits1.da1.src1_reg_file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 443 | $$.bits1.da1.src1_reg_type = BRW_REGISTER_TYPE_UD; |
| 444 | } |
| 445 | | ENDIF execsize relativelocation instoptions |
| 446 | { |
Homer Hsing | c56d786 | 2012-09-28 13:46:21 +0800 | [diff] [blame] | 447 | // for Gen6+ |
| 448 | /* Gen6, Gen7 bspec: predication is prohibited */ |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 449 | if(!IS_GENp(6)) { // for gen6- |
Homer Hsing | c56d786 | 2012-09-28 13:46:21 +0800 | [diff] [blame] | 450 | fprintf(stderr, "ENDIF Syntax error: should be 'ENDIF'\n"); |
| 451 | YYERROR; |
| 452 | } |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 453 | memset(&$$, 0, sizeof($$)); |
| 454 | $$.header.opcode = $1; |
| 455 | $$.header.execution_size = $2; |
| 456 | $$.first_reloc_target = $3.reloc_target; |
| 457 | $$.first_reloc_offset = $3.imm32; |
| 458 | } |
| 459 | | ELSE execsize relativelocation instoptions |
| 460 | { |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 461 | if(!IS_GENp(6)) { |
| 462 | // for Gen4, Gen5. gen_level < 60 |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 463 | /* Set the istack pop count, which must always be 1. */ |
| 464 | $3.imm32 |= (1 << 16); |
| 465 | |
| 466 | memset(&$$, 0, sizeof($$)); |
| 467 | $$.header.opcode = $1; |
| 468 | $$.header.execution_size = $2; |
| 469 | $$.header.thread_control |= BRW_THREAD_SWITCH; |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 470 | set_instruction_dest(&$$, &ip_dst); |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 471 | set_instruction_src0(&$$, &ip_src); |
| 472 | set_instruction_src1(&$$, &$3); |
| 473 | $$.first_reloc_target = $3.reloc_target; |
| 474 | $$.first_reloc_offset = $3.imm32; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 475 | } else if(IS_GENp(6)) { |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 476 | memset(&$$, 0, sizeof($$)); |
| 477 | $$.header.opcode = $1; |
| 478 | $$.header.execution_size = $2; |
| 479 | $$.first_reloc_target = $3.reloc_target; |
| 480 | $$.first_reloc_offset = $3.imm32; |
| 481 | } else { |
| 482 | fprintf(stderr, "'ELSE' instruction is not implemented.\n"); |
| 483 | YYERROR; |
| 484 | } |
| 485 | } |
| 486 | | predicate IF execsize relativelocation |
| 487 | { |
Homer Hsing | 2ad18c1 | 2012-09-28 14:02:25 +0800 | [diff] [blame] | 488 | /* for Gen4, Gen5 */ |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 489 | /* The branch instructions require that the IP register |
| 490 | * be the destination and first source operand, while the |
| 491 | * offset is the second source operand. The offset is added |
| 492 | * to the pre-incremented IP. |
| 493 | */ |
Homer Hsing | 2ad18c1 | 2012-09-28 14:02:25 +0800 | [diff] [blame] | 494 | /* for Gen6 */ |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 495 | if(IS_GENp(7)) { |
| 496 | /* Error in Gen7+. */ |
Homer Hsing | 2ad18c1 | 2012-09-28 14:02:25 +0800 | [diff] [blame] | 497 | fprintf(stderr, "Syntax error: IF should be 'IF execsize JIP UIP'\n"); |
| 498 | YYERROR; |
| 499 | } |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 500 | memset(&$$, 0, sizeof($$)); |
Homer Hsing | 2ad18c1 | 2012-09-28 14:02:25 +0800 | [diff] [blame] | 501 | set_instruction_predicate(&$$, &$1); |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 502 | $$.header.opcode = $2; |
| 503 | $$.header.execution_size = $3; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 504 | if(!IS_GENp(6)) { |
Homer Hsing | 2ad18c1 | 2012-09-28 14:02:25 +0800 | [diff] [blame] | 505 | $$.header.thread_control |= BRW_THREAD_SWITCH; |
| 506 | set_instruction_dest(&$$, &ip_dst); |
| 507 | set_instruction_src0(&$$, &ip_src); |
| 508 | set_instruction_src1(&$$, &$4); |
| 509 | } |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 510 | $$.first_reloc_target = $4.reloc_target; |
| 511 | $$.first_reloc_offset = $4.imm32; |
| 512 | } |
| 513 | | predicate IF execsize relativelocation relativelocation |
| 514 | { |
| 515 | /* for Gen7+ */ |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 516 | if(!IS_GENp(7)) { |
Homer Hsing | 2ad18c1 | 2012-09-28 14:02:25 +0800 | [diff] [blame] | 517 | fprintf(stderr, "Syntax error: IF should be 'IF execsize relativelocation'\n"); |
| 518 | YYERROR; |
| 519 | } |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 520 | memset(&$$, 0, sizeof($$)); |
| 521 | set_instruction_predicate(&$$, &$1); |
| 522 | $$.header.opcode = $2; |
| 523 | $$.header.execution_size = $3; |
| 524 | $$.first_reloc_target = $4.reloc_target; |
| 525 | $$.first_reloc_offset = $4.imm32; |
| 526 | $$.second_reloc_target = $5.reloc_target; |
| 527 | $$.second_reloc_offset = $5.imm32; |
| 528 | } |
| 529 | ; |
| 530 | |
| 531 | loopinstruction: predicate WHILE execsize relativelocation instoptions |
| 532 | { |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 533 | if(!IS_GENp(6)) { |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 534 | /* The branch instructions require that the IP register |
| 535 | * be the destination and first source operand, while the |
| 536 | * offset is the second source operand. The offset is added |
| 537 | * to the pre-incremented IP. |
| 538 | */ |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 539 | set_instruction_dest(&$$, &ip_dst); |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 540 | memset(&$$, 0, sizeof($$)); |
| 541 | set_instruction_predicate(&$$, &$1); |
| 542 | $$.header.opcode = $2; |
| 543 | $$.header.execution_size = $3; |
| 544 | $$.header.thread_control |= BRW_THREAD_SWITCH; |
| 545 | set_instruction_src0(&$$, &ip_src); |
| 546 | set_instruction_src1(&$$, &$4); |
| 547 | $$.first_reloc_target = $4.reloc_target; |
| 548 | $$.first_reloc_offset = $4.imm32; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 549 | } else if (IS_GENp(6)) { |
Homer Hsing | e8cb195 | 2012-09-28 14:05:51 +0800 | [diff] [blame] | 550 | /* Gen6 spec: |
| 551 | dest must have the same element size as src0. |
| 552 | dest horizontal stride must be 1. */ |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 553 | memset(&$$, 0, sizeof($$)); |
| 554 | set_instruction_predicate(&$$, &$1); |
| 555 | $$.header.opcode = $2; |
| 556 | $$.header.execution_size = $3; |
| 557 | $$.first_reloc_target = $4.reloc_target; |
| 558 | $$.first_reloc_offset = $4.imm32; |
Homer Hsing | 72a3c19 | 2012-09-27 13:51:33 +0800 | [diff] [blame] | 559 | } else { |
| 560 | fprintf(stderr, "'WHILE' instruction is not implemented!\n"); |
| 561 | YYERROR; |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 562 | } |
| 563 | } |
| 564 | | DO |
| 565 | { |
| 566 | // deprecated |
| 567 | memset(&$$, 0, sizeof($$)); |
| 568 | $$.header.opcode = $1; |
| 569 | }; |
| 570 | |
| 571 | haltinstruction: predicate HALT execsize relativelocation relativelocation instoptions |
| 572 | { |
Homer Hsing | ce55552 | 2012-09-27 15:44:15 +0800 | [diff] [blame] | 573 | // for Gen6, Gen7 |
| 574 | /* Gen6, Gen7 bspec: dst and src0 must be the null reg. */ |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 575 | memset(&$$, 0, sizeof($$)); |
| 576 | set_instruction_predicate(&$$, &$1); |
| 577 | $$.header.opcode = $2; |
| 578 | $$.header.execution_size = $3; |
| 579 | $$.first_reloc_target = $4.reloc_target; |
| 580 | $$.first_reloc_offset = $4.imm32; |
| 581 | $$.second_reloc_target = $5.reloc_target; |
| 582 | $$.second_reloc_offset = $5.imm32; |
| 583 | set_instruction_dest(&$$, &dst_null_reg); |
| 584 | set_instruction_src0(&$$, &src_null_reg); |
| 585 | }; |
| 586 | |
Homer Hsing | 88dfdf3 | 2012-09-24 10:06:35 +0800 | [diff] [blame] | 587 | multibranchinstruction: |
| 588 | predicate BRD execsize relativelocation instoptions |
| 589 | { |
| 590 | /* Gen7 bspec: dest must be null. use Switch option */ |
| 591 | memset(&$$, 0, sizeof($$)); |
| 592 | set_instruction_predicate(&$$, &$1); |
| 593 | $$.header.opcode = $2; |
| 594 | $$.header.execution_size = $3; |
| 595 | $$.header.thread_control |= BRW_THREAD_SWITCH; |
| 596 | $$.first_reloc_target = $4.reloc_target; |
| 597 | $$.first_reloc_offset = $4.imm32; |
| 598 | set_instruction_dest(&$$, &dst_null_reg); |
| 599 | } |
Homer Hsing | 88dfdf3 | 2012-09-24 10:06:35 +0800 | [diff] [blame] | 600 | | predicate BRC execsize relativelocation relativelocation instoptions |
| 601 | { |
| 602 | /* Gen7 bspec: dest must be null. src0 must be null. use Switch option */ |
| 603 | memset(&$$, 0, sizeof($$)); |
| 604 | set_instruction_predicate(&$$, &$1); |
| 605 | $$.header.opcode = $2; |
| 606 | $$.header.execution_size = $3; |
| 607 | $$.header.thread_control |= BRW_THREAD_SWITCH; |
| 608 | $$.first_reloc_target = $4.reloc_target; |
| 609 | $$.first_reloc_offset = $4.imm32; |
| 610 | $$.second_reloc_target = $5.reloc_target; |
| 611 | $$.second_reloc_offset = $5.imm32; |
| 612 | set_instruction_dest(&$$, &dst_null_reg); |
| 613 | set_instruction_src0(&$$, &src_null_reg); |
| 614 | } |
Homer Hsing | a7b1c09 | 2012-09-21 12:33:13 +0800 | [diff] [blame] | 615 | ; |
| 616 | |
| 617 | subroutineinstruction: |
| 618 | predicate CALL execsize dst relativelocation instoptions |
| 619 | { |
Homer Hsing | 7529682 | 2012-09-27 15:31:56 +0800 | [diff] [blame] | 620 | /* |
| 621 | Gen6 bspec: |
| 622 | source, dest type should be DWORD. |
| 623 | dest must be QWord aligned. |
| 624 | source0 region control must be <2,2,1>. |
| 625 | execution size must be 2. |
| 626 | QtrCtrl is prohibited. |
| 627 | JIP is an immediate operand, must be of type W. |
| 628 | Gen7 bspec: |
| 629 | source, dest type should be DWORD. |
| 630 | dest must be QWord aligned. |
| 631 | source0 region control must be <2,2,1>. |
| 632 | execution size must be 2. |
| 633 | */ |
Homer Hsing | a7b1c09 | 2012-09-21 12:33:13 +0800 | [diff] [blame] | 634 | memset(&$$, 0, sizeof($$)); |
| 635 | set_instruction_predicate(&$$, &$1); |
| 636 | $$.header.opcode = $2; |
Homer Hsing | 7529682 | 2012-09-27 15:31:56 +0800 | [diff] [blame] | 637 | $$.header.execution_size = 1; /* execution size must be 2. Here 1 is encoded 2. */ |
| 638 | |
| 639 | $4.reg_type = BRW_REGISTER_TYPE_D; /* dest type should be DWORD */ |
Homer Hsing | a7b1c09 | 2012-09-21 12:33:13 +0800 | [diff] [blame] | 640 | set_instruction_dest(&$$, &$4); |
Homer Hsing | 7529682 | 2012-09-27 15:31:56 +0800 | [diff] [blame] | 641 | |
| 642 | struct src_operand src0; |
| 643 | memset(&src0, 0, sizeof(src0)); |
| 644 | src0.reg_type = BRW_REGISTER_TYPE_D; /* source type should be DWORD */ |
| 645 | /* source0 region control must be <2,2,1>. */ |
| 646 | src0.horiz_stride = 1; /*encoded 1*/ |
| 647 | src0.width = 1; /*encoded 2*/ |
| 648 | src0.vert_stride = 2; /*encoded 2*/ |
| 649 | set_instruction_src0(&$$, &src0); |
| 650 | |
Homer Hsing | a7b1c09 | 2012-09-21 12:33:13 +0800 | [diff] [blame] | 651 | $$.first_reloc_target = $5.reloc_target; |
| 652 | $$.first_reloc_offset = $5.imm32; |
| 653 | } |
| 654 | | predicate RET execsize dstoperandex src instoptions |
| 655 | { |
Homer Hsing | 3de439e | 2012-09-27 15:39:28 +0800 | [diff] [blame] | 656 | /* |
| 657 | Gen6, 7: |
| 658 | source cannot be accumulator. |
| 659 | dest must be null. |
| 660 | src0 region control must be <2,2,1> (not specified clearly. should be same as CALL) |
| 661 | */ |
Homer Hsing | a7b1c09 | 2012-09-21 12:33:13 +0800 | [diff] [blame] | 662 | memset(&$$, 0, sizeof($$)); |
| 663 | set_instruction_predicate(&$$, &$1); |
| 664 | $$.header.opcode = $2; |
Homer Hsing | 3de439e | 2012-09-27 15:39:28 +0800 | [diff] [blame] | 665 | $$.header.execution_size = 1; /* execution size of RET should be 2 */ |
Homer Hsing | c91bd8c | 2012-09-27 16:20:39 +0800 | [diff] [blame] | 666 | set_instruction_dest(&$$, &dst_null_reg); |
Homer Hsing | 3de439e | 2012-09-27 15:39:28 +0800 | [diff] [blame] | 667 | $5.reg_type = BRW_REGISTER_TYPE_D; |
| 668 | $5.horiz_stride = 1; /*encoded 1*/ |
| 669 | $5.width = 1; /*encoded 2*/ |
| 670 | $5.vert_stride = 2; /*encoded 2*/ |
Homer Hsing | a7b1c09 | 2012-09-21 12:33:13 +0800 | [diff] [blame] | 671 | set_instruction_src0(&$$, &$5); |
| 672 | } |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 673 | ; |
| 674 | |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 675 | unaryinstruction: |
| 676 | predicate unaryop conditionalmodifier saturate execsize |
| 677 | dst srcaccimm instoptions |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 678 | { |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 679 | memset(&$$, 0, sizeof($$)); |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 680 | $$.header.opcode = $2; |
Damien Lespiau | e71f1d2 | 2013-01-14 19:13:19 +0000 | [diff] [blame] | 681 | $$.header.destreg__conditionalmod = $3.cond; |
Eric Anholt | 90aea51 | 2006-08-22 14:46:39 -0700 | [diff] [blame] | 682 | $$.header.saturate = $4; |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 683 | $$.header.execution_size = $5; |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 684 | set_instruction_options(&$$, &$8); |
Eric Anholt | 0ed5d93 | 2006-08-28 23:05:51 -0700 | [diff] [blame] | 685 | set_instruction_predicate(&$$, &$1); |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 686 | if (set_instruction_dest(&$$, &$6) != 0) |
| 687 | YYERROR; |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 688 | if (set_instruction_src0(&$$, &$7) != 0) |
| 689 | YYERROR; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 690 | |
Xiang, Haihao | 3ffbe96 | 2012-07-17 15:05:31 +0800 | [diff] [blame] | 691 | if ($3.flag_subreg_nr != -1) { |
Xiang, Haihao | 4d75db5 | 2012-07-17 16:16:11 +0800 | [diff] [blame] | 692 | if ($$.header.predicate_control != BRW_PREDICATE_NONE && |
| 693 | ($1.bits2.da1.flag_reg_nr != $3.flag_reg_nr || |
| 694 | $1.bits2.da1.flag_subreg_nr != $3.flag_subreg_nr)) |
| 695 | fprintf(stderr, "WARNING: must use the same flag register if both prediction and conditional modifier are enabled\n"); |
| 696 | |
Xiang, Haihao | 3ffbe96 | 2012-07-17 15:05:31 +0800 | [diff] [blame] | 697 | $$.bits2.da1.flag_reg_nr = $3.flag_reg_nr; |
Xiang, Haihao | 2f772dd | 2012-07-17 14:18:54 +0800 | [diff] [blame] | 698 | $$.bits2.da1.flag_subreg_nr = $3.flag_subreg_nr; |
Xiang, Haihao | 3ffbe96 | 2012-07-17 15:05:31 +0800 | [diff] [blame] | 699 | } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 700 | |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 701 | if (!IS_GENp(6) && |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 702 | get_type_size($$.bits1.da1.dest_reg_type) * (1 << $$.header.execution_size) == 64) |
| 703 | $$.header.compression_control = BRW_COMPRESSION_COMPRESSED; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 704 | } |
| 705 | ; |
| 706 | |
Homer Hsing | 4285d9c | 2012-09-14 08:41:16 +0800 | [diff] [blame] | 707 | unaryop: MOV | FRC | RNDU | RNDD | RNDE | RNDZ | NOT | LZD | BFREV | CBIT |
Homer Hsing | 9e711a4 | 2012-09-14 08:56:36 +0800 | [diff] [blame] | 708 | | F16TO32 | F32TO16 | FBH | FBL |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 709 | ; |
| 710 | |
Homer Hsing | 74383f4 | 2012-09-18 13:25:53 +0800 | [diff] [blame] | 711 | // Source operands cannot be accumulators |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 712 | binaryinstruction: |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 713 | predicate binaryop conditionalmodifier saturate execsize |
| 714 | dst src srcimm instoptions |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 715 | { |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 716 | memset(&$$, 0, sizeof($$)); |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 717 | $$.header.opcode = $2; |
Damien Lespiau | e71f1d2 | 2013-01-14 19:13:19 +0000 | [diff] [blame] | 718 | $$.header.destreg__conditionalmod = $3.cond; |
Eric Anholt | 90aea51 | 2006-08-22 14:46:39 -0700 | [diff] [blame] | 719 | $$.header.saturate = $4; |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 720 | $$.header.execution_size = $5; |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 721 | set_instruction_options(&$$, &$9); |
Eric Anholt | 0ed5d93 | 2006-08-28 23:05:51 -0700 | [diff] [blame] | 722 | set_instruction_predicate(&$$, &$1); |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 723 | if (set_instruction_dest(&$$, &$6) != 0) |
| 724 | YYERROR; |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 725 | if (set_instruction_src0(&$$, &$7) != 0) |
| 726 | YYERROR; |
| 727 | if (set_instruction_src1(&$$, &$8) != 0) |
| 728 | YYERROR; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 729 | |
Xiang, Haihao | 3ffbe96 | 2012-07-17 15:05:31 +0800 | [diff] [blame] | 730 | if ($3.flag_subreg_nr != -1) { |
Xiang, Haihao | 4d75db5 | 2012-07-17 16:16:11 +0800 | [diff] [blame] | 731 | if ($$.header.predicate_control != BRW_PREDICATE_NONE && |
| 732 | ($1.bits2.da1.flag_reg_nr != $3.flag_reg_nr || |
| 733 | $1.bits2.da1.flag_subreg_nr != $3.flag_subreg_nr)) |
| 734 | fprintf(stderr, "WARNING: must use the same flag register if both prediction and conditional modifier are enabled\n"); |
| 735 | |
Xiang, Haihao | 3ffbe96 | 2012-07-17 15:05:31 +0800 | [diff] [blame] | 736 | $$.bits2.da1.flag_reg_nr = $3.flag_reg_nr; |
Xiang, Haihao | 2f772dd | 2012-07-17 14:18:54 +0800 | [diff] [blame] | 737 | $$.bits2.da1.flag_subreg_nr = $3.flag_subreg_nr; |
Xiang, Haihao | 3ffbe96 | 2012-07-17 15:05:31 +0800 | [diff] [blame] | 738 | } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 739 | |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 740 | if (!IS_GENp(6) && |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 741 | get_type_size($$.bits1.da1.dest_reg_type) * (1 << $$.header.execution_size) == 64) |
| 742 | $$.header.compression_control = BRW_COMPRESSION_COMPRESSED; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 743 | } |
| 744 | ; |
| 745 | |
Homer Hsing | bebe817 | 2012-09-18 13:47:22 +0800 | [diff] [blame] | 746 | /* bspec: BFI1 should not access accumulator. */ |
| 747 | binaryop: MUL | MAC | MACH | LINE | SAD2 | SADA2 | DP4 | DPH | DP3 | DP2 | PLN | BFI1 |
Eric Anholt | edc82a0 | 2006-08-25 17:42:05 -0700 | [diff] [blame] | 748 | ; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 749 | |
Homer Hsing | 74383f4 | 2012-09-18 13:25:53 +0800 | [diff] [blame] | 750 | // Source operands can be accumulators |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 751 | binaryaccinstruction: |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 752 | predicate binaryaccop conditionalmodifier saturate execsize |
| 753 | dst srcacc srcimm instoptions |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 754 | { |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 755 | memset(&$$, 0, sizeof($$)); |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 756 | $$.header.opcode = $2; |
Damien Lespiau | e71f1d2 | 2013-01-14 19:13:19 +0000 | [diff] [blame] | 757 | $$.header.destreg__conditionalmod = $3.cond; |
Eric Anholt | 90aea51 | 2006-08-22 14:46:39 -0700 | [diff] [blame] | 758 | $$.header.saturate = $4; |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 759 | $$.header.execution_size = $5; |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 760 | set_instruction_options(&$$, &$9); |
Eric Anholt | 0ed5d93 | 2006-08-28 23:05:51 -0700 | [diff] [blame] | 761 | set_instruction_predicate(&$$, &$1); |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 762 | if (set_instruction_dest(&$$, &$6) != 0) |
| 763 | YYERROR; |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 764 | if (set_instruction_src0(&$$, &$7) != 0) |
| 765 | YYERROR; |
| 766 | if (set_instruction_src1(&$$, &$8) != 0) |
| 767 | YYERROR; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 768 | |
Xiang, Haihao | 3ffbe96 | 2012-07-17 15:05:31 +0800 | [diff] [blame] | 769 | if ($3.flag_subreg_nr != -1) { |
Xiang, Haihao | 4d75db5 | 2012-07-17 16:16:11 +0800 | [diff] [blame] | 770 | if ($$.header.predicate_control != BRW_PREDICATE_NONE && |
| 771 | ($1.bits2.da1.flag_reg_nr != $3.flag_reg_nr || |
| 772 | $1.bits2.da1.flag_subreg_nr != $3.flag_subreg_nr)) |
| 773 | fprintf(stderr, "WARNING: must use the same flag register if both prediction and conditional modifier are enabled\n"); |
| 774 | |
Xiang, Haihao | 3ffbe96 | 2012-07-17 15:05:31 +0800 | [diff] [blame] | 775 | $$.bits2.da1.flag_reg_nr = $3.flag_reg_nr; |
Xiang, Haihao | 2f772dd | 2012-07-17 14:18:54 +0800 | [diff] [blame] | 776 | $$.bits2.da1.flag_subreg_nr = $3.flag_subreg_nr; |
Xiang, Haihao | 3ffbe96 | 2012-07-17 15:05:31 +0800 | [diff] [blame] | 777 | } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 778 | |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 779 | if (!IS_GENp(6) && |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 780 | get_type_size($$.bits1.da1.dest_reg_type) * (1 << $$.header.execution_size) == 64) |
| 781 | $$.header.compression_control = BRW_COMPRESSION_COMPRESSED; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 782 | } |
| 783 | ; |
| 784 | |
Homer Hsing | bebe817 | 2012-09-18 13:47:22 +0800 | [diff] [blame] | 785 | /* TODO: bspec says ADDC/SUBB/CMP/CMPN/SHL/BFI1 cannot use accumulator as dest. */ |
| 786 | binaryaccop: AVG | ADD | SEL | AND | OR | XOR | SHR | SHL | ASR | CMP | CMPN | ADDC | SUBB |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 787 | ; |
| 788 | |
Homer Hsing | 8ca5568 | 2012-09-13 11:05:50 +0800 | [diff] [blame] | 789 | trinaryop: MAD | LRP | BFE | BFI2 |
Homer Hsing | a034bcb | 2012-09-07 14:38:13 +0800 | [diff] [blame] | 790 | ; |
| 791 | |
| 792 | trinaryinstruction: |
| 793 | predicate trinaryop conditionalmodifier saturate execsize |
| 794 | dst src src src instoptions |
| 795 | { |
| 796 | memset(&$$, 0, sizeof($$)); |
| 797 | |
| 798 | $$.header.predicate_control = $1.header.predicate_control; |
| 799 | $$.header.predicate_inverse = $1.header.predicate_inverse; |
Damien Lespiau | 31259c5 | 2013-01-15 14:05:23 +0000 | [diff] [blame] | 800 | $$.bits1.da3src.flag_reg_nr = $1.bits2.da1.flag_reg_nr; |
| 801 | $$.bits1.da3src.flag_subreg_nr = $1.bits2.da1.flag_subreg_nr; |
Homer Hsing | a034bcb | 2012-09-07 14:38:13 +0800 | [diff] [blame] | 802 | |
| 803 | $$.header.opcode = $2; |
Damien Lespiau | e71f1d2 | 2013-01-14 19:13:19 +0000 | [diff] [blame] | 804 | $$.header.destreg__conditionalmod = $3.cond; |
Homer Hsing | a034bcb | 2012-09-07 14:38:13 +0800 | [diff] [blame] | 805 | $$.header.saturate = $4; |
| 806 | $$.header.execution_size = $5; |
| 807 | |
| 808 | if (set_instruction_dest_three_src(&$$, &$6)) |
| 809 | YYERROR; |
| 810 | if (set_instruction_src0_three_src(&$$, &$7)) |
| 811 | YYERROR; |
| 812 | if (set_instruction_src1_three_src(&$$, &$8)) |
| 813 | YYERROR; |
| 814 | if (set_instruction_src2_three_src(&$$, &$9)) |
| 815 | YYERROR; |
| 816 | set_instruction_options(&$$, &$10); |
| 817 | |
| 818 | if ($3.flag_subreg_nr != -1) { |
| 819 | if ($$.header.predicate_control != BRW_PREDICATE_NONE && |
| 820 | ($1.bits2.da1.flag_reg_nr != $3.flag_reg_nr || |
| 821 | $1.bits2.da1.flag_subreg_nr != $3.flag_subreg_nr)) |
| 822 | fprintf(stderr, "WARNING: must use the same flag register if both prediction and conditional modifier are enabled\n"); |
| 823 | } |
| 824 | } |
Eric Anholt | edc82a0 | 2006-08-25 17:42:05 -0700 | [diff] [blame] | 825 | ; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 826 | |
Zou Nan hai | 5608d27 | 2009-10-20 14:51:04 +0800 | [diff] [blame] | 827 | sendinstruction: predicate SEND execsize exp post_dst payload msgtarget |
| 828 | MSGLEN exp RETURNLEN exp instoptions |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 829 | { |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 830 | /* Send instructions are messy. The first argument is the |
| 831 | * post destination -- the grf register that the response |
| 832 | * starts from. The second argument is the current |
| 833 | * destination, which is the start of the message arguments |
| 834 | * to the shared function, and where src0 payload is loaded |
| 835 | * to if not null. The payload is typically based on the |
| 836 | * grf 0 thread payload of your current thread, and is |
| 837 | * implicitly loaded if non-null. |
| 838 | */ |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 839 | memset(&$$, 0, sizeof($$)); |
Eric Anholt | f914c6a | 2006-08-25 11:05:10 -0700 | [diff] [blame] | 840 | $$.header.opcode = $2; |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 841 | $$.header.execution_size = $3; |
Damien Lespiau | e71f1d2 | 2013-01-14 19:13:19 +0000 | [diff] [blame] | 842 | $$.header.destreg__conditionalmod = $4; /* msg reg index */ |
Eric Anholt | 0ed5d93 | 2006-08-28 23:05:51 -0700 | [diff] [blame] | 843 | set_instruction_predicate(&$$, &$1); |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 844 | if (set_instruction_dest(&$$, &$5) != 0) |
| 845 | YYERROR; |
Xiang, Haihao | dcdde53 | 2010-10-21 14:33:35 +0800 | [diff] [blame] | 846 | |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 847 | if (IS_GENp(6)) { |
Xiang, Haihao | dcdde53 | 2010-10-21 14:33:35 +0800 | [diff] [blame] | 848 | struct src_operand src0; |
| 849 | |
| 850 | memset(&src0, 0, sizeof(src0)); |
| 851 | src0.address_mode = BRW_ADDRESS_DIRECT; |
Xiang, Haihao | 46ffdd5 | 2011-05-25 14:29:14 +0800 | [diff] [blame] | 852 | |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 853 | if (IS_GENp(7)) |
Xiang, Haihao | 46ffdd5 | 2011-05-25 14:29:14 +0800 | [diff] [blame] | 854 | src0.reg_file = BRW_GENERAL_REGISTER_FILE; |
| 855 | else |
| 856 | src0.reg_file = BRW_MESSAGE_REGISTER_FILE; |
| 857 | |
Xiang, Haihao | dcdde53 | 2010-10-21 14:33:35 +0800 | [diff] [blame] | 858 | src0.reg_type = BRW_REGISTER_TYPE_D; |
| 859 | src0.reg_nr = $4; |
| 860 | src0.subreg_nr = 0; |
| 861 | set_instruction_src0(&$$, &src0); |
| 862 | } else { |
| 863 | if (set_instruction_src0(&$$, &$6) != 0) |
| 864 | YYERROR; |
| 865 | } |
| 866 | |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 867 | $$.bits1.da1.src1_reg_file = BRW_IMMEDIATE_VALUE; |
| 868 | $$.bits1.da1.src1_reg_type = BRW_REGISTER_TYPE_D; |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 869 | |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 870 | if (IS_GENp(5)) { |
| 871 | if (IS_GENp(6)) { |
Damien Lespiau | e71f1d2 | 2013-01-14 19:13:19 +0000 | [diff] [blame] | 872 | $$.header.destreg__conditionalmod = $7.bits2.send_gen5.sfid; |
Xiang, Haihao | 4f777e7 | 2010-10-08 15:07:51 +0800 | [diff] [blame] | 873 | } else { |
Damien Lespiau | e71f1d2 | 2013-01-14 19:13:19 +0000 | [diff] [blame] | 874 | $$.header.destreg__conditionalmod = $4; /* msg reg index */ |
Xiang, Haihao | 4f777e7 | 2010-10-08 15:07:51 +0800 | [diff] [blame] | 875 | $$.bits2.send_gen5.sfid = $7.bits2.send_gen5.sfid; |
| 876 | $$.bits2.send_gen5.end_of_thread = $12.bits3.generic_gen5.end_of_thread; |
| 877 | } |
| 878 | |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 879 | $$.bits3.generic_gen5 = $7.bits3.generic_gen5; |
| 880 | $$.bits3.generic_gen5.msg_length = $9; |
| 881 | $$.bits3.generic_gen5.response_length = $11; |
| 882 | $$.bits3.generic_gen5.end_of_thread = |
| 883 | $12.bits3.generic_gen5.end_of_thread; |
| 884 | } else { |
Damien Lespiau | e71f1d2 | 2013-01-14 19:13:19 +0000 | [diff] [blame] | 885 | $$.header.destreg__conditionalmod = $4; /* msg reg index */ |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 886 | $$.bits3.generic = $7.bits3.generic; |
| 887 | $$.bits3.generic.msg_length = $9; |
| 888 | $$.bits3.generic.response_length = $11; |
| 889 | $$.bits3.generic.end_of_thread = |
| 890 | $12.bits3.generic.end_of_thread; |
| 891 | } |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 892 | } |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 893 | | predicate SEND execsize dst sendleadreg payload directsrcoperand instoptions |
Feng, Boqun | 37d6810 | 2011-04-19 08:43:22 +0800 | [diff] [blame] | 894 | { |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 895 | memset(&$$, 0, sizeof($$)); |
Feng, Boqun | 37d6810 | 2011-04-19 08:43:22 +0800 | [diff] [blame] | 896 | $$.header.opcode = $2; |
| 897 | $$.header.execution_size = $3; |
Damien Lespiau | e71f1d2 | 2013-01-14 19:13:19 +0000 | [diff] [blame] | 898 | $$.header.destreg__conditionalmod = $5.reg_nr; /* msg reg index */ |
Feng, Boqun | 37d6810 | 2011-04-19 08:43:22 +0800 | [diff] [blame] | 899 | |
| 900 | set_instruction_predicate(&$$, &$1); |
| 901 | |
| 902 | if (set_instruction_dest(&$$, &$4) != 0) |
| 903 | YYERROR; |
| 904 | if (set_instruction_src0(&$$, &$6) != 0) |
| 905 | YYERROR; |
| 906 | /* XXX is this correct? */ |
| 907 | if (set_instruction_src1(&$$, &$7) != 0) |
| 908 | YYERROR; |
| 909 | } |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 910 | | predicate SEND execsize dst sendleadreg payload imm32reg instoptions |
Feng, Boqun | 37d6810 | 2011-04-19 08:43:22 +0800 | [diff] [blame] | 911 | { |
| 912 | if ($7.reg_type != BRW_REGISTER_TYPE_UD && |
| 913 | $7.reg_type != BRW_REGISTER_TYPE_D && |
| 914 | $7.reg_type != BRW_REGISTER_TYPE_V) { |
| 915 | fprintf (stderr, "%d: non-int D/UD/V representation: %d,type=%d\n", yylineno, $7.imm32, $7.reg_type); |
| 916 | YYERROR; |
| 917 | } |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 918 | memset(&$$, 0, sizeof($$)); |
Feng, Boqun | 37d6810 | 2011-04-19 08:43:22 +0800 | [diff] [blame] | 919 | $$.header.opcode = $2; |
| 920 | $$.header.execution_size = $3; |
Damien Lespiau | e71f1d2 | 2013-01-14 19:13:19 +0000 | [diff] [blame] | 921 | $$.header.destreg__conditionalmod = $5.reg_nr; /* msg reg index */ |
Feng, Boqun | 37d6810 | 2011-04-19 08:43:22 +0800 | [diff] [blame] | 922 | |
| 923 | set_instruction_predicate(&$$, &$1); |
| 924 | if (set_instruction_dest(&$$, &$4) != 0) |
| 925 | YYERROR; |
| 926 | if (set_instruction_src0(&$$, &$6) != 0) |
| 927 | YYERROR; |
| 928 | $$.bits1.da1.src1_reg_file = BRW_IMMEDIATE_VALUE; |
| 929 | $$.bits1.da1.src1_reg_type = $7.reg_type; |
| 930 | $$.bits3.ud = $7.imm32; |
| 931 | } |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 932 | | predicate SEND execsize dst sendleadreg sndopr imm32reg instoptions |
Xiang, Haihao | 85da7b9 | 2011-02-17 13:24:11 +0800 | [diff] [blame] | 933 | { |
| 934 | struct src_operand src0; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 935 | |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 936 | if (!IS_GENp(6)) { |
Xiang, Haihao | 85da7b9 | 2011-02-17 13:24:11 +0800 | [diff] [blame] | 937 | fprintf(stderr, "error: the syntax of send instruction\n"); |
| 938 | YYERROR; |
| 939 | } |
| 940 | |
| 941 | if ($7.reg_type != BRW_REGISTER_TYPE_UD && |
| 942 | $7.reg_type != BRW_REGISTER_TYPE_D && |
| 943 | $7.reg_type != BRW_REGISTER_TYPE_V) { |
| 944 | fprintf (stderr, "%d: non-int D/UD/V representation: %d,type=%d\n", yylineno, $7.imm32, $7.reg_type); |
| 945 | YYERROR; |
| 946 | } |
| 947 | |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 948 | memset(&$$, 0, sizeof($$)); |
Xiang, Haihao | 85da7b9 | 2011-02-17 13:24:11 +0800 | [diff] [blame] | 949 | $$.header.opcode = $2; |
| 950 | $$.header.execution_size = $3; |
Damien Lespiau | e71f1d2 | 2013-01-14 19:13:19 +0000 | [diff] [blame] | 951 | $$.header.destreg__conditionalmod = ($6 & EX_DESC_SFID_MASK); /* SFID */ |
Xiang, Haihao | 85da7b9 | 2011-02-17 13:24:11 +0800 | [diff] [blame] | 952 | set_instruction_predicate(&$$, &$1); |
| 953 | |
| 954 | if (set_instruction_dest(&$$, &$4) != 0) |
| 955 | YYERROR; |
| 956 | |
| 957 | memset(&src0, 0, sizeof(src0)); |
| 958 | src0.address_mode = BRW_ADDRESS_DIRECT; |
Xiang, Haihao | 46ffdd5 | 2011-05-25 14:29:14 +0800 | [diff] [blame] | 959 | |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 960 | if (IS_GENp(7)) { |
Xiang, Haihao | 46ffdd5 | 2011-05-25 14:29:14 +0800 | [diff] [blame] | 961 | src0.reg_file = BRW_GENERAL_REGISTER_FILE; |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 962 | src0.reg_type = BRW_REGISTER_TYPE_UB; |
| 963 | } else { |
Xiang, Haihao | 46ffdd5 | 2011-05-25 14:29:14 +0800 | [diff] [blame] | 964 | src0.reg_file = BRW_MESSAGE_REGISTER_FILE; |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 965 | src0.reg_type = BRW_REGISTER_TYPE_D; |
| 966 | } |
Xiang, Haihao | 46ffdd5 | 2011-05-25 14:29:14 +0800 | [diff] [blame] | 967 | |
Xiang, Haihao | 85da7b9 | 2011-02-17 13:24:11 +0800 | [diff] [blame] | 968 | src0.reg_nr = $5.reg_nr; |
| 969 | src0.subreg_nr = 0; |
| 970 | set_instruction_src0(&$$, &src0); |
| 971 | |
| 972 | $$.bits1.da1.src1_reg_file = BRW_IMMEDIATE_VALUE; |
| 973 | $$.bits1.da1.src1_reg_type = $7.reg_type; |
| 974 | $$.bits3.ud = $7.imm32; |
| 975 | $$.bits3.generic_gen5.end_of_thread = !!($6 & EX_DESC_EOT_MASK); |
| 976 | } |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 977 | | predicate SEND execsize dst sendleadreg sndopr directsrcoperand instoptions |
| 978 | { |
| 979 | struct src_operand src0; |
| 980 | |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 981 | if (!IS_GENp(6)) { |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 982 | fprintf(stderr, "error: the syntax of send instruction\n"); |
| 983 | YYERROR; |
| 984 | } |
| 985 | |
| 986 | if ($7.reg_file != BRW_ARCHITECTURE_REGISTER_FILE || |
| 987 | ($7.reg_nr & 0xF0) != BRW_ARF_ADDRESS || |
| 988 | ($7.reg_nr & 0x0F) != 0 || |
| 989 | $7.subreg_nr != 0) { |
| 990 | fprintf (stderr, "%d: scalar register must be a0.0<0;1,0>:ud\n", yylineno); |
| 991 | YYERROR; |
| 992 | } |
| 993 | |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 994 | memset(&$$, 0, sizeof($$)); |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 995 | $$.header.opcode = $2; |
| 996 | $$.header.execution_size = $3; |
Damien Lespiau | e71f1d2 | 2013-01-14 19:13:19 +0000 | [diff] [blame] | 997 | $$.header.destreg__conditionalmod = ($6 & EX_DESC_SFID_MASK); /* SFID */ |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 998 | set_instruction_predicate(&$$, &$1); |
| 999 | |
| 1000 | if (set_instruction_dest(&$$, &$4) != 0) |
| 1001 | YYERROR; |
| 1002 | |
| 1003 | memset(&src0, 0, sizeof(src0)); |
| 1004 | src0.address_mode = BRW_ADDRESS_DIRECT; |
| 1005 | |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1006 | if (IS_GENp(7)) { |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 1007 | src0.reg_file = BRW_GENERAL_REGISTER_FILE; |
| 1008 | src0.reg_type = BRW_REGISTER_TYPE_UB; |
| 1009 | } else { |
| 1010 | src0.reg_file = BRW_MESSAGE_REGISTER_FILE; |
| 1011 | src0.reg_type = BRW_REGISTER_TYPE_D; |
| 1012 | } |
| 1013 | |
| 1014 | src0.reg_nr = $5.reg_nr; |
| 1015 | src0.subreg_nr = 0; |
| 1016 | set_instruction_src0(&$$, &src0); |
| 1017 | |
| 1018 | set_instruction_src1(&$$, &$7); |
| 1019 | $$.bits3.generic_gen5.end_of_thread = !!($6 & EX_DESC_EOT_MASK); |
| 1020 | } |
| 1021 | | predicate SEND execsize dst sendleadreg payload sndopr imm32reg instoptions |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1022 | { |
| 1023 | if ($8.reg_type != BRW_REGISTER_TYPE_UD && |
| 1024 | $8.reg_type != BRW_REGISTER_TYPE_D && |
| 1025 | $8.reg_type != BRW_REGISTER_TYPE_V) { |
| 1026 | fprintf (stderr, "%d: non-int D/UD/V representation: %d,type=%d\n", yylineno, $8.imm32, $8.reg_type); |
| 1027 | YYERROR; |
| 1028 | } |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 1029 | memset(&$$, 0, sizeof($$)); |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1030 | $$.header.opcode = $2; |
| 1031 | $$.header.execution_size = $3; |
Damien Lespiau | e71f1d2 | 2013-01-14 19:13:19 +0000 | [diff] [blame] | 1032 | $$.header.destreg__conditionalmod = $5.reg_nr; /* msg reg index */ |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1033 | |
| 1034 | set_instruction_predicate(&$$, &$1); |
| 1035 | if (set_instruction_dest(&$$, &$4) != 0) |
| 1036 | YYERROR; |
| 1037 | if (set_instruction_src0(&$$, &$6) != 0) |
| 1038 | YYERROR; |
| 1039 | $$.bits1.da1.src1_reg_file = BRW_IMMEDIATE_VALUE; |
| 1040 | $$.bits1.da1.src1_reg_type = $8.reg_type; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1041 | if (IS_GENx(5)) { |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1042 | $$.bits2.send_gen5.sfid = ($7 & EX_DESC_SFID_MASK); |
| 1043 | $$.bits3.ud = $8.imm32; |
| 1044 | $$.bits3.generic_gen5.end_of_thread = !!($7 & EX_DESC_EOT_MASK); |
| 1045 | } |
| 1046 | else |
| 1047 | $$.bits3.ud = $8.imm32; |
| 1048 | } |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 1049 | | predicate SEND execsize dst sendleadreg payload exp directsrcoperand instoptions |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1050 | { |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 1051 | memset(&$$, 0, sizeof($$)); |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1052 | $$.header.opcode = $2; |
| 1053 | $$.header.execution_size = $3; |
Damien Lespiau | e71f1d2 | 2013-01-14 19:13:19 +0000 | [diff] [blame] | 1054 | $$.header.destreg__conditionalmod = $5.reg_nr; /* msg reg index */ |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1055 | |
| 1056 | set_instruction_predicate(&$$, &$1); |
| 1057 | |
| 1058 | if (set_instruction_dest(&$$, &$4) != 0) |
| 1059 | YYERROR; |
| 1060 | if (set_instruction_src0(&$$, &$6) != 0) |
| 1061 | YYERROR; |
| 1062 | /* XXX is this correct? */ |
| 1063 | if (set_instruction_src1(&$$, &$8) != 0) |
| 1064 | YYERROR; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1065 | if (IS_GENx(5)) { |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1066 | $$.bits2.send_gen5.sfid = $7; |
| 1067 | } |
| 1068 | } |
| 1069 | |
Eric Anholt | edc82a0 | 2006-08-25 17:42:05 -0700 | [diff] [blame] | 1070 | ; |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 1071 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1072 | sndopr: exp %prec SNDOPR |
| 1073 | { |
| 1074 | $$ = $1; |
| 1075 | } |
| 1076 | ; |
| 1077 | |
| 1078 | jumpinstruction: predicate JMPI execsize relativelocation2 |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 1079 | { |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 1080 | /* The jump instruction requires that the IP register |
| 1081 | * be the destination and first source operand, while the |
| 1082 | * offset is the second source operand. The next instruction |
| 1083 | * is the post-incremented IP plus the offset. |
| 1084 | */ |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 1085 | memset(&$$, 0, sizeof($$)); |
Zou Nanhai | be9bcee | 2008-12-09 18:38:54 -0800 | [diff] [blame] | 1086 | $$.header.opcode = $2; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1087 | $$.header.execution_size = ffs(1) - 1; |
| 1088 | if(advanced_flag) |
| 1089 | $$.header.mask_control = BRW_MASK_DISABLE; |
Zou Nanhai | be9bcee | 2008-12-09 18:38:54 -0800 | [diff] [blame] | 1090 | set_instruction_predicate(&$$, &$1); |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 1091 | set_instruction_dest(&$$, &ip_dst); |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 1092 | set_instruction_src0(&$$, &ip_src); |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1093 | set_instruction_src1(&$$, &$4); |
Homer Hsing | b0b540f | 2012-09-21 10:06:20 +0800 | [diff] [blame] | 1094 | $$.first_reloc_target = $4.reloc_target; |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 1095 | $$.first_reloc_offset = $4.imm32; |
Eric Anholt | 356ce76 | 2006-08-31 10:27:48 -0700 | [diff] [blame] | 1096 | } |
| 1097 | ; |
| 1098 | |
Xiang, Haihao | 5405532 | 2010-10-27 09:42:56 +0800 | [diff] [blame] | 1099 | mathinstruction: predicate MATH_INST execsize dst src srcimm math_function instoptions |
| 1100 | { |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 1101 | memset(&$$, 0, sizeof($$)); |
Xiang, Haihao | 5405532 | 2010-10-27 09:42:56 +0800 | [diff] [blame] | 1102 | $$.header.opcode = $2; |
Damien Lespiau | e71f1d2 | 2013-01-14 19:13:19 +0000 | [diff] [blame] | 1103 | $$.header.destreg__conditionalmod = $7; |
Xiang, Haihao | 5405532 | 2010-10-27 09:42:56 +0800 | [diff] [blame] | 1104 | $$.header.execution_size = $3; |
| 1105 | set_instruction_options(&$$, &$8); |
| 1106 | set_instruction_predicate(&$$, &$1); |
| 1107 | if (set_instruction_dest(&$$, &$4) != 0) |
| 1108 | YYERROR; |
| 1109 | if (set_instruction_src0(&$$, &$5) != 0) |
| 1110 | YYERROR; |
| 1111 | if (set_instruction_src1(&$$, &$6) != 0) |
| 1112 | YYERROR; |
| 1113 | } |
| 1114 | ; |
| 1115 | |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 1116 | breakinstruction: predicate breakop execsize relativelocation relativelocation instoptions |
Eric Anholt | 4ee9c3d | 2006-09-01 13:37:51 -0700 | [diff] [blame] | 1117 | { |
Homer Hsing | ce55552 | 2012-09-27 15:44:15 +0800 | [diff] [blame] | 1118 | // for Gen6, Gen7 |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 1119 | memset(&$$, 0, sizeof($$)); |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 1120 | set_instruction_predicate(&$$, &$1); |
| 1121 | $$.header.opcode = $2; |
| 1122 | $$.header.execution_size = $3; |
| 1123 | $$.first_reloc_target = $4.reloc_target; |
| 1124 | $$.first_reloc_offset = $4.imm32; |
| 1125 | $$.second_reloc_target = $5.reloc_target; |
| 1126 | $$.second_reloc_offset = $5.imm32; |
Eric Anholt | 4ee9c3d | 2006-09-01 13:37:51 -0700 | [diff] [blame] | 1127 | } |
| 1128 | ; |
| 1129 | |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 1130 | breakop: BREAK | CONT |
Eric Anholt | edc82a0 | 2006-08-25 17:42:05 -0700 | [diff] [blame] | 1131 | ; |
Eric Anholt | f914c6a | 2006-08-25 11:05:10 -0700 | [diff] [blame] | 1132 | |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1133 | /* |
Eric Anholt | f914c6a | 2006-08-25 11:05:10 -0700 | [diff] [blame] | 1134 | maskpushop: MSAVE | PUSH |
| 1135 | ; |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1136 | */ |
Eric Anholt | f914c6a | 2006-08-25 11:05:10 -0700 | [diff] [blame] | 1137 | |
Eric Anholt | 1f58efa | 2006-09-01 11:56:12 -0700 | [diff] [blame] | 1138 | syncinstruction: predicate WAIT notifyreg |
| 1139 | { |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1140 | struct dst_operand notify_dst; |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1141 | struct src_operand notify_src; |
Eric Anholt | 1f58efa | 2006-09-01 11:56:12 -0700 | [diff] [blame] | 1142 | |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 1143 | memset(&$$, 0, sizeof($$)); |
Eric Anholt | 1f58efa | 2006-09-01 11:56:12 -0700 | [diff] [blame] | 1144 | $$.header.opcode = $2; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1145 | $$.header.execution_size = ffs(1) - 1; |
| 1146 | set_direct_dst_operand(¬ify_dst, &$3, BRW_REGISTER_TYPE_D); |
| 1147 | set_instruction_dest(&$$, ¬ify_dst); |
Xiang, Haihao | 852216d | 2011-02-16 15:26:24 +0800 | [diff] [blame] | 1148 | set_direct_src_operand(¬ify_src, &$3, BRW_REGISTER_TYPE_D); |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1149 | set_instruction_src0(&$$, ¬ify_src); |
Homer Hsing | b899aba | 2012-09-27 14:56:30 +0800 | [diff] [blame] | 1150 | set_instruction_src1(&$$, &src_null_reg); |
Eric Anholt | 1f58efa | 2006-09-01 11:56:12 -0700 | [diff] [blame] | 1151 | } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1152 | |
Eric Anholt | 1f58efa | 2006-09-01 11:56:12 -0700 | [diff] [blame] | 1153 | ; |
| 1154 | |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 1155 | nopinstruction: NOP |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 1156 | { |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 1157 | memset(&$$, 0, sizeof($$)); |
Eric Anholt | f914c6a | 2006-08-25 11:05:10 -0700 | [diff] [blame] | 1158 | $$.header.opcode = $1; |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 1159 | }; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1160 | |
| 1161 | /* XXX! */ |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 1162 | payload: directsrcoperand |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1163 | ; |
| 1164 | |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1165 | post_dst: dst |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1166 | ; |
| 1167 | |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1168 | msgtarget: NULL_TOKEN |
| 1169 | { |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1170 | if (IS_GENp(5)) { |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1171 | $$.bits2.send_gen5.sfid= BRW_MESSAGE_TARGET_NULL; |
| 1172 | $$.bits3.generic_gen5.header_present = 0; /* ??? */ |
| 1173 | } else { |
| 1174 | $$.bits3.generic.msg_target = BRW_MESSAGE_TARGET_NULL; |
| 1175 | } |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1176 | } |
| 1177 | | SAMPLER LPAREN INTEGER COMMA INTEGER COMMA |
| 1178 | sampler_datatype RPAREN |
| 1179 | { |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1180 | if (IS_GENp(7)) { |
Xiang, Haihao | 67d4ed6 | 2011-05-23 13:45:04 +0800 | [diff] [blame] | 1181 | $$.bits2.send_gen5.sfid = BRW_MESSAGE_TARGET_SAMPLER; |
| 1182 | $$.bits3.generic_gen5.header_present = 1; /* ??? */ |
| 1183 | $$.bits3.sampler_gen7.binding_table_index = $3; |
| 1184 | $$.bits3.sampler_gen7.sampler = $5; |
| 1185 | $$.bits3.sampler_gen7.simd_mode = 2; /* SIMD16, maybe we should add a new parameter */ |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1186 | } else if (IS_GENp(5)) { |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1187 | $$.bits2.send_gen5.sfid = BRW_MESSAGE_TARGET_SAMPLER; |
| 1188 | $$.bits3.generic_gen5.header_present = 1; /* ??? */ |
| 1189 | $$.bits3.sampler_gen5.binding_table_index = $3; |
| 1190 | $$.bits3.sampler_gen5.sampler = $5; |
| 1191 | $$.bits3.sampler_gen5.simd_mode = 2; /* SIMD16, maybe we should add a new parameter */ |
| 1192 | } else { |
| 1193 | $$.bits3.generic.msg_target = BRW_MESSAGE_TARGET_SAMPLER; |
| 1194 | $$.bits3.sampler.binding_table_index = $3; |
| 1195 | $$.bits3.sampler.sampler = $5; |
| 1196 | switch ($7) { |
| 1197 | case TYPE_F: |
| 1198 | $$.bits3.sampler.return_format = |
| 1199 | BRW_SAMPLER_RETURN_FORMAT_FLOAT32; |
| 1200 | break; |
| 1201 | case TYPE_UD: |
| 1202 | $$.bits3.sampler.return_format = |
| 1203 | BRW_SAMPLER_RETURN_FORMAT_UINT32; |
| 1204 | break; |
| 1205 | case TYPE_D: |
| 1206 | $$.bits3.sampler.return_format = |
| 1207 | BRW_SAMPLER_RETURN_FORMAT_SINT32; |
| 1208 | break; |
| 1209 | } |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1210 | } |
| 1211 | } |
Eric Anholt | 3d36079 | 2006-08-25 09:36:28 -0700 | [diff] [blame] | 1212 | | MATH math_function saturate math_signed math_scalar |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1213 | { |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1214 | if (IS_GENp(6)) { |
Homer Hsing | 5d72789 | 2012-10-23 09:21:15 +0800 | [diff] [blame] | 1215 | fprintf (stderr, "Gen6+ doesn't have math function\n"); |
Xiang, Haihao | 718cd6c | 2010-10-09 12:52:08 +0800 | [diff] [blame] | 1216 | YYERROR; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1217 | } else if (IS_GENx(5)) { |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1218 | $$.bits2.send_gen5.sfid = BRW_MESSAGE_TARGET_MATH; |
| 1219 | $$.bits3.generic_gen5.header_present = 0; |
| 1220 | $$.bits3.math_gen5.function = $2; |
| 1221 | if ($3 == BRW_INSTRUCTION_SATURATE) |
| 1222 | $$.bits3.math_gen5.saturate = 1; |
| 1223 | else |
| 1224 | $$.bits3.math_gen5.saturate = 0; |
| 1225 | $$.bits3.math_gen5.int_type = $4; |
| 1226 | $$.bits3.math_gen5.precision = BRW_MATH_PRECISION_FULL; |
| 1227 | $$.bits3.math_gen5.data_type = $5; |
| 1228 | } else { |
| 1229 | $$.bits3.generic.msg_target = BRW_MESSAGE_TARGET_MATH; |
| 1230 | $$.bits3.math.function = $2; |
| 1231 | if ($3 == BRW_INSTRUCTION_SATURATE) |
| 1232 | $$.bits3.math.saturate = 1; |
| 1233 | else |
| 1234 | $$.bits3.math.saturate = 0; |
| 1235 | $$.bits3.math.int_type = $4; |
| 1236 | $$.bits3.math.precision = BRW_MATH_PRECISION_FULL; |
| 1237 | $$.bits3.math.data_type = $5; |
| 1238 | } |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1239 | } |
| 1240 | | GATEWAY |
| 1241 | { |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1242 | if (IS_GENp(5)) { |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1243 | $$.bits2.send_gen5.sfid = BRW_MESSAGE_TARGET_GATEWAY; |
| 1244 | $$.bits3.generic_gen5.header_present = 0; /* ??? */ |
| 1245 | } else { |
| 1246 | $$.bits3.generic.msg_target = BRW_MESSAGE_TARGET_GATEWAY; |
| 1247 | } |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1248 | } |
Zou Nan hai | 807f876 | 2008-06-18 15:05:19 -0700 | [diff] [blame] | 1249 | | READ LPAREN INTEGER COMMA INTEGER COMMA INTEGER COMMA |
| 1250 | INTEGER RPAREN |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1251 | { |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1252 | if (IS_GENx(7)) { |
Xiang, Haihao | c8d6bf3 | 2011-05-23 13:32:32 +0800 | [diff] [blame] | 1253 | $$.bits2.send_gen5.sfid = |
Xiang, Haihao | e97f0bc | 2011-05-30 16:30:48 +0800 | [diff] [blame] | 1254 | BRW_MESSAGE_TARGET_DP_SC; |
Xiang, Haihao | c8d6bf3 | 2011-05-23 13:32:32 +0800 | [diff] [blame] | 1255 | $$.bits3.generic_gen5.header_present = 1; |
Damien Lespiau | 8fa561d | 2013-01-15 18:47:05 +0000 | [diff] [blame] | 1256 | $$.bits3.gen7_dp.binding_table_index = $3; |
| 1257 | $$.bits3.gen7_dp.msg_control = $7; |
| 1258 | $$.bits3.gen7_dp.msg_type = $9; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1259 | } else if (IS_GENx(6)) { |
Xiang, Haihao | a8458d5 | 2010-10-09 11:09:47 +0800 | [diff] [blame] | 1260 | $$.bits2.send_gen5.sfid = |
Xiang, Haihao | e97f0bc | 2011-05-30 16:30:48 +0800 | [diff] [blame] | 1261 | BRW_MESSAGE_TARGET_DP_SC; |
Xiang, Haihao | a8458d5 | 2010-10-09 11:09:47 +0800 | [diff] [blame] | 1262 | $$.bits3.generic_gen5.header_present = 1; |
Damien Lespiau | 668e0df | 2013-01-15 16:40:06 +0000 | [diff] [blame] | 1263 | $$.bits3.gen6_dp_sampler_const_cache.binding_table_index = $3; |
| 1264 | $$.bits3.gen6_dp_sampler_const_cache.msg_control = $7; |
| 1265 | $$.bits3.gen6_dp_sampler_const_cache.msg_type = $9; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1266 | } else if (IS_GENx(5)) { |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1267 | $$.bits2.send_gen5.sfid = |
| 1268 | BRW_MESSAGE_TARGET_DATAPORT_READ; |
| 1269 | $$.bits3.generic_gen5.header_present = 1; |
| 1270 | $$.bits3.dp_read_gen5.binding_table_index = $3; |
| 1271 | $$.bits3.dp_read_gen5.target_cache = $5; |
| 1272 | $$.bits3.dp_read_gen5.msg_control = $7; |
| 1273 | $$.bits3.dp_read_gen5.msg_type = $9; |
| 1274 | } else { |
| 1275 | $$.bits3.generic.msg_target = |
| 1276 | BRW_MESSAGE_TARGET_DATAPORT_READ; |
| 1277 | $$.bits3.dp_read.binding_table_index = $3; |
| 1278 | $$.bits3.dp_read.target_cache = $5; |
| 1279 | $$.bits3.dp_read.msg_control = $7; |
| 1280 | $$.bits3.dp_read.msg_type = $9; |
| 1281 | } |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1282 | } |
Eric Anholt | 4331394 | 2006-08-24 15:26:10 -0700 | [diff] [blame] | 1283 | | WRITE LPAREN INTEGER COMMA INTEGER COMMA INTEGER COMMA |
| 1284 | INTEGER RPAREN |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1285 | { |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1286 | if (IS_GENx(7)) { |
Xiang, Haihao | c8d6bf3 | 2011-05-23 13:32:32 +0800 | [diff] [blame] | 1287 | $$.bits2.send_gen5.sfid = |
Xiang, Haihao | e97f0bc | 2011-05-30 16:30:48 +0800 | [diff] [blame] | 1288 | BRW_MESSAGE_TARGET_DP_RC; |
Xiang, Haihao | c8d6bf3 | 2011-05-23 13:32:32 +0800 | [diff] [blame] | 1289 | $$.bits3.generic_gen5.header_present = 1; |
Damien Lespiau | 8fa561d | 2013-01-15 18:47:05 +0000 | [diff] [blame] | 1290 | $$.bits3.gen7_dp.binding_table_index = $3; |
| 1291 | $$.bits3.gen7_dp.msg_control = $5; |
| 1292 | $$.bits3.gen7_dp.msg_type = $7; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1293 | } else if (IS_GENx(6)) { |
Xiang, Haihao | 61784db | 2010-10-08 16:48:15 +0800 | [diff] [blame] | 1294 | $$.bits2.send_gen5.sfid = |
Xiang, Haihao | e97f0bc | 2011-05-30 16:30:48 +0800 | [diff] [blame] | 1295 | BRW_MESSAGE_TARGET_DP_RC; |
Xiang, Haihao | 61784db | 2010-10-08 16:48:15 +0800 | [diff] [blame] | 1296 | /* Sandybridge supports headerlesss message for render target write. |
| 1297 | * Currently the GFX assembler doesn't support it. so the program must provide |
| 1298 | * message header |
| 1299 | */ |
| 1300 | $$.bits3.generic_gen5.header_present = 1; |
Damien Lespiau | fe0bd37 | 2013-01-15 20:24:51 +0000 | [diff] [blame^] | 1301 | $$.bits3.gen6_dp.binding_table_index = $3; |
| 1302 | $$.bits3.gen6_dp.msg_control = $5; |
| 1303 | $$.bits3.gen6_dp.msg_type = $7; |
| 1304 | $$.bits3.gen6_dp.send_commit_msg = $9; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1305 | } else if (IS_GENx(5)) { |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1306 | $$.bits2.send_gen5.sfid = |
| 1307 | BRW_MESSAGE_TARGET_DATAPORT_WRITE; |
| 1308 | $$.bits3.generic_gen5.header_present = 1; |
| 1309 | $$.bits3.dp_write_gen5.binding_table_index = $3; |
| 1310 | $$.bits3.dp_write_gen5.pixel_scoreboard_clear = ($5 & 0x8) >> 3; |
| 1311 | $$.bits3.dp_write_gen5.msg_control = $5 & 0x7; |
| 1312 | $$.bits3.dp_write_gen5.msg_type = $7; |
| 1313 | $$.bits3.dp_write_gen5.send_commit_msg = $9; |
| 1314 | } else { |
| 1315 | $$.bits3.generic.msg_target = |
| 1316 | BRW_MESSAGE_TARGET_DATAPORT_WRITE; |
| 1317 | $$.bits3.dp_write.binding_table_index = $3; |
| 1318 | /* The msg control field of brw_struct.h is split into |
| 1319 | * msg control and pixel_scoreboard_clear, even though |
| 1320 | * pixel_scoreboard_clear isn't common to all write messages. |
| 1321 | */ |
| 1322 | $$.bits3.dp_write.pixel_scoreboard_clear = ($5 & 0x8) >> 3; |
| 1323 | $$.bits3.dp_write.msg_control = $5 & 0x7; |
| 1324 | $$.bits3.dp_write.msg_type = $7; |
| 1325 | $$.bits3.dp_write.send_commit_msg = $9; |
| 1326 | } |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1327 | } |
Xiang, Haihao | 14c0bd0 | 2010-11-01 16:16:25 +0800 | [diff] [blame] | 1328 | | WRITE LPAREN INTEGER COMMA INTEGER COMMA INTEGER COMMA |
| 1329 | INTEGER COMMA INTEGER RPAREN |
| 1330 | { |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1331 | if (IS_GENx(7)) { |
Xiang, Haihao | c8d6bf3 | 2011-05-23 13:32:32 +0800 | [diff] [blame] | 1332 | $$.bits2.send_gen5.sfid = |
Xiang, Haihao | e97f0bc | 2011-05-30 16:30:48 +0800 | [diff] [blame] | 1333 | BRW_MESSAGE_TARGET_DP_RC; |
Xiang, Haihao | c8d6bf3 | 2011-05-23 13:32:32 +0800 | [diff] [blame] | 1334 | $$.bits3.generic_gen5.header_present = ($11 != 0); |
Damien Lespiau | 8fa561d | 2013-01-15 18:47:05 +0000 | [diff] [blame] | 1335 | $$.bits3.gen7_dp.binding_table_index = $3; |
| 1336 | $$.bits3.gen7_dp.msg_control = $5; |
| 1337 | $$.bits3.gen7_dp.msg_type = $7; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1338 | } else if (IS_GENx(6)) { |
Xiang, Haihao | 14c0bd0 | 2010-11-01 16:16:25 +0800 | [diff] [blame] | 1339 | $$.bits2.send_gen5.sfid = |
Xiang, Haihao | e97f0bc | 2011-05-30 16:30:48 +0800 | [diff] [blame] | 1340 | BRW_MESSAGE_TARGET_DP_RC; |
Xiang, Haihao | 14c0bd0 | 2010-11-01 16:16:25 +0800 | [diff] [blame] | 1341 | $$.bits3.generic_gen5.header_present = ($11 != 0); |
Damien Lespiau | fe0bd37 | 2013-01-15 20:24:51 +0000 | [diff] [blame^] | 1342 | $$.bits3.gen6_dp.binding_table_index = $3; |
| 1343 | $$.bits3.gen6_dp.msg_control = $5; |
| 1344 | $$.bits3.gen6_dp.msg_type = $7; |
| 1345 | $$.bits3.gen6_dp.send_commit_msg = $9; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1346 | } else if (IS_GENx(5)) { |
Xiang, Haihao | 14c0bd0 | 2010-11-01 16:16:25 +0800 | [diff] [blame] | 1347 | $$.bits2.send_gen5.sfid = |
| 1348 | BRW_MESSAGE_TARGET_DATAPORT_WRITE; |
| 1349 | $$.bits3.generic_gen5.header_present = ($11 != 0); |
| 1350 | $$.bits3.dp_write_gen5.binding_table_index = $3; |
| 1351 | $$.bits3.dp_write_gen5.pixel_scoreboard_clear = ($5 & 0x8) >> 3; |
| 1352 | $$.bits3.dp_write_gen5.msg_control = $5 & 0x7; |
| 1353 | $$.bits3.dp_write_gen5.msg_type = $7; |
| 1354 | $$.bits3.dp_write_gen5.send_commit_msg = $9; |
| 1355 | } else { |
| 1356 | $$.bits3.generic.msg_target = |
| 1357 | BRW_MESSAGE_TARGET_DATAPORT_WRITE; |
| 1358 | $$.bits3.dp_write.binding_table_index = $3; |
| 1359 | /* The msg control field of brw_struct.h is split into |
| 1360 | * msg control and pixel_scoreboard_clear, even though |
| 1361 | * pixel_scoreboard_clear isn't common to all write messages. |
| 1362 | */ |
| 1363 | $$.bits3.dp_write.pixel_scoreboard_clear = ($5 & 0x8) >> 3; |
| 1364 | $$.bits3.dp_write.msg_control = $5 & 0x7; |
| 1365 | $$.bits3.dp_write.msg_type = $7; |
| 1366 | $$.bits3.dp_write.send_commit_msg = $9; |
| 1367 | } |
| 1368 | } |
Eric Anholt | e865196 | 2006-08-24 16:37:04 -0700 | [diff] [blame] | 1369 | | URB INTEGER urb_swizzle urb_allocate urb_used urb_complete |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1370 | { |
| 1371 | $$.bits3.generic.msg_target = BRW_MESSAGE_TARGET_URB; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1372 | if (IS_GENp(5)) { |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1373 | $$.bits2.send_gen5.sfid = BRW_MESSAGE_TARGET_URB; |
| 1374 | $$.bits3.generic_gen5.header_present = 1; |
| 1375 | $$.bits3.urb_gen5.opcode = BRW_URB_OPCODE_WRITE; |
| 1376 | $$.bits3.urb_gen5.offset = $2; |
| 1377 | $$.bits3.urb_gen5.swizzle_control = $3; |
| 1378 | $$.bits3.urb_gen5.pad = 0; |
| 1379 | $$.bits3.urb_gen5.allocate = $4; |
| 1380 | $$.bits3.urb_gen5.used = $5; |
| 1381 | $$.bits3.urb_gen5.complete = $6; |
| 1382 | } else { |
| 1383 | $$.bits3.generic.msg_target = BRW_MESSAGE_TARGET_URB; |
| 1384 | $$.bits3.urb.opcode = BRW_URB_OPCODE_WRITE; |
| 1385 | $$.bits3.urb.offset = $2; |
| 1386 | $$.bits3.urb.swizzle_control = $3; |
| 1387 | $$.bits3.urb.pad = 0; |
| 1388 | $$.bits3.urb.allocate = $4; |
| 1389 | $$.bits3.urb.used = $5; |
| 1390 | $$.bits3.urb.complete = $6; |
| 1391 | } |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1392 | } |
Zou Nan hai | 26afe90 | 2008-06-18 15:04:11 -0700 | [diff] [blame] | 1393 | | THREAD_SPAWNER LPAREN INTEGER COMMA INTEGER COMMA |
| 1394 | INTEGER RPAREN |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1395 | { |
| 1396 | $$.bits3.generic.msg_target = |
| 1397 | BRW_MESSAGE_TARGET_THREAD_SPAWNER; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1398 | if (IS_GENp(5)) { |
Xiang Haihao | 549b751 | 2009-06-30 10:02:33 +0800 | [diff] [blame] | 1399 | $$.bits2.send_gen5.sfid = |
| 1400 | BRW_MESSAGE_TARGET_THREAD_SPAWNER; |
| 1401 | $$.bits3.generic_gen5.header_present = 0; |
| 1402 | $$.bits3.thread_spawner_gen5.opcode = $3; |
| 1403 | $$.bits3.thread_spawner_gen5.requester_type = $5; |
| 1404 | $$.bits3.thread_spawner_gen5.resource_select = $7; |
| 1405 | } else { |
| 1406 | $$.bits3.generic.msg_target = |
| 1407 | BRW_MESSAGE_TARGET_THREAD_SPAWNER; |
| 1408 | $$.bits3.thread_spawner.opcode = $3; |
| 1409 | $$.bits3.thread_spawner.requester_type = $5; |
| 1410 | $$.bits3.thread_spawner.resource_select = $7; |
| 1411 | } |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1412 | } |
Zhou Chang | 5239986 | 2011-04-14 11:51:29 +0800 | [diff] [blame] | 1413 | | VME LPAREN INTEGER COMMA INTEGER COMMA INTEGER COMMA INTEGER RPAREN |
| 1414 | { |
| 1415 | $$.bits3.generic.msg_target = |
| 1416 | BRW_MESSAGE_TARGET_VME; |
| 1417 | |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1418 | if (IS_GENp(6)) { |
Zhou Chang | 5239986 | 2011-04-14 11:51:29 +0800 | [diff] [blame] | 1419 | $$.bits2.send_gen5.sfid = |
| 1420 | BRW_MESSAGE_TARGET_VME; |
| 1421 | $$.bits3.vme_gen6.binding_table_index = $3; |
| 1422 | $$.bits3.vme_gen6.search_path_index = $5; |
| 1423 | $$.bits3.vme_gen6.lut_subindex = $7; |
| 1424 | $$.bits3.vme_gen6.message_type = $9; |
| 1425 | $$.bits3.generic_gen5.header_present = 1; |
| 1426 | } else { |
Homer Hsing | 5d72789 | 2012-10-23 09:21:15 +0800 | [diff] [blame] | 1427 | fprintf (stderr, "Gen6- doesn't have vme function\n"); |
Zhou Chang | 5239986 | 2011-04-14 11:51:29 +0800 | [diff] [blame] | 1428 | YYERROR; |
| 1429 | } |
| 1430 | } |
Zhao Yakui | 93f2a4f | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1431 | | CRE LPAREN INTEGER COMMA INTEGER RPAREN |
| 1432 | { |
| 1433 | if (gen_level < 75) { |
Homer Hsing | 5d72789 | 2012-10-23 09:21:15 +0800 | [diff] [blame] | 1434 | fprintf (stderr, "Below Gen7.5 doesn't have CRE function\n"); |
Zhao Yakui | 93f2a4f | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1435 | YYERROR; |
| 1436 | } |
| 1437 | $$.bits3.generic.msg_target = |
| 1438 | BRW_MESSAGE_TARGET_CRE; |
| 1439 | |
| 1440 | $$.bits2.send_gen5.sfid = |
| 1441 | BRW_MESSAGE_TARGET_CRE; |
| 1442 | $$.bits3.cre_gen75.binding_table_index = $3; |
| 1443 | $$.bits3.cre_gen75.message_type = $5; |
| 1444 | $$.bits3.generic_gen5.header_present = 1; |
| 1445 | } |
Xiang, Haihao | 2705039 | 2011-06-10 16:04:30 +0800 | [diff] [blame] | 1446 | |
| 1447 | | DATA_PORT LPAREN INTEGER COMMA INTEGER COMMA INTEGER COMMA |
| 1448 | INTEGER COMMA INTEGER COMMA INTEGER RPAREN |
| 1449 | { |
| 1450 | $$.bits2.send_gen5.sfid = $3; |
| 1451 | $$.bits3.generic_gen5.header_present = ($13 != 0); |
| 1452 | |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1453 | if (IS_GENp(7)) { |
Xiang, Haihao | 2705039 | 2011-06-10 16:04:30 +0800 | [diff] [blame] | 1454 | if ($3 != BRW_MESSAGE_TARGET_DP_SC && |
| 1455 | $3 != BRW_MESSAGE_TARGET_DP_RC && |
| 1456 | $3 != BRW_MESSAGE_TARGET_DP_CC && |
| 1457 | $3 != BRW_MESSAGE_TARGET_DP_DC) { |
| 1458 | fprintf (stderr, "error: wrong cache type\n"); |
| 1459 | YYERROR; |
| 1460 | } |
| 1461 | |
Damien Lespiau | 8fa561d | 2013-01-15 18:47:05 +0000 | [diff] [blame] | 1462 | $$.bits3.gen7_dp.category = $11; |
| 1463 | $$.bits3.gen7_dp.binding_table_index = $9; |
| 1464 | $$.bits3.gen7_dp.msg_control = $7; |
| 1465 | $$.bits3.gen7_dp.msg_type = $5; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1466 | } else if (IS_GENx(6)) { |
Xiang, Haihao | 2705039 | 2011-06-10 16:04:30 +0800 | [diff] [blame] | 1467 | if ($3 != BRW_MESSAGE_TARGET_DP_SC && |
| 1468 | $3 != BRW_MESSAGE_TARGET_DP_RC && |
| 1469 | $3 != BRW_MESSAGE_TARGET_DP_CC) { |
| 1470 | fprintf (stderr, "error: wrong cache type\n"); |
| 1471 | YYERROR; |
| 1472 | } |
| 1473 | |
Damien Lespiau | 1f1ad59 | 2013-01-15 17:35:24 +0000 | [diff] [blame] | 1474 | $$.bits3.gen6_dp.send_commit_msg = $11; |
| 1475 | $$.bits3.gen6_dp.binding_table_index = $9; |
| 1476 | $$.bits3.gen6_dp.msg_control = $7; |
| 1477 | $$.bits3.gen6_dp.msg_type = $5; |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 1478 | } else if (!IS_GENp(5)) { |
Homer Hsing | 5d72789 | 2012-10-23 09:21:15 +0800 | [diff] [blame] | 1479 | fprintf (stderr, "Gen6- doesn't support data port for sampler/render/constant/data cache\n"); |
Xiang, Haihao | 2705039 | 2011-06-10 16:04:30 +0800 | [diff] [blame] | 1480 | YYERROR; |
| 1481 | } |
| 1482 | } |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1483 | ; |
| 1484 | |
Eric Anholt | e865196 | 2006-08-24 16:37:04 -0700 | [diff] [blame] | 1485 | urb_allocate: ALLOCATE { $$ = 1; } |
| 1486 | | /* empty */ { $$ = 0; } |
Eric Anholt | 3d36079 | 2006-08-25 09:36:28 -0700 | [diff] [blame] | 1487 | ; |
Eric Anholt | e865196 | 2006-08-24 16:37:04 -0700 | [diff] [blame] | 1488 | |
| 1489 | urb_used: USED { $$ = 1; } |
| 1490 | | /* empty */ { $$ = 0; } |
Eric Anholt | 3d36079 | 2006-08-25 09:36:28 -0700 | [diff] [blame] | 1491 | ; |
Eric Anholt | e865196 | 2006-08-24 16:37:04 -0700 | [diff] [blame] | 1492 | |
| 1493 | urb_complete: COMPLETE { $$ = 1; } |
| 1494 | | /* empty */ { $$ = 0; } |
Eric Anholt | 3d36079 | 2006-08-25 09:36:28 -0700 | [diff] [blame] | 1495 | ; |
Eric Anholt | e865196 | 2006-08-24 16:37:04 -0700 | [diff] [blame] | 1496 | |
| 1497 | urb_swizzle: TRANSPOSE { $$ = BRW_URB_SWIZZLE_TRANSPOSE; } |
| 1498 | | INTERLEAVE { $$ = BRW_URB_SWIZZLE_INTERLEAVE; } |
| 1499 | | /* empty */ { $$ = BRW_URB_SWIZZLE_NONE; } |
Eric Anholt | 3d36079 | 2006-08-25 09:36:28 -0700 | [diff] [blame] | 1500 | ; |
Eric Anholt | e865196 | 2006-08-24 16:37:04 -0700 | [diff] [blame] | 1501 | |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1502 | sampler_datatype: |
| 1503 | TYPE_F |
| 1504 | | TYPE_UD |
| 1505 | | TYPE_D |
Eric Anholt | 3d36079 | 2006-08-25 09:36:28 -0700 | [diff] [blame] | 1506 | ; |
| 1507 | |
| 1508 | math_function: INV | LOG | EXP | SQRT | POW | SIN | COS | SINCOS | INTDIV |
| 1509 | | INTMOD | INTDIVMOD |
| 1510 | ; |
| 1511 | |
| 1512 | math_signed: /* empty */ { $$ = 0; } |
| 1513 | | SIGNED { $$ = 1; } |
Eric Anholt | edc82a0 | 2006-08-25 17:42:05 -0700 | [diff] [blame] | 1514 | ; |
Eric Anholt | 3d36079 | 2006-08-25 09:36:28 -0700 | [diff] [blame] | 1515 | |
| 1516 | math_scalar: /* empty */ { $$ = 0; } |
| 1517 | | SCALAR { $$ = 1; } |
Eric Anholt | edc82a0 | 2006-08-25 17:42:05 -0700 | [diff] [blame] | 1518 | ; |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 1519 | |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1520 | /* 1.4.2: Destination register */ |
| 1521 | |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 1522 | dst: dstoperand | dstoperandex |
Eric Anholt | 3d36079 | 2006-08-25 09:36:28 -0700 | [diff] [blame] | 1523 | ; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1524 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1525 | dstoperand: symbol_reg dstregion |
| 1526 | { |
| 1527 | memset (&$$, '\0', sizeof ($$)); |
| 1528 | $$.reg_file = $1.base.reg_file; |
| 1529 | $$.reg_nr = $1.base.reg_nr; |
| 1530 | $$.subreg_nr = $1.base.subreg_nr; |
| 1531 | if ($2 == DEFAULT_DSTREGION) { |
| 1532 | $$.horiz_stride = $1.dst_region; |
| 1533 | } else { |
| 1534 | $$.horiz_stride = $2; |
| 1535 | } |
| 1536 | $$.reg_type = $1.type; |
| 1537 | } |
| 1538 | | dstreg dstregion writemask regtype |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1539 | { |
| 1540 | /* Returns an instruction with just the destination register |
| 1541 | * filled in. |
| 1542 | */ |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1543 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 1544 | $$.reg_file = $1.reg_file; |
| 1545 | $$.reg_nr = $1.reg_nr; |
| 1546 | $$.subreg_nr = $1.subreg_nr; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1547 | $$.address_mode = $1.address_mode; |
| 1548 | $$.address_subreg_nr = $1.address_subreg_nr; |
| 1549 | $$.indirect_offset = $1.indirect_offset; |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 1550 | $$.horiz_stride = $2; |
| 1551 | $$.writemask_set = $3.writemask_set; |
| 1552 | $$.writemask = $3.writemask; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1553 | $$.reg_type = $4.type; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1554 | } |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 1555 | ; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1556 | |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 1557 | /* The dstoperandex returns an instruction with just the destination register |
| 1558 | * filled in. |
| 1559 | */ |
| 1560 | dstoperandex: dstoperandex_typed dstregion regtype |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1561 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1562 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 1563 | $$.reg_file = $1.reg_file; |
| 1564 | $$.reg_nr = $1.reg_nr; |
| 1565 | $$.subreg_nr = $1.subreg_nr; |
| 1566 | $$.horiz_stride = $2; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1567 | $$.reg_type = $3.type; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1568 | } |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 1569 | | maskstackreg |
| 1570 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1571 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 1572 | $$.reg_file = $1.reg_file; |
| 1573 | $$.reg_nr = $1.reg_nr; |
| 1574 | $$.subreg_nr = $1.subreg_nr; |
| 1575 | $$.horiz_stride = 1; |
| 1576 | $$.reg_type = BRW_REGISTER_TYPE_UW; |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 1577 | } |
| 1578 | | controlreg |
| 1579 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1580 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 1581 | $$.reg_file = $1.reg_file; |
| 1582 | $$.reg_nr = $1.reg_nr; |
| 1583 | $$.subreg_nr = $1.subreg_nr; |
| 1584 | $$.horiz_stride = 1; |
| 1585 | $$.reg_type = BRW_REGISTER_TYPE_UD; |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 1586 | } |
| 1587 | | ipreg |
| 1588 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1589 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 1590 | $$.reg_file = $1.reg_file; |
| 1591 | $$.reg_nr = $1.reg_nr; |
| 1592 | $$.subreg_nr = $1.subreg_nr; |
| 1593 | $$.horiz_stride = 1; |
| 1594 | $$.reg_type = BRW_REGISTER_TYPE_UD; |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 1595 | } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1596 | | nullreg dstregion regtype |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 1597 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1598 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 1599 | $$.reg_file = $1.reg_file; |
| 1600 | $$.reg_nr = $1.reg_nr; |
| 1601 | $$.subreg_nr = $1.subreg_nr; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1602 | $$.horiz_stride = $2; |
| 1603 | $$.reg_type = $3.type; |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 1604 | } |
| 1605 | ; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1606 | |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 1607 | dstoperandex_typed: accreg | flagreg | addrreg | maskreg |
| 1608 | ; |
| 1609 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1610 | symbol_reg: STRING %prec STR_SYMBOL_REG |
| 1611 | { |
| 1612 | struct declared_register *dcl_reg = find_register($1); |
| 1613 | |
| 1614 | if (dcl_reg == NULL) { |
| 1615 | fprintf(stderr, "can't find register %s\n", $1); |
| 1616 | YYERROR; |
| 1617 | } |
| 1618 | |
| 1619 | memcpy(&$$, dcl_reg, sizeof(*dcl_reg)); |
Homer Hsing | 2ab4c0d | 2012-09-20 14:04:20 +0800 | [diff] [blame] | 1620 | free($1); // $1 has been malloc'ed by strdup |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1621 | } |
| 1622 | | symbol_reg_p |
| 1623 | { |
| 1624 | $$=$1; |
| 1625 | } |
| 1626 | ; |
| 1627 | |
| 1628 | symbol_reg_p: STRING LPAREN exp RPAREN |
| 1629 | { |
| 1630 | struct declared_register *dcl_reg = find_register($1); |
| 1631 | |
| 1632 | if (dcl_reg == NULL) { |
| 1633 | fprintf(stderr, "can't find register %s\n", $1); |
| 1634 | YYERROR; |
| 1635 | } |
| 1636 | |
| 1637 | memcpy(&$$, dcl_reg, sizeof(*dcl_reg)); |
| 1638 | $$.base.reg_nr += $3; |
Homer Hsing | 2ab4c0d | 2012-09-20 14:04:20 +0800 | [diff] [blame] | 1639 | free($1); |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1640 | } |
| 1641 | | STRING LPAREN exp COMMA exp RPAREN |
| 1642 | { |
| 1643 | struct declared_register *dcl_reg = find_register($1); |
| 1644 | |
| 1645 | if (dcl_reg == NULL) { |
| 1646 | fprintf(stderr, "can't find register %s\n", $1); |
| 1647 | YYERROR; |
| 1648 | } |
| 1649 | |
| 1650 | memcpy(&$$, dcl_reg, sizeof(*dcl_reg)); |
| 1651 | $$.base.reg_nr += $3; |
| 1652 | $$.base.subreg_nr += $5; |
Homer Hsing | 599d7d2 | 2012-10-16 14:14:25 +0800 | [diff] [blame] | 1653 | if(advanced_flag) { |
| 1654 | $$.base.reg_nr += $$.base.subreg_nr / (32 / get_type_size(dcl_reg->type)); |
| 1655 | $$.base.subreg_nr = $$.base.subreg_nr % (32 / get_type_size(dcl_reg->type)); |
| 1656 | } else { |
| 1657 | $$.base.reg_nr += $$.base.subreg_nr / 32; |
| 1658 | $$.base.subreg_nr = $$.base.subreg_nr % 32; |
| 1659 | } |
Homer Hsing | 2ab4c0d | 2012-09-20 14:04:20 +0800 | [diff] [blame] | 1660 | free($1); |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1661 | } |
| 1662 | ; |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1663 | /* Returns a partially complete destination register consisting of the |
| 1664 | * direct or indirect register addressing fields, but not stride or writemask. |
| 1665 | */ |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1666 | dstreg: directgenreg |
| 1667 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1668 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1669 | $$.address_mode = BRW_ADDRESS_DIRECT; |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 1670 | $$.reg_file = $1.reg_file; |
| 1671 | $$.reg_nr = $1.reg_nr; |
| 1672 | $$.subreg_nr = $1.subreg_nr; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1673 | } |
| 1674 | | directmsgreg |
Eric Anholt | a34d1e0 | 2006-08-22 14:52:14 -0700 | [diff] [blame] | 1675 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1676 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1677 | $$.address_mode = BRW_ADDRESS_DIRECT; |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 1678 | $$.reg_file = $1.reg_file; |
| 1679 | $$.reg_nr = $1.reg_nr; |
| 1680 | $$.subreg_nr = $1.subreg_nr; |
Eric Anholt | a34d1e0 | 2006-08-22 14:52:14 -0700 | [diff] [blame] | 1681 | } |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1682 | | indirectgenreg |
| 1683 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1684 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1685 | $$.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER; |
| 1686 | $$.reg_file = $1.reg_file; |
| 1687 | $$.address_subreg_nr = $1.address_subreg_nr; |
| 1688 | $$.indirect_offset = $1.indirect_offset; |
| 1689 | } |
| 1690 | | indirectmsgreg |
| 1691 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1692 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1693 | $$.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER; |
| 1694 | $$.reg_file = $1.reg_file; |
| 1695 | $$.address_subreg_nr = $1.address_subreg_nr; |
| 1696 | $$.indirect_offset = $1.indirect_offset; |
| 1697 | } |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1698 | ; |
| 1699 | |
| 1700 | /* 1.4.3: Source register */ |
Eric Anholt | 0d929b4 | 2006-08-22 13:33:41 -0700 | [diff] [blame] | 1701 | srcaccimm: srcacc | imm32reg |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1702 | ; |
| 1703 | |
Eric Anholt | 2d29874 | 2006-08-30 09:57:20 -0700 | [diff] [blame] | 1704 | srcacc: directsrcaccoperand | indirectsrcoperand |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1705 | ; |
| 1706 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1707 | srcimm: directsrcoperand | indirectsrcoperand| imm32reg |
Eric Anholt | edc82a0 | 2006-08-25 17:42:05 -0700 | [diff] [blame] | 1708 | ; |
Eric Anholt | 0d929b4 | 2006-08-22 13:33:41 -0700 | [diff] [blame] | 1709 | |
| 1710 | imm32reg: imm32 srcimmtype |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1711 | { |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 1712 | union { |
| 1713 | int i; |
| 1714 | float f; |
| 1715 | } intfloat; |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1716 | uint32_t d; |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 1717 | |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1718 | switch ($2) { |
| 1719 | case BRW_REGISTER_TYPE_UD: |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1720 | case BRW_REGISTER_TYPE_D: |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1721 | case BRW_REGISTER_TYPE_V: |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1722 | case BRW_REGISTER_TYPE_VF: |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1723 | switch ($1.r) { |
| 1724 | case imm32_d: |
| 1725 | d = $1.u.d; |
| 1726 | break; |
| 1727 | default: |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1728 | fprintf (stderr, "%d: non-int D/UD/V/VF representation: %d,type=%d\n", yylineno, $1.r, $2); |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1729 | YYERROR; |
| 1730 | } |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1731 | break; |
Eric Anholt | 0d929b4 | 2006-08-22 13:33:41 -0700 | [diff] [blame] | 1732 | case BRW_REGISTER_TYPE_UW: |
Eric Anholt | 0d929b4 | 2006-08-22 13:33:41 -0700 | [diff] [blame] | 1733 | case BRW_REGISTER_TYPE_W: |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1734 | switch ($1.r) { |
| 1735 | case imm32_d: |
| 1736 | d = $1.u.d; |
| 1737 | break; |
| 1738 | default: |
| 1739 | fprintf (stderr, "non-int W/UW representation\n"); |
| 1740 | YYERROR; |
| 1741 | } |
| 1742 | d &= 0xffff; |
| 1743 | d |= d << 16; |
Eric Anholt | 0d929b4 | 2006-08-22 13:33:41 -0700 | [diff] [blame] | 1744 | break; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1745 | case BRW_REGISTER_TYPE_F: |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1746 | switch ($1.r) { |
| 1747 | case imm32_f: |
| 1748 | intfloat.f = $1.u.f; |
| 1749 | break; |
| 1750 | case imm32_d: |
| 1751 | intfloat.f = (float) $1.u.d; |
| 1752 | break; |
| 1753 | default: |
| 1754 | fprintf (stderr, "non-float F representation\n"); |
| 1755 | YYERROR; |
| 1756 | } |
| 1757 | d = intfloat.i; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1758 | break; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1759 | #if 0 |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1760 | case BRW_REGISTER_TYPE_VF: |
| 1761 | fprintf (stderr, "Immediate type VF not supported yet\n"); |
| 1762 | YYERROR; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1763 | #endif |
Eric Anholt | 0d929b4 | 2006-08-22 13:33:41 -0700 | [diff] [blame] | 1764 | default: |
| 1765 | fprintf(stderr, "unknown immediate type %d\n", $2); |
| 1766 | YYERROR; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1767 | } |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1768 | memset (&$$, '\0', sizeof ($$)); |
| 1769 | $$.reg_file = BRW_IMMEDIATE_VALUE; |
| 1770 | $$.reg_type = $2; |
| 1771 | $$.imm32 = d; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1772 | } |
| 1773 | ; |
| 1774 | |
Eric Anholt | 5297b2a | 2006-08-25 16:50:17 -0700 | [diff] [blame] | 1775 | directsrcaccoperand: directsrcoperand |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1776 | | accreg region regtype |
Eric Anholt | 2a0f135 | 2006-08-25 17:44:55 -0700 | [diff] [blame] | 1777 | { |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1778 | set_direct_src_operand(&$$, &$1, $3.type); |
| 1779 | $$.vert_stride = $2.vert_stride; |
| 1780 | $$.width = $2.width; |
| 1781 | $$.horiz_stride = $2.horiz_stride; |
| 1782 | $$.default_region = $2.is_default; |
Eric Anholt | 2a0f135 | 2006-08-25 17:44:55 -0700 | [diff] [blame] | 1783 | } |
Eric Anholt | 2c78765 | 2006-08-25 13:53:48 -0700 | [diff] [blame] | 1784 | ; |
| 1785 | |
| 1786 | /* Returns a source operand in the src0 fields of an instruction. */ |
Eric Anholt | 5297b2a | 2006-08-25 16:50:17 -0700 | [diff] [blame] | 1787 | srcarchoperandex: srcarchoperandex_typed region regtype |
Eric Anholt | 2c78765 | 2006-08-25 13:53:48 -0700 | [diff] [blame] | 1788 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1789 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 1790 | $$.reg_file = $1.reg_file; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1791 | $$.reg_type = $3.type; |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 1792 | $$.subreg_nr = $1.subreg_nr; |
| 1793 | $$.reg_nr = $1.reg_nr; |
| 1794 | $$.vert_stride = $2.vert_stride; |
| 1795 | $$.width = $2.width; |
| 1796 | $$.horiz_stride = $2.horiz_stride; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1797 | $$.default_region = $2.is_default; |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 1798 | $$.negate = 0; |
| 1799 | $$.abs = 0; |
Eric Anholt | 2c78765 | 2006-08-25 13:53:48 -0700 | [diff] [blame] | 1800 | } |
| 1801 | | maskstackreg |
| 1802 | { |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1803 | set_direct_src_operand(&$$, &$1, BRW_REGISTER_TYPE_UB); |
Eric Anholt | 2c78765 | 2006-08-25 13:53:48 -0700 | [diff] [blame] | 1804 | } |
| 1805 | | controlreg |
| 1806 | { |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1807 | set_direct_src_operand(&$$, &$1, BRW_REGISTER_TYPE_UD); |
Eric Anholt | 2c78765 | 2006-08-25 13:53:48 -0700 | [diff] [blame] | 1808 | } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1809 | /* | statereg |
Eric Anholt | 2c78765 | 2006-08-25 13:53:48 -0700 | [diff] [blame] | 1810 | { |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1811 | set_direct_src_operand(&$$, &$1, BRW_REGISTER_TYPE_UD); |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1812 | }*/ |
Eric Anholt | 2c78765 | 2006-08-25 13:53:48 -0700 | [diff] [blame] | 1813 | | notifyreg |
| 1814 | { |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1815 | set_direct_src_operand(&$$, &$1, BRW_REGISTER_TYPE_UD); |
Eric Anholt | 2c78765 | 2006-08-25 13:53:48 -0700 | [diff] [blame] | 1816 | } |
| 1817 | | ipreg |
| 1818 | { |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1819 | set_direct_src_operand(&$$, &$1, BRW_REGISTER_TYPE_UD); |
Eric Anholt | 2c78765 | 2006-08-25 13:53:48 -0700 | [diff] [blame] | 1820 | } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1821 | | nullreg region regtype |
Eric Anholt | 2c78765 | 2006-08-25 13:53:48 -0700 | [diff] [blame] | 1822 | { |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1823 | if ($3.is_default) { |
| 1824 | set_direct_src_operand(&$$, &$1, BRW_REGISTER_TYPE_UD); |
| 1825 | } else { |
| 1826 | set_direct_src_operand(&$$, &$1, $3.type); |
| 1827 | } |
| 1828 | $$.default_region = 1; |
Eric Anholt | 2c78765 | 2006-08-25 13:53:48 -0700 | [diff] [blame] | 1829 | } |
| 1830 | ; |
| 1831 | |
Eric Anholt | 5297b2a | 2006-08-25 16:50:17 -0700 | [diff] [blame] | 1832 | srcarchoperandex_typed: flagreg | addrreg | maskreg |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1833 | ; |
| 1834 | |
Xiang, Haihao | 128053f | 2012-06-29 16:47:10 +0800 | [diff] [blame] | 1835 | sendleadreg: symbol_reg |
| 1836 | { |
| 1837 | memset (&$$, '\0', sizeof ($$)); |
| 1838 | $$.reg_file = $1.base.reg_file; |
| 1839 | $$.reg_nr = $1.base.reg_nr; |
| 1840 | $$.subreg_nr = $1.base.subreg_nr; |
| 1841 | } |
| 1842 | | directgenreg | directmsgreg |
Xiang, Haihao | 0b5f7fa | 2011-08-11 15:35:14 +0800 | [diff] [blame] | 1843 | ; |
| 1844 | |
Eric Anholt | 2d29874 | 2006-08-30 09:57:20 -0700 | [diff] [blame] | 1845 | src: directsrcoperand | indirectsrcoperand |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1846 | ; |
| 1847 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1848 | directsrcoperand: negate abs symbol_reg region regtype |
| 1849 | { |
| 1850 | memset (&$$, '\0', sizeof ($$)); |
| 1851 | $$.address_mode = BRW_ADDRESS_DIRECT; |
| 1852 | $$.reg_file = $3.base.reg_file; |
| 1853 | $$.reg_nr = $3.base.reg_nr; |
| 1854 | $$.subreg_nr = $3.base.subreg_nr; |
| 1855 | if ($5.is_default) { |
| 1856 | $$.reg_type = $3.type; |
| 1857 | } else { |
| 1858 | $$.reg_type = $5.type; |
| 1859 | } |
| 1860 | if ($4.is_default) { |
| 1861 | $$.vert_stride = $3.src_region.vert_stride; |
| 1862 | $$.width = $3.src_region.width; |
| 1863 | $$.horiz_stride = $3.src_region.horiz_stride; |
| 1864 | } else { |
| 1865 | $$.vert_stride = $4.vert_stride; |
| 1866 | $$.width = $4.width; |
| 1867 | $$.horiz_stride = $4.horiz_stride; |
| 1868 | } |
| 1869 | $$.negate = $1; |
| 1870 | $$.abs = $2; |
| 1871 | } |
| 1872 | | statereg region regtype |
| 1873 | { |
| 1874 | if($2.is_default ==1 && $3.is_default == 1) |
| 1875 | { |
| 1876 | set_direct_src_operand(&$$, &$1, BRW_REGISTER_TYPE_UD); |
| 1877 | } |
| 1878 | else{ |
| 1879 | memset (&$$, '\0', sizeof ($$)); |
| 1880 | $$.address_mode = BRW_ADDRESS_DIRECT; |
| 1881 | $$.reg_file = $1.reg_file; |
| 1882 | $$.reg_nr = $1.reg_nr; |
| 1883 | $$.subreg_nr = $1.subreg_nr; |
| 1884 | $$.vert_stride = $2.vert_stride; |
| 1885 | $$.width = $2.width; |
| 1886 | $$.horiz_stride = $2.horiz_stride; |
| 1887 | $$.reg_type = $3.type; |
| 1888 | } |
| 1889 | } |
| 1890 | | negate abs directgenreg region regtype swizzle |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1891 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1892 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 2d29874 | 2006-08-30 09:57:20 -0700 | [diff] [blame] | 1893 | $$.address_mode = BRW_ADDRESS_DIRECT; |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 1894 | $$.reg_file = $3.reg_file; |
| 1895 | $$.reg_nr = $3.reg_nr; |
| 1896 | $$.subreg_nr = $3.subreg_nr; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1897 | $$.reg_type = $5.type; |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 1898 | $$.vert_stride = $4.vert_stride; |
| 1899 | $$.width = $4.width; |
| 1900 | $$.horiz_stride = $4.horiz_stride; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1901 | $$.default_region = $4.is_default; |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 1902 | $$.negate = $1; |
| 1903 | $$.abs = $2; |
| 1904 | $$.swizzle_set = $6.swizzle_set; |
| 1905 | $$.swizzle_x = $6.swizzle_x; |
| 1906 | $$.swizzle_y = $6.swizzle_y; |
| 1907 | $$.swizzle_z = $6.swizzle_z; |
| 1908 | $$.swizzle_w = $6.swizzle_w; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1909 | } |
Eric Anholt | 5297b2a | 2006-08-25 16:50:17 -0700 | [diff] [blame] | 1910 | | srcarchoperandex |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1911 | ; |
| 1912 | |
Eric Anholt | 2d29874 | 2006-08-30 09:57:20 -0700 | [diff] [blame] | 1913 | indirectsrcoperand: |
| 1914 | negate abs indirectgenreg indirectregion regtype swizzle |
| 1915 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1916 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 2d29874 | 2006-08-30 09:57:20 -0700 | [diff] [blame] | 1917 | $$.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER; |
| 1918 | $$.reg_file = $3.reg_file; |
| 1919 | $$.address_subreg_nr = $3.address_subreg_nr; |
| 1920 | $$.indirect_offset = $3.indirect_offset; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1921 | $$.reg_type = $5.type; |
Eric Anholt | 2d29874 | 2006-08-30 09:57:20 -0700 | [diff] [blame] | 1922 | $$.vert_stride = $4.vert_stride; |
| 1923 | $$.width = $4.width; |
| 1924 | $$.horiz_stride = $4.horiz_stride; |
| 1925 | $$.negate = $1; |
| 1926 | $$.abs = $2; |
| 1927 | $$.swizzle_set = $6.swizzle_set; |
| 1928 | $$.swizzle_x = $6.swizzle_x; |
| 1929 | $$.swizzle_y = $6.swizzle_y; |
| 1930 | $$.swizzle_z = $6.swizzle_z; |
| 1931 | $$.swizzle_w = $6.swizzle_w; |
| 1932 | } |
| 1933 | ; |
| 1934 | |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1935 | /* 1.4.4: Address Registers */ |
| 1936 | /* Returns a partially-completed indirect_reg consisting of the address |
| 1937 | * register fields for register-indirect access. |
| 1938 | */ |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1939 | addrparam: addrreg COMMA immaddroffset |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1940 | { |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1941 | if ($3 < -512 || $3 > 511) { |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1942 | fprintf(stderr, "Address immediate offset %d out of" |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1943 | "range %d\n", $3, yylineno); |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1944 | YYERROR; |
| 1945 | } |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1946 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1947 | $$.address_subreg_nr = $1.subreg_nr; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1948 | $$.indirect_offset = $3; |
| 1949 | } |
| 1950 | | addrreg |
| 1951 | { |
| 1952 | memset (&$$, '\0', sizeof ($$)); |
| 1953 | $$.address_subreg_nr = $1.subreg_nr; |
| 1954 | $$.indirect_offset = 0; |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1955 | } |
| 1956 | ; |
| 1957 | |
| 1958 | /* The immaddroffset provides an immediate offset value added to the addresses |
| 1959 | * from the address register in register-indirect register access. |
| 1960 | */ |
| 1961 | immaddroffset: /* empty */ { $$ = 0; } |
Zou Nan hai | 5608d27 | 2009-10-20 14:51:04 +0800 | [diff] [blame] | 1962 | | exp |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1963 | ; |
| 1964 | |
| 1965 | |
Eric Anholt | edc82a0 | 2006-08-25 17:42:05 -0700 | [diff] [blame] | 1966 | /* 1.4.5: Register files and register numbers */ |
Zou Nan hai | 5608d27 | 2009-10-20 14:51:04 +0800 | [diff] [blame] | 1967 | subregnum: DOT exp |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1968 | { |
| 1969 | $$ = $2; |
| 1970 | } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 1971 | | %prec SUBREGNUM |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1972 | { |
| 1973 | /* Default to subreg 0 if unspecified. */ |
| 1974 | $$ = 0; |
| 1975 | } |
| 1976 | ; |
| 1977 | |
Eric Anholt | 569990b | 2006-08-25 09:46:18 -0700 | [diff] [blame] | 1978 | directgenreg: GENREG subregnum |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 1979 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1980 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 1981 | $$.reg_file = BRW_GENERAL_REGISTER_FILE; |
Eric Anholt | 569990b | 2006-08-25 09:46:18 -0700 | [diff] [blame] | 1982 | $$.reg_nr = $1; |
| 1983 | $$.subreg_nr = $2; |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 1984 | } |
Eric Anholt | edc82a0 | 2006-08-25 17:42:05 -0700 | [diff] [blame] | 1985 | ; |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 1986 | |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1987 | indirectgenreg: GENREGFILE LSQUARE addrparam RSQUARE |
| 1988 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1989 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 1990 | $$.reg_file = BRW_GENERAL_REGISTER_FILE; |
| 1991 | $$.address_subreg_nr = $3.address_subreg_nr; |
| 1992 | $$.indirect_offset = $3.indirect_offset; |
| 1993 | } |
| 1994 | ; |
| 1995 | |
Eric Anholt | 569990b | 2006-08-25 09:46:18 -0700 | [diff] [blame] | 1996 | directmsgreg: MSGREG subregnum |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 1997 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 1998 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | a34d1e0 | 2006-08-22 14:52:14 -0700 | [diff] [blame] | 1999 | $$.reg_file = BRW_MESSAGE_REGISTER_FILE; |
Eric Anholt | 569990b | 2006-08-25 09:46:18 -0700 | [diff] [blame] | 2000 | $$.reg_nr = $1; |
| 2001 | $$.subreg_nr = $2; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2002 | } |
| 2003 | ; |
| 2004 | |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2005 | indirectmsgreg: MSGREGFILE LSQUARE addrparam RSQUARE |
| 2006 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2007 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2008 | $$.reg_file = BRW_MESSAGE_REGISTER_FILE; |
| 2009 | $$.address_subreg_nr = $3.address_subreg_nr; |
| 2010 | $$.indirect_offset = $3.indirect_offset; |
| 2011 | } |
| 2012 | ; |
| 2013 | |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2014 | addrreg: ADDRESSREG subregnum |
| 2015 | { |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2016 | if ($1 != 0) { |
| 2017 | fprintf(stderr, |
| 2018 | "address register number %d out of range", $1); |
| 2019 | YYERROR; |
| 2020 | } |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2021 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2022 | $$.reg_file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 2023 | $$.reg_nr = BRW_ARF_ADDRESS | $1; |
| 2024 | $$.subreg_nr = $2; |
| 2025 | } |
| 2026 | ; |
| 2027 | |
Eric Anholt | 569990b | 2006-08-25 09:46:18 -0700 | [diff] [blame] | 2028 | accreg: ACCREG subregnum |
| 2029 | { |
Eric Anholt | 569990b | 2006-08-25 09:46:18 -0700 | [diff] [blame] | 2030 | if ($1 > 1) { |
| 2031 | fprintf(stderr, |
| 2032 | "accumulator register number %d out of range", $1); |
| 2033 | YYERROR; |
| 2034 | } |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2035 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 569990b | 2006-08-25 09:46:18 -0700 | [diff] [blame] | 2036 | $$.reg_file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 2037 | $$.reg_nr = BRW_ARF_ACCUMULATOR | $1; |
| 2038 | $$.subreg_nr = $2; |
| 2039 | } |
| 2040 | ; |
| 2041 | |
Xiang, Haihao | f3f6ba2 | 2012-07-17 13:46:59 +0800 | [diff] [blame] | 2042 | flagreg: FLAGREG subregnum |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 2043 | { |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 2044 | if ((!IS_GENp(7) && $1) > 0 || |
| 2045 | (IS_GENp(7) && $1 > 1)) { |
Xiang, Haihao | f3f6ba2 | 2012-07-17 13:46:59 +0800 | [diff] [blame] | 2046 | fprintf(stderr, |
| 2047 | "flag register number %d out of range\n", $1); |
| 2048 | YYERROR; |
| 2049 | } |
| 2050 | |
| 2051 | if ($2 > 1) { |
| 2052 | fprintf(stderr, |
| 2053 | "flag subregister number %d out of range\n", $1); |
| 2054 | YYERROR; |
| 2055 | } |
| 2056 | |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2057 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 2058 | $$.reg_file = BRW_ARCHITECTURE_REGISTER_FILE; |
Xiang, Haihao | f3f6ba2 | 2012-07-17 13:46:59 +0800 | [diff] [blame] | 2059 | $$.reg_nr = BRW_ARF_FLAG | $1; |
| 2060 | $$.subreg_nr = $2; |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 2061 | } |
| 2062 | ; |
| 2063 | |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2064 | maskreg: MASKREG subregnum |
| 2065 | { |
| 2066 | if ($1 > 0) { |
| 2067 | fprintf(stderr, |
| 2068 | "mask register number %d out of range", $1); |
| 2069 | YYERROR; |
| 2070 | } |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2071 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2072 | $$.reg_file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 2073 | $$.reg_nr = BRW_ARF_MASK; |
| 2074 | $$.subreg_nr = $2; |
| 2075 | } |
| 2076 | | mask_subreg |
| 2077 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2078 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2079 | $$.reg_file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 2080 | $$.reg_nr = BRW_ARF_MASK; |
| 2081 | $$.subreg_nr = $1; |
| 2082 | } |
| 2083 | ; |
| 2084 | |
| 2085 | mask_subreg: AMASK | IMASK | LMASK | CMASK |
| 2086 | ; |
| 2087 | |
| 2088 | maskstackreg: MASKSTACKREG subregnum |
| 2089 | { |
| 2090 | if ($1 > 0) { |
| 2091 | fprintf(stderr, |
| 2092 | "mask stack register number %d out of range", $1); |
| 2093 | YYERROR; |
| 2094 | } |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2095 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2096 | $$.reg_file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 2097 | $$.reg_nr = BRW_ARF_MASK_STACK; |
| 2098 | $$.subreg_nr = $2; |
| 2099 | } |
| 2100 | | maskstack_subreg |
| 2101 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2102 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2103 | $$.reg_file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 2104 | $$.reg_nr = BRW_ARF_MASK_STACK; |
| 2105 | $$.subreg_nr = $1; |
| 2106 | } |
| 2107 | ; |
| 2108 | |
| 2109 | maskstack_subreg: IMS | LMS |
| 2110 | ; |
| 2111 | |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2112 | /* |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2113 | maskstackdepthreg: MASKSTACKDEPTHREG subregnum |
| 2114 | { |
| 2115 | if ($1 > 0) { |
| 2116 | fprintf(stderr, |
| 2117 | "mask stack register number %d out of range", $1); |
| 2118 | YYERROR; |
| 2119 | } |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2120 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2121 | $$.reg_file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 2122 | $$.reg_nr = BRW_ARF_MASK_STACK_DEPTH; |
| 2123 | $$.subreg_nr = $2; |
| 2124 | } |
| 2125 | | maskstackdepth_subreg |
| 2126 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2127 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2128 | $$.reg_file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 2129 | $$.reg_nr = BRW_ARF_MASK_STACK_DEPTH; |
| 2130 | $$.subreg_nr = $1; |
| 2131 | } |
| 2132 | ; |
| 2133 | |
| 2134 | maskstackdepth_subreg: IMSD | LMSD |
| 2135 | ; |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2136 | */ |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2137 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2138 | notifyreg: NOTIFYREG regtype |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2139 | { |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 2140 | int num_notifyreg = (IS_GENp(6)) ? 3 : 2; |
Xiang, Haihao | 852216d | 2011-02-16 15:26:24 +0800 | [diff] [blame] | 2141 | |
| 2142 | if ($1 > num_notifyreg) { |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2143 | fprintf(stderr, |
| 2144 | "notification register number %d out of range", |
| 2145 | $1); |
| 2146 | YYERROR; |
| 2147 | } |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2148 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2149 | $$.reg_file = BRW_ARCHITECTURE_REGISTER_FILE; |
Xiang, Haihao | 852216d | 2011-02-16 15:26:24 +0800 | [diff] [blame] | 2150 | |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 2151 | if (IS_GENp(6)) { |
Xiang, Haihao | 852216d | 2011-02-16 15:26:24 +0800 | [diff] [blame] | 2152 | $$.reg_nr = BRW_ARF_NOTIFICATION_COUNT; |
| 2153 | $$.subreg_nr = $1; |
| 2154 | } else { |
| 2155 | $$.reg_nr = BRW_ARF_NOTIFICATION_COUNT | $1; |
| 2156 | $$.subreg_nr = 0; |
| 2157 | } |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2158 | } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2159 | /* |
| 2160 | | NOTIFYREG regtype |
| 2161 | { |
| 2162 | if ($1 > 1) { |
| 2163 | fprintf(stderr, |
| 2164 | "notification register number %d out of range", |
| 2165 | $1); |
| 2166 | YYERROR; |
| 2167 | } |
| 2168 | memset (&$$, '\0', sizeof ($$)); |
| 2169 | $$.reg_file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 2170 | $$.reg_nr = BRW_ARF_NOTIFICATION_COUNT; |
| 2171 | $$.subreg_nr = 0; |
| 2172 | } |
| 2173 | */ |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2174 | ; |
| 2175 | |
| 2176 | statereg: STATEREG subregnum |
| 2177 | { |
| 2178 | if ($1 > 0) { |
| 2179 | fprintf(stderr, |
| 2180 | "state register number %d out of range", $1); |
| 2181 | YYERROR; |
| 2182 | } |
| 2183 | if ($2 > 1) { |
| 2184 | fprintf(stderr, |
| 2185 | "state subregister number %d out of range", $1); |
| 2186 | YYERROR; |
| 2187 | } |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2188 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2189 | $$.reg_file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 2190 | $$.reg_nr = BRW_ARF_STATE | $1; |
| 2191 | $$.subreg_nr = $2; |
| 2192 | } |
| 2193 | ; |
| 2194 | |
| 2195 | controlreg: CONTROLREG subregnum |
| 2196 | { |
| 2197 | if ($1 > 0) { |
| 2198 | fprintf(stderr, |
| 2199 | "control register number %d out of range", $1); |
| 2200 | YYERROR; |
| 2201 | } |
| 2202 | if ($2 > 2) { |
| 2203 | fprintf(stderr, |
| 2204 | "control subregister number %d out of range", $1); |
| 2205 | YYERROR; |
| 2206 | } |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2207 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2208 | $$.reg_file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 2209 | $$.reg_nr = BRW_ARF_CONTROL | $1; |
| 2210 | $$.subreg_nr = $2; |
| 2211 | } |
| 2212 | ; |
| 2213 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2214 | ipreg: IPREG regtype |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2215 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2216 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 883408e | 2006-08-25 13:38:03 -0700 | [diff] [blame] | 2217 | $$.reg_file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 2218 | $$.reg_nr = BRW_ARF_IP; |
| 2219 | $$.subreg_nr = 0; |
| 2220 | } |
| 2221 | ; |
| 2222 | |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 2223 | nullreg: NULL_TOKEN |
| 2224 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2225 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 2226 | $$.reg_file = BRW_ARCHITECTURE_REGISTER_FILE; |
| 2227 | $$.reg_nr = BRW_ARF_NULL; |
| 2228 | $$.subreg_nr = 0; |
| 2229 | } |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2230 | ; |
| 2231 | |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 2232 | /* 1.4.6: Relative locations */ |
Homer Hsing | c0ebde2 | 2012-09-21 10:14:31 +0800 | [diff] [blame] | 2233 | relativelocation: |
Homer Hsing | 4bf84ec | 2012-09-24 10:12:26 +0800 | [diff] [blame] | 2234 | simple_int |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 2235 | { |
Homer Hsing | c0ebde2 | 2012-09-21 10:14:31 +0800 | [diff] [blame] | 2236 | if (($1 > 32767) || ($1 < -32768)) { |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 2237 | fprintf(stderr, |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2238 | "error: relative offset %d out of range \n", |
Homer Hsing | c0ebde2 | 2012-09-21 10:14:31 +0800 | [diff] [blame] | 2239 | $1); |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 2240 | YYERROR; |
| 2241 | } |
| 2242 | |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2243 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 2244 | $$.reg_file = BRW_IMMEDIATE_VALUE; |
| 2245 | $$.reg_type = BRW_REGISTER_TYPE_D; |
Homer Hsing | c0ebde2 | 2012-09-21 10:14:31 +0800 | [diff] [blame] | 2246 | $$.imm32 = $1 & 0x0000ffff; |
| 2247 | } |
| 2248 | | STRING |
| 2249 | { |
| 2250 | memset (&$$, '\0', sizeof ($$)); |
| 2251 | $$.reg_file = BRW_IMMEDIATE_VALUE; |
| 2252 | $$.reg_type = BRW_REGISTER_TYPE_D; |
| 2253 | $$.reloc_target = $1; |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 2254 | } |
| 2255 | ; |
| 2256 | |
| 2257 | relativelocation2: |
Homer Hsing | b0b540f | 2012-09-21 10:06:20 +0800 | [diff] [blame] | 2258 | STRING |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 2259 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2260 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 2261 | $$.reg_file = BRW_IMMEDIATE_VALUE; |
| 2262 | $$.reg_type = BRW_REGISTER_TYPE_D; |
Homer Hsing | b0b540f | 2012-09-21 10:06:20 +0800 | [diff] [blame] | 2263 | $$.reloc_target = $1; |
| 2264 | } |
| 2265 | | exp |
| 2266 | { |
| 2267 | memset (&$$, '\0', sizeof ($$)); |
| 2268 | $$.reg_file = BRW_IMMEDIATE_VALUE; |
| 2269 | $$.reg_type = BRW_REGISTER_TYPE_D; |
| 2270 | $$.imm32 = $1; |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 2271 | } |
| 2272 | | directgenreg region regtype |
| 2273 | { |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2274 | set_direct_src_operand(&$$, &$1, $3.type); |
| 2275 | $$.vert_stride = $2.vert_stride; |
| 2276 | $$.width = $2.width; |
| 2277 | $$.horiz_stride = $2.horiz_stride; |
| 2278 | $$.default_region = $2.is_default; |
| 2279 | } |
| 2280 | | symbol_reg_p |
| 2281 | { |
| 2282 | memset (&$$, '\0', sizeof ($$)); |
| 2283 | $$.address_mode = BRW_ADDRESS_DIRECT; |
| 2284 | $$.reg_file = $1.base.reg_file; |
| 2285 | $$.reg_nr = $1.base.reg_nr; |
| 2286 | $$.subreg_nr = $1.base.subreg_nr; |
| 2287 | $$.reg_type = $1.type; |
| 2288 | $$.vert_stride = $1.src_region.vert_stride; |
| 2289 | $$.width = $1.src_region.width; |
| 2290 | $$.horiz_stride = $1.src_region.horiz_stride; |
| 2291 | } |
| 2292 | | indirectgenreg indirectregion regtype |
| 2293 | { |
| 2294 | memset (&$$, '\0', sizeof ($$)); |
| 2295 | $$.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER; |
| 2296 | $$.reg_file = $1.reg_file; |
| 2297 | $$.address_subreg_nr = $1.address_subreg_nr; |
| 2298 | $$.indirect_offset = $1.indirect_offset; |
| 2299 | $$.reg_type = $3.type; |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 2300 | $$.vert_stride = $2.vert_stride; |
| 2301 | $$.width = $2.width; |
| 2302 | $$.horiz_stride = $2.horiz_stride; |
| 2303 | } |
| 2304 | ; |
| 2305 | |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2306 | /* 1.4.7: Regions */ |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2307 | dstregion: /* empty */ |
| 2308 | { |
| 2309 | $$ = DEFAULT_DSTREGION; |
| 2310 | } |
| 2311 | |LANGLE exp RANGLE |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2312 | { |
| 2313 | /* Returns a value for a horiz_stride field of an |
| 2314 | * instruction. |
| 2315 | */ |
| 2316 | if ($2 != 1 && $2 != 2 && $2 != 4) { |
| 2317 | fprintf(stderr, "Invalid horiz size %d\n", $2); |
| 2318 | } |
Eric Anholt | 0edcb25 | 2006-08-22 13:15:38 -0700 | [diff] [blame] | 2319 | $$ = ffs($2); |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2320 | } |
| 2321 | ; |
| 2322 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2323 | region: /* empty */ |
| 2324 | { |
| 2325 | /* XXX is this default value correct?*/ |
| 2326 | memset (&$$, '\0', sizeof ($$)); |
| 2327 | $$.vert_stride = ffs(0); |
| 2328 | $$.width = ffs(1) - 1; |
| 2329 | $$.horiz_stride = ffs(0); |
| 2330 | $$.is_default = 1; |
| 2331 | } |
| 2332 | |LANGLE exp RANGLE |
| 2333 | { |
| 2334 | /* XXX is this default value correct for accreg?*/ |
| 2335 | memset (&$$, '\0', sizeof ($$)); |
| 2336 | $$.vert_stride = ffs($2); |
| 2337 | $$.width = ffs(1) - 1; |
| 2338 | $$.horiz_stride = ffs(0); |
| 2339 | } |
| 2340 | |LANGLE exp COMMA exp COMMA exp RANGLE |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2341 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2342 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 2343 | $$.vert_stride = ffs($2); |
| 2344 | $$.width = ffs($4) - 1; |
Eric Anholt | d4c82e8 | 2006-08-22 13:08:26 -0700 | [diff] [blame] | 2345 | $$.horiz_stride = ffs($6); |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2346 | } |
Zou Nan hai | c6f2da4 | 2009-10-28 10:14:19 +0800 | [diff] [blame] | 2347 | | LANGLE exp SEMICOLON exp COMMA exp RANGLE |
| 2348 | { |
| 2349 | memset (&$$, '\0', sizeof ($$)); |
| 2350 | $$.vert_stride = ffs($2); |
| 2351 | $$.width = ffs($4) - 1; |
| 2352 | $$.horiz_stride = ffs($6); |
| 2353 | } |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2354 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2355 | ; |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2356 | /* region_wh is used in specifying indirect operands where rather than having |
| 2357 | * a vertical stride, you use subsequent address registers to get a new base |
Eric Anholt | 2d29874 | 2006-08-30 09:57:20 -0700 | [diff] [blame] | 2358 | * offset for the next row. |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2359 | */ |
Zou Nan hai | 5608d27 | 2009-10-20 14:51:04 +0800 | [diff] [blame] | 2360 | region_wh: LANGLE exp COMMA exp RANGLE |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2361 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2362 | memset (&$$, '\0', sizeof ($$)); |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2363 | $$.vert_stride = BRW_VERTICAL_STRIDE_ONE_DIMENSIONAL; |
| 2364 | $$.width = ffs($2) - 1; |
| 2365 | $$.horiz_stride = ffs($4); |
| 2366 | } |
| 2367 | ; |
| 2368 | |
Eric Anholt | 2d29874 | 2006-08-30 09:57:20 -0700 | [diff] [blame] | 2369 | indirectregion: region | region_wh |
| 2370 | ; |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2371 | |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2372 | /* 1.4.8: Types */ |
| 2373 | |
| 2374 | /* regtype returns an integer register type suitable for inserting into an |
| 2375 | * instruction. |
| 2376 | */ |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2377 | regtype: /* empty */ |
| 2378 | { $$.type = program_defaults.register_type;$$.is_default = 1;} |
| 2379 | | TYPE_F { $$.type = BRW_REGISTER_TYPE_F;$$.is_default = 0; } |
| 2380 | | TYPE_UD { $$.type = BRW_REGISTER_TYPE_UD;$$.is_default = 0; } |
| 2381 | | TYPE_D { $$.type = BRW_REGISTER_TYPE_D;$$.is_default = 0; } |
| 2382 | | TYPE_UW { $$.type = BRW_REGISTER_TYPE_UW;$$.is_default = 0; } |
| 2383 | | TYPE_W { $$.type = BRW_REGISTER_TYPE_W;$$.is_default = 0; } |
| 2384 | | TYPE_UB { $$.type = BRW_REGISTER_TYPE_UB;$$.is_default = 0; } |
| 2385 | | TYPE_B { $$.type = BRW_REGISTER_TYPE_B;$$.is_default = 0; } |
Eric Anholt | edc82a0 | 2006-08-25 17:42:05 -0700 | [diff] [blame] | 2386 | ; |
| 2387 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2388 | srcimmtype: /* empty */ |
| 2389 | { |
| 2390 | /* XXX change to default when pragma parse is done */ |
| 2391 | $$ = BRW_REGISTER_TYPE_D; |
| 2392 | } |
| 2393 | |TYPE_F { $$ = BRW_REGISTER_TYPE_F; } |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2394 | | TYPE_UD { $$ = BRW_REGISTER_TYPE_UD; } |
| 2395 | | TYPE_D { $$ = BRW_REGISTER_TYPE_D; } |
| 2396 | | TYPE_UW { $$ = BRW_REGISTER_TYPE_UW; } |
| 2397 | | TYPE_W { $$ = BRW_REGISTER_TYPE_W; } |
| 2398 | | TYPE_V { $$ = BRW_REGISTER_TYPE_V; } |
| 2399 | | TYPE_VF { $$ = BRW_REGISTER_TYPE_VF; } |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2400 | ; |
| 2401 | |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 2402 | /* 1.4.10: Swizzle control */ |
| 2403 | /* Returns the swizzle control for an align16 instruction's source operand |
| 2404 | * in the src0 fields. |
| 2405 | */ |
| 2406 | swizzle: /* empty */ |
| 2407 | { |
| 2408 | $$.swizzle_set = 0; |
| 2409 | $$.swizzle_x = BRW_CHANNEL_X; |
| 2410 | $$.swizzle_y = BRW_CHANNEL_Y; |
| 2411 | $$.swizzle_z = BRW_CHANNEL_Z; |
| 2412 | $$.swizzle_w = BRW_CHANNEL_W; |
| 2413 | } |
| 2414 | | DOT chansel |
| 2415 | { |
| 2416 | $$.swizzle_set = 1; |
| 2417 | $$.swizzle_x = $2; |
| 2418 | $$.swizzle_y = $2; |
| 2419 | $$.swizzle_z = $2; |
| 2420 | $$.swizzle_w = $2; |
| 2421 | } |
| 2422 | | DOT chansel chansel chansel chansel |
| 2423 | { |
| 2424 | $$.swizzle_set = 1; |
| 2425 | $$.swizzle_x = $2; |
| 2426 | $$.swizzle_y = $3; |
| 2427 | $$.swizzle_z = $4; |
| 2428 | $$.swizzle_w = $5; |
| 2429 | } |
| 2430 | ; |
| 2431 | |
| 2432 | chansel: X | Y | Z | W |
| 2433 | ; |
| 2434 | |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 2435 | /* 1.4.9: Write mask */ |
| 2436 | /* Returns a partially completed dst_operand, with just the writemask bits |
| 2437 | * filled out. |
| 2438 | */ |
| 2439 | writemask: /* empty */ |
| 2440 | { |
| 2441 | $$.writemask_set = 0; |
| 2442 | $$.writemask = 0xf; |
| 2443 | } |
| 2444 | | DOT writemask_x writemask_y writemask_z writemask_w |
| 2445 | { |
| 2446 | $$.writemask_set = 1; |
| 2447 | $$.writemask = $2 | $3 | $4 | $5; |
| 2448 | } |
Eric Anholt | c8939ed | 2006-08-30 10:50:56 -0700 | [diff] [blame] | 2449 | ; |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 2450 | |
| 2451 | writemask_x: /* empty */ { $$ = 0; } |
| 2452 | | X { $$ = 1 << BRW_CHANNEL_X; } |
Eric Anholt | c8939ed | 2006-08-30 10:50:56 -0700 | [diff] [blame] | 2453 | ; |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 2454 | |
| 2455 | writemask_y: /* empty */ { $$ = 0; } |
| 2456 | | Y { $$ = 1 << BRW_CHANNEL_Y; } |
Eric Anholt | c8939ed | 2006-08-30 10:50:56 -0700 | [diff] [blame] | 2457 | ; |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 2458 | |
| 2459 | writemask_z: /* empty */ { $$ = 0; } |
| 2460 | | Z { $$ = 1 << BRW_CHANNEL_Z; } |
Eric Anholt | c8939ed | 2006-08-30 10:50:56 -0700 | [diff] [blame] | 2461 | ; |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 2462 | |
| 2463 | writemask_w: /* empty */ { $$ = 0; } |
| 2464 | | W { $$ = 1 << BRW_CHANNEL_W; } |
Eric Anholt | c8939ed | 2006-08-30 10:50:56 -0700 | [diff] [blame] | 2465 | ; |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 2466 | |
Eric Anholt | edc82a0 | 2006-08-25 17:42:05 -0700 | [diff] [blame] | 2467 | /* 1.4.11: Immediate values */ |
Zou Nan hai | 5608d27 | 2009-10-20 14:51:04 +0800 | [diff] [blame] | 2468 | imm32: exp { $$.r = imm32_d; $$.u.d = $1; } |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2469 | | NUMBER { $$.r = imm32_f; $$.u.f = $1; } |
Eric Anholt | edc82a0 | 2006-08-25 17:42:05 -0700 | [diff] [blame] | 2470 | ; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2471 | |
| 2472 | /* 1.4.12: Predication and modifiers */ |
Eric Anholt | 0ed5d93 | 2006-08-28 23:05:51 -0700 | [diff] [blame] | 2473 | predicate: /* empty */ |
| 2474 | { |
| 2475 | $$.header.predicate_control = BRW_PREDICATE_NONE; |
Xiang, Haihao | 3ffbe96 | 2012-07-17 15:05:31 +0800 | [diff] [blame] | 2476 | $$.bits2.da1.flag_reg_nr = 0; |
Xiang, Haihao | 2f772dd | 2012-07-17 14:18:54 +0800 | [diff] [blame] | 2477 | $$.bits2.da1.flag_subreg_nr = 0; |
Eric Anholt | 0ed5d93 | 2006-08-28 23:05:51 -0700 | [diff] [blame] | 2478 | $$.header.predicate_inverse = 0; |
| 2479 | } |
| 2480 | | LPAREN predstate flagreg predctrl RPAREN |
| 2481 | { |
| 2482 | $$.header.predicate_control = $4; |
| 2483 | /* XXX: Should deal with erroring when the user tries to |
| 2484 | * set a predicate for one flag register and conditional |
| 2485 | * modification on the other flag register. |
| 2486 | */ |
Xiang, Haihao | 3ffbe96 | 2012-07-17 15:05:31 +0800 | [diff] [blame] | 2487 | $$.bits2.da1.flag_reg_nr = ($3.reg_nr & 0xF); |
Xiang, Haihao | 2f772dd | 2012-07-17 14:18:54 +0800 | [diff] [blame] | 2488 | $$.bits2.da1.flag_subreg_nr = $3.subreg_nr; |
Eric Anholt | 0ed5d93 | 2006-08-28 23:05:51 -0700 | [diff] [blame] | 2489 | $$.header.predicate_inverse = $2; |
| 2490 | } |
| 2491 | ; |
| 2492 | |
| 2493 | predstate: /* empty */ { $$ = 0; } |
| 2494 | | PLUS { $$ = 0; } |
| 2495 | | MINUS { $$ = 1; } |
| 2496 | ; |
| 2497 | |
Keith Packard | 2033aea | 2008-04-23 23:10:40 -0700 | [diff] [blame] | 2498 | predctrl: /* empty */ { $$ = BRW_PREDICATE_NORMAL; } |
Eric Anholt | 0ed5d93 | 2006-08-28 23:05:51 -0700 | [diff] [blame] | 2499 | | DOT X { $$ = BRW_PREDICATE_ALIGN16_REPLICATE_X; } |
| 2500 | | DOT Y { $$ = BRW_PREDICATE_ALIGN16_REPLICATE_Y; } |
| 2501 | | DOT Z { $$ = BRW_PREDICATE_ALIGN16_REPLICATE_Z; } |
| 2502 | | DOT W { $$ = BRW_PREDICATE_ALIGN16_REPLICATE_W; } |
Keith Packard | 2033aea | 2008-04-23 23:10:40 -0700 | [diff] [blame] | 2503 | | ANYV { $$ = BRW_PREDICATE_ALIGN1_ANYV; } |
| 2504 | | ALLV { $$ = BRW_PREDICATE_ALIGN1_ALLV; } |
Eric Anholt | 0ed5d93 | 2006-08-28 23:05:51 -0700 | [diff] [blame] | 2505 | | ANY2H { $$ = BRW_PREDICATE_ALIGN1_ANY2H; } |
| 2506 | | ALL2H { $$ = BRW_PREDICATE_ALIGN1_ALL2H; } |
| 2507 | | ANY4H { $$ = BRW_PREDICATE_ALIGN1_ANY4H; } |
| 2508 | | ALL4H { $$ = BRW_PREDICATE_ALIGN1_ALL4H; } |
| 2509 | | ANY8H { $$ = BRW_PREDICATE_ALIGN1_ANY8H; } |
| 2510 | | ALL8H { $$ = BRW_PREDICATE_ALIGN1_ALL8H; } |
| 2511 | | ANY16H { $$ = BRW_PREDICATE_ALIGN1_ANY16H; } |
| 2512 | | ALL16H { $$ = BRW_PREDICATE_ALIGN1_ALL16H; } |
Eric Anholt | dc96c56 | 2006-08-22 14:42:45 -0700 | [diff] [blame] | 2513 | ; |
| 2514 | |
| 2515 | negate: /* empty */ { $$ = 0; } |
| 2516 | | MINUS { $$ = 1; } |
Eric Anholt | edc82a0 | 2006-08-25 17:42:05 -0700 | [diff] [blame] | 2517 | ; |
Eric Anholt | dc96c56 | 2006-08-22 14:42:45 -0700 | [diff] [blame] | 2518 | |
| 2519 | abs: /* empty */ { $$ = 0; } |
| 2520 | | ABS { $$ = 1; } |
Eric Anholt | edc82a0 | 2006-08-25 17:42:05 -0700 | [diff] [blame] | 2521 | ; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2522 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2523 | execsize: /* empty */ %prec EMPTEXECSIZE |
| 2524 | { |
| 2525 | $$ = ffs(program_defaults.execute_size) - 1; |
| 2526 | } |
| 2527 | |LPAREN exp RPAREN |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2528 | { |
| 2529 | /* Returns a value for the execution_size field of an |
| 2530 | * instruction. |
| 2531 | */ |
| 2532 | if ($2 != 1 && $2 != 2 && $2 != 4 && $2 != 8 && $2 != 16 && |
| 2533 | $2 != 32) { |
| 2534 | fprintf(stderr, "Invalid execution size %d\n", $2); |
| 2535 | YYERROR; |
| 2536 | } |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 2537 | $$ = ffs($2) - 1; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2538 | } |
| 2539 | ; |
| 2540 | |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 2541 | saturate: /* empty */ { $$ = BRW_INSTRUCTION_NORMAL; } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2542 | | SATURATE { $$ = BRW_INSTRUCTION_SATURATE; } |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 2543 | ; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2544 | conditionalmodifier: condition |
| 2545 | { |
| 2546 | $$.cond = $1; |
Xiang, Haihao | 3ffbe96 | 2012-07-17 15:05:31 +0800 | [diff] [blame] | 2547 | $$.flag_reg_nr = 0; |
Xiang, Haihao | 2f772dd | 2012-07-17 14:18:54 +0800 | [diff] [blame] | 2548 | $$.flag_subreg_nr = -1; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2549 | } |
| 2550 | | condition DOT flagreg |
| 2551 | { |
| 2552 | $$.cond = $1; |
Xiang, Haihao | 3ffbe96 | 2012-07-17 15:05:31 +0800 | [diff] [blame] | 2553 | $$.flag_reg_nr = ($3.reg_nr & 0xF); |
Xiang, Haihao | 2f772dd | 2012-07-17 14:18:54 +0800 | [diff] [blame] | 2554 | $$.flag_subreg_nr = $3.subreg_nr; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2555 | } |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 2556 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2557 | condition: /* empty */ { $$ = BRW_CONDITIONAL_NONE; } |
Keith Packard | 2033aea | 2008-04-23 23:10:40 -0700 | [diff] [blame] | 2558 | | ZERO |
| 2559 | | EQUAL |
| 2560 | | NOT_ZERO |
| 2561 | | NOT_EQUAL |
| 2562 | | GREATER |
| 2563 | | GREATER_EQUAL |
| 2564 | | LESS |
| 2565 | | LESS_EQUAL |
| 2566 | | ROUND_INCREMENT |
| 2567 | | OVERFLOW |
| 2568 | | UNORDERED |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 2569 | ; |
| 2570 | |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2571 | /* 1.4.13: Instruction options */ |
Zou Nan hai | c6f2da4 | 2009-10-28 10:14:19 +0800 | [diff] [blame] | 2572 | instoptions: /* empty */ |
| 2573 | { memset(&$$, 0, sizeof($$)); } |
| 2574 | | LCURLY instoption_list RCURLY |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 2575 | { $$ = $2; } |
| 2576 | ; |
| 2577 | |
Homer Hsing | 5d589db | 2012-09-21 12:35:35 +0800 | [diff] [blame] | 2578 | instoption_list:instoption_list COMMA instoption |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 2579 | { |
Homer Hsing | 5d589db | 2012-09-21 12:35:35 +0800 | [diff] [blame] | 2580 | $$ = $1; |
| 2581 | switch ($3) { |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 2582 | case ALIGN1: |
| 2583 | $$.header.access_mode = BRW_ALIGN_1; |
| 2584 | break; |
| 2585 | case ALIGN16: |
| 2586 | $$.header.access_mode = BRW_ALIGN_16; |
| 2587 | break; |
Eric Anholt | 908f37d | 2006-08-25 17:33:02 -0700 | [diff] [blame] | 2588 | case SECHALF: |
| 2589 | $$.header.compression_control |= BRW_COMPRESSION_2NDHALF; |
| 2590 | break; |
| 2591 | case COMPR: |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 2592 | if (!IS_GENp(6)) { |
Xiang, Haihao | c2382ca | 2010-10-09 13:57:48 +0800 | [diff] [blame] | 2593 | $$.header.compression_control |= |
| 2594 | BRW_COMPRESSION_COMPRESSED; |
| 2595 | } |
Eric Anholt | 908f37d | 2006-08-25 17:33:02 -0700 | [diff] [blame] | 2596 | break; |
| 2597 | case SWITCH: |
| 2598 | $$.header.thread_control |= BRW_THREAD_SWITCH; |
| 2599 | break; |
| 2600 | case ATOMIC: |
| 2601 | $$.header.thread_control |= BRW_THREAD_ATOMIC; |
| 2602 | break; |
| 2603 | case NODDCHK: |
| 2604 | $$.header.dependency_control |= BRW_DEPENDENCY_NOTCHECKED; |
| 2605 | break; |
| 2606 | case NODDCLR: |
| 2607 | $$.header.dependency_control |= BRW_DEPENDENCY_NOTCLEARED; |
| 2608 | break; |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 2609 | case MASK_DISABLE: |
| 2610 | $$.header.mask_control = BRW_MASK_DISABLE; |
| 2611 | break; |
Eric Anholt | 908f37d | 2006-08-25 17:33:02 -0700 | [diff] [blame] | 2612 | case BREAKPOINT: |
| 2613 | $$.header.debug_control = BRW_DEBUG_BREAKPOINT; |
| 2614 | break; |
Xiang, Haihao | 55d81c4 | 2010-10-08 13:53:22 +0800 | [diff] [blame] | 2615 | case ACCWRCTRL: |
| 2616 | $$.header.acc_wr_control = BRW_ACCWRCTRL_ACCWRCTRL; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2617 | } |
| 2618 | } |
Homer Hsing | 5d589db | 2012-09-21 12:35:35 +0800 | [diff] [blame] | 2619 | | instoption_list instoption |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2620 | { |
Homer Hsing | 5d589db | 2012-09-21 12:35:35 +0800 | [diff] [blame] | 2621 | $$ = $1; |
| 2622 | switch ($2) { |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2623 | case ALIGN1: |
| 2624 | $$.header.access_mode = BRW_ALIGN_1; |
| 2625 | break; |
| 2626 | case ALIGN16: |
| 2627 | $$.header.access_mode = BRW_ALIGN_16; |
| 2628 | break; |
| 2629 | case SECHALF: |
| 2630 | $$.header.compression_control |= BRW_COMPRESSION_2NDHALF; |
| 2631 | break; |
| 2632 | case COMPR: |
Gwenole Beauchesne | 8aa9528 | 2012-10-22 16:13:51 -0400 | [diff] [blame] | 2633 | if (!IS_GENp(6)) { |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2634 | $$.header.compression_control |= |
| 2635 | BRW_COMPRESSION_COMPRESSED; |
| 2636 | } |
| 2637 | break; |
| 2638 | case SWITCH: |
| 2639 | $$.header.thread_control |= BRW_THREAD_SWITCH; |
| 2640 | break; |
| 2641 | case ATOMIC: |
| 2642 | $$.header.thread_control |= BRW_THREAD_ATOMIC; |
| 2643 | break; |
| 2644 | case NODDCHK: |
| 2645 | $$.header.dependency_control |= BRW_DEPENDENCY_NOTCHECKED; |
| 2646 | break; |
| 2647 | case NODDCLR: |
| 2648 | $$.header.dependency_control |= BRW_DEPENDENCY_NOTCLEARED; |
| 2649 | break; |
| 2650 | case MASK_DISABLE: |
| 2651 | $$.header.mask_control = BRW_MASK_DISABLE; |
| 2652 | break; |
| 2653 | case BREAKPOINT: |
| 2654 | $$.header.debug_control = BRW_DEBUG_BREAKPOINT; |
Xiang, Haihao | 55d81c4 | 2010-10-08 13:53:22 +0800 | [diff] [blame] | 2655 | break; |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 2656 | case EOT: |
Eric Anholt | 56c4ccf | 2006-08-24 14:35:10 -0700 | [diff] [blame] | 2657 | /* XXX: EOT shouldn't be an instoption, I don't think */ |
| 2658 | $$.bits3.generic.end_of_thread = 1; |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 2659 | break; |
| 2660 | } |
| 2661 | } |
| 2662 | | /* empty, header defaults to zeroes. */ |
Eric Anholt | e609d6b | 2006-08-24 12:36:56 -0700 | [diff] [blame] | 2663 | { |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 2664 | memset(&$$, 0, sizeof($$)); |
Eric Anholt | e609d6b | 2006-08-24 12:36:56 -0700 | [diff] [blame] | 2665 | } |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 2666 | ; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2667 | |
Eric Anholt | 1632421 | 2006-08-24 14:47:21 -0700 | [diff] [blame] | 2668 | instoption: ALIGN1 { $$ = ALIGN1; } |
| 2669 | | ALIGN16 { $$ = ALIGN16; } |
Eric Anholt | 908f37d | 2006-08-25 17:33:02 -0700 | [diff] [blame] | 2670 | | SECHALF { $$ = SECHALF; } |
| 2671 | | COMPR { $$ = COMPR; } |
| 2672 | | SWITCH { $$ = SWITCH; } |
| 2673 | | ATOMIC { $$ = ATOMIC; } |
| 2674 | | NODDCHK { $$ = NODDCHK; } |
| 2675 | | NODDCLR { $$ = NODDCLR; } |
Eric Anholt | 1632421 | 2006-08-24 14:47:21 -0700 | [diff] [blame] | 2676 | | MASK_DISABLE { $$ = MASK_DISABLE; } |
Eric Anholt | 908f37d | 2006-08-25 17:33:02 -0700 | [diff] [blame] | 2677 | | BREAKPOINT { $$ = BREAKPOINT; } |
Xiang, Haihao | 55d81c4 | 2010-10-08 13:53:22 +0800 | [diff] [blame] | 2678 | | ACCWRCTRL { $$ = ACCWRCTRL; } |
Eric Anholt | 1632421 | 2006-08-24 14:47:21 -0700 | [diff] [blame] | 2679 | | EOT { $$ = EOT; } |
Eric Anholt | 6c98c8d | 2006-08-22 11:54:19 -0700 | [diff] [blame] | 2680 | ; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2681 | |
| 2682 | %% |
| 2683 | extern int yylineno; |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2684 | extern char *input_filename; |
| 2685 | |
| 2686 | int errors; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2687 | |
| 2688 | void yyerror (char *msg) |
| 2689 | { |
Keith Packard | 2d4d401 | 2008-03-30 00:58:28 -0700 | [diff] [blame] | 2690 | fprintf(stderr, "%s: %d: %s at \"%s\"\n", |
| 2691 | input_filename, yylineno, msg, lex_text()); |
| 2692 | ++errors; |
Eric Anholt | 22a1063 | 2006-08-22 10:15:33 -0700 | [diff] [blame] | 2693 | } |
| 2694 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2695 | static int get_type_size(GLuint type) |
| 2696 | { |
| 2697 | int size = 1; |
| 2698 | |
| 2699 | switch (type) { |
| 2700 | case BRW_REGISTER_TYPE_F: |
| 2701 | case BRW_REGISTER_TYPE_UD: |
| 2702 | case BRW_REGISTER_TYPE_D: |
| 2703 | size = 4; |
| 2704 | break; |
| 2705 | |
| 2706 | case BRW_REGISTER_TYPE_UW: |
| 2707 | case BRW_REGISTER_TYPE_W: |
| 2708 | size = 2; |
| 2709 | break; |
| 2710 | |
| 2711 | case BRW_REGISTER_TYPE_UB: |
| 2712 | case BRW_REGISTER_TYPE_B: |
| 2713 | size = 1; |
| 2714 | break; |
| 2715 | |
| 2716 | default: |
| 2717 | assert(0); |
| 2718 | size = 1; |
| 2719 | break; |
| 2720 | } |
| 2721 | |
| 2722 | return size; |
| 2723 | } |
| 2724 | |
| 2725 | static int get_subreg_address(GLuint regfile, GLuint type, GLuint subreg, GLuint address_mode) |
| 2726 | { |
| 2727 | int unit_size = 1; |
| 2728 | |
| 2729 | if (address_mode == BRW_ADDRESS_DIRECT) { |
| 2730 | if (advanced_flag == 1) { |
| 2731 | if ((regfile == BRW_GENERAL_REGISTER_FILE || |
| 2732 | regfile == BRW_MESSAGE_REGISTER_FILE || |
| 2733 | regfile == BRW_ARCHITECTURE_REGISTER_FILE)) { |
| 2734 | |
| 2735 | unit_size = get_type_size(type); |
| 2736 | } |
| 2737 | } |
| 2738 | } else { |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2739 | unit_size = 1; |
| 2740 | } |
| 2741 | |
| 2742 | return subreg * unit_size; |
| 2743 | } |
| 2744 | |
Homer Hsing | e221b0a | 2012-10-18 12:37:31 +0800 | [diff] [blame] | 2745 | /* only used in indirect address mode. |
| 2746 | * input: sub-register number of an address register |
| 2747 | * output: the value of AddrSubRegNum in the instruction binary code |
| 2748 | * |
| 2749 | * input output(advanced_flag==0) output(advanced_flag==1) |
| 2750 | * a0.0 0 0 |
| 2751 | * a0.1 invalid input 1 |
| 2752 | * a0.2 1 2 |
| 2753 | * a0.3 invalid input 3 |
| 2754 | * a0.4 2 4 |
| 2755 | * a0.5 invalid input 5 |
| 2756 | * a0.6 3 6 |
| 2757 | * a0.7 invalid input 7 |
| 2758 | * a0.8 4 invalid input |
| 2759 | * a0.10 5 invalid input |
| 2760 | * a0.12 6 invalid input |
| 2761 | * a0.14 7 invalid input |
| 2762 | */ |
| 2763 | static int get_indirect_subreg_address(GLuint subreg) |
| 2764 | { |
| 2765 | return advanced_flag == 0 ? subreg / 2 : subreg; |
| 2766 | } |
| 2767 | |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2768 | static void reset_instruction_src_region(struct brw_instruction *instr, |
| 2769 | struct src_operand *src) |
| 2770 | { |
| 2771 | if (!src->default_region) |
| 2772 | return; |
| 2773 | |
| 2774 | if (src->reg_file == BRW_ARCHITECTURE_REGISTER_FILE && |
| 2775 | ((src->reg_nr & 0xF0) == BRW_ARF_ADDRESS)) { |
| 2776 | src->vert_stride = ffs(0); |
| 2777 | src->width = ffs(1) - 1; |
| 2778 | src->horiz_stride = ffs(0); |
| 2779 | } else if (src->reg_file == BRW_ARCHITECTURE_REGISTER_FILE && |
| 2780 | ((src->reg_nr & 0xF0) == BRW_ARF_ACCUMULATOR)) { |
| 2781 | int horiz_stride = 1, width, vert_stride; |
| 2782 | if (instr->header.compression_control == BRW_COMPRESSION_COMPRESSED) { |
| 2783 | width = 16; |
| 2784 | } else { |
| 2785 | width = 8; |
| 2786 | } |
| 2787 | |
| 2788 | if (width > (1 << instr->header.execution_size)) |
| 2789 | width = (1 << instr->header.execution_size); |
| 2790 | |
| 2791 | vert_stride = horiz_stride * width; |
| 2792 | src->vert_stride = ffs(vert_stride); |
| 2793 | src->width = ffs(width) - 1; |
| 2794 | src->horiz_stride = ffs(horiz_stride); |
| 2795 | } else if ((src->reg_file == BRW_ARCHITECTURE_REGISTER_FILE) && |
| 2796 | (src->reg_nr == BRW_ARF_NULL) && |
| 2797 | (instr->header.opcode == BRW_OPCODE_SEND)) { |
| 2798 | src->vert_stride = ffs(8); |
| 2799 | src->width = ffs(8) - 1; |
| 2800 | src->horiz_stride = ffs(1); |
| 2801 | } else { |
| 2802 | |
| 2803 | int horiz_stride = 1, width, vert_stride; |
| 2804 | |
| 2805 | if (instr->header.execution_size == 0) { /* scalar */ |
| 2806 | horiz_stride = 0; |
| 2807 | width = 1; |
| 2808 | vert_stride = 0; |
| 2809 | } else { |
| 2810 | if ((instr->header.opcode == BRW_OPCODE_MUL) || |
| 2811 | (instr->header.opcode == BRW_OPCODE_MAC) || |
| 2812 | (instr->header.opcode == BRW_OPCODE_CMP) || |
| 2813 | (instr->header.opcode == BRW_OPCODE_ASR) || |
| 2814 | (instr->header.opcode == BRW_OPCODE_ADD) || |
| 2815 | (instr->header.opcode == BRW_OPCODE_SHL)) { |
| 2816 | horiz_stride = 0; |
| 2817 | width = 1; |
| 2818 | vert_stride = 0; |
| 2819 | } else { |
| 2820 | width = (1 << instr->header.execution_size) / horiz_stride; |
| 2821 | vert_stride = horiz_stride * width; |
Xiang, Haihao | e7f4dc6 | 2011-03-01 16:43:02 +0800 | [diff] [blame] | 2822 | |
| 2823 | if (get_type_size(src->reg_type) * (width + src->subreg_nr) > 32) { |
| 2824 | horiz_stride = 0; |
| 2825 | width = 1; |
| 2826 | vert_stride = 0; |
| 2827 | } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2828 | } |
| 2829 | } |
| 2830 | |
| 2831 | src->vert_stride = ffs(vert_stride); |
| 2832 | src->width = ffs(width) - 1; |
| 2833 | src->horiz_stride = ffs(horiz_stride); |
| 2834 | } |
| 2835 | } |
| 2836 | |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 2837 | /** |
| 2838 | * Fills in the destination register information in instr from the bits in dst. |
| 2839 | */ |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 2840 | int set_instruction_dest(struct brw_instruction *instr, |
| 2841 | struct dst_operand *dest) |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 2842 | { |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2843 | if (dest->horiz_stride == DEFAULT_DSTREGION) |
| 2844 | dest->horiz_stride = ffs(1); |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2845 | if (dest->address_mode == BRW_ADDRESS_DIRECT && |
| 2846 | instr->header.access_mode == BRW_ALIGN_1) { |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 2847 | instr->bits1.da1.dest_reg_file = dest->reg_file; |
| 2848 | instr->bits1.da1.dest_reg_type = dest->reg_type; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2849 | instr->bits1.da1.dest_subreg_nr = get_subreg_address(dest->reg_file, dest->reg_type, dest->subreg_nr, dest->address_mode); |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 2850 | instr->bits1.da1.dest_reg_nr = dest->reg_nr; |
| 2851 | instr->bits1.da1.dest_horiz_stride = dest->horiz_stride; |
| 2852 | instr->bits1.da1.dest_address_mode = dest->address_mode; |
| 2853 | if (dest->writemask_set) { |
| 2854 | fprintf(stderr, "error: write mask set in align1 " |
| 2855 | "instruction\n"); |
| 2856 | return 1; |
| 2857 | } |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2858 | } else if (dest->address_mode == BRW_ADDRESS_DIRECT) { |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 2859 | instr->bits1.da16.dest_reg_file = dest->reg_file; |
| 2860 | instr->bits1.da16.dest_reg_type = dest->reg_type; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2861 | instr->bits1.da16.dest_subreg_nr = get_subreg_address(dest->reg_file, dest->reg_type, dest->subreg_nr, dest->address_mode); |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 2862 | instr->bits1.da16.dest_reg_nr = dest->reg_nr; |
| 2863 | instr->bits1.da16.dest_address_mode = dest->address_mode; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2864 | instr->bits1.da16.dest_horiz_stride = ffs(1); |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 2865 | instr->bits1.da16.dest_writemask = dest->writemask; |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2866 | } else if (instr->header.access_mode == BRW_ALIGN_1) { |
| 2867 | instr->bits1.ia1.dest_reg_file = dest->reg_file; |
| 2868 | instr->bits1.ia1.dest_reg_type = dest->reg_type; |
Homer Hsing | e221b0a | 2012-10-18 12:37:31 +0800 | [diff] [blame] | 2869 | instr->bits1.ia1.dest_subreg_nr = get_indirect_subreg_address(dest->address_subreg_nr); |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2870 | instr->bits1.ia1.dest_horiz_stride = dest->horiz_stride; |
| 2871 | instr->bits1.ia1.dest_indirect_offset = dest->indirect_offset; |
| 2872 | instr->bits1.ia1.dest_address_mode = dest->address_mode; |
| 2873 | if (dest->writemask_set) { |
| 2874 | fprintf(stderr, "error: write mask set in align1 " |
| 2875 | "instruction\n"); |
| 2876 | return 1; |
| 2877 | } |
| 2878 | } else { |
| 2879 | instr->bits1.ia16.dest_reg_file = dest->reg_file; |
| 2880 | instr->bits1.ia16.dest_reg_type = dest->reg_type; |
Homer Hsing | e221b0a | 2012-10-18 12:37:31 +0800 | [diff] [blame] | 2881 | instr->bits1.ia16.dest_subreg_nr = get_indirect_subreg_address(dest->address_subreg_nr); |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2882 | instr->bits1.ia16.dest_writemask = dest->writemask; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2883 | instr->bits1.ia16.dest_horiz_stride = ffs(1); |
| 2884 | instr->bits1.ia16.dest_indirect_offset = (dest->indirect_offset >> 4); /* half register aligned */ |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 2885 | instr->bits1.ia16.dest_address_mode = dest->address_mode; |
Eric Anholt | 2dac0a1 | 2006-08-29 15:29:31 -0700 | [diff] [blame] | 2886 | } |
| 2887 | |
| 2888 | return 0; |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 2889 | } |
| 2890 | |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 2891 | /* Sets the first source operand for the instruction. Returns 0 on success. */ |
| 2892 | int set_instruction_src0(struct brw_instruction *instr, |
| 2893 | struct src_operand *src) |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 2894 | { |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2895 | if (advanced_flag) { |
| 2896 | reset_instruction_src_region(instr, src); |
| 2897 | } |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 2898 | instr->bits1.da1.src0_reg_file = src->reg_file; |
| 2899 | instr->bits1.da1.src0_reg_type = src->reg_type; |
| 2900 | if (src->reg_file == BRW_IMMEDIATE_VALUE) { |
| 2901 | instr->bits3.ud = src->imm32; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2902 | } else if (src->address_mode == BRW_ADDRESS_DIRECT) { |
| 2903 | if (instr->header.access_mode == BRW_ALIGN_1) { |
| 2904 | instr->bits2.da1.src0_subreg_nr = get_subreg_address(src->reg_file, src->reg_type, src->subreg_nr, src->address_mode); |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 2905 | instr->bits2.da1.src0_reg_nr = src->reg_nr; |
| 2906 | instr->bits2.da1.src0_vert_stride = src->vert_stride; |
| 2907 | instr->bits2.da1.src0_width = src->width; |
| 2908 | instr->bits2.da1.src0_horiz_stride = src->horiz_stride; |
| 2909 | instr->bits2.da1.src0_negate = src->negate; |
| 2910 | instr->bits2.da1.src0_abs = src->abs; |
| 2911 | instr->bits2.da1.src0_address_mode = src->address_mode; |
| 2912 | if (src->swizzle_set) { |
| 2913 | fprintf(stderr, "error: swizzle bits set in align1 " |
| 2914 | "instruction\n"); |
| 2915 | return 1; |
| 2916 | } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2917 | } else { |
| 2918 | instr->bits2.da16.src0_subreg_nr = get_subreg_address(src->reg_file, src->reg_type, src->subreg_nr, src->address_mode); |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 2919 | instr->bits2.da16.src0_reg_nr = src->reg_nr; |
| 2920 | instr->bits2.da16.src0_vert_stride = src->vert_stride; |
| 2921 | instr->bits2.da16.src0_negate = src->negate; |
| 2922 | instr->bits2.da16.src0_abs = src->abs; |
| 2923 | instr->bits2.da16.src0_swz_x = src->swizzle_x; |
| 2924 | instr->bits2.da16.src0_swz_y = src->swizzle_y; |
| 2925 | instr->bits2.da16.src0_swz_z = src->swizzle_z; |
| 2926 | instr->bits2.da16.src0_swz_w = src->swizzle_w; |
| 2927 | instr->bits2.da16.src0_address_mode = src->address_mode; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2928 | } |
| 2929 | } else { |
| 2930 | if (instr->header.access_mode == BRW_ALIGN_1) { |
| 2931 | instr->bits2.ia1.src0_indirect_offset = src->indirect_offset; |
Homer Hsing | e221b0a | 2012-10-18 12:37:31 +0800 | [diff] [blame] | 2932 | instr->bits2.ia1.src0_subreg_nr = get_indirect_subreg_address(src->address_subreg_nr); |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2933 | instr->bits2.ia1.src0_abs = src->abs; |
| 2934 | instr->bits2.ia1.src0_negate = src->negate; |
| 2935 | instr->bits2.ia1.src0_address_mode = src->address_mode; |
| 2936 | instr->bits2.ia1.src0_horiz_stride = src->horiz_stride; |
| 2937 | instr->bits2.ia1.src0_width = src->width; |
| 2938 | instr->bits2.ia1.src0_vert_stride = src->vert_stride; |
| 2939 | if (src->swizzle_set) { |
| 2940 | fprintf(stderr, "error: swizzle bits set in align1 " |
| 2941 | "instruction\n"); |
| 2942 | return 1; |
| 2943 | } |
| 2944 | } else { |
| 2945 | instr->bits2.ia16.src0_swz_x = src->swizzle_x; |
| 2946 | instr->bits2.ia16.src0_swz_y = src->swizzle_y; |
| 2947 | instr->bits2.ia16.src0_indirect_offset = (src->indirect_offset >> 4); /* half register aligned */ |
Homer Hsing | e221b0a | 2012-10-18 12:37:31 +0800 | [diff] [blame] | 2948 | instr->bits2.ia16.src0_subreg_nr = get_indirect_subreg_address(src->address_subreg_nr); |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2949 | instr->bits2.ia16.src0_abs = src->abs; |
| 2950 | instr->bits2.ia16.src0_negate = src->negate; |
| 2951 | instr->bits2.ia16.src0_address_mode = src->address_mode; |
| 2952 | instr->bits2.ia16.src0_swz_z = src->swizzle_z; |
| 2953 | instr->bits2.ia16.src0_swz_w = src->swizzle_w; |
| 2954 | instr->bits2.ia16.src0_vert_stride = src->vert_stride; |
| 2955 | } |
| 2956 | } |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 2957 | |
| 2958 | return 0; |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 2959 | } |
| 2960 | |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 2961 | /* Sets the second source operand for the instruction. Returns 0 on success. |
| 2962 | */ |
| 2963 | int set_instruction_src1(struct brw_instruction *instr, |
| 2964 | struct src_operand *src) |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 2965 | { |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2966 | if (advanced_flag) { |
| 2967 | reset_instruction_src_region(instr, src); |
| 2968 | } |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 2969 | instr->bits1.da1.src1_reg_file = src->reg_file; |
| 2970 | instr->bits1.da1.src1_reg_type = src->reg_type; |
| 2971 | if (src->reg_file == BRW_IMMEDIATE_VALUE) { |
| 2972 | instr->bits3.ud = src->imm32; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2973 | } else if (src->address_mode == BRW_ADDRESS_DIRECT) { |
| 2974 | if (instr->header.access_mode == BRW_ALIGN_1) { |
| 2975 | instr->bits3.da1.src1_subreg_nr = get_subreg_address(src->reg_file, src->reg_type, src->subreg_nr, src->address_mode); |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 2976 | instr->bits3.da1.src1_reg_nr = src->reg_nr; |
| 2977 | instr->bits3.da1.src1_vert_stride = src->vert_stride; |
| 2978 | instr->bits3.da1.src1_width = src->width; |
| 2979 | instr->bits3.da1.src1_horiz_stride = src->horiz_stride; |
| 2980 | instr->bits3.da1.src1_negate = src->negate; |
| 2981 | instr->bits3.da1.src1_abs = src->abs; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2982 | instr->bits3.da1.src1_address_mode = src->address_mode; |
| 2983 | /* XXX why? |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 2984 | if (src->address_mode != BRW_ADDRESS_DIRECT) { |
| 2985 | fprintf(stderr, "error: swizzle bits set in align1 " |
| 2986 | "instruction\n"); |
| 2987 | return 1; |
| 2988 | } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2989 | */ |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 2990 | if (src->swizzle_set) { |
| 2991 | fprintf(stderr, "error: swizzle bits set in align1 " |
| 2992 | "instruction\n"); |
| 2993 | return 1; |
| 2994 | } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 2995 | } else { |
| 2996 | instr->bits3.da16.src1_subreg_nr = get_subreg_address(src->reg_file, src->reg_type, src->subreg_nr, src->address_mode); |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 2997 | instr->bits3.da16.src1_reg_nr = src->reg_nr; |
| 2998 | instr->bits3.da16.src1_vert_stride = src->vert_stride; |
| 2999 | instr->bits3.da16.src1_negate = src->negate; |
| 3000 | instr->bits3.da16.src1_abs = src->abs; |
| 3001 | instr->bits3.da16.src1_swz_x = src->swizzle_x; |
| 3002 | instr->bits3.da16.src1_swz_y = src->swizzle_y; |
| 3003 | instr->bits3.da16.src1_swz_z = src->swizzle_z; |
| 3004 | instr->bits3.da16.src1_swz_w = src->swizzle_w; |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 3005 | instr->bits3.da16.src1_address_mode = src->address_mode; |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 3006 | if (src->address_mode != BRW_ADDRESS_DIRECT) { |
| 3007 | fprintf(stderr, "error: swizzle bits set in align1 " |
| 3008 | "instruction\n"); |
| 3009 | return 1; |
| 3010 | } |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 3011 | } |
| 3012 | } else { |
| 3013 | if (instr->header.access_mode == BRW_ALIGN_1) { |
| 3014 | instr->bits3.ia1.src1_indirect_offset = src->indirect_offset; |
Homer Hsing | e221b0a | 2012-10-18 12:37:31 +0800 | [diff] [blame] | 3015 | instr->bits3.ia1.src1_subreg_nr = get_indirect_subreg_address(src->address_subreg_nr); |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 3016 | instr->bits3.ia1.src1_abs = src->abs; |
| 3017 | instr->bits3.ia1.src1_negate = src->negate; |
| 3018 | instr->bits3.ia1.src1_address_mode = src->address_mode; |
| 3019 | instr->bits3.ia1.src1_horiz_stride = src->horiz_stride; |
| 3020 | instr->bits3.ia1.src1_width = src->width; |
| 3021 | instr->bits3.ia1.src1_vert_stride = src->vert_stride; |
| 3022 | if (src->swizzle_set) { |
| 3023 | fprintf(stderr, "error: swizzle bits set in align1 " |
| 3024 | "instruction\n"); |
| 3025 | return 1; |
| 3026 | } |
| 3027 | } else { |
| 3028 | instr->bits3.ia16.src1_swz_x = src->swizzle_x; |
| 3029 | instr->bits3.ia16.src1_swz_y = src->swizzle_y; |
| 3030 | instr->bits3.ia16.src1_indirect_offset = (src->indirect_offset >> 4); /* half register aligned */ |
Homer Hsing | e221b0a | 2012-10-18 12:37:31 +0800 | [diff] [blame] | 3031 | instr->bits3.ia16.src1_subreg_nr = get_indirect_subreg_address(src->address_subreg_nr); |
Xiang, Haihao | 27b4303 | 2010-12-13 16:07:16 +0800 | [diff] [blame] | 3032 | instr->bits3.ia16.src1_abs = src->abs; |
| 3033 | instr->bits3.ia16.src1_negate = src->negate; |
| 3034 | instr->bits3.ia16.src1_address_mode = src->address_mode; |
| 3035 | instr->bits3.ia16.src1_swz_z = src->swizzle_z; |
| 3036 | instr->bits3.ia16.src1_swz_w = src->swizzle_w; |
| 3037 | instr->bits3.ia16.src1_vert_stride = src->vert_stride; |
| 3038 | } |
| 3039 | } |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 3040 | |
| 3041 | return 0; |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 3042 | } |
| 3043 | |
Homer Hsing | a034bcb | 2012-09-07 14:38:13 +0800 | [diff] [blame] | 3044 | /* convert 2-src reg type to 3-src reg type |
| 3045 | * |
| 3046 | * 2-src reg type: |
| 3047 | * 000=UD 001=D 010=UW 011=W 100=UB 101=B 110=DF 111=F |
| 3048 | * |
| 3049 | * 3-src reg type: |
| 3050 | * 00=F 01=D 10=UD 11=DF |
| 3051 | */ |
| 3052 | static int reg_type_2_to_3(int reg_type) |
| 3053 | { |
| 3054 | int r = 0; |
| 3055 | switch(reg_type) { |
| 3056 | case 7: r = 0; break; |
| 3057 | case 1: r = 1; break; |
| 3058 | case 0: r = 2; break; |
| 3059 | // TODO: supporting DF |
| 3060 | } |
| 3061 | return r; |
| 3062 | } |
| 3063 | |
| 3064 | int set_instruction_dest_three_src(struct brw_instruction *instr, |
| 3065 | struct dst_operand *dest) |
| 3066 | { |
Damien Lespiau | 31259c5 | 2013-01-15 14:05:23 +0000 | [diff] [blame] | 3067 | instr->bits1.da3src.dest_reg_file = dest->reg_file; |
| 3068 | instr->bits1.da3src.dest_reg_nr = dest->reg_nr; |
| 3069 | instr->bits1.da3src.dest_subreg_nr = get_subreg_address(dest->reg_file, dest->reg_type, dest->subreg_nr, dest->address_mode) / 4; // in DWORD |
| 3070 | instr->bits1.da3src.dest_writemask = dest->writemask; |
| 3071 | instr->bits1.da3src.dest_reg_type = reg_type_2_to_3(dest->reg_type); |
Homer Hsing | a034bcb | 2012-09-07 14:38:13 +0800 | [diff] [blame] | 3072 | return 0; |
| 3073 | } |
| 3074 | |
| 3075 | int set_instruction_src0_three_src(struct brw_instruction *instr, |
| 3076 | struct src_operand *src) |
| 3077 | { |
| 3078 | if (advanced_flag) { |
| 3079 | reset_instruction_src_region(instr, src); |
| 3080 | } |
| 3081 | // TODO: supporting src0 swizzle, src0 modifier, src0 rep_ctrl |
Damien Lespiau | 31259c5 | 2013-01-15 14:05:23 +0000 | [diff] [blame] | 3082 | instr->bits1.da3src.src_reg_type = reg_type_2_to_3(src->reg_type); |
| 3083 | instr->bits2.da3src.src0_subreg_nr = get_subreg_address(src->reg_file, src->reg_type, src->subreg_nr, src->address_mode) / 4; // in DWORD |
| 3084 | instr->bits2.da3src.src0_reg_nr = src->reg_nr; |
Homer Hsing | a034bcb | 2012-09-07 14:38:13 +0800 | [diff] [blame] | 3085 | return 0; |
| 3086 | } |
| 3087 | |
| 3088 | int set_instruction_src1_three_src(struct brw_instruction *instr, |
| 3089 | struct src_operand *src) |
| 3090 | { |
| 3091 | if (advanced_flag) { |
| 3092 | reset_instruction_src_region(instr, src); |
| 3093 | } |
| 3094 | // TODO: supporting src1 swizzle, src1 modifier, src1 rep_ctrl |
| 3095 | int v = get_subreg_address(src->reg_file, src->reg_type, src->subreg_nr, src->address_mode) / 4; // in DWORD |
Damien Lespiau | 31259c5 | 2013-01-15 14:05:23 +0000 | [diff] [blame] | 3096 | instr->bits2.da3src.src1_subreg_nr_low = v % 4; // lower 2 bits |
| 3097 | instr->bits3.da3src.src1_subreg_nr_high = v / 4; // highest bit |
| 3098 | instr->bits3.da3src.src1_reg_nr = src->reg_nr; |
Homer Hsing | a034bcb | 2012-09-07 14:38:13 +0800 | [diff] [blame] | 3099 | return 0; |
| 3100 | } |
| 3101 | |
| 3102 | int set_instruction_src2_three_src(struct brw_instruction *instr, |
| 3103 | struct src_operand *src) |
| 3104 | { |
| 3105 | if (advanced_flag) { |
| 3106 | reset_instruction_src_region(instr, src); |
| 3107 | } |
| 3108 | // TODO: supporting src2 swizzle, src2 modifier, src2 rep_ctrl |
Damien Lespiau | 31259c5 | 2013-01-15 14:05:23 +0000 | [diff] [blame] | 3109 | instr->bits3.da3src.src2_subreg_nr = get_subreg_address(src->reg_file, src->reg_type, src->subreg_nr, src->address_mode) / 4; // in DWORD |
| 3110 | instr->bits3.da3src.src2_reg_nr = src->reg_nr; |
Homer Hsing | a034bcb | 2012-09-07 14:38:13 +0800 | [diff] [blame] | 3111 | return 0; |
| 3112 | } |
| 3113 | |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 3114 | void set_instruction_options(struct brw_instruction *instr, |
| 3115 | struct brw_instruction *options) |
| 3116 | { |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 3117 | /* XXX: more instr options */ |
Eric Anholt | 19f1c1c | 2006-08-22 12:41:09 -0700 | [diff] [blame] | 3118 | instr->header.access_mode = options->header.access_mode; |
| 3119 | instr->header.mask_control = options->header.mask_control; |
| 3120 | instr->header.dependency_control = options->header.dependency_control; |
| 3121 | instr->header.compression_control = |
| 3122 | options->header.compression_control; |
| 3123 | } |
Eric Anholt | 2c78765 | 2006-08-25 13:53:48 -0700 | [diff] [blame] | 3124 | |
Eric Anholt | 0ed5d93 | 2006-08-28 23:05:51 -0700 | [diff] [blame] | 3125 | void set_instruction_predicate(struct brw_instruction *instr, |
| 3126 | struct brw_instruction *predicate) |
| 3127 | { |
| 3128 | instr->header.predicate_control = predicate->header.predicate_control; |
| 3129 | instr->header.predicate_inverse = predicate->header.predicate_inverse; |
Xiang, Haihao | 3ffbe96 | 2012-07-17 15:05:31 +0800 | [diff] [blame] | 3130 | instr->bits2.da1.flag_reg_nr = predicate->bits2.da1.flag_reg_nr; |
Xiang, Haihao | 2f772dd | 2012-07-17 14:18:54 +0800 | [diff] [blame] | 3131 | instr->bits2.da1.flag_subreg_nr = predicate->bits2.da1.flag_subreg_nr; |
Eric Anholt | 0ed5d93 | 2006-08-28 23:05:51 -0700 | [diff] [blame] | 3132 | } |
| 3133 | |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 3134 | void set_direct_dst_operand(struct dst_operand *dst, struct direct_reg *reg, |
| 3135 | int type) |
| 3136 | { |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 3137 | memset(dst, 0, sizeof(*dst)); |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 3138 | dst->address_mode = BRW_ADDRESS_DIRECT; |
| 3139 | dst->reg_file = reg->reg_file; |
| 3140 | dst->reg_nr = reg->reg_nr; |
| 3141 | dst->subreg_nr = reg->subreg_nr; |
| 3142 | dst->reg_type = type; |
| 3143 | dst->horiz_stride = 1; |
| 3144 | dst->writemask_set = 0; |
| 3145 | dst->writemask = 0xf; |
| 3146 | } |
| 3147 | |
Eric Anholt | 3bcf6b2 | 2006-08-29 18:31:34 -0700 | [diff] [blame] | 3148 | void set_direct_src_operand(struct src_operand *src, struct direct_reg *reg, |
| 3149 | int type) |
Eric Anholt | 2c78765 | 2006-08-25 13:53:48 -0700 | [diff] [blame] | 3150 | { |
Homer Hsing | 81859af | 2012-09-14 09:34:58 +0800 | [diff] [blame] | 3151 | memset(src, 0, sizeof(*src)); |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 3152 | src->address_mode = BRW_ADDRESS_DIRECT; |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 3153 | src->reg_file = reg->reg_file; |
| 3154 | src->reg_type = type; |
| 3155 | src->subreg_nr = reg->subreg_nr; |
| 3156 | src->reg_nr = reg->reg_nr; |
| 3157 | src->vert_stride = 0; |
| 3158 | src->width = 0; |
Keith Packard | 2033aea | 2008-04-23 23:10:40 -0700 | [diff] [blame] | 3159 | src->horiz_stride = 0; |
Eric Anholt | 6a88ada | 2006-08-28 22:11:18 -0700 | [diff] [blame] | 3160 | src->negate = 0; |
| 3161 | src->abs = 0; |
Eric Anholt | 1e907c7 | 2006-08-31 10:21:15 -0700 | [diff] [blame] | 3162 | src->swizzle_set = 0; |
| 3163 | src->swizzle_x = BRW_CHANNEL_X; |
| 3164 | src->swizzle_y = BRW_CHANNEL_Y; |
| 3165 | src->swizzle_z = BRW_CHANNEL_Z; |
| 3166 | src->swizzle_w = BRW_CHANNEL_W; |
Eric Anholt | 2c78765 | 2006-08-25 13:53:48 -0700 | [diff] [blame] | 3167 | } |