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Christopher Ferris25981132017-11-14 16:53:49 -08001/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
Ben Chengd1c09392013-11-06 15:23:59 -08002/*
3 * arch/arm/include/asm/ptrace.h
4 *
5 * Copyright (C) 1996-2003 Russell King
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#ifndef _UAPI__ASM_ARM_PTRACE_H
12#define _UAPI__ASM_ARM_PTRACE_H
13
14#include <asm/hwcap.h>
15
16#define PTRACE_GETREGS 12
17#define PTRACE_SETREGS 13
18#define PTRACE_GETFPREGS 14
19#define PTRACE_SETFPREGS 15
20/* PTRACE_ATTACH is 16 */
21/* PTRACE_DETACH is 17 */
22#define PTRACE_GETWMMXREGS 18
23#define PTRACE_SETWMMXREGS 19
24/* 20 is unused */
25#define PTRACE_OLDSETOPTIONS 21
26#define PTRACE_GET_THREAD_AREA 22
27#define PTRACE_SET_SYSCALL 23
28/* PTRACE_SYSCALL is 24 */
29#define PTRACE_GETCRUNCHREGS 25
30#define PTRACE_SETCRUNCHREGS 26
31#define PTRACE_GETVFPREGS 27
32#define PTRACE_SETVFPREGS 28
33#define PTRACE_GETHBPREGS 29
34#define PTRACE_SETHBPREGS 30
35
36/*
37 * PSR bits
Christopher Ferrise0845012014-07-09 14:58:51 -070038 * Note on V7M there is no mode contained in the PSR
Ben Chengd1c09392013-11-06 15:23:59 -080039 */
40#define USR26_MODE 0x00000000
41#define FIQ26_MODE 0x00000001
42#define IRQ26_MODE 0x00000002
43#define SVC26_MODE 0x00000003
Christopher Ferrise0845012014-07-09 14:58:51 -070044#if defined(__KERNEL__) && defined(CONFIG_CPU_V7M)
45/*
46 * Use 0 here to get code right that creates a userspace
47 * or kernel space thread.
48 */
49#define USR_MODE 0x00000000
50#define SVC_MODE 0x00000000
51#else
Ben Chengd1c09392013-11-06 15:23:59 -080052#define USR_MODE 0x00000010
Christopher Ferrise0845012014-07-09 14:58:51 -070053#define SVC_MODE 0x00000013
54#endif
Ben Chengd1c09392013-11-06 15:23:59 -080055#define FIQ_MODE 0x00000011
56#define IRQ_MODE 0x00000012
57#define ABT_MODE 0x00000017
58#define HYP_MODE 0x0000001a
59#define UND_MODE 0x0000001b
60#define SYSTEM_MODE 0x0000001f
61#define MODE32_BIT 0x00000010
62#define MODE_MASK 0x0000001f
Christopher Ferrise0845012014-07-09 14:58:51 -070063
64#define V4_PSR_T_BIT 0x00000020 /* >= V4T, but not V7M */
65#define V7M_PSR_T_BIT 0x01000000
66#if defined(__KERNEL__) && defined(CONFIG_CPU_V7M)
67#define PSR_T_BIT V7M_PSR_T_BIT
68#else
69/* for compatibility */
70#define PSR_T_BIT V4_PSR_T_BIT
71#endif
72
73#define PSR_F_BIT 0x00000040 /* >= V4, but not V7M */
74#define PSR_I_BIT 0x00000080 /* >= V4, but not V7M */
75#define PSR_A_BIT 0x00000100 /* >= V6, but not V7M */
76#define PSR_E_BIT 0x00000200 /* >= V6, but not V7M */
77#define PSR_J_BIT 0x01000000 /* >= V5J, but not V7M */
78#define PSR_Q_BIT 0x08000000 /* >= V5E, including V7M */
Ben Chengd1c09392013-11-06 15:23:59 -080079#define PSR_V_BIT 0x10000000
80#define PSR_C_BIT 0x20000000
81#define PSR_Z_BIT 0x40000000
82#define PSR_N_BIT 0x80000000
83
84/*
85 * Groups of PSR bits
86 */
87#define PSR_f 0xff000000 /* Flags */
88#define PSR_s 0x00ff0000 /* Status */
89#define PSR_x 0x0000ff00 /* Extension */
90#define PSR_c 0x000000ff /* Control */
91
92/*
93 * ARMv7 groups of PSR bits
94 */
95#define APSR_MASK 0xf80f0000 /* N, Z, C, V, Q and GE flags */
96#define PSR_ISET_MASK 0x01000010 /* ISA state (J, T) mask */
97#define PSR_IT_MASK 0x0600fc00 /* If-Then execution state mask */
98#define PSR_ENDIAN_MASK 0x00000200 /* Endianness state mask */
99
100/*
101 * Default endianness state
102 */
103#ifdef CONFIG_CPU_ENDIAN_BE8
104#define PSR_ENDSTATE PSR_E_BIT
105#else
106#define PSR_ENDSTATE 0
107#endif
108
109/*
110 * These are 'magic' values for PTRACE_PEEKUSR that return info about where a
111 * process is located in memory.
112 */
113#define PT_TEXT_ADDR 0x10000
114#define PT_DATA_ADDR 0x10004
115#define PT_TEXT_END_ADDR 0x10008
116
117#ifndef __ASSEMBLY__
118
119/*
120 * This struct defines the way the registers are stored on the
121 * stack during a system call. Note that sizeof(struct pt_regs)
122 * has to be a multiple of 8.
123 */
124#ifndef __KERNEL__
125struct pt_regs {
126 long uregs[18];
127};
128#endif /* __KERNEL__ */
129
130#define ARM_cpsr uregs[16]
131#define ARM_pc uregs[15]
132#define ARM_lr uregs[14]
133#define ARM_sp uregs[13]
134#define ARM_ip uregs[12]
135#define ARM_fp uregs[11]
136#define ARM_r10 uregs[10]
137#define ARM_r9 uregs[9]
138#define ARM_r8 uregs[8]
139#define ARM_r7 uregs[7]
140#define ARM_r6 uregs[6]
141#define ARM_r5 uregs[5]
142#define ARM_r4 uregs[4]
143#define ARM_r3 uregs[3]
144#define ARM_r2 uregs[2]
145#define ARM_r1 uregs[1]
146#define ARM_r0 uregs[0]
147#define ARM_ORIG_r0 uregs[17]
148
149/*
150 * The size of the user-visible VFP state as seen by PTRACE_GET/SETVFPREGS
151 * and core dumps.
152 */
153#define ARM_VFPREGS_SIZE ( 32 * 8 /*fpregs*/ + 4 /*fpscr*/ )
154
155
156#endif /* __ASSEMBLY__ */
157
158#endif /* _UAPI__ASM_ARM_PTRACE_H */