blob: e3301dbd27d48521912015500604077fa6f4fac8 [file] [log] [blame]
Christopher Ferris25981132017-11-14 16:53:49 -08001/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
Ben Cheng224b54f2013-10-15 18:26:18 -07002/*
3 * VFIO API definition
4 *
5 * Copyright (C) 2012 Red Hat, Inc. All rights reserved.
6 * Author: Alex Williamson <alex.williamson@redhat.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12#ifndef _UAPIVFIO_H
13#define _UAPIVFIO_H
14
15#include <linux/types.h>
16#include <linux/ioctl.h>
17
18#define VFIO_API_VERSION 0
19
20
21/* Kernel & User level defines for VFIO IOCTLs. */
22
23/* Extensions */
24
25#define VFIO_TYPE1_IOMMU 1
Christopher Ferrise0845012014-07-09 14:58:51 -070026#define VFIO_SPAPR_TCE_IOMMU 2
Christopher Ferris31475242014-09-02 17:43:51 -070027#define VFIO_TYPE1v2_IOMMU 3
28/*
29 * IOMMU enforces DMA cache coherence (ex. PCIe NoSnoop stripping). This
30 * capability is subject to change as groups are added or removed.
31 */
32#define VFIO_DMA_CC_IOMMU 4
Ben Cheng224b54f2013-10-15 18:26:18 -070033
Christopher Ferris7c0b6392015-01-23 15:34:26 -080034/* Check if EEH is supported */
35#define VFIO_EEH 5
36
37/* Two-stage IOMMU */
38#define VFIO_TYPE1_NESTING_IOMMU 6 /* Implies v2 */
39
Christopher Ferris12e1f282016-02-04 12:35:07 -080040#define VFIO_SPAPR_TCE_v2_IOMMU 7
41
Ben Cheng224b54f2013-10-15 18:26:18 -070042/*
Christopher Ferrisccfaccd2016-08-24 12:11:31 -070043 * The No-IOMMU IOMMU offers no translation or isolation for devices and
44 * supports no ioctls outside of VFIO_CHECK_EXTENSION. Use of VFIO's No-IOMMU
45 * code will taint the host kernel and should be used with extreme caution.
46 */
47#define VFIO_NOIOMMU_IOMMU 8
48
49/*
Ben Cheng224b54f2013-10-15 18:26:18 -070050 * The IOCTL interface is designed for extensibility by embedding the
51 * structure length (argsz) and flags into structures passed between
52 * kernel and userspace. We therefore use the _IO() macro for these
53 * defines to avoid implicitly embedding a size into the ioctl request.
54 * As structure fields are added, argsz will increase to match and flag
55 * bits will be defined to indicate additional fields with valid data.
56 * It's *always* the caller's responsibility to indicate the size of
57 * the structure passed by setting argsz appropriately.
58 */
59
60#define VFIO_TYPE (';')
61#define VFIO_BASE 100
62
Christopher Ferrisccfaccd2016-08-24 12:11:31 -070063/*
64 * For extension of INFO ioctls, VFIO makes use of a capability chain
65 * designed after PCI/e capabilities. A flag bit indicates whether
66 * this capability chain is supported and a field defined in the fixed
67 * structure defines the offset of the first capability in the chain.
68 * This field is only valid when the corresponding bit in the flags
69 * bitmap is set. This offset field is relative to the start of the
70 * INFO buffer, as is the next field within each capability header.
71 * The id within the header is a shared address space per INFO ioctl,
72 * while the version field is specific to the capability id. The
73 * contents following the header are specific to the capability id.
74 */
75struct vfio_info_cap_header {
76 __u16 id; /* Identifies capability */
77 __u16 version; /* Version specific to the capability ID */
78 __u32 next; /* Offset of next capability */
79};
80
81/*
82 * Callers of INFO ioctls passing insufficiently sized buffers will see
83 * the capability chain flag bit set, a zero value for the first capability
84 * offset (if available within the provided argsz), and argsz will be
85 * updated to report the necessary buffer size. For compatibility, the
86 * INFO ioctl will not report error in this case, but the capability chain
87 * will not be available.
88 */
89
Ben Cheng224b54f2013-10-15 18:26:18 -070090/* -------- IOCTLs for VFIO file descriptor (/dev/vfio/vfio) -------- */
91
92/**
93 * VFIO_GET_API_VERSION - _IO(VFIO_TYPE, VFIO_BASE + 0)
94 *
95 * Report the version of the VFIO API. This allows us to bump the entire
96 * API version should we later need to add or change features in incompatible
97 * ways.
98 * Return: VFIO_API_VERSION
99 * Availability: Always
100 */
101#define VFIO_GET_API_VERSION _IO(VFIO_TYPE, VFIO_BASE + 0)
102
103/**
104 * VFIO_CHECK_EXTENSION - _IOW(VFIO_TYPE, VFIO_BASE + 1, __u32)
105 *
106 * Check whether an extension is supported.
107 * Return: 0 if not supported, 1 (or some other positive integer) if supported.
108 * Availability: Always
109 */
110#define VFIO_CHECK_EXTENSION _IO(VFIO_TYPE, VFIO_BASE + 1)
111
112/**
113 * VFIO_SET_IOMMU - _IOW(VFIO_TYPE, VFIO_BASE + 2, __s32)
114 *
115 * Set the iommu to the given type. The type must be supported by an
116 * iommu driver as verified by calling CHECK_EXTENSION using the same
117 * type. A group must be set to this file descriptor before this
118 * ioctl is available. The IOMMU interfaces enabled by this call are
119 * specific to the value set.
120 * Return: 0 on success, -errno on failure
121 * Availability: When VFIO group attached
122 */
123#define VFIO_SET_IOMMU _IO(VFIO_TYPE, VFIO_BASE + 2)
124
125/* -------- IOCTLs for GROUP file descriptors (/dev/vfio/$GROUP) -------- */
126
127/**
128 * VFIO_GROUP_GET_STATUS - _IOR(VFIO_TYPE, VFIO_BASE + 3,
129 * struct vfio_group_status)
130 *
131 * Retrieve information about the group. Fills in provided
132 * struct vfio_group_info. Caller sets argsz.
133 * Return: 0 on succes, -errno on failure.
134 * Availability: Always
135 */
136struct vfio_group_status {
137 __u32 argsz;
138 __u32 flags;
139#define VFIO_GROUP_FLAGS_VIABLE (1 << 0)
140#define VFIO_GROUP_FLAGS_CONTAINER_SET (1 << 1)
141};
142#define VFIO_GROUP_GET_STATUS _IO(VFIO_TYPE, VFIO_BASE + 3)
143
144/**
145 * VFIO_GROUP_SET_CONTAINER - _IOW(VFIO_TYPE, VFIO_BASE + 4, __s32)
146 *
147 * Set the container for the VFIO group to the open VFIO file
148 * descriptor provided. Groups may only belong to a single
149 * container. Containers may, at their discretion, support multiple
150 * groups. Only when a container is set are all of the interfaces
151 * of the VFIO file descriptor and the VFIO group file descriptor
152 * available to the user.
153 * Return: 0 on success, -errno on failure.
154 * Availability: Always
155 */
156#define VFIO_GROUP_SET_CONTAINER _IO(VFIO_TYPE, VFIO_BASE + 4)
157
158/**
159 * VFIO_GROUP_UNSET_CONTAINER - _IO(VFIO_TYPE, VFIO_BASE + 5)
160 *
161 * Remove the group from the attached container. This is the
162 * opposite of the SET_CONTAINER call and returns the group to
163 * an initial state. All device file descriptors must be released
164 * prior to calling this interface. When removing the last group
165 * from a container, the IOMMU will be disabled and all state lost,
166 * effectively also returning the VFIO file descriptor to an initial
167 * state.
168 * Return: 0 on success, -errno on failure.
169 * Availability: When attached to container
170 */
171#define VFIO_GROUP_UNSET_CONTAINER _IO(VFIO_TYPE, VFIO_BASE + 5)
172
173/**
174 * VFIO_GROUP_GET_DEVICE_FD - _IOW(VFIO_TYPE, VFIO_BASE + 6, char)
175 *
176 * Return a new file descriptor for the device object described by
177 * the provided string. The string should match a device listed in
178 * the devices subdirectory of the IOMMU group sysfs entry. The
179 * group containing the device must already be added to this context.
180 * Return: new file descriptor on success, -errno on failure.
181 * Availability: When attached to container
182 */
183#define VFIO_GROUP_GET_DEVICE_FD _IO(VFIO_TYPE, VFIO_BASE + 6)
184
185/* --------------- IOCTLs for DEVICE file descriptors --------------- */
186
187/**
188 * VFIO_DEVICE_GET_INFO - _IOR(VFIO_TYPE, VFIO_BASE + 7,
189 * struct vfio_device_info)
190 *
191 * Retrieve information about the device. Fills in provided
192 * struct vfio_device_info. Caller sets argsz.
193 * Return: 0 on success, -errno on failure.
194 */
195struct vfio_device_info {
196 __u32 argsz;
197 __u32 flags;
198#define VFIO_DEVICE_FLAGS_RESET (1 << 0) /* Device supports reset */
199#define VFIO_DEVICE_FLAGS_PCI (1 << 1) /* vfio-pci device */
Christopher Ferris12e1f282016-02-04 12:35:07 -0800200#define VFIO_DEVICE_FLAGS_PLATFORM (1 << 2) /* vfio-platform device */
201#define VFIO_DEVICE_FLAGS_AMBA (1 << 3) /* vfio-amba device */
Christopher Ferris0543f742017-07-26 13:09:46 -0700202#define VFIO_DEVICE_FLAGS_CCW (1 << 4) /* vfio-ccw device */
Ben Cheng224b54f2013-10-15 18:26:18 -0700203 __u32 num_regions; /* Max region index + 1 */
204 __u32 num_irqs; /* Max IRQ index + 1 */
205};
206#define VFIO_DEVICE_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 7)
207
Christopher Ferris2fd4b3c2017-02-21 12:32:08 -0800208/*
209 * Vendor driver using Mediated device framework should provide device_api
210 * attribute in supported type attribute groups. Device API string should be one
211 * of the following corresponding to device flags in vfio_device_info structure.
212 */
213
214#define VFIO_DEVICE_API_PCI_STRING "vfio-pci"
215#define VFIO_DEVICE_API_PLATFORM_STRING "vfio-platform"
216#define VFIO_DEVICE_API_AMBA_STRING "vfio-amba"
Christopher Ferris0543f742017-07-26 13:09:46 -0700217#define VFIO_DEVICE_API_CCW_STRING "vfio-ccw"
Christopher Ferris2fd4b3c2017-02-21 12:32:08 -0800218
Ben Cheng224b54f2013-10-15 18:26:18 -0700219/**
220 * VFIO_DEVICE_GET_REGION_INFO - _IOWR(VFIO_TYPE, VFIO_BASE + 8,
221 * struct vfio_region_info)
222 *
223 * Retrieve information about a device region. Caller provides
224 * struct vfio_region_info with index value set. Caller sets argsz.
225 * Implementation of region mapping is bus driver specific. This is
226 * intended to describe MMIO, I/O port, as well as bus specific
227 * regions (ex. PCI config space). Zero sized regions may be used
228 * to describe unimplemented regions (ex. unimplemented PCI BARs).
229 * Return: 0 on success, -errno on failure.
230 */
231struct vfio_region_info {
232 __u32 argsz;
233 __u32 flags;
234#define VFIO_REGION_INFO_FLAG_READ (1 << 0) /* Region supports read */
235#define VFIO_REGION_INFO_FLAG_WRITE (1 << 1) /* Region supports write */
236#define VFIO_REGION_INFO_FLAG_MMAP (1 << 2) /* Region supports mmap */
Christopher Ferrisccfaccd2016-08-24 12:11:31 -0700237#define VFIO_REGION_INFO_FLAG_CAPS (1 << 3) /* Info supports caps */
Ben Cheng224b54f2013-10-15 18:26:18 -0700238 __u32 index; /* Region index */
Christopher Ferrisccfaccd2016-08-24 12:11:31 -0700239 __u32 cap_offset; /* Offset within info struct of first cap */
Ben Cheng224b54f2013-10-15 18:26:18 -0700240 __u64 size; /* Region size (bytes) */
241 __u64 offset; /* Region offset from start of device fd */
242};
243#define VFIO_DEVICE_GET_REGION_INFO _IO(VFIO_TYPE, VFIO_BASE + 8)
244
Christopher Ferrisccfaccd2016-08-24 12:11:31 -0700245/*
246 * The sparse mmap capability allows finer granularity of specifying areas
247 * within a region with mmap support. When specified, the user should only
248 * mmap the offset ranges specified by the areas array. mmaps outside of the
249 * areas specified may fail (such as the range covering a PCI MSI-X table) or
250 * may result in improper device behavior.
251 *
252 * The structures below define version 1 of this capability.
253 */
254#define VFIO_REGION_INFO_CAP_SPARSE_MMAP 1
255
256struct vfio_region_sparse_mmap_area {
257 __u64 offset; /* Offset of mmap'able area within region */
258 __u64 size; /* Size of mmap'able area */
259};
260
261struct vfio_region_info_cap_sparse_mmap {
262 struct vfio_info_cap_header header;
263 __u32 nr_areas;
264 __u32 reserved;
265 struct vfio_region_sparse_mmap_area areas[];
266};
267
268/*
269 * The device specific type capability allows regions unique to a specific
270 * device or class of devices to be exposed. This helps solve the problem for
271 * vfio bus drivers of defining which region indexes correspond to which region
272 * on the device, without needing to resort to static indexes, as done by
273 * vfio-pci. For instance, if we were to go back in time, we might remove
274 * VFIO_PCI_VGA_REGION_INDEX and let vfio-pci simply define that all indexes
275 * greater than or equal to VFIO_PCI_NUM_REGIONS are device specific and we'd
276 * make a "VGA" device specific type to describe the VGA access space. This
277 * means that non-VGA devices wouldn't need to waste this index, and thus the
278 * address space associated with it due to implementation of device file
279 * descriptor offsets in vfio-pci.
280 *
281 * The current implementation is now part of the user ABI, so we can't use this
282 * for VGA, but there are other upcoming use cases, such as opregions for Intel
283 * IGD devices and framebuffers for vGPU devices. We missed VGA, but we'll
284 * use this for future additions.
285 *
286 * The structure below defines version 1 of this capability.
287 */
288#define VFIO_REGION_INFO_CAP_TYPE 2
289
290struct vfio_region_info_cap_type {
291 struct vfio_info_cap_header header;
292 __u32 type; /* global per bus driver */
293 __u32 subtype; /* type specific */
294};
295
296#define VFIO_REGION_TYPE_PCI_VENDOR_TYPE (1 << 31)
297#define VFIO_REGION_TYPE_PCI_VENDOR_MASK (0xffff)
298
299/* 8086 Vendor sub-types */
300#define VFIO_REGION_SUBTYPE_INTEL_IGD_OPREGION (1)
301#define VFIO_REGION_SUBTYPE_INTEL_IGD_HOST_CFG (2)
302#define VFIO_REGION_SUBTYPE_INTEL_IGD_LPC_CFG (3)
303
Ben Cheng224b54f2013-10-15 18:26:18 -0700304/**
305 * VFIO_DEVICE_GET_IRQ_INFO - _IOWR(VFIO_TYPE, VFIO_BASE + 9,
306 * struct vfio_irq_info)
307 *
308 * Retrieve information about a device IRQ. Caller provides
309 * struct vfio_irq_info with index value set. Caller sets argsz.
310 * Implementation of IRQ mapping is bus driver specific. Indexes
311 * using multiple IRQs are primarily intended to support MSI-like
312 * interrupt blocks. Zero count irq blocks may be used to describe
313 * unimplemented interrupt types.
314 *
315 * The EVENTFD flag indicates the interrupt index supports eventfd based
316 * signaling.
317 *
318 * The MASKABLE flags indicates the index supports MASK and UNMASK
319 * actions described below.
320 *
321 * AUTOMASKED indicates that after signaling, the interrupt line is
322 * automatically masked by VFIO and the user needs to unmask the line
323 * to receive new interrupts. This is primarily intended to distinguish
324 * level triggered interrupts.
325 *
326 * The NORESIZE flag indicates that the interrupt lines within the index
327 * are setup as a set and new subindexes cannot be enabled without first
328 * disabling the entire index. This is used for interrupts like PCI MSI
329 * and MSI-X where the driver may only use a subset of the available
330 * indexes, but VFIO needs to enable a specific number of vectors
331 * upfront. In the case of MSI-X, where the user can enable MSI-X and
332 * then add and unmask vectors, it's up to userspace to make the decision
333 * whether to allocate the maximum supported number of vectors or tear
334 * down setup and incrementally increase the vectors as each is enabled.
335 */
336struct vfio_irq_info {
337 __u32 argsz;
338 __u32 flags;
339#define VFIO_IRQ_INFO_EVENTFD (1 << 0)
340#define VFIO_IRQ_INFO_MASKABLE (1 << 1)
341#define VFIO_IRQ_INFO_AUTOMASKED (1 << 2)
342#define VFIO_IRQ_INFO_NORESIZE (1 << 3)
343 __u32 index; /* IRQ index */
344 __u32 count; /* Number of IRQs within this index */
345};
346#define VFIO_DEVICE_GET_IRQ_INFO _IO(VFIO_TYPE, VFIO_BASE + 9)
347
348/**
349 * VFIO_DEVICE_SET_IRQS - _IOW(VFIO_TYPE, VFIO_BASE + 10, struct vfio_irq_set)
350 *
351 * Set signaling, masking, and unmasking of interrupts. Caller provides
352 * struct vfio_irq_set with all fields set. 'start' and 'count' indicate
353 * the range of subindexes being specified.
354 *
355 * The DATA flags specify the type of data provided. If DATA_NONE, the
356 * operation performs the specified action immediately on the specified
357 * interrupt(s). For example, to unmask AUTOMASKED interrupt [0,0]:
358 * flags = (DATA_NONE|ACTION_UNMASK), index = 0, start = 0, count = 1.
359 *
360 * DATA_BOOL allows sparse support for the same on arrays of interrupts.
361 * For example, to mask interrupts [0,1] and [0,3] (but not [0,2]):
362 * flags = (DATA_BOOL|ACTION_MASK), index = 0, start = 1, count = 3,
363 * data = {1,0,1}
364 *
365 * DATA_EVENTFD binds the specified ACTION to the provided __s32 eventfd.
366 * A value of -1 can be used to either de-assign interrupts if already
367 * assigned or skip un-assigned interrupts. For example, to set an eventfd
368 * to be trigger for interrupts [0,0] and [0,2]:
369 * flags = (DATA_EVENTFD|ACTION_TRIGGER), index = 0, start = 0, count = 3,
370 * data = {fd1, -1, fd2}
371 * If index [0,1] is previously set, two count = 1 ioctls calls would be
372 * required to set [0,0] and [0,2] without changing [0,1].
373 *
374 * Once a signaling mechanism is set, DATA_BOOL or DATA_NONE can be used
375 * with ACTION_TRIGGER to perform kernel level interrupt loopback testing
376 * from userspace (ie. simulate hardware triggering).
377 *
378 * Setting of an event triggering mechanism to userspace for ACTION_TRIGGER
379 * enables the interrupt index for the device. Individual subindex interrupts
380 * can be disabled using the -1 value for DATA_EVENTFD or the index can be
381 * disabled as a whole with: flags = (DATA_NONE|ACTION_TRIGGER), count = 0.
382 *
383 * Note that ACTION_[UN]MASK specify user->kernel signaling (irqfds) while
384 * ACTION_TRIGGER specifies kernel->user signaling.
385 */
386struct vfio_irq_set {
387 __u32 argsz;
388 __u32 flags;
389#define VFIO_IRQ_SET_DATA_NONE (1 << 0) /* Data not present */
390#define VFIO_IRQ_SET_DATA_BOOL (1 << 1) /* Data is bool (u8) */
391#define VFIO_IRQ_SET_DATA_EVENTFD (1 << 2) /* Data is eventfd (s32) */
392#define VFIO_IRQ_SET_ACTION_MASK (1 << 3) /* Mask interrupt */
393#define VFIO_IRQ_SET_ACTION_UNMASK (1 << 4) /* Unmask interrupt */
394#define VFIO_IRQ_SET_ACTION_TRIGGER (1 << 5) /* Trigger interrupt */
395 __u32 index;
396 __u32 start;
397 __u32 count;
398 __u8 data[];
399};
400#define VFIO_DEVICE_SET_IRQS _IO(VFIO_TYPE, VFIO_BASE + 10)
401
402#define VFIO_IRQ_SET_DATA_TYPE_MASK (VFIO_IRQ_SET_DATA_NONE | \
403 VFIO_IRQ_SET_DATA_BOOL | \
404 VFIO_IRQ_SET_DATA_EVENTFD)
405#define VFIO_IRQ_SET_ACTION_TYPE_MASK (VFIO_IRQ_SET_ACTION_MASK | \
406 VFIO_IRQ_SET_ACTION_UNMASK | \
407 VFIO_IRQ_SET_ACTION_TRIGGER)
408/**
409 * VFIO_DEVICE_RESET - _IO(VFIO_TYPE, VFIO_BASE + 11)
410 *
411 * Reset a device.
412 */
413#define VFIO_DEVICE_RESET _IO(VFIO_TYPE, VFIO_BASE + 11)
414
415/*
416 * The VFIO-PCI bus driver makes use of the following fixed region and
417 * IRQ index mapping. Unimplemented regions return a size of zero.
418 * Unimplemented IRQ types return a count of zero.
419 */
420
421enum {
422 VFIO_PCI_BAR0_REGION_INDEX,
423 VFIO_PCI_BAR1_REGION_INDEX,
424 VFIO_PCI_BAR2_REGION_INDEX,
425 VFIO_PCI_BAR3_REGION_INDEX,
426 VFIO_PCI_BAR4_REGION_INDEX,
427 VFIO_PCI_BAR5_REGION_INDEX,
428 VFIO_PCI_ROM_REGION_INDEX,
429 VFIO_PCI_CONFIG_REGION_INDEX,
430 /*
431 * Expose VGA regions defined for PCI base class 03, subclass 00.
432 * This includes I/O port ranges 0x3b0 to 0x3bb and 0x3c0 to 0x3df
433 * as well as the MMIO range 0xa0000 to 0xbffff. Each implemented
434 * range is found at it's identity mapped offset from the region
435 * offset, for example 0x3b0 is region_info.offset + 0x3b0. Areas
436 * between described ranges are unimplemented.
437 */
438 VFIO_PCI_VGA_REGION_INDEX,
Christopher Ferrisccfaccd2016-08-24 12:11:31 -0700439 VFIO_PCI_NUM_REGIONS = 9 /* Fixed user ABI, region indexes >=9 use */
440 /* device specific cap to define content. */
Ben Cheng224b54f2013-10-15 18:26:18 -0700441};
442
443enum {
444 VFIO_PCI_INTX_IRQ_INDEX,
445 VFIO_PCI_MSI_IRQ_INDEX,
446 VFIO_PCI_MSIX_IRQ_INDEX,
447 VFIO_PCI_ERR_IRQ_INDEX,
Christopher Ferris12e1f282016-02-04 12:35:07 -0800448 VFIO_PCI_REQ_IRQ_INDEX,
Ben Cheng224b54f2013-10-15 18:26:18 -0700449 VFIO_PCI_NUM_IRQS
450};
451
Christopher Ferris0543f742017-07-26 13:09:46 -0700452/*
453 * The vfio-ccw bus driver makes use of the following fixed region and
454 * IRQ index mapping. Unimplemented regions return a size of zero.
455 * Unimplemented IRQ types return a count of zero.
456 */
457
458enum {
459 VFIO_CCW_CONFIG_REGION_INDEX,
460 VFIO_CCW_NUM_REGIONS
461};
462
463enum {
464 VFIO_CCW_IO_IRQ_INDEX,
465 VFIO_CCW_NUM_IRQS
466};
467
Christopher Ferrise0845012014-07-09 14:58:51 -0700468/**
469 * VFIO_DEVICE_GET_PCI_HOT_RESET_INFO - _IORW(VFIO_TYPE, VFIO_BASE + 12,
470 * struct vfio_pci_hot_reset_info)
471 *
472 * Return: 0 on success, -errno on failure:
473 * -enospc = insufficient buffer, -enodev = unsupported for device.
474 */
475struct vfio_pci_dependent_device {
476 __u32 group_id;
477 __u16 segment;
478 __u8 bus;
479 __u8 devfn; /* Use PCI_SLOT/PCI_FUNC */
480};
481
482struct vfio_pci_hot_reset_info {
483 __u32 argsz;
484 __u32 flags;
485 __u32 count;
486 struct vfio_pci_dependent_device devices[];
487};
488
489#define VFIO_DEVICE_GET_PCI_HOT_RESET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12)
490
491/**
492 * VFIO_DEVICE_PCI_HOT_RESET - _IOW(VFIO_TYPE, VFIO_BASE + 13,
493 * struct vfio_pci_hot_reset)
494 *
495 * Return: 0 on success, -errno on failure.
496 */
497struct vfio_pci_hot_reset {
498 __u32 argsz;
499 __u32 flags;
500 __u32 count;
501 __s32 group_fds[];
502};
503
504#define VFIO_DEVICE_PCI_HOT_RESET _IO(VFIO_TYPE, VFIO_BASE + 13)
505
Ben Cheng224b54f2013-10-15 18:26:18 -0700506/* -------- API for Type1 VFIO IOMMU -------- */
507
508/**
509 * VFIO_IOMMU_GET_INFO - _IOR(VFIO_TYPE, VFIO_BASE + 12, struct vfio_iommu_info)
510 *
511 * Retrieve information about the IOMMU object. Fills in provided
512 * struct vfio_iommu_info. Caller sets argsz.
513 *
514 * XXX Should we do these by CHECK_EXTENSION too?
515 */
516struct vfio_iommu_type1_info {
517 __u32 argsz;
518 __u32 flags;
519#define VFIO_IOMMU_INFO_PGSIZES (1 << 0) /* supported page sizes info */
520 __u64 iova_pgsizes; /* Bitmap of supported page sizes */
521};
522
523#define VFIO_IOMMU_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12)
524
525/**
526 * VFIO_IOMMU_MAP_DMA - _IOW(VFIO_TYPE, VFIO_BASE + 13, struct vfio_dma_map)
527 *
528 * Map process virtual addresses to IO virtual addresses using the
529 * provided struct vfio_dma_map. Caller sets argsz. READ &/ WRITE required.
530 */
531struct vfio_iommu_type1_dma_map {
532 __u32 argsz;
533 __u32 flags;
534#define VFIO_DMA_MAP_FLAG_READ (1 << 0) /* readable from device */
535#define VFIO_DMA_MAP_FLAG_WRITE (1 << 1) /* writable from device */
536 __u64 vaddr; /* Process virtual address */
537 __u64 iova; /* IO virtual address */
538 __u64 size; /* Size of mapping (bytes) */
539};
540
541#define VFIO_IOMMU_MAP_DMA _IO(VFIO_TYPE, VFIO_BASE + 13)
542
543/**
Christopher Ferrise0845012014-07-09 14:58:51 -0700544 * VFIO_IOMMU_UNMAP_DMA - _IOWR(VFIO_TYPE, VFIO_BASE + 14,
545 * struct vfio_dma_unmap)
Ben Cheng224b54f2013-10-15 18:26:18 -0700546 *
547 * Unmap IO virtual addresses using the provided struct vfio_dma_unmap.
Christopher Ferrise0845012014-07-09 14:58:51 -0700548 * Caller sets argsz. The actual unmapped size is returned in the size
549 * field. No guarantee is made to the user that arbitrary unmaps of iova
550 * or size different from those used in the original mapping call will
551 * succeed.
Ben Cheng224b54f2013-10-15 18:26:18 -0700552 */
553struct vfio_iommu_type1_dma_unmap {
554 __u32 argsz;
555 __u32 flags;
556 __u64 iova; /* IO virtual address */
557 __u64 size; /* Size of mapping (bytes) */
558};
559
560#define VFIO_IOMMU_UNMAP_DMA _IO(VFIO_TYPE, VFIO_BASE + 14)
561
Christopher Ferrise0845012014-07-09 14:58:51 -0700562/*
563 * IOCTLs to enable/disable IOMMU container usage.
564 * No parameters are supported.
565 */
566#define VFIO_IOMMU_ENABLE _IO(VFIO_TYPE, VFIO_BASE + 15)
567#define VFIO_IOMMU_DISABLE _IO(VFIO_TYPE, VFIO_BASE + 16)
568
569/* -------- Additional API for SPAPR TCE (Server POWERPC) IOMMU -------- */
570
571/*
Christopher Ferris12e1f282016-02-04 12:35:07 -0800572 * The SPAPR TCE DDW info struct provides the information about
573 * the details of Dynamic DMA window capability.
574 *
575 * @pgsizes contains a page size bitmask, 4K/64K/16M are supported.
576 * @max_dynamic_windows_supported tells the maximum number of windows
577 * which the platform can create.
578 * @levels tells the maximum number of levels in multi-level IOMMU tables;
579 * this allows splitting a table into smaller chunks which reduces
580 * the amount of physically contiguous memory required for the table.
581 */
582struct vfio_iommu_spapr_tce_ddw_info {
583 __u64 pgsizes; /* Bitmap of supported page sizes */
584 __u32 max_dynamic_windows_supported;
585 __u32 levels;
586};
587
588/*
Christopher Ferrise0845012014-07-09 14:58:51 -0700589 * The SPAPR TCE info struct provides the information about the PCI bus
590 * address ranges available for DMA, these values are programmed into
591 * the hardware so the guest has to know that information.
592 *
593 * The DMA 32 bit window start is an absolute PCI bus address.
594 * The IOVA address passed via map/unmap ioctls are absolute PCI bus
595 * addresses too so the window works as a filter rather than an offset
596 * for IOVA addresses.
597 *
Christopher Ferris12e1f282016-02-04 12:35:07 -0800598 * Flags supported:
599 * - VFIO_IOMMU_SPAPR_INFO_DDW: informs the userspace that dynamic DMA windows
600 * (DDW) support is present. @ddw is only supported when DDW is present.
Christopher Ferrise0845012014-07-09 14:58:51 -0700601 */
602struct vfio_iommu_spapr_tce_info {
603 __u32 argsz;
Christopher Ferris12e1f282016-02-04 12:35:07 -0800604 __u32 flags;
605#define VFIO_IOMMU_SPAPR_INFO_DDW (1 << 0) /* DDW supported */
Christopher Ferrise0845012014-07-09 14:58:51 -0700606 __u32 dma32_window_start; /* 32 bit window start (bytes) */
607 __u32 dma32_window_size; /* 32 bit window size (bytes) */
Christopher Ferris12e1f282016-02-04 12:35:07 -0800608 struct vfio_iommu_spapr_tce_ddw_info ddw;
Christopher Ferrise0845012014-07-09 14:58:51 -0700609};
610
611#define VFIO_IOMMU_SPAPR_TCE_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12)
612
Christopher Ferris7c0b6392015-01-23 15:34:26 -0800613/*
614 * EEH PE operation struct provides ways to:
615 * - enable/disable EEH functionality;
616 * - unfreeze IO/DMA for frozen PE;
617 * - read PE state;
618 * - reset PE;
Christopher Ferris12e1f282016-02-04 12:35:07 -0800619 * - configure PE;
620 * - inject EEH error.
Christopher Ferris7c0b6392015-01-23 15:34:26 -0800621 */
Christopher Ferris12e1f282016-02-04 12:35:07 -0800622struct vfio_eeh_pe_err {
623 __u32 type;
624 __u32 func;
625 __u64 addr;
626 __u64 mask;
627};
628
Christopher Ferris7c0b6392015-01-23 15:34:26 -0800629struct vfio_eeh_pe_op {
630 __u32 argsz;
631 __u32 flags;
632 __u32 op;
Christopher Ferris12e1f282016-02-04 12:35:07 -0800633 union {
634 struct vfio_eeh_pe_err err;
635 };
Christopher Ferris7c0b6392015-01-23 15:34:26 -0800636};
637
638#define VFIO_EEH_PE_DISABLE 0 /* Disable EEH functionality */
639#define VFIO_EEH_PE_ENABLE 1 /* Enable EEH functionality */
640#define VFIO_EEH_PE_UNFREEZE_IO 2 /* Enable IO for frozen PE */
641#define VFIO_EEH_PE_UNFREEZE_DMA 3 /* Enable DMA for frozen PE */
642#define VFIO_EEH_PE_GET_STATE 4 /* PE state retrieval */
643#define VFIO_EEH_PE_STATE_NORMAL 0 /* PE in functional state */
644#define VFIO_EEH_PE_STATE_RESET 1 /* PE reset in progress */
645#define VFIO_EEH_PE_STATE_STOPPED 2 /* Stopped DMA and IO */
646#define VFIO_EEH_PE_STATE_STOPPED_DMA 4 /* Stopped DMA only */
647#define VFIO_EEH_PE_STATE_UNAVAIL 5 /* State unavailable */
648#define VFIO_EEH_PE_RESET_DEACTIVATE 5 /* Deassert PE reset */
649#define VFIO_EEH_PE_RESET_HOT 6 /* Assert hot reset */
650#define VFIO_EEH_PE_RESET_FUNDAMENTAL 7 /* Assert fundamental reset */
651#define VFIO_EEH_PE_CONFIGURE 8 /* PE configuration */
Christopher Ferris12e1f282016-02-04 12:35:07 -0800652#define VFIO_EEH_PE_INJECT_ERR 9 /* Inject EEH error */
Christopher Ferris7c0b6392015-01-23 15:34:26 -0800653
654#define VFIO_EEH_PE_OP _IO(VFIO_TYPE, VFIO_BASE + 21)
655
Christopher Ferris12e1f282016-02-04 12:35:07 -0800656/**
657 * VFIO_IOMMU_SPAPR_REGISTER_MEMORY - _IOW(VFIO_TYPE, VFIO_BASE + 17, struct vfio_iommu_spapr_register_memory)
658 *
659 * Registers user space memory where DMA is allowed. It pins
660 * user pages and does the locked memory accounting so
661 * subsequent VFIO_IOMMU_MAP_DMA/VFIO_IOMMU_UNMAP_DMA calls
662 * get faster.
663 */
664struct vfio_iommu_spapr_register_memory {
665 __u32 argsz;
666 __u32 flags;
667 __u64 vaddr; /* Process virtual address */
668 __u64 size; /* Size of mapping (bytes) */
669};
670#define VFIO_IOMMU_SPAPR_REGISTER_MEMORY _IO(VFIO_TYPE, VFIO_BASE + 17)
671
672/**
673 * VFIO_IOMMU_SPAPR_UNREGISTER_MEMORY - _IOW(VFIO_TYPE, VFIO_BASE + 18, struct vfio_iommu_spapr_register_memory)
674 *
675 * Unregisters user space memory registered with
676 * VFIO_IOMMU_SPAPR_REGISTER_MEMORY.
677 * Uses vfio_iommu_spapr_register_memory for parameters.
678 */
679#define VFIO_IOMMU_SPAPR_UNREGISTER_MEMORY _IO(VFIO_TYPE, VFIO_BASE + 18)
680
681/**
682 * VFIO_IOMMU_SPAPR_TCE_CREATE - _IOWR(VFIO_TYPE, VFIO_BASE + 19, struct vfio_iommu_spapr_tce_create)
683 *
684 * Creates an additional TCE table and programs it (sets a new DMA window)
685 * to every IOMMU group in the container. It receives page shift, window
686 * size and number of levels in the TCE table being created.
687 *
688 * It allocates and returns an offset on a PCI bus of the new DMA window.
689 */
690struct vfio_iommu_spapr_tce_create {
691 __u32 argsz;
692 __u32 flags;
693 /* in */
694 __u32 page_shift;
Christopher Ferrisccfaccd2016-08-24 12:11:31 -0700695 __u32 __resv1;
Christopher Ferris12e1f282016-02-04 12:35:07 -0800696 __u64 window_size;
697 __u32 levels;
Christopher Ferrisccfaccd2016-08-24 12:11:31 -0700698 __u32 __resv2;
Christopher Ferris12e1f282016-02-04 12:35:07 -0800699 /* out */
700 __u64 start_addr;
701};
702#define VFIO_IOMMU_SPAPR_TCE_CREATE _IO(VFIO_TYPE, VFIO_BASE + 19)
703
704/**
705 * VFIO_IOMMU_SPAPR_TCE_REMOVE - _IOW(VFIO_TYPE, VFIO_BASE + 20, struct vfio_iommu_spapr_tce_remove)
706 *
707 * Unprograms a TCE table from all groups in the container and destroys it.
708 * It receives a PCI bus offset as a window id.
709 */
710struct vfio_iommu_spapr_tce_remove {
711 __u32 argsz;
712 __u32 flags;
713 /* in */
714 __u64 start_addr;
715};
716#define VFIO_IOMMU_SPAPR_TCE_REMOVE _IO(VFIO_TYPE, VFIO_BASE + 20)
717
Christopher Ferrise0845012014-07-09 14:58:51 -0700718/* ***************************************************************** */
719
Ben Cheng224b54f2013-10-15 18:26:18 -0700720#endif /* _UAPIVFIO_H */