blob: 172b8317ee49f8afc4395af2e0dc7dbb1d111f18 [file] [log] [blame]
Christopher Ferris31475242014-09-02 17:43:51 -07001#ifndef _ASM_ARM64_PERF_REGS_H
2#define _ASM_ARM64_PERF_REGS_H
3
4enum perf_event_arm_regs {
5 PERF_REG_ARM64_X0,
6 PERF_REG_ARM64_X1,
7 PERF_REG_ARM64_X2,
8 PERF_REG_ARM64_X3,
9 PERF_REG_ARM64_X4,
10 PERF_REG_ARM64_X5,
11 PERF_REG_ARM64_X6,
12 PERF_REG_ARM64_X7,
13 PERF_REG_ARM64_X8,
14 PERF_REG_ARM64_X9,
15 PERF_REG_ARM64_X10,
16 PERF_REG_ARM64_X11,
17 PERF_REG_ARM64_X12,
18 PERF_REG_ARM64_X13,
19 PERF_REG_ARM64_X14,
20 PERF_REG_ARM64_X15,
21 PERF_REG_ARM64_X16,
22 PERF_REG_ARM64_X17,
23 PERF_REG_ARM64_X18,
24 PERF_REG_ARM64_X19,
25 PERF_REG_ARM64_X20,
26 PERF_REG_ARM64_X21,
27 PERF_REG_ARM64_X22,
28 PERF_REG_ARM64_X23,
29 PERF_REG_ARM64_X24,
30 PERF_REG_ARM64_X25,
31 PERF_REG_ARM64_X26,
32 PERF_REG_ARM64_X27,
33 PERF_REG_ARM64_X28,
34 PERF_REG_ARM64_X29,
35 PERF_REG_ARM64_LR,
36 PERF_REG_ARM64_SP,
37 PERF_REG_ARM64_PC,
38 PERF_REG_ARM64_MAX,
39};
40#endif /* _ASM_ARM64_PERF_REGS_H */