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Hamsalekha S8d3d3032015-03-13 21:24:58 +05301/******************************************************************************
2 *
3 * Copyright (C) 2015 The Android Open Source Project
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at:
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 *
17 *****************************************************************************
18 * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
19*/
20/**
21*******************************************************************************
22* @file
23* ih264e_defs.h
24*
25* @brief
26* Definitions used in the encoder
27*
28* @author
29* ittiam
30*
31* @remarks
32* None
33*
34*******************************************************************************
35*/
36
37#ifndef IH264E_DEFS_H_
38#define IH264E_DEFS_H_
39
40
Harinarayanan K K134291e2015-06-18 16:03:38 +053041#define PARSE_COEFF_DATA_BLOCK_4x4(pv_mb_coeff_data, ps_mb_coeff_data, u4_nnz, u4_sig_coeff_map, pi2_res_block) \
42{ \
43 ps_mb_coeff_data = pv_mb_coeff_data; \
44 u4_nnz = ps_mb_coeff_data->i4_sig_map_nnz & 0xff; \
45 if (u4_nnz) \
46 { \
47 u4_sig_coeff_map = ps_mb_coeff_data->i4_sig_map_nnz >> 16; \
48 pi2_res_block = ps_mb_coeff_data->ai2_residue; \
49 pv_mb_coeff_data = ps_mb_coeff_data->ai2_residue + ALIGN2(u4_nnz); \
50 } \
51 else \
52 { \
53 pv_mb_coeff_data = ps_mb_coeff_data->ai2_residue; \
54 } \
55}
56
Hamsalekha S8d3d3032015-03-13 21:24:58 +053057/*****************************************************************************/
58/* Width and height restrictions */
59/*****************************************************************************/
60/**
61 * Minimum width supported by codec
62 */
63#define MIN_WD 16
64
65/**
66 * Maximum width supported by codec
67 */
68
Ryan Haining72ba34b2016-08-22 12:09:12 -070069/* changed by haining@ to support Nexus 6P screen size, was previously 1920 */
70#define MAX_WD 2560
Hamsalekha S8d3d3032015-03-13 21:24:58 +053071
72/**
73 * Minimum height supported by codec
74 */
75#define MIN_HT 16
76
77/**
78 * Maximum height supported by codec
79 */
80
Ryan Haining72ba34b2016-08-22 12:09:12 -070081/* changed by haining@ to support Nexus 6P screen size, was previously 1920 */
82#define MAX_HT 2560
Hamsalekha S8d3d3032015-03-13 21:24:58 +053083
84/*****************************************************************************/
85/* Padding sizes */
86/*****************************************************************************/
87/**
88 * Padding used for top of the frame
89 */
90#define PAD_TOP 32
91
92/**
93 * Padding used for bottom of the frame
94 */
95#define PAD_BOT 32
96
97/**
98 * Padding used at left of the frame
99 */
100#define PAD_LEFT 32
101
102/**
103 * Padding used at right of the frame
104 */
105#define PAD_RIGHT 32
106/**
107 * Padding for width
108 */
109#define PAD_WD (PAD_LEFT + PAD_RIGHT)
110/**
111 * Padding for height
112 */
113#define PAD_HT (PAD_TOP + PAD_BOT)
114
115/*
116 * buffer width and height for half pel buffers
117 */
118#define HP_BUFF_WD 24
119#define HP_BUFF_HT 18
120
121/*****************************************************************************/
122/* Number of frame restrictions */
123/*****************************************************************************/
124/**
Harinarayanan K K134291e2015-06-18 16:03:38 +0530125 * Maximum number of reference pictures
126 */
127#define MAX_REF_PIC_CNT 2
128
129/**
130 * Minimum number of reference pictures
131 */
132#define MIN_REF_PIC_CNT 1
133
134/**
135 * Maximum number of B pictures between two I/P pictures
136 */
Thomala Srinivas5c3b9922019-04-17 18:20:04 +0530137#define MAX_NUM_BFRAMES 8
138
139/**
140 * Maximum number of pictures in input queue
141 */
142#define MAX_NUM_INP_FRAMES ((MAX_NUM_BFRAMES) + 2)
Harinarayanan K K134291e2015-06-18 16:03:38 +0530143
144/**
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530145 * Maximum number of reference buffers in DPB manager
146 */
147#define MAX_REF_CNT 32
148
149/*****************************************************************************/
Harinarayanan K K6cb67722015-06-19 14:44:42 +0530150/* Minimum size of inter prediction unit supported by encoder */
151/*****************************************************************************/
152#define ENC_MIN_PU_SIZE 16
153
154/*****************************************************************************/
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530155/* Num cores releated defs */
156/*****************************************************************************/
157/**
158 * Maximum number of cores
159 */
160#define MAX_NUM_CORES 8
161
162/**
163 * Maximum number of threads for pixel processing
164 */
165#define MAX_PROCESS_THREADS MAX_NUM_CORES
166
167/**
168 * Maximum process context sets
169 * Used to stagger encoding of MAX_CTXT_SETS in parallel
170 */
Harinarayanan K K6cb67722015-06-19 14:44:42 +0530171#define MAX_CTXT_SETS 1
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530172/**
173 * Maximum number of contexts
174 * Kept as twice the number of threads, to make it easier to initialize the contexts
175 * from master thread
176 */
177#define MAX_PROCESS_CTXT MAX_NUM_CORES * MAX_CTXT_SETS
178
179/*****************************************************************************/
180/* Profile and level restrictions */
181/*****************************************************************************/
182/**
183 * Max level supported by the codec
184 */
185#define MAX_LEVEL IH264_LEVEL_51
186
187/**
188 * Min level supported by the codec
189 */
190#define MIN_LEVEL IH264_LEVEL_10
191
192/**
193 * Maximum number of slice headers that are held in memory simultaneously
194 * For single core implementation only 1 slice header is enough.
195 * But for multi-core parsing thread needs to ensure that slice headers are
196 * stored till the last CB in a slice is decoded.
197 * Parsing thread has to wait till last CB of a slice is consumed before reusing
198 * overwriting the slice header
199 * MAX_SLICE_HDR_CNT is assumed to be a power of 2
200 */
201
202#define LOG2_MAX_SLICE_HDR_CNT 8
203#define MAX_SLICE_HDR_CNT (1 << LOG2_MAX_SLICE_HDR_CNT)
204
205/* Generic declarations */
206#define DEFAULT_MAX_LEVEL 40
207#define DEFAULT_RECON_ENABLE 0
208#define DEFAULT_RC IVE_RC_STORAGE
209#define DEFAULT_MAX_FRAMERATE 120000
Harish Mahendrakarfabba6a2018-03-08 14:42:15 -0800210#define DEFAULT_MAX_BITRATE 240000000
Harinarayanan K K134291e2015-06-18 16:03:38 +0530211#define DEFAULT_MAX_NUM_BFRAMES 0
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530212#define DEFAULT_MAX_SRCH_RANGE_X 256
213#define DEFAULT_MAX_SRCH_RANGE_Y 256
214#define DEFAULT_SLICE_PARAM 256
215#define DEFAULT_SRC_FRAME_RATE 30000
216#define DEFAULT_TGT_FRAME_RATE 30000
217#define DEFAULT_BITRATE 6000000
218#define DEFAULT_QP_MIN 10
219#define DEFAULT_QP_MAX 51
220#define DEFAULT_I_QP 25
221#define DEFAULT_P_QP 28
222#define DEFAULT_B_QP 28
223#define DEFAULT_AIR_MODE IVE_AIR_MODE_NONE
224#define DEFAULT_AIR_REFRESH_PERIOD 30
225#define DEFAULT_VBV_DELAY 1000
Harish Mahendrakarfabba6a2018-03-08 14:42:15 -0800226#define DEFAULT_VBV_SIZE 240000000 /* level 6.0 */
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530227#define DEFAULT_NUM_CORES 1
228#define DEFAULT_ME_SPEED_PRESET 100
229#define DEFAULT_HPEL 1
230#define DEFAULT_QPEL 1
231#define DEFAULT_I4 1
232#define DEFAULT_I8 0
233#define DEFAULT_I16 1
234#define DEFAULT_ENABLE_FAST_SAD 0
235#define DEFAULT_ENABLE_SATQD 1
236#define DEFAULT_MIN_SAD_ENABLE 0
237#define DEFAULT_MIN_SAD_DISABLE -1
238#define DEFAULT_SRCH_RNG_X 64
239#define DEFAULT_SRCH_RNG_Y 48
240#define DEFAULT_I_INTERVAL 30
241#define DEFAULT_IDR_INTERVAL 1000
242#define DEFAULT_B_FRAMES 0
243#define DEFAULT_DISABLE_DEBLK_LEVEL 0
244#define DEFAULT_PROFILE IV_PROFILE_BASE
245#define DEFAULT_MIN_INTRA_FRAME_RATE 1
246#define DEFAULT_MAX_INTRA_FRAME_RATE 2147483647
247#define DEFAULT_MIN_BUFFER_DELAY 30
248#define DEFAULT_MAX_BUFFER_DELAY 20000
249#define DEFAULT_STRIDE 0
250#define DEFAULT_ENC_SPEED_PRESET IVE_USER_DEFINED
251#define DEFAULT_PRE_ENC_ME 0
252#define DEFAULT_PRE_ENC_IPE 0
Harinarayanan K K134291e2015-06-18 16:03:38 +0530253#define DEFAULT_ENTROPY_CODING_MODE 0
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530254
255/** Maximum number of entries in input buffer list */
256#define MAX_INP_BUF_LIST_ENTRIES 32
257
258/** Maximum number of entries in output buffer list */
259#define MAX_OUT_BUF_LIST_ENTRIES 32
260
261/** Maximum number of entries in recon buffer list used within the encoder */
262#define MAX_REC_LIST_ENTRIES 16
263
264/** Number of buffers created to hold half-pel planes for every reference buffer */
Harinarayanan K K134291e2015-06-18 16:03:38 +0530265#define HPEL_PLANES_CNT 1
266
267/** Number of buffers Needed for SUBPEL and BIPRED computation */
268#define SUBPEL_BUFF_CNT 4
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530269
270/**
271 *****************************************************************************
272 * Macro to compute total size required to hold on set of scaling matrices
273 *****************************************************************************
274 */
275#define SCALING_MAT_SIZE(m_scaling_mat_size) \
276{ \
277 m_scaling_mat_size = 6 * TRANS_SIZE_4 * TRANS_SIZE_4; \
278 m_scaling_mat_size += 6 * TRANS_SIZE_8 * TRANS_SIZE_8; \
279 m_scaling_mat_size += 6 * TRANS_SIZE_16 * TRANS_SIZE_16; \
280 m_scaling_mat_size += 2 * TRANS_SIZE_32 * TRANS_SIZE_32; \
281}
282
283/**
284 ******************************************************************************
285 * @brief Macros to get raster scan position of a block[8x8] / sub block[4x4]
286 ******************************************************************************
287 */
288#define GET_BLK_RASTER_POS_X(x) ((x & 0x01))
289#define GET_BLK_RASTER_POS_Y(y) ((y >> 1))
290#define GET_SUB_BLK_RASTER_POS_X(x) ((x & 0x01))
291#define GET_SUB_BLK_RASTER_POS_Y(y) ((y >> 1))
292
293#define NUM_RC_MEMTABS 17
294
295/**
296 ***************************************************************************
297 * Enum to hold various mem records being request
298 ****************************************************************************
299 */
300enum
301{
302 /**
303 * Codec Object at API level
304 */
305 MEM_REC_IV_OBJ,
306
307 /**
308 * Codec context
309 */
310 MEM_REC_CODEC,
311
312 /**
Harinarayanan K K134291e2015-06-18 16:03:38 +0530313 * Cabac context
314 */
315 MEM_REC_CABAC,
316
317 /**
318 * Cabac context_mb_info
319 */
320 MEM_REC_CABAC_MB_INFO,
321
322 /**
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530323 * entropy context
324 */
325 MEM_REC_ENTROPY,
326
327 /**
328 * Buffer to hold coeff data
329 */
330 MEM_REC_MB_COEFF_DATA,
331
332 /**
333 * Buffer to hold coeff data
334 */
335 MEM_REC_MB_HEADER_DATA,
336
337 /**
338 * Motion vector bank
339 */
340 MEM_REC_MVBANK,
341
342 /**
343 * Motion vector bits
344 */
345 MEM_REC_MVBITS,
346
347 /**
348 * Holds mem records passed to the codec.
349 */
350 MEM_REC_BACKUP,
351
352 /**
353 * Holds SPS
354 */
355 MEM_REC_SPS,
356
357 /**
358 * Holds PPS
359 */
360 MEM_REC_PPS,
361
362 /**
363 * Holds Slice Headers
364 */
365 MEM_REC_SLICE_HDR,
366
367 /**
368 * Contains map indicating slice index per MB basis
369 */
370 MEM_REC_SLICE_MAP,
371
372 /**
373 * Holds thread handles
374 */
375 MEM_REC_THREAD_HANDLE,
376
377 /**
378 * Holds control call mutex
379 */
380 MEM_REC_CTL_MUTEX,
381
382 /**
383 * Holds entropy call mutex
384 */
385 MEM_REC_ENTROPY_MUTEX,
386
387 /**
388 * Holds memory for Process JOB Queue
389 */
390 MEM_REC_PROC_JOBQ,
391
392 /**
393 * Holds memory for Entropy JOB Queue
394 */
395 MEM_REC_ENTROPY_JOBQ,
396
397 /**
398 * Contains status map indicating processing status per MB basis
399 */
400 MEM_REC_PROC_MAP,
401
402 /**
403 * Contains status map indicating deblocking status per MB basis
404 */
405 MEM_REC_DBLK_MAP,
406
407 /*
408 * Contains AIR map and mask
409 */
410 MEM_REC_AIR_MAP,
411
412 /**
413 * Contains status map indicating ME status per MB basis
414 */
415 MEM_REC_ME_MAP,
416
417 /**
418 * Holds dpb manager context
419 */
420 MEM_REC_DPB_MGR,
421
422 /**
423 * Holds intermediate buffers needed during processing stage
424 * Memory for process contexts is allocated in this memtab
425 */
426 MEM_REC_PROC_SCRATCH,
427
428 /**
429 * Holds buffers for vert_bs, horz_bs and QP (all frame level)
430 */
431 MEM_REC_QUANT_PARAM,
432
433 /**
434 * Holds top row syntax information
435 */
436 MEM_REC_TOP_ROW_SYN_INFO,
437
438 /**
439 * Holds buffers for vert_bs, horz_bs and QP (all frame level)
440 */
441 MEM_REC_BS_QP,
442
443 /**
444 * Holds input buffer manager context
445 */
446 MEM_REC_INP_PIC,
447
448 /**
449 * Holds output buffer manager context
450 */
451 MEM_REC_OUT,
452
453 /**
454 * Holds picture buffer manager context and array of pic_buf_ts
455 * Also holds reference picture buffers in non-shared mode
456 */
457 MEM_REC_REF_PIC,
458
459 /*
460 * Mem record for color space conversion
461 */
462 MEM_REC_CSC,
463
464 /**
465 * NMB info struct
466 */
467 MEM_REC_MB_INFO_NMB,
468
469 /**
470 * Rate control of memory records.
471 */
472 MEM_REC_RC,
473
474 /**
475 * Place holder to compute number of memory records.
476 */
477 MEM_REC_CNT = MEM_REC_RC + NUM_RC_MEMTABS,
478
479 /*
480 * Do not add anything below
481 */
482};
483
484#define DISABLE_DEBLOCK_INTERVAL 8
485
486/**
487 ****************************************************************************
488 * Disable deblock levels
489 * Level 0 enables deblocking completely and level 4 disables completely
490 * Other levels are intermediate values to control deblocking level
491 ****************************************************************************
492 */
493enum
494{
495 /**
496 * Enable deblocking completely
497 */
498 DISABLE_DEBLK_LEVEL_0,
499
500 /**
501 * Disable only within MB edges - Not supported currently
502 */
503 DISABLE_DEBLK_LEVEL_1,
504
505 /**
506 * Enable deblocking once in DEBLOCK_INTERVAL number of pictures
507 * and for I slices
508 */
509 DISABLE_DEBLK_LEVEL_2,
510
511 /**
512 * Enable deblocking only for I slices
513 */
514 DISABLE_DEBLK_LEVEL_3,
515
516 /**
517 * Disable deblocking completely
518 */
519 DISABLE_DEBLK_LEVEL_4
520};
521
522/**
523 ****************************************************************************
524 * Number of buffers for I/O based on format
525 ****************************************************************************
526 */
527
528/** Minimum number of input buffers */
529#define MIN_INP_BUFS 2
530
531/** Minimum number of output buffers */
532#define MIN_OUT_BUFS 1
533
534/** Minimum number of components in bitstream buffer */
535#define MIN_BITS_BUFS_COMP 1
536
537/** Minimum number of components in raw buffer */
538#define MIN_RAW_BUFS_420_COMP 3
539#define MIN_RAW_BUFS_422ILE_COMP 1
540#define MIN_RAW_BUFS_RGB565_COMP 1
541#define MIN_RAW_BUFS_RGBA8888_COMP 1
542#define MIN_RAW_BUFS_420SP_COMP 2
543
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530544/** Maximum number of active config paramter sets */
545#define MAX_ACTIVE_CONFIG_PARAMS 32
546
547/**
548******************************************************************************
549 * @brief Thresholds for luma & chroma to determine if the 8x8 subblock needs
550 * to be encoded or skipped
551******************************************************************************
552*/
553#define LUMA_SUB_BLOCK_SKIP_THRESHOLD 4
554#define LUMA_BLOCK_SKIP_THRESHOLD 5
555#define CHROMA_BLOCK_SKIP_THRESHOLD 4
556
557/**
558******************************************************************************
559 * @brief defines the first byte of a NAL unit
560 * forbidden zero bit - nal_ref_idc - nal_unit_type
561******************************************************************************
562*/
563/* [0 - 11 - 00111] */
564#define NAL_SPS_FIRST_BYTE 0x67
565
566/* [0 - 11 - 01000] */
567#define NAL_PPS_FIRST_BYTE 0x68
568
569/* [0 - 11 - 00001] */
570#define NAL_SLICE_FIRST_BYTE 0x61
571
572/* [0 - 00 - 00001] */
573#define NAL_NON_REF_SLICE_FIRST_BYTE 0x01
574
575/* [0 - 11 - 00101] */
576#define NAL_IDR_SLICE_FIRST_BYTE 0x65
577
578/* [0 - 00 - 01100] */
579#define NAL_FILLER_FIRST_BYTE 0x0C
580
581/* [0 - 00 - 00110] */
582#define NAL_SEI_FIRST_BYTE 0x06
583
Harinarayanan K K134291e2015-06-18 16:03:38 +0530584#define H264_ALLOC_INTER_FRM_INTV 2
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530585
Harinarayanan K K134291e2015-06-18 16:03:38 +0530586#define H264_MPEG_QP_MAP 255
Hamsalekha S8d3d3032015-03-13 21:24:58 +0530587
588#define MPEG2_QP_ELEM (H264_MPEG_QP_MAP + 1)
589#define H264_QP_ELEM (MAX_H264_QP + 1)
590
591#define H264_INIT_QUANT_I 26
592#define H264_INIT_QUANT_P 34
593
594#endif /*IH264E_DEFS_H_*/