blob: e18e0bdf6d8e27064d03336e2d2ab326784c8cbb [file] [log] [blame]
Eric Anholt3c717f62016-01-25 10:16:56 -08001/*
2 * Copyright © 2014 Broadcom
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24#ifndef VC4_PACKET_H
25#define VC4_PACKET_H
26
27enum vc4_packet {
28 VC4_PACKET_HALT = 0,
29 VC4_PACKET_NOP = 1,
30
31 VC4_PACKET_FLUSH = 4,
32 VC4_PACKET_FLUSH_ALL = 5,
33 VC4_PACKET_START_TILE_BINNING = 6,
34 VC4_PACKET_INCREMENT_SEMAPHORE = 7,
35 VC4_PACKET_WAIT_ON_SEMAPHORE = 8,
36
37 VC4_PACKET_BRANCH = 16,
38 VC4_PACKET_BRANCH_TO_SUB_LIST = 17,
39 VC4_PACKET_RETURN_FROM_SUB_LIST = 18,
40
41 VC4_PACKET_STORE_MS_TILE_BUFFER = 24,
42 VC4_PACKET_STORE_MS_TILE_BUFFER_AND_EOF = 25,
43 VC4_PACKET_STORE_FULL_RES_TILE_BUFFER = 26,
44 VC4_PACKET_LOAD_FULL_RES_TILE_BUFFER = 27,
45 VC4_PACKET_STORE_TILE_BUFFER_GENERAL = 28,
46 VC4_PACKET_LOAD_TILE_BUFFER_GENERAL = 29,
47
48 VC4_PACKET_GL_INDEXED_PRIMITIVE = 32,
49 VC4_PACKET_GL_ARRAY_PRIMITIVE = 33,
50
51 VC4_PACKET_COMPRESSED_PRIMITIVE = 48,
52 VC4_PACKET_CLIPPED_COMPRESSED_PRIMITIVE = 49,
53
54 VC4_PACKET_PRIMITIVE_LIST_FORMAT = 56,
55
56 VC4_PACKET_GL_SHADER_STATE = 64,
57 VC4_PACKET_NV_SHADER_STATE = 65,
58 VC4_PACKET_VG_SHADER_STATE = 66,
59
60 VC4_PACKET_CONFIGURATION_BITS = 96,
61 VC4_PACKET_FLAT_SHADE_FLAGS = 97,
62 VC4_PACKET_POINT_SIZE = 98,
63 VC4_PACKET_LINE_WIDTH = 99,
64 VC4_PACKET_RHT_X_BOUNDARY = 100,
65 VC4_PACKET_DEPTH_OFFSET = 101,
66 VC4_PACKET_CLIP_WINDOW = 102,
67 VC4_PACKET_VIEWPORT_OFFSET = 103,
68 VC4_PACKET_Z_CLIPPING = 104,
69 VC4_PACKET_CLIPPER_XY_SCALING = 105,
70 VC4_PACKET_CLIPPER_Z_SCALING = 106,
71
72 VC4_PACKET_TILE_BINNING_MODE_CONFIG = 112,
73 VC4_PACKET_TILE_RENDERING_MODE_CONFIG = 113,
74 VC4_PACKET_CLEAR_COLORS = 114,
75 VC4_PACKET_TILE_COORDINATES = 115,
76
77 /* Not an actual hardware packet -- this is what we use to put
78 * references to GEM bos in the command stream, since we need the u32
79 * int the actual address packet in order to store the offset from the
80 * start of the BO.
81 */
82 VC4_PACKET_GEM_HANDLES = 254,
83} __attribute__ ((__packed__));
84
85#define VC4_PACKET_HALT_SIZE 1
86#define VC4_PACKET_NOP_SIZE 1
87#define VC4_PACKET_FLUSH_SIZE 1
88#define VC4_PACKET_FLUSH_ALL_SIZE 1
89#define VC4_PACKET_START_TILE_BINNING_SIZE 1
90#define VC4_PACKET_INCREMENT_SEMAPHORE_SIZE 1
91#define VC4_PACKET_WAIT_ON_SEMAPHORE_SIZE 1
92#define VC4_PACKET_BRANCH_SIZE 5
93#define VC4_PACKET_BRANCH_TO_SUB_LIST_SIZE 5
94#define VC4_PACKET_RETURN_FROM_SUB_LIST_SIZE 1
95#define VC4_PACKET_STORE_MS_TILE_BUFFER_SIZE 1
96#define VC4_PACKET_STORE_MS_TILE_BUFFER_AND_EOF_SIZE 1
97#define VC4_PACKET_STORE_FULL_RES_TILE_BUFFER_SIZE 5
98#define VC4_PACKET_LOAD_FULL_RES_TILE_BUFFER_SIZE 5
99#define VC4_PACKET_STORE_TILE_BUFFER_GENERAL_SIZE 7
100#define VC4_PACKET_LOAD_TILE_BUFFER_GENERAL_SIZE 7
101#define VC4_PACKET_GL_INDEXED_PRIMITIVE_SIZE 14
102#define VC4_PACKET_GL_ARRAY_PRIMITIVE_SIZE 10
103#define VC4_PACKET_COMPRESSED_PRIMITIVE_SIZE 1
104#define VC4_PACKET_CLIPPED_COMPRESSED_PRIMITIVE_SIZE 1
105#define VC4_PACKET_PRIMITIVE_LIST_FORMAT_SIZE 2
106#define VC4_PACKET_GL_SHADER_STATE_SIZE 5
107#define VC4_PACKET_NV_SHADER_STATE_SIZE 5
108#define VC4_PACKET_VG_SHADER_STATE_SIZE 5
109#define VC4_PACKET_CONFIGURATION_BITS_SIZE 4
110#define VC4_PACKET_FLAT_SHADE_FLAGS_SIZE 5
111#define VC4_PACKET_POINT_SIZE_SIZE 5
112#define VC4_PACKET_LINE_WIDTH_SIZE 5
113#define VC4_PACKET_RHT_X_BOUNDARY_SIZE 3
114#define VC4_PACKET_DEPTH_OFFSET_SIZE 5
115#define VC4_PACKET_CLIP_WINDOW_SIZE 9
116#define VC4_PACKET_VIEWPORT_OFFSET_SIZE 5
117#define VC4_PACKET_Z_CLIPPING_SIZE 9
118#define VC4_PACKET_CLIPPER_XY_SCALING_SIZE 9
119#define VC4_PACKET_CLIPPER_Z_SCALING_SIZE 9
120#define VC4_PACKET_TILE_BINNING_MODE_CONFIG_SIZE 16
121#define VC4_PACKET_TILE_RENDERING_MODE_CONFIG_SIZE 11
122#define VC4_PACKET_CLEAR_COLORS_SIZE 14
123#define VC4_PACKET_TILE_COORDINATES_SIZE 3
124#define VC4_PACKET_GEM_HANDLES_SIZE 9
125
126#define VC4_MASK(high, low) (((1 << ((high) - (low) + 1)) - 1) << (low))
127/* Using the GNU statement expression extension */
128#define VC4_SET_FIELD(value, field) \
129 ({ \
130 uint32_t fieldval = (value) << field ## _SHIFT; \
131 assert((fieldval & ~ field ## _MASK) == 0); \
132 fieldval & field ## _MASK; \
133 })
134
135#define VC4_GET_FIELD(word, field) (((word) & field ## _MASK) >> field ## _SHIFT)
136
137/** @{
138 * Bits used by packets like VC4_PACKET_STORE_TILE_BUFFER_GENERAL and
139 * VC4_PACKET_TILE_RENDERING_MODE_CONFIG.
140*/
141#define VC4_TILING_FORMAT_LINEAR 0
142#define VC4_TILING_FORMAT_T 1
143#define VC4_TILING_FORMAT_LT 2
144/** @} */
145
146/** @{
147 *
148 * low bits of VC4_PACKET_STORE_FULL_RES_TILE_BUFFER and
149 * VC4_PACKET_LOAD_FULL_RES_TILE_BUFFER.
150 */
151#define VC4_LOADSTORE_FULL_RES_EOF (1 << 3)
152#define VC4_LOADSTORE_FULL_RES_DISABLE_CLEAR_ALL (1 << 2)
153#define VC4_LOADSTORE_FULL_RES_DISABLE_ZS (1 << 1)
154#define VC4_LOADSTORE_FULL_RES_DISABLE_COLOR (1 << 0)
155
156/** @{
157 *
158 * byte 2 of VC4_PACKET_STORE_TILE_BUFFER_GENERAL and
159 * VC4_PACKET_LOAD_TILE_BUFFER_GENERAL (low bits of the address)
160 */
161
162#define VC4_LOADSTORE_TILE_BUFFER_EOF (1 << 3)
163#define VC4_LOADSTORE_TILE_BUFFER_DISABLE_FULL_VG_MASK (1 << 2)
164#define VC4_LOADSTORE_TILE_BUFFER_DISABLE_FULL_ZS (1 << 1)
165#define VC4_LOADSTORE_TILE_BUFFER_DISABLE_FULL_COLOR (1 << 0)
166
167/** @} */
168
169/** @{
170 *
171 * byte 0-1 of VC4_PACKET_STORE_TILE_BUFFER_GENERAL and
172 * VC4_PACKET_LOAD_TILE_BUFFER_GENERAL
173 */
174#define VC4_STORE_TILE_BUFFER_DISABLE_VG_MASK_CLEAR (1 << 15)
175#define VC4_STORE_TILE_BUFFER_DISABLE_ZS_CLEAR (1 << 14)
176#define VC4_STORE_TILE_BUFFER_DISABLE_COLOR_CLEAR (1 << 13)
177#define VC4_STORE_TILE_BUFFER_DISABLE_SWAP (1 << 12)
178
179#define VC4_LOADSTORE_TILE_BUFFER_FORMAT_MASK VC4_MASK(9, 8)
180#define VC4_LOADSTORE_TILE_BUFFER_FORMAT_SHIFT 8
181#define VC4_LOADSTORE_TILE_BUFFER_RGBA8888 0
182#define VC4_LOADSTORE_TILE_BUFFER_BGR565_DITHER 1
183#define VC4_LOADSTORE_TILE_BUFFER_BGR565 2
184/** @} */
185
186/** @{
187 *
188 * byte 0 of VC4_PACKET_STORE_TILE_BUFFER_GENERAL and
189 * VC4_PACKET_LOAD_TILE_BUFFER_GENERAL
190 */
191#define VC4_STORE_TILE_BUFFER_MODE_MASK VC4_MASK(7, 6)
192#define VC4_STORE_TILE_BUFFER_MODE_SHIFT 6
193#define VC4_STORE_TILE_BUFFER_MODE_SAMPLE0 (0 << 6)
194#define VC4_STORE_TILE_BUFFER_MODE_DECIMATE_X4 (1 << 6)
195#define VC4_STORE_TILE_BUFFER_MODE_DECIMATE_X16 (2 << 6)
196
197/** The values of the field are VC4_TILING_FORMAT_* */
198#define VC4_LOADSTORE_TILE_BUFFER_TILING_MASK VC4_MASK(5, 4)
199#define VC4_LOADSTORE_TILE_BUFFER_TILING_SHIFT 4
200
201#define VC4_LOADSTORE_TILE_BUFFER_BUFFER_MASK VC4_MASK(2, 0)
202#define VC4_LOADSTORE_TILE_BUFFER_BUFFER_SHIFT 0
203#define VC4_LOADSTORE_TILE_BUFFER_NONE 0
204#define VC4_LOADSTORE_TILE_BUFFER_COLOR 1
205#define VC4_LOADSTORE_TILE_BUFFER_ZS 2
206#define VC4_LOADSTORE_TILE_BUFFER_Z 3
207#define VC4_LOADSTORE_TILE_BUFFER_VG_MASK 4
208#define VC4_LOADSTORE_TILE_BUFFER_FULL 5
209/** @} */
210
211#define VC4_INDEX_BUFFER_U8 (0 << 4)
212#define VC4_INDEX_BUFFER_U16 (1 << 4)
213
214/* This flag is only present in NV shader state. */
215#define VC4_SHADER_FLAG_SHADED_CLIP_COORDS (1 << 3)
216#define VC4_SHADER_FLAG_ENABLE_CLIPPING (1 << 2)
217#define VC4_SHADER_FLAG_VS_POINT_SIZE (1 << 1)
218#define VC4_SHADER_FLAG_FS_SINGLE_THREAD (1 << 0)
219
220/** @{ byte 2 of config bits. */
221#define VC4_CONFIG_BITS_EARLY_Z_UPDATE (1 << 1)
222#define VC4_CONFIG_BITS_EARLY_Z (1 << 0)
223/** @} */
224
225/** @{ byte 1 of config bits. */
226#define VC4_CONFIG_BITS_Z_UPDATE (1 << 7)
227/** same values in this 3-bit field as PIPE_FUNC_* */
228#define VC4_CONFIG_BITS_DEPTH_FUNC_SHIFT 4
229#define VC4_CONFIG_BITS_COVERAGE_READ_LEAVE (1 << 3)
230
231#define VC4_CONFIG_BITS_COVERAGE_UPDATE_NONZERO (0 << 1)
232#define VC4_CONFIG_BITS_COVERAGE_UPDATE_ODD (1 << 1)
233#define VC4_CONFIG_BITS_COVERAGE_UPDATE_OR (2 << 1)
234#define VC4_CONFIG_BITS_COVERAGE_UPDATE_ZERO (3 << 1)
235
236#define VC4_CONFIG_BITS_COVERAGE_PIPE_SELECT (1 << 0)
237/** @} */
238
239/** @{ byte 0 of config bits. */
240#define VC4_CONFIG_BITS_RASTERIZER_OVERSAMPLE_NONE (0 << 6)
241#define VC4_CONFIG_BITS_RASTERIZER_OVERSAMPLE_4X (1 << 6)
242#define VC4_CONFIG_BITS_RASTERIZER_OVERSAMPLE_16X (2 << 6)
243#define VC4_CONFIG_BITS_RASTERIZER_OVERSAMPLE_MASK (3 << 6)
244
245#define VC4_CONFIG_BITS_AA_POINTS_AND_LINES (1 << 4)
246#define VC4_CONFIG_BITS_ENABLE_DEPTH_OFFSET (1 << 3)
247#define VC4_CONFIG_BITS_CW_PRIMITIVES (1 << 2)
248#define VC4_CONFIG_BITS_ENABLE_PRIM_BACK (1 << 1)
249#define VC4_CONFIG_BITS_ENABLE_PRIM_FRONT (1 << 0)
250/** @} */
251
252/** @{ bits in the last u8 of VC4_PACKET_TILE_BINNING_MODE_CONFIG */
253#define VC4_BIN_CONFIG_DB_NON_MS (1 << 7)
254
255#define VC4_BIN_CONFIG_ALLOC_BLOCK_SIZE_MASK VC4_MASK(6, 5)
256#define VC4_BIN_CONFIG_ALLOC_BLOCK_SIZE_SHIFT 5
257#define VC4_BIN_CONFIG_ALLOC_BLOCK_SIZE_32 0
258#define VC4_BIN_CONFIG_ALLOC_BLOCK_SIZE_64 1
259#define VC4_BIN_CONFIG_ALLOC_BLOCK_SIZE_128 2
260#define VC4_BIN_CONFIG_ALLOC_BLOCK_SIZE_256 3
261
262#define VC4_BIN_CONFIG_ALLOC_INIT_BLOCK_SIZE_MASK VC4_MASK(4, 3)
263#define VC4_BIN_CONFIG_ALLOC_INIT_BLOCK_SIZE_SHIFT 3
264#define VC4_BIN_CONFIG_ALLOC_INIT_BLOCK_SIZE_32 0
265#define VC4_BIN_CONFIG_ALLOC_INIT_BLOCK_SIZE_64 1
266#define VC4_BIN_CONFIG_ALLOC_INIT_BLOCK_SIZE_128 2
267#define VC4_BIN_CONFIG_ALLOC_INIT_BLOCK_SIZE_256 3
268
269#define VC4_BIN_CONFIG_AUTO_INIT_TSDA (1 << 2)
270#define VC4_BIN_CONFIG_TILE_BUFFER_64BIT (1 << 1)
271#define VC4_BIN_CONFIG_MS_MODE_4X (1 << 0)
272/** @} */
273
274/** @{ bits in the last u16 of VC4_PACKET_TILE_RENDERING_MODE_CONFIG */
275#define VC4_RENDER_CONFIG_DB_NON_MS (1 << 12)
276#define VC4_RENDER_CONFIG_EARLY_Z_COVERAGE_DISABLE (1 << 11)
277#define VC4_RENDER_CONFIG_EARLY_Z_DIRECTION_G (1 << 10)
278#define VC4_RENDER_CONFIG_COVERAGE_MODE (1 << 9)
279#define VC4_RENDER_CONFIG_ENABLE_VG_MASK (1 << 8)
280
281/** The values of the field are VC4_TILING_FORMAT_* */
282#define VC4_RENDER_CONFIG_MEMORY_FORMAT_MASK VC4_MASK(7, 6)
283#define VC4_RENDER_CONFIG_MEMORY_FORMAT_SHIFT 6
284
285#define VC4_RENDER_CONFIG_DECIMATE_MODE_1X (0 << 4)
286#define VC4_RENDER_CONFIG_DECIMATE_MODE_4X (1 << 4)
287#define VC4_RENDER_CONFIG_DECIMATE_MODE_16X (2 << 4)
288#define VC4_RENDER_CONFIG_DECIMATE_MODE_MASK (3 << 4)
289
290#define VC4_RENDER_CONFIG_FORMAT_MASK VC4_MASK(3, 2)
291#define VC4_RENDER_CONFIG_FORMAT_SHIFT 2
292#define VC4_RENDER_CONFIG_FORMAT_BGR565_DITHERED 0
293#define VC4_RENDER_CONFIG_FORMAT_RGBA8888 1
294#define VC4_RENDER_CONFIG_FORMAT_BGR565 2
295
296#define VC4_RENDER_CONFIG_TILE_BUFFER_64BIT (1 << 1)
297#define VC4_RENDER_CONFIG_MS_MODE_4X (1 << 0)
298
299#define VC4_PRIMITIVE_LIST_FORMAT_16_INDEX (1 << 4)
300#define VC4_PRIMITIVE_LIST_FORMAT_32_XY (3 << 4)
301#define VC4_PRIMITIVE_LIST_FORMAT_TYPE_POINTS (0 << 0)
302#define VC4_PRIMITIVE_LIST_FORMAT_TYPE_LINES (1 << 0)
303#define VC4_PRIMITIVE_LIST_FORMAT_TYPE_TRIANGLES (2 << 0)
304#define VC4_PRIMITIVE_LIST_FORMAT_TYPE_RHT (3 << 0)
305
306enum vc4_texture_data_type {
307 VC4_TEXTURE_TYPE_RGBA8888 = 0,
308 VC4_TEXTURE_TYPE_RGBX8888 = 1,
309 VC4_TEXTURE_TYPE_RGBA4444 = 2,
310 VC4_TEXTURE_TYPE_RGBA5551 = 3,
311 VC4_TEXTURE_TYPE_RGB565 = 4,
312 VC4_TEXTURE_TYPE_LUMINANCE = 5,
313 VC4_TEXTURE_TYPE_ALPHA = 6,
314 VC4_TEXTURE_TYPE_LUMALPHA = 7,
315 VC4_TEXTURE_TYPE_ETC1 = 8,
316 VC4_TEXTURE_TYPE_S16F = 9,
317 VC4_TEXTURE_TYPE_S8 = 10,
318 VC4_TEXTURE_TYPE_S16 = 11,
319 VC4_TEXTURE_TYPE_BW1 = 12,
320 VC4_TEXTURE_TYPE_A4 = 13,
321 VC4_TEXTURE_TYPE_A1 = 14,
322 VC4_TEXTURE_TYPE_RGBA64 = 15,
323 VC4_TEXTURE_TYPE_RGBA32R = 16,
324 VC4_TEXTURE_TYPE_YUV422R = 17,
325};
326
327#define VC4_TEX_P0_OFFSET_MASK VC4_MASK(31, 12)
328#define VC4_TEX_P0_OFFSET_SHIFT 12
329#define VC4_TEX_P0_CSWIZ_MASK VC4_MASK(11, 10)
330#define VC4_TEX_P0_CSWIZ_SHIFT 10
331#define VC4_TEX_P0_CMMODE_MASK VC4_MASK(9, 9)
332#define VC4_TEX_P0_CMMODE_SHIFT 9
333#define VC4_TEX_P0_FLIPY_MASK VC4_MASK(8, 8)
334#define VC4_TEX_P0_FLIPY_SHIFT 8
335#define VC4_TEX_P0_TYPE_MASK VC4_MASK(7, 4)
336#define VC4_TEX_P0_TYPE_SHIFT 4
337#define VC4_TEX_P0_MIPLVLS_MASK VC4_MASK(3, 0)
338#define VC4_TEX_P0_MIPLVLS_SHIFT 0
339
340#define VC4_TEX_P1_TYPE4_MASK VC4_MASK(31, 31)
341#define VC4_TEX_P1_TYPE4_SHIFT 31
342#define VC4_TEX_P1_HEIGHT_MASK VC4_MASK(30, 20)
343#define VC4_TEX_P1_HEIGHT_SHIFT 20
344#define VC4_TEX_P1_ETCFLIP_MASK VC4_MASK(19, 19)
345#define VC4_TEX_P1_ETCFLIP_SHIFT 19
346#define VC4_TEX_P1_WIDTH_MASK VC4_MASK(18, 8)
347#define VC4_TEX_P1_WIDTH_SHIFT 8
348
349#define VC4_TEX_P1_MAGFILT_MASK VC4_MASK(7, 7)
350#define VC4_TEX_P1_MAGFILT_SHIFT 7
351# define VC4_TEX_P1_MAGFILT_LINEAR 0
352# define VC4_TEX_P1_MAGFILT_NEAREST 1
353
354#define VC4_TEX_P1_MINFILT_MASK VC4_MASK(6, 4)
355#define VC4_TEX_P1_MINFILT_SHIFT 4
356# define VC4_TEX_P1_MINFILT_LINEAR 0
357# define VC4_TEX_P1_MINFILT_NEAREST 1
358# define VC4_TEX_P1_MINFILT_NEAR_MIP_NEAR 2
359# define VC4_TEX_P1_MINFILT_NEAR_MIP_LIN 3
360# define VC4_TEX_P1_MINFILT_LIN_MIP_NEAR 4
361# define VC4_TEX_P1_MINFILT_LIN_MIP_LIN 5
362
363#define VC4_TEX_P1_WRAP_T_MASK VC4_MASK(3, 2)
364#define VC4_TEX_P1_WRAP_T_SHIFT 2
365#define VC4_TEX_P1_WRAP_S_MASK VC4_MASK(1, 0)
366#define VC4_TEX_P1_WRAP_S_SHIFT 0
367# define VC4_TEX_P1_WRAP_REPEAT 0
368# define VC4_TEX_P1_WRAP_CLAMP 1
369# define VC4_TEX_P1_WRAP_MIRROR 2
370# define VC4_TEX_P1_WRAP_BORDER 3
371
372#define VC4_TEX_P2_PTYPE_MASK VC4_MASK(31, 30)
373#define VC4_TEX_P2_PTYPE_SHIFT 30
374# define VC4_TEX_P2_PTYPE_IGNORED 0
375# define VC4_TEX_P2_PTYPE_CUBE_MAP_STRIDE 1
376# define VC4_TEX_P2_PTYPE_CHILD_IMAGE_DIMENSIONS 2
377# define VC4_TEX_P2_PTYPE_CHILD_IMAGE_OFFSETS 3
378
379/* VC4_TEX_P2_PTYPE_CUBE_MAP_STRIDE bits */
380#define VC4_TEX_P2_CMST_MASK VC4_MASK(29, 12)
381#define VC4_TEX_P2_CMST_SHIFT 12
382#define VC4_TEX_P2_BSLOD_MASK VC4_MASK(0, 0)
383#define VC4_TEX_P2_BSLOD_SHIFT 0
384
385/* VC4_TEX_P2_PTYPE_CHILD_IMAGE_DIMENSIONS */
386#define VC4_TEX_P2_CHEIGHT_MASK VC4_MASK(22, 12)
387#define VC4_TEX_P2_CHEIGHT_SHIFT 12
388#define VC4_TEX_P2_CWIDTH_MASK VC4_MASK(10, 0)
389#define VC4_TEX_P2_CWIDTH_SHIFT 0
390
391/* VC4_TEX_P2_PTYPE_CHILD_IMAGE_OFFSETS */
392#define VC4_TEX_P2_CYOFF_MASK VC4_MASK(22, 12)
393#define VC4_TEX_P2_CYOFF_SHIFT 12
394#define VC4_TEX_P2_CXOFF_MASK VC4_MASK(10, 0)
395#define VC4_TEX_P2_CXOFF_SHIFT 0
396
397#endif /* VC4_PACKET_H */