Rob Clark | f17d417 | 2013-07-20 20:35:31 -0400 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2013 Red Hat |
| 3 | * Author: Rob Clark <robdclark@gmail.com> |
| 4 | * |
Rob Clark | 128e74c | 2014-01-31 11:58:30 -0500 | [diff] [blame] | 5 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 6 | * copy of this software and associated documentation files (the "Software"), |
| 7 | * to deal in the Software without restriction, including without limitation |
| 8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 9 | * and/or sell copies of the Software, and to permit persons to whom the |
| 10 | * Software is furnished to do so, subject to the following conditions: |
Rob Clark | f17d417 | 2013-07-20 20:35:31 -0400 | [diff] [blame] | 11 | * |
Rob Clark | 128e74c | 2014-01-31 11:58:30 -0500 | [diff] [blame] | 12 | * The above copyright notice and this permission notice (including the next |
| 13 | * paragraph) shall be included in all copies or substantial portions of the |
| 14 | * Software. |
Rob Clark | f17d417 | 2013-07-20 20:35:31 -0400 | [diff] [blame] | 15 | * |
Rob Clark | 128e74c | 2014-01-31 11:58:30 -0500 | [diff] [blame] | 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 22 | * SOFTWARE. |
Rob Clark | f17d417 | 2013-07-20 20:35:31 -0400 | [diff] [blame] | 23 | */ |
| 24 | |
| 25 | #ifndef __MSM_DRM_H__ |
| 26 | #define __MSM_DRM_H__ |
| 27 | |
| 28 | #include <stddef.h> |
Emil Velikov | 126c458 | 2013-08-29 21:31:52 +0100 | [diff] [blame] | 29 | #include "drm.h" |
Rob Clark | f17d417 | 2013-07-20 20:35:31 -0400 | [diff] [blame] | 30 | |
Rob Clark | 0c270df | 2016-05-31 11:49:46 -0400 | [diff] [blame^] | 31 | #if defined(__cplusplus) |
| 32 | extern "C" { |
| 33 | #endif |
| 34 | |
Rob Clark | f17d417 | 2013-07-20 20:35:31 -0400 | [diff] [blame] | 35 | /* Please note that modifications to all structs defined here are |
| 36 | * subject to backwards-compatibility constraints: |
Rob Clark | 0c270df | 2016-05-31 11:49:46 -0400 | [diff] [blame^] | 37 | * 1) Do not use pointers, use __u64 instead for 32 bit / 64 bit |
Rob Clark | f17d417 | 2013-07-20 20:35:31 -0400 | [diff] [blame] | 38 | * user/kernel compatibility |
| 39 | * 2) Keep fields aligned to their size |
| 40 | * 3) Because of how drm_ioctl() works, we can add new fields at |
| 41 | * the end of an ioctl if some care is taken: drm_ioctl() will |
| 42 | * zero out the new fields at the tail of the ioctl, so a zero |
| 43 | * value should have a backwards compatible meaning. And for |
| 44 | * output params, userspace won't see the newly added output |
| 45 | * fields.. so that has to be somehow ok. |
| 46 | */ |
| 47 | |
| 48 | #define MSM_PIPE_NONE 0x00 |
| 49 | #define MSM_PIPE_2D0 0x01 |
| 50 | #define MSM_PIPE_2D1 0x02 |
| 51 | #define MSM_PIPE_3D0 0x10 |
| 52 | |
| 53 | /* timeouts are specified in clock-monotonic absolute times (to simplify |
| 54 | * restarting interrupted ioctls). The following struct is logically the |
| 55 | * same as 'struct timespec' but 32/64b ABI safe. |
| 56 | */ |
| 57 | struct drm_msm_timespec { |
Rob Clark | 0c270df | 2016-05-31 11:49:46 -0400 | [diff] [blame^] | 58 | __s64 tv_sec; /* seconds */ |
| 59 | __s64 tv_nsec; /* nanoseconds */ |
Rob Clark | f17d417 | 2013-07-20 20:35:31 -0400 | [diff] [blame] | 60 | }; |
| 61 | |
| 62 | #define MSM_PARAM_GPU_ID 0x01 |
| 63 | #define MSM_PARAM_GMEM_SIZE 0x02 |
Rob Clark | 09db801 | 2014-06-18 09:42:11 -0400 | [diff] [blame] | 64 | #define MSM_PARAM_CHIP_ID 0x03 |
Rob Clark | c47385c | 2016-02-10 12:26:20 -0500 | [diff] [blame] | 65 | #define MSM_PARAM_MAX_FREQ 0x04 |
Rob Clark | 67e7103 | 2016-02-23 11:39:53 -0500 | [diff] [blame] | 66 | #define MSM_PARAM_TIMESTAMP 0x05 |
Rob Clark | f17d417 | 2013-07-20 20:35:31 -0400 | [diff] [blame] | 67 | |
| 68 | struct drm_msm_param { |
Rob Clark | 0c270df | 2016-05-31 11:49:46 -0400 | [diff] [blame^] | 69 | __u32 pipe; /* in, MSM_PIPE_x */ |
| 70 | __u32 param; /* in, MSM_PARAM_x */ |
| 71 | __u64 value; /* out (get_param) or in (set_param) */ |
Rob Clark | f17d417 | 2013-07-20 20:35:31 -0400 | [diff] [blame] | 72 | }; |
| 73 | |
| 74 | /* |
| 75 | * GEM buffers: |
| 76 | */ |
| 77 | |
| 78 | #define MSM_BO_SCANOUT 0x00000001 /* scanout capable */ |
| 79 | #define MSM_BO_GPU_READONLY 0x00000002 |
| 80 | #define MSM_BO_CACHE_MASK 0x000f0000 |
| 81 | /* cache modes */ |
| 82 | #define MSM_BO_CACHED 0x00010000 |
| 83 | #define MSM_BO_WC 0x00020000 |
| 84 | #define MSM_BO_UNCACHED 0x00040000 |
| 85 | |
Rob Clark | 09db801 | 2014-06-18 09:42:11 -0400 | [diff] [blame] | 86 | #define MSM_BO_FLAGS (MSM_BO_SCANOUT | \ |
| 87 | MSM_BO_GPU_READONLY | \ |
| 88 | MSM_BO_CACHED | \ |
| 89 | MSM_BO_WC | \ |
| 90 | MSM_BO_UNCACHED) |
| 91 | |
Rob Clark | f17d417 | 2013-07-20 20:35:31 -0400 | [diff] [blame] | 92 | struct drm_msm_gem_new { |
Rob Clark | 0c270df | 2016-05-31 11:49:46 -0400 | [diff] [blame^] | 93 | __u64 size; /* in */ |
| 94 | __u32 flags; /* in, mask of MSM_BO_x */ |
| 95 | __u32 handle; /* out */ |
Rob Clark | f17d417 | 2013-07-20 20:35:31 -0400 | [diff] [blame] | 96 | }; |
| 97 | |
| 98 | struct drm_msm_gem_info { |
Rob Clark | 0c270df | 2016-05-31 11:49:46 -0400 | [diff] [blame^] | 99 | __u32 handle; /* in */ |
| 100 | __u32 pad; |
| 101 | __u64 offset; /* out, offset to pass to mmap() */ |
Rob Clark | f17d417 | 2013-07-20 20:35:31 -0400 | [diff] [blame] | 102 | }; |
| 103 | |
| 104 | #define MSM_PREP_READ 0x01 |
| 105 | #define MSM_PREP_WRITE 0x02 |
| 106 | #define MSM_PREP_NOSYNC 0x04 |
| 107 | |
Rob Clark | 09db801 | 2014-06-18 09:42:11 -0400 | [diff] [blame] | 108 | #define MSM_PREP_FLAGS (MSM_PREP_READ | MSM_PREP_WRITE | MSM_PREP_NOSYNC) |
| 109 | |
Rob Clark | f17d417 | 2013-07-20 20:35:31 -0400 | [diff] [blame] | 110 | struct drm_msm_gem_cpu_prep { |
Rob Clark | 0c270df | 2016-05-31 11:49:46 -0400 | [diff] [blame^] | 111 | __u32 handle; /* in */ |
| 112 | __u32 op; /* in, mask of MSM_PREP_x */ |
Rob Clark | f17d417 | 2013-07-20 20:35:31 -0400 | [diff] [blame] | 113 | struct drm_msm_timespec timeout; /* in */ |
| 114 | }; |
| 115 | |
| 116 | struct drm_msm_gem_cpu_fini { |
Rob Clark | 0c270df | 2016-05-31 11:49:46 -0400 | [diff] [blame^] | 117 | __u32 handle; /* in */ |
Rob Clark | f17d417 | 2013-07-20 20:35:31 -0400 | [diff] [blame] | 118 | }; |
| 119 | |
| 120 | /* |
| 121 | * Cmdstream Submission: |
| 122 | */ |
| 123 | |
| 124 | /* The value written into the cmdstream is logically: |
| 125 | * |
| 126 | * ((relocbuf->gpuaddr + reloc_offset) << shift) | or |
| 127 | * |
| 128 | * When we have GPU's w/ >32bit ptrs, it should be possible to deal |
| 129 | * with this by emit'ing two reloc entries with appropriate shift |
| 130 | * values. Or a new MSM_SUBMIT_CMD_x type would also be an option. |
| 131 | * |
| 132 | * NOTE that reloc's must be sorted by order of increasing submit_offset, |
| 133 | * otherwise EINVAL. |
| 134 | */ |
| 135 | struct drm_msm_gem_submit_reloc { |
Rob Clark | 0c270df | 2016-05-31 11:49:46 -0400 | [diff] [blame^] | 136 | __u32 submit_offset; /* in, offset from submit_bo */ |
| 137 | __u32 or; /* in, value OR'd with result */ |
| 138 | __s32 shift; /* in, amount of left shift (can be negative) */ |
| 139 | __u32 reloc_idx; /* in, index of reloc_bo buffer */ |
| 140 | __u64 reloc_offset; /* in, offset from start of reloc_bo */ |
Rob Clark | f17d417 | 2013-07-20 20:35:31 -0400 | [diff] [blame] | 141 | }; |
| 142 | |
| 143 | /* submit-types: |
| 144 | * BUF - this cmd buffer is executed normally. |
| 145 | * IB_TARGET_BUF - this cmd buffer is an IB target. Reloc's are |
| 146 | * processed normally, but the kernel does not setup an IB to |
| 147 | * this buffer in the first-level ringbuffer |
| 148 | * CTX_RESTORE_BUF - only executed if there has been a GPU context |
| 149 | * switch since the last SUBMIT ioctl |
| 150 | */ |
| 151 | #define MSM_SUBMIT_CMD_BUF 0x0001 |
| 152 | #define MSM_SUBMIT_CMD_IB_TARGET_BUF 0x0002 |
| 153 | #define MSM_SUBMIT_CMD_CTX_RESTORE_BUF 0x0003 |
| 154 | struct drm_msm_gem_submit_cmd { |
Rob Clark | 0c270df | 2016-05-31 11:49:46 -0400 | [diff] [blame^] | 155 | __u32 type; /* in, one of MSM_SUBMIT_CMD_x */ |
| 156 | __u32 submit_idx; /* in, index of submit_bo cmdstream buffer */ |
| 157 | __u32 submit_offset; /* in, offset into submit_bo */ |
| 158 | __u32 size; /* in, cmdstream size */ |
| 159 | __u32 pad; |
| 160 | __u32 nr_relocs; /* in, number of submit_reloc's */ |
| 161 | __u64 __user relocs; /* in, ptr to array of submit_reloc's */ |
Rob Clark | f17d417 | 2013-07-20 20:35:31 -0400 | [diff] [blame] | 162 | }; |
| 163 | |
| 164 | /* Each buffer referenced elsewhere in the cmdstream submit (ie. the |
| 165 | * cmdstream buffer(s) themselves or reloc entries) has one (and only |
| 166 | * one) entry in the submit->bos[] table. |
| 167 | * |
| 168 | * As a optimization, the current buffer (gpu virtual address) can be |
| 169 | * passed back through the 'presumed' field. If on a subsequent reloc, |
| 170 | * userspace passes back a 'presumed' address that is still valid, |
| 171 | * then patching the cmdstream for this entry is skipped. This can |
| 172 | * avoid kernel needing to map/access the cmdstream bo in the common |
| 173 | * case. |
| 174 | */ |
| 175 | #define MSM_SUBMIT_BO_READ 0x0001 |
| 176 | #define MSM_SUBMIT_BO_WRITE 0x0002 |
Rob Clark | 09db801 | 2014-06-18 09:42:11 -0400 | [diff] [blame] | 177 | |
| 178 | #define MSM_SUBMIT_BO_FLAGS (MSM_SUBMIT_BO_READ | MSM_SUBMIT_BO_WRITE) |
| 179 | |
Rob Clark | f17d417 | 2013-07-20 20:35:31 -0400 | [diff] [blame] | 180 | struct drm_msm_gem_submit_bo { |
Rob Clark | 0c270df | 2016-05-31 11:49:46 -0400 | [diff] [blame^] | 181 | __u32 flags; /* in, mask of MSM_SUBMIT_BO_x */ |
| 182 | __u32 handle; /* in, GEM handle */ |
| 183 | __u64 presumed; /* in/out, presumed buffer address */ |
Rob Clark | f17d417 | 2013-07-20 20:35:31 -0400 | [diff] [blame] | 184 | }; |
| 185 | |
| 186 | /* Each cmdstream submit consists of a table of buffers involved, and |
| 187 | * one or more cmdstream buffers. This allows for conditional execution |
| 188 | * (context-restore), and IB buffers needed for per tile/bin draw cmds. |
| 189 | */ |
| 190 | struct drm_msm_gem_submit { |
Rob Clark | 0c270df | 2016-05-31 11:49:46 -0400 | [diff] [blame^] | 191 | __u32 pipe; /* in, MSM_PIPE_x */ |
| 192 | __u32 fence; /* out */ |
| 193 | __u32 nr_bos; /* in, number of submit_bo's */ |
| 194 | __u32 nr_cmds; /* in, number of submit_cmd's */ |
| 195 | __u64 __user bos; /* in, ptr to array of submit_bo's */ |
| 196 | __u64 __user cmds; /* in, ptr to array of submit_cmd's */ |
Rob Clark | f17d417 | 2013-07-20 20:35:31 -0400 | [diff] [blame] | 197 | }; |
| 198 | |
| 199 | /* The normal way to synchronize with the GPU is just to CPU_PREP on |
| 200 | * a buffer if you need to access it from the CPU (other cmdstream |
| 201 | * submission from same or other contexts, PAGE_FLIP ioctl, etc, all |
| 202 | * handle the required synchronization under the hood). This ioctl |
| 203 | * mainly just exists as a way to implement the gallium pipe_fence |
| 204 | * APIs without requiring a dummy bo to synchronize on. |
| 205 | */ |
| 206 | struct drm_msm_wait_fence { |
Rob Clark | 0c270df | 2016-05-31 11:49:46 -0400 | [diff] [blame^] | 207 | __u32 fence; /* in */ |
| 208 | __u32 pad; |
Rob Clark | f17d417 | 2013-07-20 20:35:31 -0400 | [diff] [blame] | 209 | struct drm_msm_timespec timeout; /* in */ |
| 210 | }; |
| 211 | |
Rob Clark | 0c270df | 2016-05-31 11:49:46 -0400 | [diff] [blame^] | 212 | /* madvise provides a way to tell the kernel in case a buffers contents |
| 213 | * can be discarded under memory pressure, which is useful for userspace |
| 214 | * bo cache where we want to optimistically hold on to buffer allocate |
| 215 | * and potential mmap, but allow the pages to be discarded under memory |
| 216 | * pressure. |
| 217 | * |
| 218 | * Typical usage would involve madvise(DONTNEED) when buffer enters BO |
| 219 | * cache, and madvise(WILLNEED) if trying to recycle buffer from BO cache. |
| 220 | * In the WILLNEED case, 'retained' indicates to userspace whether the |
| 221 | * backing pages still exist. |
| 222 | */ |
| 223 | #define MSM_MADV_WILLNEED 0 /* backing pages are needed, status returned in 'retained' */ |
| 224 | #define MSM_MADV_DONTNEED 1 /* backing pages not needed */ |
| 225 | #define __MSM_MADV_PURGED 2 /* internal state */ |
| 226 | |
| 227 | struct drm_msm_gem_madvise { |
| 228 | __u32 handle; /* in, GEM handle */ |
| 229 | __u32 madv; /* in, MSM_MADV_x */ |
| 230 | __u32 retained; /* out, whether backing store still exists */ |
| 231 | }; |
| 232 | |
Rob Clark | f17d417 | 2013-07-20 20:35:31 -0400 | [diff] [blame] | 233 | #define DRM_MSM_GET_PARAM 0x00 |
| 234 | /* placeholder: |
| 235 | #define DRM_MSM_SET_PARAM 0x01 |
| 236 | */ |
| 237 | #define DRM_MSM_GEM_NEW 0x02 |
| 238 | #define DRM_MSM_GEM_INFO 0x03 |
| 239 | #define DRM_MSM_GEM_CPU_PREP 0x04 |
| 240 | #define DRM_MSM_GEM_CPU_FINI 0x05 |
| 241 | #define DRM_MSM_GEM_SUBMIT 0x06 |
| 242 | #define DRM_MSM_WAIT_FENCE 0x07 |
Rob Clark | 0c270df | 2016-05-31 11:49:46 -0400 | [diff] [blame^] | 243 | #define DRM_MSM_GEM_MADVISE 0x08 |
| 244 | #define DRM_MSM_NUM_IOCTLS 0x09 |
Rob Clark | f17d417 | 2013-07-20 20:35:31 -0400 | [diff] [blame] | 245 | |
| 246 | #define DRM_IOCTL_MSM_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GET_PARAM, struct drm_msm_param) |
| 247 | #define DRM_IOCTL_MSM_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_NEW, struct drm_msm_gem_new) |
| 248 | #define DRM_IOCTL_MSM_GEM_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_INFO, struct drm_msm_gem_info) |
| 249 | #define DRM_IOCTL_MSM_GEM_CPU_PREP DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_GEM_CPU_PREP, struct drm_msm_gem_cpu_prep) |
| 250 | #define DRM_IOCTL_MSM_GEM_CPU_FINI DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_GEM_CPU_FINI, struct drm_msm_gem_cpu_fini) |
| 251 | #define DRM_IOCTL_MSM_GEM_SUBMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_SUBMIT, struct drm_msm_gem_submit) |
| 252 | #define DRM_IOCTL_MSM_WAIT_FENCE DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_WAIT_FENCE, struct drm_msm_wait_fence) |
Rob Clark | 0c270df | 2016-05-31 11:49:46 -0400 | [diff] [blame^] | 253 | #define DRM_IOCTL_MSM_GEM_MADVISE DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_MADVISE, struct drm_msm_gem_madvise) |
| 254 | |
| 255 | #if defined(__cplusplus) |
| 256 | } |
| 257 | #endif |
Rob Clark | f17d417 | 2013-07-20 20:35:31 -0400 | [diff] [blame] | 258 | |
| 259 | #endif /* __MSM_DRM_H__ */ |