Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1 | /************************************************************************** |
| 2 | * |
| 3 | * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas. |
| 4 | * All Rights Reserved. |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 7 | * copy of this software and associated documentation files (the |
| 8 | * "Software"), to deal in the Software without restriction, including |
| 9 | * without limitation the rights to use, copy, modify, merge, publish, |
| 10 | * distribute, sub license, and/or sell copies of the Software, and to |
| 11 | * permit persons to whom the Software is furnished to do so, subject to |
| 12 | * the following conditions: |
| 13 | * |
| 14 | * The above copyright notice and this permission notice (including the |
| 15 | * next paragraph) shall be included in all copies or substantial portions |
| 16 | * of the Software. |
| 17 | * |
| 18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
| 19 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 20 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. |
| 21 | * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR |
| 22 | * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, |
| 23 | * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE |
| 24 | * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
| 25 | * |
| 26 | **************************************************************************/ |
| 27 | |
| 28 | /* Originally a fake version of the buffer manager so that we can |
| 29 | * prototype the changes in a driver fairly quickly, has been fleshed |
| 30 | * out to a fully functional interim solution. |
| 31 | * |
| 32 | * Basically wraps the old style memory management in the new |
| 33 | * programming interface, but is more expressive and avoids many of |
| 34 | * the bugs in the old texture manager. |
| 35 | */ |
Eric Anholt | c485742 | 2008-06-03 10:20:49 -0700 | [diff] [blame] | 36 | |
Eric Anholt | 368b392 | 2008-09-10 13:54:34 -0700 | [diff] [blame] | 37 | #ifdef HAVE_CONFIG_H |
| 38 | #include "config.h" |
| 39 | #endif |
| 40 | |
Eric Anholt | c485742 | 2008-06-03 10:20:49 -0700 | [diff] [blame] | 41 | #include <stdlib.h> |
| 42 | #include <string.h> |
| 43 | #include <assert.h> |
Eric Anholt | 869d8be | 2008-09-06 03:07:41 +0100 | [diff] [blame] | 44 | #include <errno.h> |
Chih-Wei Huang | 42f2f92 | 2015-10-30 11:49:42 +0800 | [diff] [blame] | 45 | #include <strings.h> |
Eric Anholt | 738e36a | 2008-09-05 10:35:32 +0100 | [diff] [blame] | 46 | #include <xf86drm.h> |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 47 | #include <pthread.h> |
Eric Anholt | c485742 | 2008-06-03 10:20:49 -0700 | [diff] [blame] | 48 | #include "intel_bufmgr.h" |
Eric Anholt | 738e36a | 2008-09-05 10:35:32 +0100 | [diff] [blame] | 49 | #include "intel_bufmgr_priv.h" |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 50 | #include "drm.h" |
| 51 | #include "i915_drm.h" |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 52 | #include "mm.h" |
Emil Velikov | 42465fe | 2015-04-05 15:51:59 +0100 | [diff] [blame] | 53 | #include "libdrm_macros.h" |
Eric Anholt | f7a9940 | 2008-08-08 15:55:34 -0700 | [diff] [blame] | 54 | #include "libdrm_lists.h" |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 55 | |
| 56 | #define DBG(...) do { \ |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 57 | if (bufmgr_fake->bufmgr.debug) \ |
| 58 | drmMsg(__VA_ARGS__); \ |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 59 | } while (0) |
| 60 | |
| 61 | /* Internal flags: |
| 62 | */ |
| 63 | #define BM_NO_BACKING_STORE 0x00000001 |
| 64 | #define BM_NO_FENCE_SUBDATA 0x00000002 |
| 65 | #define BM_PINNED 0x00000004 |
| 66 | |
| 67 | /* Wrapper around mm.c's mem_block, which understands that you must |
| 68 | * wait for fences to expire before memory can be freed. This is |
| 69 | * specific to our use of memcpy for uploads - an upload that was |
| 70 | * processed through the command queue wouldn't need to care about |
| 71 | * fences. |
| 72 | */ |
| 73 | #define MAX_RELOCS 4096 |
| 74 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 75 | struct fake_buffer_reloc { |
| 76 | /** Buffer object that the relocation points at. */ |
| 77 | drm_intel_bo *target_buf; |
| 78 | /** Offset of the relocation entry within reloc_buf. */ |
| 79 | uint32_t offset; |
| 80 | /** |
| 81 | * Cached value of the offset when we last performed this relocation. |
| 82 | */ |
| 83 | uint32_t last_target_offset; |
| 84 | /** Value added to target_buf's offset to get the relocation entry. */ |
| 85 | uint32_t delta; |
| 86 | /** Cache domains the target buffer is read into. */ |
| 87 | uint32_t read_domains; |
| 88 | /** Cache domain the target buffer will have dirty cachelines in. */ |
| 89 | uint32_t write_domain; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 90 | }; |
| 91 | |
| 92 | struct block { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 93 | struct block *next, *prev; |
| 94 | struct mem_block *mem; /* BM_MEM_AGP */ |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 95 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 96 | /** |
| 97 | * Marks that the block is currently in the aperture and has yet to be |
| 98 | * fenced. |
| 99 | */ |
| 100 | unsigned on_hardware:1; |
| 101 | /** |
| 102 | * Marks that the block is currently fenced (being used by rendering) |
| 103 | * and can't be freed until @fence is passed. |
| 104 | */ |
| 105 | unsigned fenced:1; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 106 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 107 | /** Fence cookie for the block. */ |
| 108 | unsigned fence; /* Split to read_fence, write_fence */ |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 109 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 110 | drm_intel_bo *bo; |
| 111 | void *virtual; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 112 | }; |
| 113 | |
| 114 | typedef struct _bufmgr_fake { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 115 | drm_intel_bufmgr bufmgr; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 116 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 117 | pthread_mutex_t lock; |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 118 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 119 | unsigned long low_offset; |
| 120 | unsigned long size; |
| 121 | void *virtual; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 122 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 123 | struct mem_block *heap; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 124 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 125 | unsigned buf_nr; /* for generating ids */ |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 126 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 127 | /** |
| 128 | * List of blocks which are currently in the GART but haven't been |
| 129 | * fenced yet. |
| 130 | */ |
| 131 | struct block on_hardware; |
| 132 | /** |
| 133 | * List of blocks which are in the GART and have an active fence on |
| 134 | * them. |
| 135 | */ |
| 136 | struct block fenced; |
| 137 | /** |
| 138 | * List of blocks which have an expired fence and are ready to be |
| 139 | * evicted. |
| 140 | */ |
| 141 | struct block lru; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 142 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 143 | unsigned int last_fence; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 144 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 145 | unsigned fail:1; |
| 146 | unsigned need_fence:1; |
| 147 | int thrashing; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 148 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 149 | /** |
| 150 | * Driver callback to emit a fence, returning the cookie. |
| 151 | * |
| 152 | * This allows the driver to hook in a replacement for the DRM usage in |
| 153 | * bufmgr_fake. |
| 154 | * |
| 155 | * Currently, this also requires that a write flush be emitted before |
| 156 | * emitting the fence, but this should change. |
| 157 | */ |
| 158 | unsigned int (*fence_emit) (void *private); |
| 159 | /** Driver callback to wait for a fence cookie to have passed. */ |
| 160 | void (*fence_wait) (unsigned int fence, void *private); |
| 161 | void *fence_priv; |
Eric Anholt | f9d98be | 2008-09-08 08:51:40 -0700 | [diff] [blame] | 162 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 163 | /** |
| 164 | * Driver callback to execute a buffer. |
| 165 | * |
| 166 | * This allows the driver to hook in a replacement for the DRM usage in |
| 167 | * bufmgr_fake. |
| 168 | */ |
| 169 | int (*exec) (drm_intel_bo *bo, unsigned int used, void *priv); |
| 170 | void *exec_priv; |
Eric Anholt | f9d98be | 2008-09-08 08:51:40 -0700 | [diff] [blame] | 171 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 172 | /** Driver-supplied argument to driver callbacks */ |
| 173 | void *driver_priv; |
| 174 | /** |
| 175 | * Pointer to kernel-updated sarea data for the last completed user irq |
| 176 | */ |
| 177 | volatile int *last_dispatch; |
Eric Anholt | 869d8be | 2008-09-06 03:07:41 +0100 | [diff] [blame] | 178 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 179 | int fd; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 180 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 181 | int debug; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 182 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 183 | int performed_rendering; |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 184 | } drm_intel_bufmgr_fake; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 185 | |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 186 | typedef struct _drm_intel_bo_fake { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 187 | drm_intel_bo bo; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 188 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 189 | unsigned id; /* debug only */ |
| 190 | const char *name; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 191 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 192 | unsigned dirty:1; |
| 193 | /** |
| 194 | * has the card written to this buffer - we make need to copy it back |
| 195 | */ |
| 196 | unsigned card_dirty:1; |
| 197 | unsigned int refcount; |
| 198 | /* Flags may consist of any of the DRM_BO flags, plus |
| 199 | * DRM_BO_NO_BACKING_STORE and BM_NO_FENCE_SUBDATA, which are the |
| 200 | * first two driver private flags. |
| 201 | */ |
| 202 | uint64_t flags; |
| 203 | /** Cache domains the target buffer is read into. */ |
| 204 | uint32_t read_domains; |
| 205 | /** Cache domain the target buffer will have dirty cachelines in. */ |
| 206 | uint32_t write_domain; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 207 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 208 | unsigned int alignment; |
| 209 | int is_static, validated; |
| 210 | unsigned int map_count; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 211 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 212 | /** relocation list */ |
| 213 | struct fake_buffer_reloc *relocs; |
| 214 | int nr_relocs; |
| 215 | /** |
| 216 | * Total size of the target_bos of this buffer. |
| 217 | * |
| 218 | * Used for estimation in check_aperture. |
| 219 | */ |
| 220 | unsigned int child_size; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 221 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 222 | struct block *block; |
| 223 | void *backing_store; |
| 224 | void (*invalidate_cb) (drm_intel_bo *bo, void *ptr); |
| 225 | void *invalidate_ptr; |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 226 | } drm_intel_bo_fake; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 227 | |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 228 | static int clear_fenced(drm_intel_bufmgr_fake *bufmgr_fake, |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 229 | unsigned int fence_cookie); |
| 230 | |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 231 | #define MAXFENCE 0x7fffffff |
| 232 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 233 | static int |
| 234 | FENCE_LTE(unsigned a, unsigned b) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 235 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 236 | if (a == b) |
| 237 | return 1; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 238 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 239 | if (a < b && b - a < (1 << 24)) |
| 240 | return 1; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 241 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 242 | if (a > b && MAXFENCE - a + b < (1 << 24)) |
| 243 | return 1; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 244 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 245 | return 0; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 246 | } |
| 247 | |
Emil Velikov | 0f8da82 | 2015-03-31 22:32:11 +0100 | [diff] [blame] | 248 | void |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 249 | drm_intel_bufmgr_fake_set_fence_callback(drm_intel_bufmgr *bufmgr, |
| 250 | unsigned int (*emit) (void *priv), |
| 251 | void (*wait) (unsigned int fence, |
| 252 | void *priv), |
| 253 | void *priv) |
Eric Anholt | f9d98be | 2008-09-08 08:51:40 -0700 | [diff] [blame] | 254 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 255 | drm_intel_bufmgr_fake *bufmgr_fake = (drm_intel_bufmgr_fake *) bufmgr; |
Eric Anholt | f9d98be | 2008-09-08 08:51:40 -0700 | [diff] [blame] | 256 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 257 | bufmgr_fake->fence_emit = emit; |
| 258 | bufmgr_fake->fence_wait = wait; |
| 259 | bufmgr_fake->fence_priv = priv; |
Eric Anholt | f9d98be | 2008-09-08 08:51:40 -0700 | [diff] [blame] | 260 | } |
| 261 | |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 262 | static unsigned int |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 263 | _fence_emit_internal(drm_intel_bufmgr_fake *bufmgr_fake) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 264 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 265 | struct drm_i915_irq_emit ie; |
| 266 | int ret, seq = 1; |
Eric Anholt | 869d8be | 2008-09-06 03:07:41 +0100 | [diff] [blame] | 267 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 268 | if (bufmgr_fake->fence_emit != NULL) { |
| 269 | seq = bufmgr_fake->fence_emit(bufmgr_fake->fence_priv); |
| 270 | return seq; |
| 271 | } |
Eric Anholt | f9d98be | 2008-09-08 08:51:40 -0700 | [diff] [blame] | 272 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 273 | ie.irq_seq = &seq; |
| 274 | ret = drmCommandWriteRead(bufmgr_fake->fd, DRM_I915_IRQ_EMIT, |
| 275 | &ie, sizeof(ie)); |
| 276 | if (ret) { |
Emil Velikov | 41eb131 | 2015-04-05 16:50:33 +0100 | [diff] [blame] | 277 | drmMsg("%s: drm_i915_irq_emit: %d\n", __func__, ret); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 278 | abort(); |
| 279 | } |
Eric Anholt | 869d8be | 2008-09-06 03:07:41 +0100 | [diff] [blame] | 280 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 281 | DBG("emit 0x%08x\n", seq); |
| 282 | return seq; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 283 | } |
| 284 | |
| 285 | static void |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 286 | _fence_wait_internal(drm_intel_bufmgr_fake *bufmgr_fake, int seq) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 287 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 288 | struct drm_i915_irq_wait iw; |
| 289 | int hw_seq, busy_count = 0; |
| 290 | int ret; |
| 291 | int kernel_lied; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 292 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 293 | if (bufmgr_fake->fence_wait != NULL) { |
| 294 | bufmgr_fake->fence_wait(seq, bufmgr_fake->fence_priv); |
| 295 | clear_fenced(bufmgr_fake, seq); |
| 296 | return; |
| 297 | } |
Eric Anholt | f9d98be | 2008-09-08 08:51:40 -0700 | [diff] [blame] | 298 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 299 | iw.irq_seq = seq; |
Eric Anholt | 0dccf01 | 2008-09-23 10:48:39 -0700 | [diff] [blame] | 300 | |
Eric Anholt | 58e54f6 | 2010-05-25 20:11:23 -0700 | [diff] [blame] | 301 | DBG("wait 0x%08x\n", iw.irq_seq); |
| 302 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 303 | /* The kernel IRQ_WAIT implementation is all sorts of broken. |
| 304 | * 1) It returns 1 to 0x7fffffff instead of using the full 32-bit |
| 305 | * unsigned range. |
| 306 | * 2) It returns 0 if hw_seq >= seq, not seq - hw_seq < 0 on the 32-bit |
| 307 | * signed range. |
| 308 | * 3) It waits if seq < hw_seq, not seq - hw_seq > 0 on the 32-bit |
| 309 | * signed range. |
| 310 | * 4) It returns -EBUSY in 3 seconds even if the hardware is still |
| 311 | * successfully chewing through buffers. |
| 312 | * |
| 313 | * Assume that in userland we treat sequence numbers as ints, which |
| 314 | * makes some of the comparisons convenient, since the sequence |
Eric Engestrom | 723a694 | 2016-04-03 19:48:09 +0100 | [diff] [blame] | 315 | * numbers are all positive signed integers. |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 316 | * |
| 317 | * From this we get several cases we need to handle. Here's a timeline. |
| 318 | * 0x2 0x7 0x7ffffff8 0x7ffffffd |
| 319 | * | | | | |
| 320 | * ------------------------------------------------------------ |
| 321 | * |
| 322 | * A) Normal wait for hw to catch up |
| 323 | * hw_seq seq |
| 324 | * | | |
| 325 | * ------------------------------------------------------------ |
| 326 | * seq - hw_seq = 5. If we call IRQ_WAIT, it will wait for hw to |
| 327 | * catch up. |
| 328 | * |
| 329 | * B) Normal wait for a sequence number that's already passed. |
| 330 | * seq hw_seq |
| 331 | * | | |
| 332 | * ------------------------------------------------------------ |
| 333 | * seq - hw_seq = -5. If we call IRQ_WAIT, it returns 0 quickly. |
| 334 | * |
| 335 | * C) Hardware has already wrapped around ahead of us |
| 336 | * hw_seq seq |
| 337 | * | | |
| 338 | * ------------------------------------------------------------ |
| 339 | * seq - hw_seq = 0x80000000 - 5. If we called IRQ_WAIT, it would wait |
| 340 | * for hw_seq >= seq, which may never occur. Thus, we want to catch |
| 341 | * this in userland and return 0. |
| 342 | * |
| 343 | * D) We've wrapped around ahead of the hardware. |
| 344 | * seq hw_seq |
| 345 | * | | |
| 346 | * ------------------------------------------------------------ |
| 347 | * seq - hw_seq = -(0x80000000 - 5). If we called IRQ_WAIT, it would |
| 348 | * return 0 quickly because hw_seq >= seq, even though the hardware |
| 349 | * isn't caught up. Thus, we need to catch this early return in |
| 350 | * userland and bother the kernel until the hardware really does |
| 351 | * catch up. |
| 352 | * |
| 353 | * E) Hardware might wrap after we test in userland. |
| 354 | * hw_seq seq |
| 355 | * | | |
| 356 | * ------------------------------------------------------------ |
| 357 | * seq - hw_seq = 5. If we call IRQ_WAIT, it will likely see seq >= |
| 358 | * hw_seq and wait. However, suppose hw_seq wraps before we make it |
| 359 | * into the kernel. The kernel sees hw_seq >= seq and waits for 3 |
| 360 | * seconds then returns -EBUSY. This is case C). We should catch |
| 361 | * this and then return successfully. |
| 362 | * |
| 363 | * F) Hardware might take a long time on a buffer. |
| 364 | * hw_seq seq |
| 365 | * | | |
| 366 | * ------------------------------------------------------------------- |
| 367 | * seq - hw_seq = 5. If we call IRQ_WAIT, if sequence 2 through 5 |
| 368 | * take too long, it will return -EBUSY. Batchbuffers in the |
| 369 | * gltestperf demo were seen to take up to 7 seconds. We should |
| 370 | * catch early -EBUSY return and keep trying. |
| 371 | */ |
Eric Anholt | 2db8e0c | 2008-09-23 17:06:01 -0700 | [diff] [blame] | 372 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 373 | do { |
| 374 | /* Keep a copy of last_dispatch so that if the wait -EBUSYs |
| 375 | * because the hardware didn't catch up in 3 seconds, we can |
| 376 | * see if it at least made progress and retry. |
| 377 | */ |
| 378 | hw_seq = *bufmgr_fake->last_dispatch; |
Eric Anholt | 0dccf01 | 2008-09-23 10:48:39 -0700 | [diff] [blame] | 379 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 380 | /* Catch case C */ |
| 381 | if (seq - hw_seq > 0x40000000) |
| 382 | return; |
Eric Anholt | 0dccf01 | 2008-09-23 10:48:39 -0700 | [diff] [blame] | 383 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 384 | ret = drmCommandWrite(bufmgr_fake->fd, DRM_I915_IRQ_WAIT, |
| 385 | &iw, sizeof(iw)); |
| 386 | /* Catch case D */ |
| 387 | kernel_lied = (ret == 0) && (seq - *bufmgr_fake->last_dispatch < |
| 388 | -0x40000000); |
Eric Anholt | 0dccf01 | 2008-09-23 10:48:39 -0700 | [diff] [blame] | 389 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 390 | /* Catch case E */ |
| 391 | if (ret == -EBUSY |
| 392 | && (seq - *bufmgr_fake->last_dispatch > 0x40000000)) |
| 393 | ret = 0; |
Eric Anholt | 2db8e0c | 2008-09-23 17:06:01 -0700 | [diff] [blame] | 394 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 395 | /* Catch case F: Allow up to 15 seconds chewing on one buffer. */ |
| 396 | if ((ret == -EBUSY) && (hw_seq != *bufmgr_fake->last_dispatch)) |
| 397 | busy_count = 0; |
| 398 | else |
| 399 | busy_count++; |
| 400 | } while (kernel_lied || ret == -EAGAIN || ret == -EINTR || |
| 401 | (ret == -EBUSY && busy_count < 5)); |
Eric Anholt | 869d8be | 2008-09-06 03:07:41 +0100 | [diff] [blame] | 402 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 403 | if (ret != 0) { |
| 404 | drmMsg("%s:%d: Error waiting for fence: %s.\n", __FILE__, |
| 405 | __LINE__, strerror(-ret)); |
| 406 | abort(); |
| 407 | } |
| 408 | clear_fenced(bufmgr_fake, seq); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 409 | } |
| 410 | |
Eric Anholt | c485742 | 2008-06-03 10:20:49 -0700 | [diff] [blame] | 411 | static int |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 412 | _fence_test(drm_intel_bufmgr_fake *bufmgr_fake, unsigned fence) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 413 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 414 | /* Slight problem with wrap-around: |
| 415 | */ |
| 416 | return fence == 0 || FENCE_LTE(fence, bufmgr_fake->last_fence); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 417 | } |
| 418 | |
| 419 | /** |
| 420 | * Allocate a memory manager block for the buffer. |
| 421 | */ |
Eric Anholt | c485742 | 2008-06-03 10:20:49 -0700 | [diff] [blame] | 422 | static int |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 423 | alloc_block(drm_intel_bo *bo) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 424 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 425 | drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) bo; |
| 426 | drm_intel_bufmgr_fake *bufmgr_fake = |
| 427 | (drm_intel_bufmgr_fake *) bo->bufmgr; |
| 428 | struct block *block = (struct block *)calloc(sizeof *block, 1); |
| 429 | unsigned int align_log2 = ffs(bo_fake->alignment) - 1; |
| 430 | unsigned int sz; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 431 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 432 | if (!block) |
| 433 | return 1; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 434 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 435 | sz = (bo->size + bo_fake->alignment - 1) & ~(bo_fake->alignment - 1); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 436 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 437 | block->mem = mmAllocMem(bufmgr_fake->heap, sz, align_log2, 0); |
| 438 | if (!block->mem) { |
| 439 | free(block); |
| 440 | return 0; |
| 441 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 442 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 443 | DRMINITLISTHEAD(block); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 444 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 445 | /* Insert at head or at tail??? */ |
| 446 | DRMLISTADDTAIL(block, &bufmgr_fake->lru); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 447 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 448 | block->virtual = (uint8_t *) bufmgr_fake->virtual + |
| 449 | block->mem->ofs - bufmgr_fake->low_offset; |
| 450 | block->bo = bo; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 451 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 452 | bo_fake->block = block; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 453 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 454 | return 1; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 455 | } |
| 456 | |
| 457 | /* Release the card storage associated with buf: |
| 458 | */ |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 459 | static void |
| 460 | free_block(drm_intel_bufmgr_fake *bufmgr_fake, struct block *block, |
| 461 | int skip_dirty_copy) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 462 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 463 | drm_intel_bo_fake *bo_fake; |
| 464 | DBG("free block %p %08x %d %d\n", block, block->mem->ofs, |
| 465 | block->on_hardware, block->fenced); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 466 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 467 | if (!block) |
| 468 | return; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 469 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 470 | bo_fake = (drm_intel_bo_fake *) block->bo; |
Eric Anholt | efa485b | 2009-02-24 21:36:56 -0800 | [diff] [blame] | 471 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 472 | if (bo_fake->flags & (BM_PINNED | BM_NO_BACKING_STORE)) |
| 473 | skip_dirty_copy = 1; |
Eric Anholt | efa485b | 2009-02-24 21:36:56 -0800 | [diff] [blame] | 474 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 475 | if (!skip_dirty_copy && (bo_fake->card_dirty == 1)) { |
| 476 | memcpy(bo_fake->backing_store, block->virtual, block->bo->size); |
| 477 | bo_fake->card_dirty = 0; |
| 478 | bo_fake->dirty = 1; |
| 479 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 480 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 481 | if (block->on_hardware) { |
| 482 | block->bo = NULL; |
| 483 | } else if (block->fenced) { |
| 484 | block->bo = NULL; |
| 485 | } else { |
| 486 | DBG(" - free immediately\n"); |
| 487 | DRMLISTDEL(block); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 488 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 489 | mmFreeMem(block->mem); |
| 490 | free(block); |
| 491 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 492 | } |
| 493 | |
| 494 | static void |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 495 | alloc_backing_store(drm_intel_bo *bo) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 496 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 497 | drm_intel_bufmgr_fake *bufmgr_fake = |
| 498 | (drm_intel_bufmgr_fake *) bo->bufmgr; |
| 499 | drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) bo; |
| 500 | assert(!bo_fake->backing_store); |
| 501 | assert(!(bo_fake->flags & (BM_PINNED | BM_NO_BACKING_STORE))); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 502 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 503 | bo_fake->backing_store = malloc(bo->size); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 504 | |
Thierry Reding | 3d7a51e | 2014-04-08 22:18:18 +0200 | [diff] [blame] | 505 | DBG("alloc_backing - buf %d %p %lu\n", bo_fake->id, |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 506 | bo_fake->backing_store, bo->size); |
| 507 | assert(bo_fake->backing_store); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 508 | } |
| 509 | |
| 510 | static void |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 511 | free_backing_store(drm_intel_bo *bo) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 512 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 513 | drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) bo; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 514 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 515 | if (bo_fake->backing_store) { |
| 516 | assert(!(bo_fake->flags & (BM_PINNED | BM_NO_BACKING_STORE))); |
| 517 | free(bo_fake->backing_store); |
| 518 | bo_fake->backing_store = NULL; |
| 519 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 520 | } |
| 521 | |
| 522 | static void |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 523 | set_dirty(drm_intel_bo *bo) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 524 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 525 | drm_intel_bufmgr_fake *bufmgr_fake = |
| 526 | (drm_intel_bufmgr_fake *) bo->bufmgr; |
| 527 | drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) bo; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 528 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 529 | if (bo_fake->flags & BM_NO_BACKING_STORE |
| 530 | && bo_fake->invalidate_cb != NULL) |
| 531 | bo_fake->invalidate_cb(bo, bo_fake->invalidate_ptr); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 532 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 533 | assert(!(bo_fake->flags & BM_PINNED)); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 534 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 535 | DBG("set_dirty - buf %d\n", bo_fake->id); |
| 536 | bo_fake->dirty = 1; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 537 | } |
| 538 | |
Eric Anholt | c485742 | 2008-06-03 10:20:49 -0700 | [diff] [blame] | 539 | static int |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 540 | evict_lru(drm_intel_bufmgr_fake *bufmgr_fake, unsigned int max_fence) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 541 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 542 | struct block *block, *tmp; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 543 | |
Emil Velikov | 41eb131 | 2015-04-05 16:50:33 +0100 | [diff] [blame] | 544 | DBG("%s\n", __func__); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 545 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 546 | DRMLISTFOREACHSAFE(block, tmp, &bufmgr_fake->lru) { |
| 547 | drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) block->bo; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 548 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 549 | if (bo_fake != NULL && (bo_fake->flags & BM_NO_FENCE_SUBDATA)) |
| 550 | continue; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 551 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 552 | if (block->fence && max_fence && !FENCE_LTE(block->fence, |
| 553 | max_fence)) |
| 554 | return 0; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 555 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 556 | set_dirty(&bo_fake->bo); |
| 557 | bo_fake->block = NULL; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 558 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 559 | free_block(bufmgr_fake, block, 0); |
| 560 | return 1; |
| 561 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 562 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 563 | return 0; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 564 | } |
| 565 | |
Eric Anholt | c485742 | 2008-06-03 10:20:49 -0700 | [diff] [blame] | 566 | static int |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 567 | evict_mru(drm_intel_bufmgr_fake *bufmgr_fake) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 568 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 569 | struct block *block, *tmp; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 570 | |
Emil Velikov | 41eb131 | 2015-04-05 16:50:33 +0100 | [diff] [blame] | 571 | DBG("%s\n", __func__); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 572 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 573 | DRMLISTFOREACHSAFEREVERSE(block, tmp, &bufmgr_fake->lru) { |
| 574 | drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) block->bo; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 575 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 576 | if (bo_fake && (bo_fake->flags & BM_NO_FENCE_SUBDATA)) |
| 577 | continue; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 578 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 579 | set_dirty(&bo_fake->bo); |
| 580 | bo_fake->block = NULL; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 581 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 582 | free_block(bufmgr_fake, block, 0); |
| 583 | return 1; |
| 584 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 585 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 586 | return 0; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 587 | } |
| 588 | |
| 589 | /** |
| 590 | * Removes all objects from the fenced list older than the given fence. |
| 591 | */ |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 592 | static int |
| 593 | clear_fenced(drm_intel_bufmgr_fake *bufmgr_fake, unsigned int fence_cookie) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 594 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 595 | struct block *block, *tmp; |
| 596 | int ret = 0; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 597 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 598 | bufmgr_fake->last_fence = fence_cookie; |
| 599 | DRMLISTFOREACHSAFE(block, tmp, &bufmgr_fake->fenced) { |
| 600 | assert(block->fenced); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 601 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 602 | if (_fence_test(bufmgr_fake, block->fence)) { |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 603 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 604 | block->fenced = 0; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 605 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 606 | if (!block->bo) { |
| 607 | DBG("delayed free: offset %x sz %x\n", |
| 608 | block->mem->ofs, block->mem->size); |
| 609 | DRMLISTDEL(block); |
| 610 | mmFreeMem(block->mem); |
| 611 | free(block); |
| 612 | } else { |
| 613 | DBG("return to lru: offset %x sz %x\n", |
| 614 | block->mem->ofs, block->mem->size); |
| 615 | DRMLISTDEL(block); |
| 616 | DRMLISTADDTAIL(block, &bufmgr_fake->lru); |
| 617 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 618 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 619 | ret = 1; |
| 620 | } else { |
| 621 | /* Blocks are ordered by fence, so if one fails, all |
| 622 | * from here will fail also: |
| 623 | */ |
| 624 | DBG("fence not passed: offset %x sz %x %d %d \n", |
| 625 | block->mem->ofs, block->mem->size, block->fence, |
| 626 | bufmgr_fake->last_fence); |
| 627 | break; |
| 628 | } |
| 629 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 630 | |
Emil Velikov | 41eb131 | 2015-04-05 16:50:33 +0100 | [diff] [blame] | 631 | DBG("%s: %d\n", __func__, ret); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 632 | return ret; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 633 | } |
| 634 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 635 | static void |
| 636 | fence_blocks(drm_intel_bufmgr_fake *bufmgr_fake, unsigned fence) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 637 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 638 | struct block *block, *tmp; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 639 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 640 | DRMLISTFOREACHSAFE(block, tmp, &bufmgr_fake->on_hardware) { |
| 641 | DBG("Fence block %p (sz 0x%x ofs %x buf %p) with fence %d\n", |
| 642 | block, block->mem->size, block->mem->ofs, block->bo, fence); |
| 643 | block->fence = fence; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 644 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 645 | block->on_hardware = 0; |
| 646 | block->fenced = 1; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 647 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 648 | /* Move to tail of pending list here |
| 649 | */ |
| 650 | DRMLISTDEL(block); |
| 651 | DRMLISTADDTAIL(block, &bufmgr_fake->fenced); |
| 652 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 653 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 654 | assert(DRMLISTEMPTY(&bufmgr_fake->on_hardware)); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 655 | } |
| 656 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 657 | static int |
| 658 | evict_and_alloc_block(drm_intel_bo *bo) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 659 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 660 | drm_intel_bufmgr_fake *bufmgr_fake = |
| 661 | (drm_intel_bufmgr_fake *) bo->bufmgr; |
| 662 | drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) bo; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 663 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 664 | assert(bo_fake->block == NULL); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 665 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 666 | /* Search for already free memory: |
| 667 | */ |
| 668 | if (alloc_block(bo)) |
| 669 | return 1; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 670 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 671 | /* If we're not thrashing, allow lru eviction to dig deeper into |
| 672 | * recently used textures. We'll probably be thrashing soon: |
| 673 | */ |
| 674 | if (!bufmgr_fake->thrashing) { |
| 675 | while (evict_lru(bufmgr_fake, 0)) |
| 676 | if (alloc_block(bo)) |
| 677 | return 1; |
| 678 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 679 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 680 | /* Keep thrashing counter alive? |
| 681 | */ |
| 682 | if (bufmgr_fake->thrashing) |
| 683 | bufmgr_fake->thrashing = 20; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 684 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 685 | /* Wait on any already pending fences - here we are waiting for any |
| 686 | * freed memory that has been submitted to hardware and fenced to |
| 687 | * become available: |
| 688 | */ |
| 689 | while (!DRMLISTEMPTY(&bufmgr_fake->fenced)) { |
| 690 | uint32_t fence = bufmgr_fake->fenced.next->fence; |
| 691 | _fence_wait_internal(bufmgr_fake, fence); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 692 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 693 | if (alloc_block(bo)) |
| 694 | return 1; |
| 695 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 696 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 697 | if (!DRMLISTEMPTY(&bufmgr_fake->on_hardware)) { |
| 698 | while (!DRMLISTEMPTY(&bufmgr_fake->fenced)) { |
| 699 | uint32_t fence = bufmgr_fake->fenced.next->fence; |
| 700 | _fence_wait_internal(bufmgr_fake, fence); |
| 701 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 702 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 703 | if (!bufmgr_fake->thrashing) { |
| 704 | DBG("thrashing\n"); |
| 705 | } |
| 706 | bufmgr_fake->thrashing = 20; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 707 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 708 | if (alloc_block(bo)) |
| 709 | return 1; |
| 710 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 711 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 712 | while (evict_mru(bufmgr_fake)) |
| 713 | if (alloc_block(bo)) |
| 714 | return 1; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 715 | |
Emil Velikov | 41eb131 | 2015-04-05 16:50:33 +0100 | [diff] [blame] | 716 | DBG("%s 0x%lx bytes failed\n", __func__, bo->size); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 717 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 718 | return 0; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 719 | } |
| 720 | |
| 721 | /*********************************************************************** |
| 722 | * Public functions |
| 723 | */ |
| 724 | |
| 725 | /** |
| 726 | * Wait for hardware idle by emitting a fence and waiting for it. |
| 727 | */ |
| 728 | static void |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 729 | drm_intel_bufmgr_fake_wait_idle(drm_intel_bufmgr_fake *bufmgr_fake) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 730 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 731 | unsigned int cookie; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 732 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 733 | cookie = _fence_emit_internal(bufmgr_fake); |
| 734 | _fence_wait_internal(bufmgr_fake, cookie); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 735 | } |
| 736 | |
| 737 | /** |
| 738 | * Wait for rendering to a buffer to complete. |
| 739 | * |
Grazvydas Ignotas | 1924b67 | 2016-11-20 20:25:46 +0200 | [diff] [blame] | 740 | * It is assumed that the batchbuffer which performed the rendering included |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 741 | * the necessary flushing. |
| 742 | */ |
| 743 | static void |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 744 | drm_intel_fake_bo_wait_rendering_locked(drm_intel_bo *bo) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 745 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 746 | drm_intel_bufmgr_fake *bufmgr_fake = |
| 747 | (drm_intel_bufmgr_fake *) bo->bufmgr; |
| 748 | drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) bo; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 749 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 750 | if (bo_fake->block == NULL || !bo_fake->block->fenced) |
| 751 | return; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 752 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 753 | _fence_wait_internal(bufmgr_fake, bo_fake->block->fence); |
Eric Anholt | 3e03d78 | 2008-10-13 13:41:10 -0700 | [diff] [blame] | 754 | } |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 755 | |
Eric Anholt | 3e03d78 | 2008-10-13 13:41:10 -0700 | [diff] [blame] | 756 | static void |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 757 | drm_intel_fake_bo_wait_rendering(drm_intel_bo *bo) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 758 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 759 | drm_intel_bufmgr_fake *bufmgr_fake = |
| 760 | (drm_intel_bufmgr_fake *) bo->bufmgr; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 761 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 762 | pthread_mutex_lock(&bufmgr_fake->lock); |
| 763 | drm_intel_fake_bo_wait_rendering_locked(bo); |
| 764 | pthread_mutex_unlock(&bufmgr_fake->lock); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 765 | } |
| 766 | |
| 767 | /* Specifically ignore texture memory sharing. |
| 768 | * -- just evict everything |
| 769 | * -- and wait for idle |
| 770 | */ |
Emil Velikov | 0f8da82 | 2015-03-31 22:32:11 +0100 | [diff] [blame] | 771 | void |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 772 | drm_intel_bufmgr_fake_contended_lock_take(drm_intel_bufmgr *bufmgr) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 773 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 774 | drm_intel_bufmgr_fake *bufmgr_fake = (drm_intel_bufmgr_fake *) bufmgr; |
| 775 | struct block *block, *tmp; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 776 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 777 | pthread_mutex_lock(&bufmgr_fake->lock); |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 778 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 779 | bufmgr_fake->need_fence = 1; |
| 780 | bufmgr_fake->fail = 0; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 781 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 782 | /* Wait for hardware idle. We don't know where acceleration has been |
| 783 | * happening, so we'll need to wait anyway before letting anything get |
| 784 | * put on the card again. |
| 785 | */ |
| 786 | drm_intel_bufmgr_fake_wait_idle(bufmgr_fake); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 787 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 788 | /* Check that we hadn't released the lock without having fenced the last |
| 789 | * set of buffers. |
| 790 | */ |
| 791 | assert(DRMLISTEMPTY(&bufmgr_fake->fenced)); |
| 792 | assert(DRMLISTEMPTY(&bufmgr_fake->on_hardware)); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 793 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 794 | DRMLISTFOREACHSAFE(block, tmp, &bufmgr_fake->lru) { |
| 795 | assert(_fence_test(bufmgr_fake, block->fence)); |
| 796 | set_dirty(block->bo); |
| 797 | } |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 798 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 799 | pthread_mutex_unlock(&bufmgr_fake->lock); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 800 | } |
| 801 | |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 802 | static drm_intel_bo * |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 803 | drm_intel_fake_bo_alloc(drm_intel_bufmgr *bufmgr, |
| 804 | const char *name, |
| 805 | unsigned long size, |
| 806 | unsigned int alignment) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 807 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 808 | drm_intel_bufmgr_fake *bufmgr_fake; |
| 809 | drm_intel_bo_fake *bo_fake; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 810 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 811 | bufmgr_fake = (drm_intel_bufmgr_fake *) bufmgr; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 812 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 813 | assert(size != 0); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 814 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 815 | bo_fake = calloc(1, sizeof(*bo_fake)); |
| 816 | if (!bo_fake) |
| 817 | return NULL; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 818 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 819 | bo_fake->bo.size = size; |
| 820 | bo_fake->bo.offset = -1; |
| 821 | bo_fake->bo.virtual = NULL; |
| 822 | bo_fake->bo.bufmgr = bufmgr; |
| 823 | bo_fake->refcount = 1; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 824 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 825 | /* Alignment must be a power of two */ |
| 826 | assert((alignment & (alignment - 1)) == 0); |
| 827 | if (alignment == 0) |
| 828 | alignment = 1; |
| 829 | bo_fake->alignment = alignment; |
| 830 | bo_fake->id = ++bufmgr_fake->buf_nr; |
| 831 | bo_fake->name = name; |
| 832 | bo_fake->flags = 0; |
| 833 | bo_fake->is_static = 0; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 834 | |
Thierry Reding | 3d7a51e | 2014-04-08 22:18:18 +0200 | [diff] [blame] | 835 | DBG("drm_bo_alloc: (buf %d: %s, %lu kb)\n", bo_fake->id, bo_fake->name, |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 836 | bo_fake->bo.size / 1024); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 837 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 838 | return &bo_fake->bo; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 839 | } |
| 840 | |
Jesse Barnes | 3a7dfcd | 2009-10-06 14:34:06 -0700 | [diff] [blame] | 841 | static drm_intel_bo * |
| 842 | drm_intel_fake_bo_alloc_tiled(drm_intel_bufmgr * bufmgr, |
| 843 | const char *name, |
| 844 | int x, int y, int cpp, |
| 845 | uint32_t *tiling_mode, |
| 846 | unsigned long *pitch, |
| 847 | unsigned long flags) |
| 848 | { |
| 849 | unsigned long stride, aligned_y; |
| 850 | |
| 851 | /* No runtime tiling support for fake. */ |
| 852 | *tiling_mode = I915_TILING_NONE; |
| 853 | |
| 854 | /* Align it for being a render target. Shouldn't need anything else. */ |
| 855 | stride = x * cpp; |
| 856 | stride = ROUND_UP_TO(stride, 64); |
| 857 | |
| 858 | /* 965 subspan loading alignment */ |
| 859 | aligned_y = ALIGN(y, 2); |
| 860 | |
| 861 | *pitch = stride; |
| 862 | |
| 863 | return drm_intel_fake_bo_alloc(bufmgr, name, stride * aligned_y, |
| 864 | 4096); |
| 865 | } |
| 866 | |
Emil Velikov | 0f8da82 | 2015-03-31 22:32:11 +0100 | [diff] [blame] | 867 | drm_intel_bo * |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 868 | drm_intel_bo_fake_alloc_static(drm_intel_bufmgr *bufmgr, |
| 869 | const char *name, |
| 870 | unsigned long offset, |
| 871 | unsigned long size, void *virtual) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 872 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 873 | drm_intel_bufmgr_fake *bufmgr_fake; |
| 874 | drm_intel_bo_fake *bo_fake; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 875 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 876 | bufmgr_fake = (drm_intel_bufmgr_fake *) bufmgr; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 877 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 878 | assert(size != 0); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 879 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 880 | bo_fake = calloc(1, sizeof(*bo_fake)); |
| 881 | if (!bo_fake) |
| 882 | return NULL; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 883 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 884 | bo_fake->bo.size = size; |
| 885 | bo_fake->bo.offset = offset; |
| 886 | bo_fake->bo.virtual = virtual; |
| 887 | bo_fake->bo.bufmgr = bufmgr; |
| 888 | bo_fake->refcount = 1; |
| 889 | bo_fake->id = ++bufmgr_fake->buf_nr; |
| 890 | bo_fake->name = name; |
| 891 | bo_fake->flags = BM_PINNED; |
| 892 | bo_fake->is_static = 1; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 893 | |
Thierry Reding | 3d7a51e | 2014-04-08 22:18:18 +0200 | [diff] [blame] | 894 | DBG("drm_bo_alloc_static: (buf %d: %s, %lu kb)\n", bo_fake->id, |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 895 | bo_fake->name, bo_fake->bo.size / 1024); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 896 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 897 | return &bo_fake->bo; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 898 | } |
| 899 | |
| 900 | static void |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 901 | drm_intel_fake_bo_reference(drm_intel_bo *bo) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 902 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 903 | drm_intel_bufmgr_fake *bufmgr_fake = |
| 904 | (drm_intel_bufmgr_fake *) bo->bufmgr; |
| 905 | drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) bo; |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 906 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 907 | pthread_mutex_lock(&bufmgr_fake->lock); |
| 908 | bo_fake->refcount++; |
| 909 | pthread_mutex_unlock(&bufmgr_fake->lock); |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 910 | } |
| 911 | |
| 912 | static void |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 913 | drm_intel_fake_bo_reference_locked(drm_intel_bo *bo) |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 914 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 915 | drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) bo; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 916 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 917 | bo_fake->refcount++; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 918 | } |
| 919 | |
| 920 | static void |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 921 | drm_intel_fake_bo_unreference_locked(drm_intel_bo *bo) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 922 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 923 | drm_intel_bufmgr_fake *bufmgr_fake = |
| 924 | (drm_intel_bufmgr_fake *) bo->bufmgr; |
| 925 | drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) bo; |
| 926 | int i; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 927 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 928 | if (--bo_fake->refcount == 0) { |
| 929 | assert(bo_fake->map_count == 0); |
| 930 | /* No remaining references, so free it */ |
| 931 | if (bo_fake->block) |
| 932 | free_block(bufmgr_fake, bo_fake->block, 1); |
| 933 | free_backing_store(bo); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 934 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 935 | for (i = 0; i < bo_fake->nr_relocs; i++) |
| 936 | drm_intel_fake_bo_unreference_locked(bo_fake->relocs[i]. |
| 937 | target_buf); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 938 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 939 | DBG("drm_bo_unreference: free buf %d %s\n", bo_fake->id, |
| 940 | bo_fake->name); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 941 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 942 | free(bo_fake->relocs); |
| 943 | free(bo); |
| 944 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 945 | } |
| 946 | |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 947 | static void |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 948 | drm_intel_fake_bo_unreference(drm_intel_bo *bo) |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 949 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 950 | drm_intel_bufmgr_fake *bufmgr_fake = |
| 951 | (drm_intel_bufmgr_fake *) bo->bufmgr; |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 952 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 953 | pthread_mutex_lock(&bufmgr_fake->lock); |
| 954 | drm_intel_fake_bo_unreference_locked(bo); |
| 955 | pthread_mutex_unlock(&bufmgr_fake->lock); |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 956 | } |
| 957 | |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 958 | /** |
| 959 | * Set the buffer as not requiring backing store, and instead get the callback |
| 960 | * invoked whenever it would be set dirty. |
| 961 | */ |
Emil Velikov | 0f8da82 | 2015-03-31 22:32:11 +0100 | [diff] [blame] | 962 | void |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 963 | drm_intel_bo_fake_disable_backing_store(drm_intel_bo *bo, |
| 964 | void (*invalidate_cb) (drm_intel_bo *bo, |
| 965 | void *ptr), |
| 966 | void *ptr) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 967 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 968 | drm_intel_bufmgr_fake *bufmgr_fake = |
| 969 | (drm_intel_bufmgr_fake *) bo->bufmgr; |
| 970 | drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) bo; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 971 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 972 | pthread_mutex_lock(&bufmgr_fake->lock); |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 973 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 974 | if (bo_fake->backing_store) |
| 975 | free_backing_store(bo); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 976 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 977 | bo_fake->flags |= BM_NO_BACKING_STORE; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 978 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 979 | DBG("disable_backing_store set buf %d dirty\n", bo_fake->id); |
| 980 | bo_fake->dirty = 1; |
| 981 | bo_fake->invalidate_cb = invalidate_cb; |
| 982 | bo_fake->invalidate_ptr = ptr; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 983 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 984 | /* Note that it is invalid right from the start. Also note |
| 985 | * invalidate_cb is called with the bufmgr locked, so cannot |
| 986 | * itself make bufmgr calls. |
| 987 | */ |
| 988 | if (invalidate_cb != NULL) |
| 989 | invalidate_cb(bo, ptr); |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 990 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 991 | pthread_mutex_unlock(&bufmgr_fake->lock); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 992 | } |
| 993 | |
| 994 | /** |
| 995 | * Map a buffer into bo->virtual, allocating either card memory space (If |
| 996 | * BM_NO_BACKING_STORE or BM_PINNED) or backing store, as necessary. |
| 997 | */ |
| 998 | static int |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 999 | drm_intel_fake_bo_map_locked(drm_intel_bo *bo, int write_enable) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1000 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1001 | drm_intel_bufmgr_fake *bufmgr_fake = |
| 1002 | (drm_intel_bufmgr_fake *) bo->bufmgr; |
| 1003 | drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) bo; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1004 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1005 | /* Static buffers are always mapped. */ |
| 1006 | if (bo_fake->is_static) { |
| 1007 | if (bo_fake->card_dirty) { |
| 1008 | drm_intel_bufmgr_fake_wait_idle(bufmgr_fake); |
| 1009 | bo_fake->card_dirty = 0; |
| 1010 | } |
| 1011 | return 0; |
| 1012 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1013 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1014 | /* Allow recursive mapping. Mesa may recursively map buffers with |
| 1015 | * nested display loops, and it is used internally in bufmgr_fake |
| 1016 | * for relocation. |
| 1017 | */ |
| 1018 | if (bo_fake->map_count++ != 0) |
| 1019 | return 0; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1020 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1021 | { |
Thierry Reding | 3d7a51e | 2014-04-08 22:18:18 +0200 | [diff] [blame] | 1022 | DBG("drm_bo_map: (buf %d: %s, %lu kb)\n", bo_fake->id, |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1023 | bo_fake->name, bo_fake->bo.size / 1024); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1024 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1025 | if (bo->virtual != NULL) { |
Emil Velikov | 41eb131 | 2015-04-05 16:50:33 +0100 | [diff] [blame] | 1026 | drmMsg("%s: already mapped\n", __func__); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1027 | abort(); |
| 1028 | } else if (bo_fake->flags & (BM_NO_BACKING_STORE | BM_PINNED)) { |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1029 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1030 | if (!bo_fake->block && !evict_and_alloc_block(bo)) { |
Emil Velikov | 41eb131 | 2015-04-05 16:50:33 +0100 | [diff] [blame] | 1031 | DBG("%s: alloc failed\n", __func__); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1032 | bufmgr_fake->fail = 1; |
| 1033 | return 1; |
| 1034 | } else { |
| 1035 | assert(bo_fake->block); |
| 1036 | bo_fake->dirty = 0; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1037 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1038 | if (!(bo_fake->flags & BM_NO_FENCE_SUBDATA) && |
| 1039 | bo_fake->block->fenced) { |
| 1040 | drm_intel_fake_bo_wait_rendering_locked |
| 1041 | (bo); |
| 1042 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1043 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1044 | bo->virtual = bo_fake->block->virtual; |
| 1045 | } |
| 1046 | } else { |
| 1047 | if (write_enable) |
| 1048 | set_dirty(bo); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1049 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1050 | if (bo_fake->backing_store == 0) |
| 1051 | alloc_backing_store(bo); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1052 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1053 | if ((bo_fake->card_dirty == 1) && bo_fake->block) { |
| 1054 | if (bo_fake->block->fenced) |
| 1055 | drm_intel_fake_bo_wait_rendering_locked |
| 1056 | (bo); |
Xiang, Haihao | 604759d | 2008-10-09 11:57:13 +0800 | [diff] [blame] | 1057 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1058 | memcpy(bo_fake->backing_store, |
| 1059 | bo_fake->block->virtual, |
| 1060 | bo_fake->block->bo->size); |
| 1061 | bo_fake->card_dirty = 0; |
| 1062 | } |
Xiang, Haihao | 073cb5e | 2008-09-27 11:01:24 +0800 | [diff] [blame] | 1063 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1064 | bo->virtual = bo_fake->backing_store; |
| 1065 | } |
| 1066 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1067 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1068 | return 0; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1069 | } |
| 1070 | |
| 1071 | static int |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1072 | drm_intel_fake_bo_map(drm_intel_bo *bo, int write_enable) |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 1073 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1074 | drm_intel_bufmgr_fake *bufmgr_fake = |
| 1075 | (drm_intel_bufmgr_fake *) bo->bufmgr; |
| 1076 | int ret; |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 1077 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1078 | pthread_mutex_lock(&bufmgr_fake->lock); |
| 1079 | ret = drm_intel_fake_bo_map_locked(bo, write_enable); |
| 1080 | pthread_mutex_unlock(&bufmgr_fake->lock); |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 1081 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1082 | return ret; |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 1083 | } |
| 1084 | |
| 1085 | static int |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1086 | drm_intel_fake_bo_unmap_locked(drm_intel_bo *bo) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1087 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1088 | drm_intel_bufmgr_fake *bufmgr_fake = |
| 1089 | (drm_intel_bufmgr_fake *) bo->bufmgr; |
| 1090 | drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) bo; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1091 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1092 | /* Static buffers are always mapped. */ |
| 1093 | if (bo_fake->is_static) |
| 1094 | return 0; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1095 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1096 | assert(bo_fake->map_count != 0); |
| 1097 | if (--bo_fake->map_count != 0) |
| 1098 | return 0; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1099 | |
Thierry Reding | 3d7a51e | 2014-04-08 22:18:18 +0200 | [diff] [blame] | 1100 | DBG("drm_bo_unmap: (buf %d: %s, %lu kb)\n", bo_fake->id, bo_fake->name, |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1101 | bo_fake->bo.size / 1024); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1102 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1103 | bo->virtual = NULL; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1104 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1105 | return 0; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1106 | } |
| 1107 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1108 | static int drm_intel_fake_bo_unmap(drm_intel_bo *bo) |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 1109 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1110 | drm_intel_bufmgr_fake *bufmgr_fake = |
| 1111 | (drm_intel_bufmgr_fake *) bo->bufmgr; |
| 1112 | int ret; |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 1113 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1114 | pthread_mutex_lock(&bufmgr_fake->lock); |
| 1115 | ret = drm_intel_fake_bo_unmap_locked(bo); |
| 1116 | pthread_mutex_unlock(&bufmgr_fake->lock); |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 1117 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1118 | return ret; |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 1119 | } |
| 1120 | |
Eric Anholt | f45305c | 2010-11-01 06:54:58 -0700 | [diff] [blame] | 1121 | static int |
| 1122 | drm_intel_fake_bo_subdata(drm_intel_bo *bo, unsigned long offset, |
| 1123 | unsigned long size, const void *data) |
| 1124 | { |
| 1125 | int ret; |
| 1126 | |
| 1127 | if (size == 0 || data == NULL) |
| 1128 | return 0; |
| 1129 | |
| 1130 | ret = drm_intel_bo_map(bo, 1); |
| 1131 | if (ret) |
| 1132 | return ret; |
| 1133 | memcpy((unsigned char *)bo->virtual + offset, data, size); |
| 1134 | drm_intel_bo_unmap(bo); |
| 1135 | return 0; |
| 1136 | } |
| 1137 | |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1138 | static void |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1139 | drm_intel_fake_kick_all_locked(drm_intel_bufmgr_fake *bufmgr_fake) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1140 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1141 | struct block *block, *tmp; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1142 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1143 | bufmgr_fake->performed_rendering = 0; |
| 1144 | /* okay for ever BO that is on the HW kick it off. |
| 1145 | seriously not afraid of the POLICE right now */ |
| 1146 | DRMLISTFOREACHSAFE(block, tmp, &bufmgr_fake->on_hardware) { |
| 1147 | drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) block->bo; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1148 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1149 | block->on_hardware = 0; |
| 1150 | free_block(bufmgr_fake, block, 0); |
| 1151 | bo_fake->block = NULL; |
| 1152 | bo_fake->validated = 0; |
| 1153 | if (!(bo_fake->flags & BM_NO_BACKING_STORE)) |
| 1154 | bo_fake->dirty = 1; |
| 1155 | } |
Jesse Barnes | 9583c09 | 2008-12-10 15:47:28 -0800 | [diff] [blame] | 1156 | |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1157 | } |
| 1158 | |
| 1159 | static int |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1160 | drm_intel_fake_bo_validate(drm_intel_bo *bo) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1161 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1162 | drm_intel_bufmgr_fake *bufmgr_fake; |
| 1163 | drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) bo; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1164 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1165 | bufmgr_fake = (drm_intel_bufmgr_fake *) bo->bufmgr; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1166 | |
Thierry Reding | 3d7a51e | 2014-04-08 22:18:18 +0200 | [diff] [blame] | 1167 | DBG("drm_bo_validate: (buf %d: %s, %lu kb)\n", bo_fake->id, |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1168 | bo_fake->name, bo_fake->bo.size / 1024); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1169 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1170 | /* Sanity check: Buffers should be unmapped before being validated. |
| 1171 | * This is not so much of a problem for bufmgr_fake, but TTM refuses, |
| 1172 | * and the problem is harder to debug there. |
| 1173 | */ |
| 1174 | assert(bo_fake->map_count == 0); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1175 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1176 | if (bo_fake->is_static) { |
| 1177 | /* Add it to the needs-fence list */ |
| 1178 | bufmgr_fake->need_fence = 1; |
| 1179 | return 0; |
| 1180 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1181 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1182 | /* Allocate the card memory */ |
| 1183 | if (!bo_fake->block && !evict_and_alloc_block(bo)) { |
| 1184 | bufmgr_fake->fail = 1; |
| 1185 | DBG("Failed to validate buf %d:%s\n", bo_fake->id, |
| 1186 | bo_fake->name); |
| 1187 | return -1; |
| 1188 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1189 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1190 | assert(bo_fake->block); |
| 1191 | assert(bo_fake->block->bo == &bo_fake->bo); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1192 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1193 | bo->offset = bo_fake->block->mem->ofs; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1194 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1195 | /* Upload the buffer contents if necessary */ |
| 1196 | if (bo_fake->dirty) { |
Thierry Reding | 3d7a51e | 2014-04-08 22:18:18 +0200 | [diff] [blame] | 1197 | DBG("Upload dirty buf %d:%s, sz %lu offset 0x%x\n", bo_fake->id, |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1198 | bo_fake->name, bo->size, bo_fake->block->mem->ofs); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1199 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1200 | assert(!(bo_fake->flags & (BM_NO_BACKING_STORE | BM_PINNED))); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1201 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1202 | /* Actually, should be able to just wait for a fence on the |
Grazvydas Ignotas | 1924b67 | 2016-11-20 20:25:46 +0200 | [diff] [blame] | 1203 | * memory, which we would be tracking when we free it. Waiting |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1204 | * for idle is a sufficiently large hammer for now. |
| 1205 | */ |
| 1206 | drm_intel_bufmgr_fake_wait_idle(bufmgr_fake); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1207 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1208 | /* we may never have mapped this BO so it might not have any |
| 1209 | * backing store if this happens it should be rare, but 0 the |
| 1210 | * card memory in any case */ |
| 1211 | if (bo_fake->backing_store) |
| 1212 | memcpy(bo_fake->block->virtual, bo_fake->backing_store, |
| 1213 | bo->size); |
| 1214 | else |
| 1215 | memset(bo_fake->block->virtual, 0, bo->size); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1216 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1217 | bo_fake->dirty = 0; |
| 1218 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1219 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1220 | bo_fake->block->fenced = 0; |
| 1221 | bo_fake->block->on_hardware = 1; |
| 1222 | DRMLISTDEL(bo_fake->block); |
| 1223 | DRMLISTADDTAIL(bo_fake->block, &bufmgr_fake->on_hardware); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1224 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1225 | bo_fake->validated = 1; |
| 1226 | bufmgr_fake->need_fence = 1; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1227 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1228 | return 0; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1229 | } |
| 1230 | |
| 1231 | static void |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 1232 | drm_intel_fake_fence_validated(drm_intel_bufmgr *bufmgr) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1233 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1234 | drm_intel_bufmgr_fake *bufmgr_fake = (drm_intel_bufmgr_fake *) bufmgr; |
| 1235 | unsigned int cookie; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1236 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1237 | cookie = _fence_emit_internal(bufmgr_fake); |
| 1238 | fence_blocks(bufmgr_fake, cookie); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1239 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1240 | DBG("drm_fence_validated: 0x%08x cookie\n", cookie); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1241 | } |
| 1242 | |
| 1243 | static void |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 1244 | drm_intel_fake_destroy(drm_intel_bufmgr *bufmgr) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1245 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1246 | drm_intel_bufmgr_fake *bufmgr_fake = (drm_intel_bufmgr_fake *) bufmgr; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1247 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1248 | pthread_mutex_destroy(&bufmgr_fake->lock); |
| 1249 | mmDestroy(bufmgr_fake->heap); |
| 1250 | free(bufmgr); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1251 | } |
| 1252 | |
| 1253 | static int |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 1254 | drm_intel_fake_emit_reloc(drm_intel_bo *bo, uint32_t offset, |
| 1255 | drm_intel_bo *target_bo, uint32_t target_offset, |
| 1256 | uint32_t read_domains, uint32_t write_domain) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1257 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1258 | drm_intel_bufmgr_fake *bufmgr_fake = |
| 1259 | (drm_intel_bufmgr_fake *) bo->bufmgr; |
| 1260 | struct fake_buffer_reloc *r; |
| 1261 | drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) bo; |
| 1262 | drm_intel_bo_fake *target_fake = (drm_intel_bo_fake *) target_bo; |
| 1263 | int i; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1264 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1265 | pthread_mutex_lock(&bufmgr_fake->lock); |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 1266 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1267 | assert(bo); |
| 1268 | assert(target_bo); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1269 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1270 | if (bo_fake->relocs == NULL) { |
| 1271 | bo_fake->relocs = |
| 1272 | malloc(sizeof(struct fake_buffer_reloc) * MAX_RELOCS); |
| 1273 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1274 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1275 | r = &bo_fake->relocs[bo_fake->nr_relocs++]; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1276 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1277 | assert(bo_fake->nr_relocs <= MAX_RELOCS); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1278 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1279 | drm_intel_fake_bo_reference_locked(target_bo); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1280 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1281 | if (!target_fake->is_static) { |
| 1282 | bo_fake->child_size += |
| 1283 | ALIGN(target_bo->size, target_fake->alignment); |
| 1284 | bo_fake->child_size += target_fake->child_size; |
| 1285 | } |
| 1286 | r->target_buf = target_bo; |
| 1287 | r->offset = offset; |
| 1288 | r->last_target_offset = target_bo->offset; |
| 1289 | r->delta = target_offset; |
| 1290 | r->read_domains = read_domains; |
| 1291 | r->write_domain = write_domain; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1292 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1293 | if (bufmgr_fake->debug) { |
| 1294 | /* Check that a conflicting relocation hasn't already been |
| 1295 | * emitted. |
| 1296 | */ |
| 1297 | for (i = 0; i < bo_fake->nr_relocs - 1; i++) { |
| 1298 | struct fake_buffer_reloc *r2 = &bo_fake->relocs[i]; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1299 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1300 | assert(r->offset != r2->offset); |
| 1301 | } |
| 1302 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1303 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1304 | pthread_mutex_unlock(&bufmgr_fake->lock); |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 1305 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1306 | return 0; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1307 | } |
| 1308 | |
| 1309 | /** |
| 1310 | * Incorporates the validation flags associated with each relocation into |
| 1311 | * the combined validation flags for the buffer on this batchbuffer submission. |
| 1312 | */ |
| 1313 | static void |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 1314 | drm_intel_fake_calculate_domains(drm_intel_bo *bo) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1315 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1316 | drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) bo; |
| 1317 | int i; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1318 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1319 | for (i = 0; i < bo_fake->nr_relocs; i++) { |
| 1320 | struct fake_buffer_reloc *r = &bo_fake->relocs[i]; |
| 1321 | drm_intel_bo_fake *target_fake = |
| 1322 | (drm_intel_bo_fake *) r->target_buf; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1323 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1324 | /* Do the same for the tree of buffers we depend on */ |
| 1325 | drm_intel_fake_calculate_domains(r->target_buf); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1326 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1327 | target_fake->read_domains |= r->read_domains; |
| 1328 | target_fake->write_domain |= r->write_domain; |
| 1329 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1330 | } |
| 1331 | |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1332 | static int |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 1333 | drm_intel_fake_reloc_and_validate_buffer(drm_intel_bo *bo) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1334 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1335 | drm_intel_bufmgr_fake *bufmgr_fake = |
| 1336 | (drm_intel_bufmgr_fake *) bo->bufmgr; |
| 1337 | drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) bo; |
| 1338 | int i, ret; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1339 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1340 | assert(bo_fake->map_count == 0); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1341 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1342 | for (i = 0; i < bo_fake->nr_relocs; i++) { |
| 1343 | struct fake_buffer_reloc *r = &bo_fake->relocs[i]; |
| 1344 | drm_intel_bo_fake *target_fake = |
| 1345 | (drm_intel_bo_fake *) r->target_buf; |
| 1346 | uint32_t reloc_data; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1347 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1348 | /* Validate the target buffer if that hasn't been done. */ |
| 1349 | if (!target_fake->validated) { |
| 1350 | ret = |
| 1351 | drm_intel_fake_reloc_and_validate_buffer(r->target_buf); |
| 1352 | if (ret != 0) { |
| 1353 | if (bo->virtual != NULL) |
| 1354 | drm_intel_fake_bo_unmap_locked(bo); |
| 1355 | return ret; |
| 1356 | } |
| 1357 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1358 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1359 | /* Calculate the value of the relocation entry. */ |
| 1360 | if (r->target_buf->offset != r->last_target_offset) { |
| 1361 | reloc_data = r->target_buf->offset + r->delta; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1362 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1363 | if (bo->virtual == NULL) |
| 1364 | drm_intel_fake_bo_map_locked(bo, 1); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1365 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1366 | *(uint32_t *) ((uint8_t *) bo->virtual + r->offset) = |
| 1367 | reloc_data; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1368 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1369 | r->last_target_offset = r->target_buf->offset; |
| 1370 | } |
| 1371 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1372 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1373 | if (bo->virtual != NULL) |
| 1374 | drm_intel_fake_bo_unmap_locked(bo); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1375 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1376 | if (bo_fake->write_domain != 0) { |
| 1377 | if (!(bo_fake->flags & (BM_NO_BACKING_STORE | BM_PINNED))) { |
| 1378 | if (bo_fake->backing_store == 0) |
| 1379 | alloc_backing_store(bo); |
| 1380 | } |
| 1381 | bo_fake->card_dirty = 1; |
| 1382 | bufmgr_fake->performed_rendering = 1; |
| 1383 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1384 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1385 | return drm_intel_fake_bo_validate(bo); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1386 | } |
| 1387 | |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1388 | static void |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 1389 | drm_intel_bo_fake_post_submit(drm_intel_bo *bo) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1390 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1391 | drm_intel_bufmgr_fake *bufmgr_fake = |
| 1392 | (drm_intel_bufmgr_fake *) bo->bufmgr; |
| 1393 | drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) bo; |
| 1394 | int i; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1395 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1396 | for (i = 0; i < bo_fake->nr_relocs; i++) { |
| 1397 | struct fake_buffer_reloc *r = &bo_fake->relocs[i]; |
| 1398 | drm_intel_bo_fake *target_fake = |
| 1399 | (drm_intel_bo_fake *) r->target_buf; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1400 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1401 | if (target_fake->validated) |
| 1402 | drm_intel_bo_fake_post_submit(r->target_buf); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1403 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1404 | DBG("%s@0x%08x + 0x%08x -> %s@0x%08x + 0x%08x\n", |
| 1405 | bo_fake->name, (uint32_t) bo->offset, r->offset, |
| 1406 | target_fake->name, (uint32_t) r->target_buf->offset, |
| 1407 | r->delta); |
| 1408 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1409 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1410 | assert(bo_fake->map_count == 0); |
| 1411 | bo_fake->validated = 0; |
| 1412 | bo_fake->read_domains = 0; |
| 1413 | bo_fake->write_domain = 0; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1414 | } |
| 1415 | |
Emil Velikov | 0f8da82 | 2015-03-31 22:32:11 +0100 | [diff] [blame] | 1416 | void |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1417 | drm_intel_bufmgr_fake_set_exec_callback(drm_intel_bufmgr *bufmgr, |
| 1418 | int (*exec) (drm_intel_bo *bo, |
| 1419 | unsigned int used, |
| 1420 | void *priv), |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 1421 | void *priv) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1422 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1423 | drm_intel_bufmgr_fake *bufmgr_fake = (drm_intel_bufmgr_fake *) bufmgr; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1424 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1425 | bufmgr_fake->exec = exec; |
| 1426 | bufmgr_fake->exec_priv = priv; |
Eric Anholt | f9d98be | 2008-09-08 08:51:40 -0700 | [diff] [blame] | 1427 | } |
| 1428 | |
| 1429 | static int |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 1430 | drm_intel_fake_bo_exec(drm_intel_bo *bo, int used, |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1431 | drm_clip_rect_t * cliprects, int num_cliprects, int DR4) |
Eric Anholt | f9d98be | 2008-09-08 08:51:40 -0700 | [diff] [blame] | 1432 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1433 | drm_intel_bufmgr_fake *bufmgr_fake = |
| 1434 | (drm_intel_bufmgr_fake *) bo->bufmgr; |
| 1435 | drm_intel_bo_fake *batch_fake = (drm_intel_bo_fake *) bo; |
| 1436 | struct drm_i915_batchbuffer batch; |
| 1437 | int ret; |
| 1438 | int retry_count = 0; |
Eric Anholt | f9d98be | 2008-09-08 08:51:40 -0700 | [diff] [blame] | 1439 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1440 | pthread_mutex_lock(&bufmgr_fake->lock); |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 1441 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1442 | bufmgr_fake->performed_rendering = 0; |
Eric Anholt | f9d98be | 2008-09-08 08:51:40 -0700 | [diff] [blame] | 1443 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1444 | drm_intel_fake_calculate_domains(bo); |
Eric Anholt | f9d98be | 2008-09-08 08:51:40 -0700 | [diff] [blame] | 1445 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1446 | batch_fake->read_domains = I915_GEM_DOMAIN_COMMAND; |
Eric Anholt | f9d98be | 2008-09-08 08:51:40 -0700 | [diff] [blame] | 1447 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1448 | /* we've ran out of RAM so blow the whole lot away and retry */ |
| 1449 | restart: |
| 1450 | ret = drm_intel_fake_reloc_and_validate_buffer(bo); |
| 1451 | if (bufmgr_fake->fail == 1) { |
| 1452 | if (retry_count == 0) { |
| 1453 | retry_count++; |
| 1454 | drm_intel_fake_kick_all_locked(bufmgr_fake); |
| 1455 | bufmgr_fake->fail = 0; |
| 1456 | goto restart; |
| 1457 | } else /* dump out the memory here */ |
| 1458 | mmDumpMemInfo(bufmgr_fake->heap); |
| 1459 | } |
Eric Anholt | f9d98be | 2008-09-08 08:51:40 -0700 | [diff] [blame] | 1460 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1461 | assert(ret == 0); |
Eric Anholt | f9d98be | 2008-09-08 08:51:40 -0700 | [diff] [blame] | 1462 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1463 | if (bufmgr_fake->exec != NULL) { |
Emil Velikov | cf7e32b | 2015-08-15 15:42:34 +0100 | [diff] [blame] | 1464 | ret = bufmgr_fake->exec(bo, used, bufmgr_fake->exec_priv); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1465 | if (ret != 0) { |
| 1466 | pthread_mutex_unlock(&bufmgr_fake->lock); |
| 1467 | return ret; |
| 1468 | } |
| 1469 | } else { |
| 1470 | batch.start = bo->offset; |
| 1471 | batch.used = used; |
| 1472 | batch.cliprects = cliprects; |
| 1473 | batch.num_cliprects = num_cliprects; |
| 1474 | batch.DR1 = 0; |
| 1475 | batch.DR4 = DR4; |
Eric Anholt | f9d98be | 2008-09-08 08:51:40 -0700 | [diff] [blame] | 1476 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1477 | if (drmCommandWrite |
| 1478 | (bufmgr_fake->fd, DRM_I915_BATCHBUFFER, &batch, |
| 1479 | sizeof(batch))) { |
| 1480 | drmMsg("DRM_I915_BATCHBUFFER: %d\n", -errno); |
| 1481 | pthread_mutex_unlock(&bufmgr_fake->lock); |
| 1482 | return -errno; |
| 1483 | } |
| 1484 | } |
Eric Anholt | f9d98be | 2008-09-08 08:51:40 -0700 | [diff] [blame] | 1485 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1486 | drm_intel_fake_fence_validated(bo->bufmgr); |
Eric Anholt | f9d98be | 2008-09-08 08:51:40 -0700 | [diff] [blame] | 1487 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1488 | drm_intel_bo_fake_post_submit(bo); |
Eric Anholt | f9d98be | 2008-09-08 08:51:40 -0700 | [diff] [blame] | 1489 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1490 | pthread_mutex_unlock(&bufmgr_fake->lock); |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 1491 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1492 | return 0; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1493 | } |
| 1494 | |
Eric Anholt | 46e9274 | 2008-08-08 13:13:46 -0700 | [diff] [blame] | 1495 | /** |
| 1496 | * Return an error if the list of BOs will exceed the aperture size. |
| 1497 | * |
| 1498 | * This is a rough guess and likely to fail, as during the validate sequence we |
| 1499 | * may place a buffer in an inopportune spot early on and then fail to fit |
| 1500 | * a set smaller than the aperture. |
| 1501 | */ |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1502 | static int |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1503 | drm_intel_fake_check_aperture_space(drm_intel_bo ** bo_array, int count) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1504 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1505 | drm_intel_bufmgr_fake *bufmgr_fake = |
| 1506 | (drm_intel_bufmgr_fake *) bo_array[0]->bufmgr; |
| 1507 | unsigned int sz = 0; |
| 1508 | int i; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1509 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1510 | for (i = 0; i < count; i++) { |
| 1511 | drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) bo_array[i]; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1512 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1513 | if (bo_fake == NULL) |
| 1514 | continue; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1515 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1516 | if (!bo_fake->is_static) |
| 1517 | sz += ALIGN(bo_array[i]->size, bo_fake->alignment); |
| 1518 | sz += bo_fake->child_size; |
| 1519 | } |
Eric Anholt | 46e9274 | 2008-08-08 13:13:46 -0700 | [diff] [blame] | 1520 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1521 | if (sz > bufmgr_fake->size) { |
Thierry Reding | 3d7a51e | 2014-04-08 22:18:18 +0200 | [diff] [blame] | 1522 | DBG("check_space: overflowed bufmgr size, %ukb vs %lukb\n", |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1523 | sz / 1024, bufmgr_fake->size / 1024); |
| 1524 | return -1; |
| 1525 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1526 | |
Thierry Reding | 3d7a51e | 2014-04-08 22:18:18 +0200 | [diff] [blame] | 1527 | DBG("drm_check_space: sz %ukb vs bufgr %lukb\n", sz / 1024, |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1528 | bufmgr_fake->size / 1024); |
| 1529 | return 0; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1530 | } |
| 1531 | |
Eric Anholt | d198e9b | 2008-06-05 08:44:46 -0700 | [diff] [blame] | 1532 | /** |
| 1533 | * Evicts all buffers, waiting for fences to pass and copying contents out |
| 1534 | * as necessary. |
| 1535 | * |
| 1536 | * Used by the X Server on LeaveVT, when the card memory is no longer our |
| 1537 | * own. |
| 1538 | */ |
Emil Velikov | 0f8da82 | 2015-03-31 22:32:11 +0100 | [diff] [blame] | 1539 | void |
Maarten Lankhorst | 07fead4 | 2014-07-31 15:07:27 +0200 | [diff] [blame] | 1540 | drm_intel_bufmgr_fake_evict_all(drm_intel_bufmgr *bufmgr) |
Eric Anholt | d198e9b | 2008-06-05 08:44:46 -0700 | [diff] [blame] | 1541 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1542 | drm_intel_bufmgr_fake *bufmgr_fake = (drm_intel_bufmgr_fake *) bufmgr; |
| 1543 | struct block *block, *tmp; |
Eric Anholt | d198e9b | 2008-06-05 08:44:46 -0700 | [diff] [blame] | 1544 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1545 | pthread_mutex_lock(&bufmgr_fake->lock); |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 1546 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1547 | bufmgr_fake->need_fence = 1; |
| 1548 | bufmgr_fake->fail = 0; |
Eric Anholt | d198e9b | 2008-06-05 08:44:46 -0700 | [diff] [blame] | 1549 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1550 | /* Wait for hardware idle. We don't know where acceleration has been |
| 1551 | * happening, so we'll need to wait anyway before letting anything get |
| 1552 | * put on the card again. |
| 1553 | */ |
| 1554 | drm_intel_bufmgr_fake_wait_idle(bufmgr_fake); |
Eric Anholt | d198e9b | 2008-06-05 08:44:46 -0700 | [diff] [blame] | 1555 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1556 | /* Check that we hadn't released the lock without having fenced the last |
| 1557 | * set of buffers. |
| 1558 | */ |
| 1559 | assert(DRMLISTEMPTY(&bufmgr_fake->fenced)); |
| 1560 | assert(DRMLISTEMPTY(&bufmgr_fake->on_hardware)); |
Eric Anholt | d198e9b | 2008-06-05 08:44:46 -0700 | [diff] [blame] | 1561 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1562 | DRMLISTFOREACHSAFE(block, tmp, &bufmgr_fake->lru) { |
| 1563 | drm_intel_bo_fake *bo_fake = (drm_intel_bo_fake *) block->bo; |
| 1564 | /* Releases the memory, and memcpys dirty contents out if |
| 1565 | * necessary. |
| 1566 | */ |
| 1567 | free_block(bufmgr_fake, block, 0); |
| 1568 | bo_fake->block = NULL; |
| 1569 | } |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 1570 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1571 | pthread_mutex_unlock(&bufmgr_fake->lock); |
Eric Anholt | d198e9b | 2008-06-05 08:44:46 -0700 | [diff] [blame] | 1572 | } |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1573 | |
Emil Velikov | 0f8da82 | 2015-03-31 22:32:11 +0100 | [diff] [blame] | 1574 | void |
Maarten Lankhorst | 07fead4 | 2014-07-31 15:07:27 +0200 | [diff] [blame] | 1575 | drm_intel_bufmgr_fake_set_last_dispatch(drm_intel_bufmgr *bufmgr, |
| 1576 | volatile unsigned int |
| 1577 | *last_dispatch) |
Eric Anholt | 869d8be | 2008-09-06 03:07:41 +0100 | [diff] [blame] | 1578 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1579 | drm_intel_bufmgr_fake *bufmgr_fake = (drm_intel_bufmgr_fake *) bufmgr; |
Eric Anholt | 869d8be | 2008-09-06 03:07:41 +0100 | [diff] [blame] | 1580 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1581 | bufmgr_fake->last_dispatch = (volatile int *)last_dispatch; |
Eric Anholt | 869d8be | 2008-09-06 03:07:41 +0100 | [diff] [blame] | 1582 | } |
Eric Anholt | d198e9b | 2008-06-05 08:44:46 -0700 | [diff] [blame] | 1583 | |
Emil Velikov | 0f8da82 | 2015-03-31 22:32:11 +0100 | [diff] [blame] | 1584 | drm_intel_bufmgr * |
Maarten Lankhorst | 07fead4 | 2014-07-31 15:07:27 +0200 | [diff] [blame] | 1585 | drm_intel_bufmgr_fake_init(int fd, unsigned long low_offset, |
| 1586 | void *low_virtual, unsigned long size, |
| 1587 | volatile unsigned int *last_dispatch) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1588 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1589 | drm_intel_bufmgr_fake *bufmgr_fake; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1590 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1591 | bufmgr_fake = calloc(1, sizeof(*bufmgr_fake)); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1592 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1593 | if (pthread_mutex_init(&bufmgr_fake->lock, NULL) != 0) { |
| 1594 | free(bufmgr_fake); |
| 1595 | return NULL; |
| 1596 | } |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 1597 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1598 | /* Initialize allocator */ |
| 1599 | DRMINITLISTHEAD(&bufmgr_fake->fenced); |
| 1600 | DRMINITLISTHEAD(&bufmgr_fake->on_hardware); |
| 1601 | DRMINITLISTHEAD(&bufmgr_fake->lru); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1602 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1603 | bufmgr_fake->low_offset = low_offset; |
| 1604 | bufmgr_fake->virtual = low_virtual; |
| 1605 | bufmgr_fake->size = size; |
| 1606 | bufmgr_fake->heap = mmInit(low_offset, size); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1607 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1608 | /* Hook in methods */ |
| 1609 | bufmgr_fake->bufmgr.bo_alloc = drm_intel_fake_bo_alloc; |
| 1610 | bufmgr_fake->bufmgr.bo_alloc_for_render = drm_intel_fake_bo_alloc; |
Jesse Barnes | 3a7dfcd | 2009-10-06 14:34:06 -0700 | [diff] [blame] | 1611 | bufmgr_fake->bufmgr.bo_alloc_tiled = drm_intel_fake_bo_alloc_tiled; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1612 | bufmgr_fake->bufmgr.bo_reference = drm_intel_fake_bo_reference; |
| 1613 | bufmgr_fake->bufmgr.bo_unreference = drm_intel_fake_bo_unreference; |
| 1614 | bufmgr_fake->bufmgr.bo_map = drm_intel_fake_bo_map; |
| 1615 | bufmgr_fake->bufmgr.bo_unmap = drm_intel_fake_bo_unmap; |
Eric Anholt | f45305c | 2010-11-01 06:54:58 -0700 | [diff] [blame] | 1616 | bufmgr_fake->bufmgr.bo_subdata = drm_intel_fake_bo_subdata; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1617 | bufmgr_fake->bufmgr.bo_wait_rendering = |
| 1618 | drm_intel_fake_bo_wait_rendering; |
| 1619 | bufmgr_fake->bufmgr.bo_emit_reloc = drm_intel_fake_emit_reloc; |
| 1620 | bufmgr_fake->bufmgr.destroy = drm_intel_fake_destroy; |
| 1621 | bufmgr_fake->bufmgr.bo_exec = drm_intel_fake_bo_exec; |
| 1622 | bufmgr_fake->bufmgr.check_aperture_space = |
| 1623 | drm_intel_fake_check_aperture_space; |
| 1624 | bufmgr_fake->bufmgr.debug = 0; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1625 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1626 | bufmgr_fake->fd = fd; |
| 1627 | bufmgr_fake->last_dispatch = (volatile int *)last_dispatch; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1628 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1629 | return &bufmgr_fake->bufmgr; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1630 | } |