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Kristian Høgsberg2b42af92009-11-17 09:23:59 -05001/*
2 * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
3 * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sub license,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
14 * of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 */
24#ifndef _VIA_DRM_H_
25#define _VIA_DRM_H_
26
Robert Noland82bf52f2009-11-24 10:31:41 -060027#include "drm.h"
Kristian Høgsberg2b42af92009-11-17 09:23:59 -050028
Eric Anholt8d34bba2017-11-08 11:06:55 -080029#if defined(__cplusplus)
30extern "C" {
31#endif
32
Kristian Høgsberg2b42af92009-11-17 09:23:59 -050033/* WARNING: These defines must be the same as what the Xserver uses.
34 * if you change them, you must change the defines in the Xserver.
35 */
36
37#ifndef _VIA_DEFINES_
38#define _VIA_DEFINES_
39
40#include "via_drmclient.h"
41
42#define VIA_NR_SAREA_CLIPRECTS 8
43#define VIA_NR_XVMC_PORTS 10
44#define VIA_NR_XVMC_LOCKS 5
45#define VIA_MAX_CACHELINE_SIZE 64
46#define XVMCLOCKPTR(saPriv,lockNo) \
47 ((__volatile__ struct drm_hw_lock *)(((((unsigned long) (saPriv)->XvMCLockArea) + \
48 (VIA_MAX_CACHELINE_SIZE - 1)) & \
49 ~(VIA_MAX_CACHELINE_SIZE - 1)) + \
50 VIA_MAX_CACHELINE_SIZE*(lockNo)))
51
52/* Each region is a minimum of 64k, and there are at most 64 of them.
53 */
54#define VIA_NR_TEX_REGIONS 64
55#define VIA_LOG_MIN_TEX_REGION_SIZE 16
56#endif
57
58#define VIA_UPLOAD_TEX0IMAGE 0x1 /* handled clientside */
59#define VIA_UPLOAD_TEX1IMAGE 0x2 /* handled clientside */
60#define VIA_UPLOAD_CTX 0x4
61#define VIA_UPLOAD_BUFFERS 0x8
62#define VIA_UPLOAD_TEX0 0x10
63#define VIA_UPLOAD_TEX1 0x20
64#define VIA_UPLOAD_CLIPRECTS 0x40
65#define VIA_UPLOAD_ALL 0xff
66
67/* VIA specific ioctls */
68#define DRM_VIA_ALLOCMEM 0x00
69#define DRM_VIA_FREEMEM 0x01
70#define DRM_VIA_AGP_INIT 0x02
71#define DRM_VIA_FB_INIT 0x03
72#define DRM_VIA_MAP_INIT 0x04
73#define DRM_VIA_DEC_FUTEX 0x05
74#define NOT_USED
75#define DRM_VIA_DMA_INIT 0x07
76#define DRM_VIA_CMDBUFFER 0x08
77#define DRM_VIA_FLUSH 0x09
78#define DRM_VIA_PCICMD 0x0a
79#define DRM_VIA_CMDBUF_SIZE 0x0b
80#define NOT_USED
81#define DRM_VIA_WAIT_IRQ 0x0d
82#define DRM_VIA_DMA_BLIT 0x0e
83#define DRM_VIA_BLIT_SYNC 0x0f
84
85#define DRM_IOCTL_VIA_ALLOCMEM DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_ALLOCMEM, drm_via_mem_t)
86#define DRM_IOCTL_VIA_FREEMEM DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_FREEMEM, drm_via_mem_t)
87#define DRM_IOCTL_VIA_AGP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_AGP_INIT, drm_via_agp_t)
88#define DRM_IOCTL_VIA_FB_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_FB_INIT, drm_via_fb_t)
89#define DRM_IOCTL_VIA_MAP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_MAP_INIT, drm_via_init_t)
90#define DRM_IOCTL_VIA_DEC_FUTEX DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_DEC_FUTEX, drm_via_futex_t)
91#define DRM_IOCTL_VIA_DMA_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_DMA_INIT, drm_via_dma_init_t)
92#define DRM_IOCTL_VIA_CMDBUFFER DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_CMDBUFFER, drm_via_cmdbuffer_t)
93#define DRM_IOCTL_VIA_FLUSH DRM_IO( DRM_COMMAND_BASE + DRM_VIA_FLUSH)
94#define DRM_IOCTL_VIA_PCICMD DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_PCICMD, drm_via_cmdbuffer_t)
95#define DRM_IOCTL_VIA_CMDBUF_SIZE DRM_IOWR( DRM_COMMAND_BASE + DRM_VIA_CMDBUF_SIZE, \
96 drm_via_cmdbuf_size_t)
97#define DRM_IOCTL_VIA_WAIT_IRQ DRM_IOWR( DRM_COMMAND_BASE + DRM_VIA_WAIT_IRQ, drm_via_irqwait_t)
98#define DRM_IOCTL_VIA_DMA_BLIT DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_DMA_BLIT, drm_via_dmablit_t)
99#define DRM_IOCTL_VIA_BLIT_SYNC DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_BLIT_SYNC, drm_via_blitsync_t)
100
101/* Indices into buf.Setup where various bits of state are mirrored per
102 * context and per buffer. These can be fired at the card as a unit,
103 * or in a piecewise fashion as required.
104 */
105
106#define VIA_TEX_SETUP_SIZE 8
107
108/* Flags for clear ioctl
109 */
110#define VIA_FRONT 0x1
111#define VIA_BACK 0x2
112#define VIA_DEPTH 0x4
113#define VIA_STENCIL 0x8
114#define VIA_MEM_VIDEO 0 /* matches drm constant */
115#define VIA_MEM_AGP 1 /* matches drm constant */
116#define VIA_MEM_SYSTEM 2
117#define VIA_MEM_MIXED 3
118#define VIA_MEM_UNKNOWN 4
119
120typedef struct {
121 __u32 offset;
122 __u32 size;
123} drm_via_agp_t;
124
125typedef struct {
126 __u32 offset;
127 __u32 size;
128} drm_via_fb_t;
129
130typedef struct {
131 __u32 context;
132 __u32 type;
133 __u32 size;
134 unsigned long index;
135 unsigned long offset;
136} drm_via_mem_t;
137
138typedef struct _drm_via_init {
139 enum {
140 VIA_INIT_MAP = 0x01,
141 VIA_CLEANUP_MAP = 0x02
142 } func;
143
144 unsigned long sarea_priv_offset;
145 unsigned long fb_offset;
146 unsigned long mmio_offset;
147 unsigned long agpAddr;
148} drm_via_init_t;
149
150typedef struct _drm_via_futex {
151 enum {
152 VIA_FUTEX_WAIT = 0x00,
153 VIA_FUTEX_WAKE = 0X01
154 } func;
155 __u32 ms;
156 __u32 lock;
157 __u32 val;
158} drm_via_futex_t;
159
160typedef struct _drm_via_dma_init {
161 enum {
162 VIA_INIT_DMA = 0x01,
163 VIA_CLEANUP_DMA = 0x02,
164 VIA_DMA_INITIALIZED = 0x03
165 } func;
166
167 unsigned long offset;
168 unsigned long size;
169 unsigned long reg_pause_addr;
170} drm_via_dma_init_t;
171
172typedef struct _drm_via_cmdbuffer {
173 char *buf;
174 unsigned long size;
175} drm_via_cmdbuffer_t;
176
177/* Warning: If you change the SAREA structure you must change the Xserver
178 * structure as well */
179
180typedef struct _drm_via_tex_region {
181 unsigned char next, prev; /* indices to form a circular LRU */
182 unsigned char inUse; /* owned by a client, or free? */
183 int age; /* tracked by clients to update local LRU's */
184} drm_via_tex_region_t;
185
186typedef struct _drm_via_sarea {
187 unsigned int dirty;
188 unsigned int nbox;
189 struct drm_clip_rect boxes[VIA_NR_SAREA_CLIPRECTS];
190 drm_via_tex_region_t texList[VIA_NR_TEX_REGIONS + 1];
191 int texAge; /* last time texture was uploaded */
192 int ctxOwner; /* last context to upload state */
193 int vertexPrim;
194
195 /*
196 * Below is for XvMC.
197 * We want the lock integers alone on, and aligned to, a cache line.
198 * Therefore this somewhat strange construct.
199 */
200
201 char XvMCLockArea[VIA_MAX_CACHELINE_SIZE * (VIA_NR_XVMC_LOCKS + 1)];
202
203 unsigned int XvMCDisplaying[VIA_NR_XVMC_PORTS];
204 unsigned int XvMCSubPicOn[VIA_NR_XVMC_PORTS];
205 unsigned int XvMCCtxNoGrabbed; /* Last context to hold decoder */
206
207 /* Used by the 3d driver only at this point, for pageflipping:
208 */
209 unsigned int pfCurrentOffset;
210} drm_via_sarea_t;
211
212typedef struct _drm_via_cmdbuf_size {
213 enum {
214 VIA_CMDBUF_SPACE = 0x01,
215 VIA_CMDBUF_LAG = 0x02
216 } func;
217 int wait;
218 __u32 size;
219} drm_via_cmdbuf_size_t;
220
221typedef enum {
222 VIA_IRQ_ABSOLUTE = 0x0,
223 VIA_IRQ_RELATIVE = 0x1,
224 VIA_IRQ_SIGNAL = 0x10000000,
225 VIA_IRQ_FORCE_SEQUENCE = 0x20000000
226} via_irq_seq_type_t;
227
228#define VIA_IRQ_FLAGS_MASK 0xF0000000
229
230enum drm_via_irqs {
231 drm_via_irq_hqv0 = 0,
232 drm_via_irq_hqv1,
233 drm_via_irq_dma0_dd,
234 drm_via_irq_dma0_td,
235 drm_via_irq_dma1_dd,
236 drm_via_irq_dma1_td,
237 drm_via_irq_num
238};
239
240struct drm_via_wait_irq_request {
241 unsigned irq;
242 via_irq_seq_type_t type;
243 __u32 sequence;
244 __u32 signal;
245};
246
247typedef union drm_via_irqwait {
248 struct drm_via_wait_irq_request request;
249 struct drm_wait_vblank_reply reply;
250} drm_via_irqwait_t;
251
252typedef struct drm_via_blitsync {
253 __u32 sync_handle;
254 unsigned engine;
255} drm_via_blitsync_t;
256
257/* - * Below,"flags" is currently unused but will be used for possible future
258 * extensions like kernel space bounce buffers for bad alignments and
259 * blit engine busy-wait polling for better latency in the absence of
260 * interrupts.
261 */
262
263typedef struct drm_via_dmablit {
264 __u32 num_lines;
265 __u32 line_length;
266
267 __u32 fb_addr;
268 __u32 fb_stride;
269
270 unsigned char *mem_addr;
271 __u32 mem_stride;
272
273 __u32 flags;
274 int to_fb;
275
276 drm_via_blitsync_t sync;
277} drm_via_dmablit_t;
278
Eric Anholt8d34bba2017-11-08 11:06:55 -0800279#if defined(__cplusplus)
280}
281#endif
282
Kristian Høgsberg2b42af92009-11-17 09:23:59 -0500283#endif /* _VIA_DRM_H_ */