blob: d2ca9579175073751c440bb7b7e4eef32f5eb975 [file] [log] [blame]
Jon Smirldeed1ec2004-07-07 04:22:17 +00001/**
2 * \file xf86drm.h
3 * OS-independent header for DRM user-level library interface.
4 *
5 * \author Rickard E. (Rik) Faith <faith@valinux.com>
6 */
7
8/*
9 * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas.
10 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
11 * All Rights Reserved.
12 *
13 * Permission is hereby granted, free of charge, to any person obtaining a
14 * copy of this software and associated documentation files (the "Software"),
15 * to deal in the Software without restriction, including without limitation
16 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
17 * and/or sell copies of the Software, and to permit persons to whom the
18 * Software is furnished to do so, subject to the following conditions:
19 *
20 * The above copyright notice and this permission notice (including the next
21 * paragraph) shall be included in all copies or substantial portions of the
22 * Software.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
25 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
26 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
27 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
28 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
29 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
30 * DEALINGS IN THE SOFTWARE.
31 *
32 */
33
34/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/xf86drm.h,v 1.26 2003/08/16 19:26:37 dawes Exp $ */
35
36#ifndef _XF86DRM_H_
37#define _XF86DRM_H_
38
Adam Jacksoncaa42122005-02-01 22:09:46 +000039#include <drm.h>
Jon Smirldeed1ec2004-07-07 04:22:17 +000040
41 /* Defaults, if nothing set in xf86config */
42#define DRM_DEV_UID 0
43#define DRM_DEV_GID 0
44/* Default /dev/dri directory permissions 0755 */
45#define DRM_DEV_DIRMODE \
46 (S_IRUSR|S_IWUSR|S_IXUSR|S_IRGRP|S_IXGRP|S_IROTH|S_IXOTH)
47#define DRM_DEV_MODE (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP)
48
49#define DRM_DIR_NAME "/dev/dri"
50#define DRM_DEV_NAME "%s/card%d"
51#define DRM_PROC_NAME "/proc/dri/" /* For backward Linux compatibility */
52
53#define DRM_ERR_NO_DEVICE (-1001)
54#define DRM_ERR_NO_ACCESS (-1002)
55#define DRM_ERR_NOT_ROOT (-1003)
56#define DRM_ERR_INVALID (-1004)
57#define DRM_ERR_NO_FD (-1005)
58
59#define DRM_AGP_NO_HANDLE 0
60
61typedef unsigned int drmSize, *drmSizePtr; /**< For mapped regions */
62typedef void *drmAddress, **drmAddressPtr; /**< For mapped regions */
63
64/**
65 * Driver version information.
66 *
67 * \sa drmGetVersion() and drmSetVersion().
68 */
69typedef struct _drmVersion {
70 int version_major; /**< Major version */
71 int version_minor; /**< Minor version */
72 int version_patchlevel; /**< Patch level */
73 int name_len; /**< Length of name buffer */
74 char *name; /**< Name of driver */
75 int date_len; /**< Length of date buffer */
76 char *date; /**< User-space buffer to hold date */
77 int desc_len; /**< Length of desc buffer */
78 char *desc; /**< User-space buffer to hold desc */
79} drmVersion, *drmVersionPtr;
80
81typedef struct _drmStats {
82 unsigned long count; /**< Number of data */
83 struct {
84 unsigned long value; /**< Value from kernel */
85 const char *long_format; /**< Suggested format for long_name */
86 const char *long_name; /**< Long name for value */
87 const char *rate_format; /**< Suggested format for rate_name */
88 const char *rate_name; /**< Short name for value per second */
89 int isvalue; /**< True if value (vs. counter) */
90 const char *mult_names; /**< Multiplier names (e.g., "KGM") */
91 int mult; /**< Multiplier value (e.g., 1024) */
92 int verbose; /**< Suggest only in verbose output */
93 } data[15];
94} drmStatsT;
95
96
97 /* All of these enums *MUST* match with the
98 kernel implementation -- so do *NOT*
99 change them! (The drmlib implementation
100 will just copy the flags instead of
101 translating them.) */
102typedef enum {
103 DRM_FRAME_BUFFER = 0, /**< WC, no caching, no core dump */
104 DRM_REGISTERS = 1, /**< no caching, no core dump */
105 DRM_SHM = 2, /**< shared, cached */
106 DRM_AGP = 3, /**< AGP/GART */
Felix Kuehlinged165a22005-01-01 20:03:15 +0000107 DRM_SCATTER_GATHER = 4, /**< PCI scatter/gather */
108 DRM_CONSISTENT = 5 /**< PCI consistent */
Jon Smirldeed1ec2004-07-07 04:22:17 +0000109} drmMapType;
110
111typedef enum {
112 DRM_RESTRICTED = 0x0001, /**< Cannot be mapped to client-virtual */
113 DRM_READ_ONLY = 0x0002, /**< Read-only in client-virtual */
114 DRM_LOCKED = 0x0004, /**< Physical pages locked */
115 DRM_KERNEL = 0x0008, /**< Kernel requires access */
116 DRM_WRITE_COMBINING = 0x0010, /**< Use write-combining, if available */
117 DRM_CONTAINS_LOCK = 0x0020, /**< SHM page that contains lock */
118 DRM_REMOVABLE = 0x0040 /**< Removable mapping */
119} drmMapFlags;
120
121/**
122 * \warning These values *MUST* match drm.h
123 */
124typedef enum {
125 /** \name Flags for DMA buffer dispatch */
126 /*@{*/
127 DRM_DMA_BLOCK = 0x01, /**<
128 * Block until buffer dispatched.
129 *
130 * \note the buffer may not yet have been
131 * processed by the hardware -- getting a
132 * hardware lock with the hardware quiescent
133 * will ensure that the buffer has been
134 * processed.
135 */
136 DRM_DMA_WHILE_LOCKED = 0x02, /**< Dispatch while lock held */
137 DRM_DMA_PRIORITY = 0x04, /**< High priority dispatch */
138 /*@}*/
139
140 /** \name Flags for DMA buffer request */
141 /*@{*/
142 DRM_DMA_WAIT = 0x10, /**< Wait for free buffers */
143 DRM_DMA_SMALLER_OK = 0x20, /**< Smaller-than-requested buffers OK */
144 DRM_DMA_LARGER_OK = 0x40 /**< Larger-than-requested buffers OK */
145 /*@}*/
146} drmDMAFlags;
147
148typedef enum {
149 DRM_PAGE_ALIGN = 0x01,
150 DRM_AGP_BUFFER = 0x02,
Dave Airlie354dd172005-01-16 05:40:12 +0000151 DRM_SG_BUFFER = 0x04,
152 DRM_FB_BUFFER = 0x08
Jon Smirldeed1ec2004-07-07 04:22:17 +0000153} drmBufDescFlags;
154
155typedef enum {
156 DRM_LOCK_READY = 0x01, /**< Wait until hardware is ready for DMA */
157 DRM_LOCK_QUIESCENT = 0x02, /**< Wait until hardware quiescent */
158 DRM_LOCK_FLUSH = 0x04, /**< Flush this context's DMA queue first */
159 DRM_LOCK_FLUSH_ALL = 0x08, /**< Flush all DMA queues first */
160 /* These *HALT* flags aren't supported yet
161 -- they will be used to support the
162 full-screen DGA-like mode. */
163 DRM_HALT_ALL_QUEUES = 0x10, /**< Halt all current and future queues */
164 DRM_HALT_CUR_QUEUES = 0x20 /**< Halt all current queues */
165} drmLockFlags;
166
167typedef enum {
168 DRM_CONTEXT_PRESERVED = 0x01, /**< This context is preserved and
169 never swapped. */
170 DRM_CONTEXT_2DONLY = 0x02 /**< This context is for 2D rendering only. */
171} drm_context_tFlags, *drm_context_tFlagsPtr;
172
173typedef struct _drmBufDesc {
174 int count; /**< Number of buffers of this size */
175 int size; /**< Size in bytes */
176 int low_mark; /**< Low water mark */
177 int high_mark; /**< High water mark */
178} drmBufDesc, *drmBufDescPtr;
179
180typedef struct _drmBufInfo {
181 int count; /**< Number of buffers described in list */
182 drmBufDescPtr list; /**< List of buffer descriptions */
183} drmBufInfo, *drmBufInfoPtr;
184
185typedef struct _drmBuf {
186 int idx; /**< Index into the master buffer list */
187 int total; /**< Buffer size */
188 int used; /**< Amount of buffer in use (for DMA) */
189 drmAddress address; /**< Address */
190} drmBuf, *drmBufPtr;
191
192/**
193 * Buffer mapping information.
194 *
195 * Used by drmMapBufs() and drmUnmapBufs() to store information about the
196 * mapped buffers.
197 */
198typedef struct _drmBufMap {
199 int count; /**< Number of buffers mapped */
200 drmBufPtr list; /**< Buffers */
201} drmBufMap, *drmBufMapPtr;
202
203typedef struct _drmLock {
204 volatile unsigned int lock;
205 char padding[60];
206 /* This is big enough for most current (and future?) architectures:
207 DEC Alpha: 32 bytes
208 Intel Merced: ?
209 Intel P5/PPro/PII/PIII: 32 bytes
210 Intel StrongARM: 32 bytes
211 Intel i386/i486: 16 bytes
212 MIPS: 32 bytes (?)
213 Motorola 68k: 16 bytes
214 Motorola PowerPC: 32 bytes
215 Sun SPARC: 32 bytes
216 */
217} drmLock, *drmLockPtr;
218
219/**
220 * Indices here refer to the offset into
221 * list in drmBufInfo
222 */
223typedef struct _drmDMAReq {
224 drm_context_t context; /**< Context handle */
225 int send_count; /**< Number of buffers to send */
226 int *send_list; /**< List of handles to buffers */
227 int *send_sizes; /**< Lengths of data to send, in bytes */
228 drmDMAFlags flags; /**< Flags */
229 int request_count; /**< Number of buffers requested */
230 int request_size; /**< Desired size of buffers requested */
231 int *request_list; /**< Buffer information */
232 int *request_sizes; /**< Minimum acceptable sizes */
233 int granted_count; /**< Number of buffers granted at this size */
234} drmDMAReq, *drmDMAReqPtr;
235
236typedef struct _drmRegion {
237 drm_handle_t handle;
238 unsigned int offset;
239 drmSize size;
240 drmAddress map;
241} drmRegion, *drmRegionPtr;
242
243typedef struct _drmTextureRegion {
244 unsigned char next;
245 unsigned char prev;
246 unsigned char in_use;
247 unsigned char padding; /**< Explicitly pad this out */
248 unsigned int age;
249} drmTextureRegion, *drmTextureRegionPtr;
250
251
252typedef enum {
253 DRM_VBLANK_ABSOLUTE = 0x0, /**< Wait for specific vblank sequence number */
254 DRM_VBLANK_RELATIVE = 0x1, /**< Wait for given number of vblanks */
255 DRM_VBLANK_SIGNAL = 0x40000000 /* Send signal instead of blocking */
256} drmVBlankSeqType;
257
258typedef struct _drmVBlankReq {
259 drmVBlankSeqType type;
260 unsigned int sequence;
261 unsigned long signal;
262} drmVBlankReq, *drmVBlankReqPtr;
263
264typedef struct _drmVBlankReply {
265 drmVBlankSeqType type;
266 unsigned int sequence;
267 long tval_sec;
268 long tval_usec;
269} drmVBlankReply, *drmVBlankReplyPtr;
270
271typedef union _drmVBlank {
272 drmVBlankReq request;
273 drmVBlankReply reply;
274} drmVBlank, *drmVBlankPtr;
275
276typedef struct _drmSetVersion {
277 int drm_di_major;
278 int drm_di_minor;
279 int drm_dd_major;
280 int drm_dd_minor;
281} drmSetVersion, *drmSetVersionPtr;
282
283
284#define __drm_dummy_lock(lock) (*(__volatile__ unsigned int *)lock)
285
Dave Airliecc4d0392004-07-31 08:12:39 +0000286#define DRM_LOCK_HELD 0x80000000U /**< Hardware lock is held */
287#define DRM_LOCK_CONT 0x40000000U /**< Hardware lock is contended */
Jon Smirldeed1ec2004-07-07 04:22:17 +0000288
289#if defined(__GNUC__) && (__GNUC__ >= 2)
Dave Airlie5a52e532005-08-23 04:10:50 +0000290# if defined(__i386) || defined(__AMD64__) || defined(__x86_64__) || defined(__amd64__)
Jon Smirldeed1ec2004-07-07 04:22:17 +0000291 /* Reflect changes here to drmP.h */
292#define DRM_CAS(lock,old,new,__ret) \
293 do { \
294 int __dummy; /* Can't mark eax as clobbered */ \
295 __asm__ __volatile__( \
296 "lock ; cmpxchg %4,%1\n\t" \
297 "setnz %0" \
298 : "=d" (__ret), \
299 "=m" (__drm_dummy_lock(lock)), \
300 "=a" (__dummy) \
301 : "2" (old), \
302 "r" (new)); \
303 } while (0)
304
305#elif defined(__alpha__)
306
307#define DRM_CAS(lock, old, new, ret) \
308 do { \
309 int old32; \
310 int cur32; \
311 __asm__ __volatile__( \
312 " mb\n" \
313 " zap %4, 0xF0, %0\n" \
314 " ldl_l %1, %2\n" \
315 " zap %1, 0xF0, %1\n" \
316 " cmpeq %0, %1, %1\n" \
317 " beq %1, 1f\n" \
318 " bis %5, %5, %1\n" \
319 " stl_c %1, %2\n" \
320 "1: xor %1, 1, %1\n" \
321 " stl %1, %3" \
322 : "+r" (old32), \
323 "+&r" (cur32), \
324 "=m" (__drm_dummy_lock(lock)),\
325 "=m" (ret) \
326 : "r" (old), \
327 "r" (new)); \
328 } while(0)
329
330#elif defined(__sparc__)
331
332#define DRM_CAS(lock,old,new,__ret) \
333do { register unsigned int __old __asm("o0"); \
334 register unsigned int __new __asm("o1"); \
335 register volatile unsigned int *__lock __asm("o2"); \
336 __old = old; \
337 __new = new; \
338 __lock = (volatile unsigned int *)lock; \
339 __asm__ __volatile__( \
340 /*"cas [%2], %3, %0"*/ \
341 ".word 0xd3e29008\n\t" \
342 /*"membar #StoreStore | #StoreLoad"*/ \
343 ".word 0x8143e00a" \
344 : "=&r" (__new) \
345 : "0" (__new), \
346 "r" (__lock), \
347 "r" (__old) \
348 : "memory"); \
349 __ret = (__new != __old); \
350} while(0)
351
352#elif defined(__ia64__)
353
354#ifdef __INTEL_COMPILER
355/* this currently generates bad code (missing stop bits)... */
356#include <ia64intrin.h>
357
358#define DRM_CAS(lock,old,new,__ret) \
359 do { \
360 unsigned long __result, __old = (old) & 0xffffffff; \
361 __mf(); \
362 __result = _InterlockedCompareExchange_acq(&__drm_dummy_lock(lock), (new), __old);\
363 __ret = (__result) != (__old); \
364/* __ret = (__sync_val_compare_and_swap(&__drm_dummy_lock(lock), \
365 (old), (new)) \
366 != (old)); */\
367 } while (0)
368
369#else
370#define DRM_CAS(lock,old,new,__ret) \
371 do { \
372 unsigned int __result, __old = (old); \
373 __asm__ __volatile__( \
374 "mf\n" \
375 "mov ar.ccv=%2\n" \
376 ";;\n" \
377 "cmpxchg4.acq %0=%1,%3,ar.ccv" \
378 : "=r" (__result), "=m" (__drm_dummy_lock(lock)) \
379 : "r" ((unsigned long)__old), "r" (new) \
380 : "memory"); \
381 __ret = (__result) != (__old); \
382 } while (0)
383
384#endif
385
386#elif defined(__powerpc__)
387
388#define DRM_CAS(lock,old,new,__ret) \
389 do { \
390 __asm__ __volatile__( \
391 "sync;" \
392 "0: lwarx %0,0,%1;" \
393 " xor. %0,%3,%0;" \
394 " bne 1f;" \
395 " stwcx. %2,0,%1;" \
396 " bne- 0b;" \
397 "1: " \
398 "sync;" \
399 : "=&r"(__ret) \
400 : "r"(lock), "r"(new), "r"(old) \
401 : "cr0", "memory"); \
402 } while (0)
403
404#endif /* architecture */
405#endif /* __GNUC__ >= 2 */
406
407#ifndef DRM_CAS
408#define DRM_CAS(lock,old,new,ret) do { ret=1; } while (0) /* FAST LOCK FAILS */
409#endif
410
411#if defined(__alpha__) || defined(__powerpc__)
412#define DRM_CAS_RESULT(_result) int _result
413#else
414#define DRM_CAS_RESULT(_result) char _result
415#endif
416
417#define DRM_LIGHT_LOCK(fd,lock,context) \
418 do { \
419 DRM_CAS_RESULT(__ret); \
420 DRM_CAS(lock,context,DRM_LOCK_HELD|context,__ret); \
421 if (__ret) drmGetLock(fd,context,0); \
422 } while(0)
423
424 /* This one counts fast locks -- for
425 benchmarking only. */
426#define DRM_LIGHT_LOCK_COUNT(fd,lock,context,count) \
427 do { \
428 DRM_CAS_RESULT(__ret); \
429 DRM_CAS(lock,context,DRM_LOCK_HELD|context,__ret); \
430 if (__ret) drmGetLock(fd,context,0); \
431 else ++count; \
432 } while(0)
433
434#define DRM_LOCK(fd,lock,context,flags) \
435 do { \
436 if (flags) drmGetLock(fd,context,flags); \
437 else DRM_LIGHT_LOCK(fd,lock,context); \
438 } while(0)
439
440#define DRM_UNLOCK(fd,lock,context) \
441 do { \
442 DRM_CAS_RESULT(__ret); \
443 DRM_CAS(lock,DRM_LOCK_HELD|context,context,__ret); \
444 if (__ret) drmUnlock(fd,context); \
445 } while(0)
446
447 /* Simple spin locks */
448#define DRM_SPINLOCK(spin,val) \
449 do { \
450 DRM_CAS_RESULT(__ret); \
451 do { \
452 DRM_CAS(spin,0,val,__ret); \
453 if (__ret) while ((spin)->lock); \
454 } while (__ret); \
455 } while(0)
456
457#define DRM_SPINLOCK_TAKE(spin,val) \
458 do { \
459 DRM_CAS_RESULT(__ret); \
460 int cur; \
461 do { \
462 cur = (*spin).lock; \
463 DRM_CAS(spin,cur,val,__ret); \
464 } while (__ret); \
465 } while(0)
466
467#define DRM_SPINLOCK_COUNT(spin,val,count,__ret) \
468 do { \
469 int __i; \
470 __ret = 1; \
471 for (__i = 0; __ret && __i < count; __i++) { \
472 DRM_CAS(spin,0,val,__ret); \
473 if (__ret) for (;__i < count && (spin)->lock; __i++); \
474 } \
475 } while(0)
476
477#define DRM_SPINUNLOCK(spin,val) \
478 do { \
479 DRM_CAS_RESULT(__ret); \
480 if ((*spin).lock == val) { /* else server stole lock */ \
481 do { \
482 DRM_CAS(spin,val,0,__ret); \
483 } while (__ret); \
484 } \
485 } while(0)
486
487/* General user-level programmer's API: unprivileged */
488extern int drmAvailable(void);
489extern int drmOpen(const char *name, const char *busid);
490extern int drmClose(int fd);
491extern drmVersionPtr drmGetVersion(int fd);
492extern drmVersionPtr drmGetLibVersion(int fd);
493extern void drmFreeVersion(drmVersionPtr);
494extern int drmGetMagic(int fd, drm_magic_t * magic);
495extern char *drmGetBusid(int fd);
496extern int drmGetInterruptFromBusID(int fd, int busnum, int devnum,
497 int funcnum);
498extern int drmGetMap(int fd, int idx, drm_handle_t *offset,
499 drmSize *size, drmMapType *type,
500 drmMapFlags *flags, drm_handle_t *handle,
501 int *mtrr);
502extern int drmGetClient(int fd, int idx, int *auth, int *pid,
503 int *uid, unsigned long *magic,
504 unsigned long *iocs);
505extern int drmGetStats(int fd, drmStatsT *stats);
506extern int drmSetInterfaceVersion(int fd, drmSetVersion *version);
507extern int drmCommandNone(int fd, unsigned long drmCommandIndex);
508extern int drmCommandRead(int fd, unsigned long drmCommandIndex,
509 void *data, unsigned long size);
510extern int drmCommandWrite(int fd, unsigned long drmCommandIndex,
511 void *data, unsigned long size);
512extern int drmCommandWriteRead(int fd, unsigned long drmCommandIndex,
513 void *data, unsigned long size);
514
515/* General user-level programmer's API: X server (root) only */
516extern void drmFreeBusid(const char *busid);
517extern int drmSetBusid(int fd, const char *busid);
518extern int drmAuthMagic(int fd, drm_magic_t magic);
519extern int drmAddMap(int fd,
520 drm_handle_t offset,
521 drmSize size,
522 drmMapType type,
523 drmMapFlags flags,
524 drm_handle_t * handle);
525extern int drmRmMap(int fd, drm_handle_t handle);
526extern int drmAddContextPrivateMapping(int fd, drm_context_t ctx_id,
527 drm_handle_t handle);
528
529extern int drmAddBufs(int fd, int count, int size,
530 drmBufDescFlags flags,
531 int agp_offset);
532extern int drmMarkBufs(int fd, double low, double high);
533extern int drmCreateContext(int fd, drm_context_t * handle);
534extern int drmSetContextFlags(int fd, drm_context_t context,
535 drm_context_tFlags flags);
536extern int drmGetContextFlags(int fd, drm_context_t context,
537 drm_context_tFlagsPtr flags);
538extern int drmAddContextTag(int fd, drm_context_t context, void *tag);
539extern int drmDelContextTag(int fd, drm_context_t context);
540extern void *drmGetContextTag(int fd, drm_context_t context);
541extern drm_context_t * drmGetReservedContextList(int fd, int *count);
542extern void drmFreeReservedContextList(drm_context_t *);
543extern int drmSwitchToContext(int fd, drm_context_t context);
544extern int drmDestroyContext(int fd, drm_context_t handle);
545extern int drmCreateDrawable(int fd, drm_drawable_t * handle);
546extern int drmDestroyDrawable(int fd, drm_drawable_t handle);
547extern int drmCtlInstHandler(int fd, int irq);
548extern int drmCtlUninstHandler(int fd);
549extern int drmInstallSIGIOHandler(int fd,
550 void (*f)(int fd,
551 void *oldctx,
552 void *newctx));
553extern int drmRemoveSIGIOHandler(int fd);
554
555/* General user-level programmer's API: authenticated client and/or X */
556extern int drmMap(int fd,
557 drm_handle_t handle,
558 drmSize size,
559 drmAddressPtr address);
560extern int drmUnmap(drmAddress address, drmSize size);
561extern drmBufInfoPtr drmGetBufInfo(int fd);
562extern drmBufMapPtr drmMapBufs(int fd);
563extern int drmUnmapBufs(drmBufMapPtr bufs);
564extern int drmDMA(int fd, drmDMAReqPtr request);
565extern int drmFreeBufs(int fd, int count, int *list);
566extern int drmGetLock(int fd,
567 drm_context_t context,
568 drmLockFlags flags);
569extern int drmUnlock(int fd, drm_context_t context);
570extern int drmFinish(int fd, int context, drmLockFlags flags);
571extern int drmGetContextPrivateMapping(int fd, drm_context_t ctx_id,
572 drm_handle_t * handle);
573
574/* AGP/GART support: X server (root) only */
575extern int drmAgpAcquire(int fd);
576extern int drmAgpRelease(int fd);
577extern int drmAgpEnable(int fd, unsigned long mode);
578extern int drmAgpAlloc(int fd, unsigned long size,
579 unsigned long type, unsigned long *address,
580 unsigned long *handle);
581extern int drmAgpFree(int fd, unsigned long handle);
582extern int drmAgpBind(int fd, unsigned long handle,
583 unsigned long offset);
584extern int drmAgpUnbind(int fd, unsigned long handle);
585
586/* AGP/GART info: authenticated client and/or X */
587extern int drmAgpVersionMajor(int fd);
588extern int drmAgpVersionMinor(int fd);
589extern unsigned long drmAgpGetMode(int fd);
590extern unsigned long drmAgpBase(int fd); /* Physical location */
591extern unsigned long drmAgpSize(int fd); /* Bytes */
592extern unsigned long drmAgpMemoryUsed(int fd);
593extern unsigned long drmAgpMemoryAvail(int fd);
594extern unsigned int drmAgpVendorId(int fd);
595extern unsigned int drmAgpDeviceId(int fd);
596
597/* PCI scatter/gather support: X server (root) only */
598extern int drmScatterGatherAlloc(int fd, unsigned long size,
599 unsigned long *handle);
600extern int drmScatterGatherFree(int fd, unsigned long handle);
601
602extern int drmWaitVBlank(int fd, drmVBlankPtr vbl);
603
604/* Support routines */
605extern int drmError(int err, const char *label);
606extern void *drmMalloc(int size);
607extern void drmFree(void *pt);
608
609/* Hash table routines */
610extern void *drmHashCreate(void);
611extern int drmHashDestroy(void *t);
612extern int drmHashLookup(void *t, unsigned long key, void **value);
613extern int drmHashInsert(void *t, unsigned long key, void *value);
614extern int drmHashDelete(void *t, unsigned long key);
615extern int drmHashFirst(void *t, unsigned long *key, void **value);
616extern int drmHashNext(void *t, unsigned long *key, void **value);
617
618/* PRNG routines */
619extern void *drmRandomCreate(unsigned long seed);
620extern int drmRandomDestroy(void *state);
621extern unsigned long drmRandom(void *state);
622extern double drmRandomDouble(void *state);
623
624/* Skip list routines */
625
626extern void *drmSLCreate(void);
627extern int drmSLDestroy(void *l);
628extern int drmSLLookup(void *l, unsigned long key, void **value);
629extern int drmSLInsert(void *l, unsigned long key, void *value);
630extern int drmSLDelete(void *l, unsigned long key);
631extern int drmSLNext(void *l, unsigned long *key, void **value);
632extern int drmSLFirst(void *l, unsigned long *key, void **value);
633extern void drmSLDump(void *l);
634extern int drmSLLookupNeighbors(void *l, unsigned long key,
635 unsigned long *prev_key, void **prev_value,
636 unsigned long *next_key, void **next_value);
637
638#endif