blob: 88345bdf89f0772d80ad0ec3b16bea23d4b5bfdc [file] [log] [blame]
Thomas Hellstrom6cd88312004-03-23 21:08:48 +00001/*
2 * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
3 * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sub license,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
14 * of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 */
24#ifndef _VIA_DRM_H_
25#define _VIA_DRM_H_
26
27/* WARNING: These defines must be the same as what the Xserver uses.
28 * if you change them, you must change the defines in the Xserver.
29 */
30
31#ifndef _VIA_DEFINES_
32#define _VIA_DEFINES_
33
Thomas Hellstrom659e9a02006-02-17 17:25:41 +000034
Eric Anholt8c21b782005-08-15 18:07:12 +000035#if !defined(__KERNEL__) && !defined(_KERNEL)
Thomas Hellstromd2fd9202005-03-14 22:50:21 +000036#include "via_drmclient.h"
37#endif
38
Thomas Hellstrom2e0c2812006-01-06 11:57:40 +000039/*
40 * With the arrival of libdrm there is a need to version this file.
41 * As usual, bump MINOR for new features, MAJOR for changes that create
42 * backwards incompatibilities, (which should be avoided whenever possible).
Thomas Hellstrom2e0c2812006-01-06 11:57:40 +000043 */
44
Thomas Hellstrom6c041852007-02-02 09:15:44 +010045#define VIA_DRM_DRIVER_DATE "20070202"
Thomas Hellstrom659e9a02006-02-17 17:25:41 +000046
Thomas Hellstrom126673d2006-07-11 14:37:37 +000047#define VIA_DRM_DRIVER_MAJOR 2
Thomas Hellstrom2980ec22006-12-27 19:38:33 +010048#define VIA_DRM_DRIVER_MINOR 11
Thomas Hellstrom6c041852007-02-02 09:15:44 +010049#define VIA_DRM_DRIVER_PATCHLEVEL 1
Dave Airlie9b984b32006-08-19 17:59:18 +100050#define VIA_DRM_DRIVER_VERSION (((VIA_DRM_DRIVER_MAJOR) << 16) | (VIA_DRM_DRIVER_MINOR))
Thomas Hellstrom2e0c2812006-01-06 11:57:40 +000051
Thomas Hellstrom6cd88312004-03-23 21:08:48 +000052#define VIA_NR_SAREA_CLIPRECTS 8
Dave Airlie9b984b32006-08-19 17:59:18 +100053#define VIA_NR_XVMC_PORTS 10
54#define VIA_NR_XVMC_LOCKS 5
55#define VIA_MAX_CACHELINE_SIZE 64
Thomas Hellstrom6cd88312004-03-23 21:08:48 +000056#define XVMCLOCKPTR(saPriv,lockNo) \
Thomas Hellstromd2fd9202005-03-14 22:50:21 +000057 ((volatile drm_hw_lock_t *)(((((unsigned long) (saPriv)->XvMCLockArea) + \
58 (VIA_MAX_CACHELINE_SIZE - 1)) & \
59 ~(VIA_MAX_CACHELINE_SIZE - 1)) + \
60 VIA_MAX_CACHELINE_SIZE*(lockNo)))
Thomas Hellstrom6cd88312004-03-23 21:08:48 +000061
62/* Each region is a minimum of 64k, and there are at most 64 of them.
63 */
64#define VIA_NR_TEX_REGIONS 64
65#define VIA_LOG_MIN_TEX_REGION_SIZE 16
66#endif
67
Jon Smirl9f9a8f12004-09-30 21:12:10 +000068#define VIA_UPLOAD_TEX0IMAGE 0x1 /* handled clientside */
69#define VIA_UPLOAD_TEX1IMAGE 0x2 /* handled clientside */
Dave Airlie9b984b32006-08-19 17:59:18 +100070#define VIA_UPLOAD_CTX 0x4
Thomas Hellstrom6cd88312004-03-23 21:08:48 +000071#define VIA_UPLOAD_BUFFERS 0x8
72#define VIA_UPLOAD_TEX0 0x10
73#define VIA_UPLOAD_TEX1 0x20
74#define VIA_UPLOAD_CLIPRECTS 0x40
Dave Airlie9b984b32006-08-19 17:59:18 +100075#define VIA_UPLOAD_ALL 0xff
Thomas Hellstrom6cd88312004-03-23 21:08:48 +000076
77/* VIA specific ioctls */
Jon Smirlfa6b1d12004-09-27 19:51:38 +000078#define DRM_VIA_ALLOCMEM 0x00
Dave Airlie9b984b32006-08-19 17:59:18 +100079#define DRM_VIA_FREEMEM 0x01
Jon Smirlfa6b1d12004-09-27 19:51:38 +000080#define DRM_VIA_AGP_INIT 0x02
Dave Airlie9b984b32006-08-19 17:59:18 +100081#define DRM_VIA_FB_INIT 0x03
Jon Smirlfa6b1d12004-09-27 19:51:38 +000082#define DRM_VIA_MAP_INIT 0x04
83#define DRM_VIA_DEC_FUTEX 0x05
84#define NOT_USED
85#define DRM_VIA_DMA_INIT 0x07
86#define DRM_VIA_CMDBUFFER 0x08
Dave Airlie9b984b32006-08-19 17:59:18 +100087#define DRM_VIA_FLUSH 0x09
88#define DRM_VIA_PCICMD 0x0a
Thomas Hellstromaff0a252004-12-13 13:53:12 +000089#define DRM_VIA_CMDBUF_SIZE 0x0b
Thomas Hellstrom532ccb92005-03-28 21:21:42 +000090#define NOT_USED
Dave Airlie9b984b32006-08-19 17:59:18 +100091#define DRM_VIA_WAIT_IRQ 0x0d
92#define DRM_VIA_DMA_BLIT 0x0e
Thomas Hellstrom903e5702005-09-25 12:54:12 +000093#define DRM_VIA_BLIT_SYNC 0x0f
Jon Smirlfa6b1d12004-09-27 19:51:38 +000094
Thomas Hellstromaff0a252004-12-13 13:53:12 +000095#define DRM_IOCTL_VIA_ALLOCMEM DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_ALLOCMEM, drm_via_mem_t)
96#define DRM_IOCTL_VIA_FREEMEM DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_FREEMEM, drm_via_mem_t)
97#define DRM_IOCTL_VIA_AGP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_AGP_INIT, drm_via_agp_t)
98#define DRM_IOCTL_VIA_FB_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_FB_INIT, drm_via_fb_t)
99#define DRM_IOCTL_VIA_MAP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_MAP_INIT, drm_via_init_t)
100#define DRM_IOCTL_VIA_DEC_FUTEX DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_DEC_FUTEX, drm_via_futex_t)
101#define DRM_IOCTL_VIA_DMA_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_DMA_INIT, drm_via_dma_init_t)
102#define DRM_IOCTL_VIA_CMDBUFFER DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_CMDBUFFER, drm_via_cmdbuffer_t)
103#define DRM_IOCTL_VIA_FLUSH DRM_IO( DRM_COMMAND_BASE + DRM_VIA_FLUSH)
104#define DRM_IOCTL_VIA_PCICMD DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_PCICMD, drm_via_cmdbuffer_t)
105#define DRM_IOCTL_VIA_CMDBUF_SIZE DRM_IOWR( DRM_COMMAND_BASE + DRM_VIA_CMDBUF_SIZE, \
106 drm_via_cmdbuf_size_t)
Thomas Hellstrom532ccb92005-03-28 21:21:42 +0000107#define DRM_IOCTL_VIA_WAIT_IRQ DRM_IOWR( DRM_COMMAND_BASE + DRM_VIA_WAIT_IRQ, drm_via_irqwait_t)
Thomas Hellstrom903e5702005-09-25 12:54:12 +0000108#define DRM_IOCTL_VIA_DMA_BLIT DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_DMA_BLIT, drm_via_dmablit_t)
109#define DRM_IOCTL_VIA_BLIT_SYNC DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_BLIT_SYNC, drm_via_blitsync_t)
Thomas Hellstromb0c73b72004-09-07 16:48:44 +0000110
Thomas Hellstrom6cd88312004-03-23 21:08:48 +0000111/* Indices into buf.Setup where various bits of state are mirrored per
112 * context and per buffer. These can be fired at the card as a unit,
113 * or in a piecewise fashion as required.
114 */
Jon Smirl9f9a8f12004-09-30 21:12:10 +0000115
Thomas Hellstrom6cd88312004-03-23 21:08:48 +0000116#define VIA_TEX_SETUP_SIZE 8
117
118/* Flags for clear ioctl
119 */
120#define VIA_FRONT 0x1
121#define VIA_BACK 0x2
122#define VIA_DEPTH 0x4
123#define VIA_STENCIL 0x8
Thomas Hellstromb63b7712005-10-22 15:12:05 +0000124
125#define VIA_MEM_VIDEO 0 /* matches drm constant */
126#define VIA_MEM_AGP 1 /* matches drm constant */
127#define VIA_MEM_SYSTEM 2
128#define VIA_MEM_MIXED 3
129#define VIA_MEM_UNKNOWN 4
130
Thomas Hellstrom6cd88312004-03-23 21:08:48 +0000131typedef struct {
Thomas Hellstromd24194e2004-10-08 21:11:02 +0000132 uint32_t offset;
133 uint32_t size;
Jon Smirl9f9a8f12004-09-30 21:12:10 +0000134} drm_via_agp_t;
Thomas Hellstrom6cd88312004-03-23 21:08:48 +0000135
136typedef struct {
Thomas Hellstromd24194e2004-10-08 21:11:02 +0000137 uint32_t offset;
138 uint32_t size;
Jon Smirl9f9a8f12004-09-30 21:12:10 +0000139} drm_via_fb_t;
Thomas Hellstrom6cd88312004-03-23 21:08:48 +0000140
141typedef struct {
Dave Airliefec94a82004-10-09 11:12:24 +0000142 uint32_t context;
Thomas Hellstromd24194e2004-10-08 21:11:02 +0000143 uint32_t type;
144 uint32_t size;
Jon Smirl9f9a8f12004-09-30 21:12:10 +0000145 unsigned long index;
146 unsigned long offset;
147} drm_via_mem_t;
Thomas Hellstrom6cd88312004-03-23 21:08:48 +0000148
149typedef struct _drm_via_init {
Jon Smirl9f9a8f12004-09-30 21:12:10 +0000150 enum {
151 VIA_INIT_MAP = 0x01,
152 VIA_CLEANUP_MAP = 0x02
153 } func;
Thomas Hellstrom6cd88312004-03-23 21:08:48 +0000154
Jon Smirl9f9a8f12004-09-30 21:12:10 +0000155 unsigned long sarea_priv_offset;
156 unsigned long fb_offset;
157 unsigned long mmio_offset;
158 unsigned long agpAddr;
Thomas Hellstrom6cd88312004-03-23 21:08:48 +0000159} drm_via_init_t;
160
161typedef struct _drm_via_futex {
Jon Smirl9f9a8f12004-09-30 21:12:10 +0000162 enum {
163 VIA_FUTEX_WAIT = 0x00,
164 VIA_FUTEX_WAKE = 0X01
Thomas Hellstromd24194e2004-10-08 21:11:02 +0000165 } func;
166 uint32_t ms;
167 uint32_t lock;
168 uint32_t val;
Thomas Hellstrom6cd88312004-03-23 21:08:48 +0000169} drm_via_futex_t;
170
Erdi Chen25e319c2004-08-24 01:44:37 +0000171typedef struct _drm_via_dma_init {
Jon Smirl9f9a8f12004-09-30 21:12:10 +0000172 enum {
173 VIA_INIT_DMA = 0x01,
Thomas Hellstrom4f8fa602004-11-27 22:55:31 +0000174 VIA_CLEANUP_DMA = 0x02,
Dave Airlie9b984b32006-08-19 17:59:18 +1000175 VIA_DMA_INITIALIZED = 0x03
Jon Smirl9f9a8f12004-09-30 21:12:10 +0000176 } func;
Erdi Chen25e319c2004-08-24 01:44:37 +0000177
Jon Smirl9f9a8f12004-09-30 21:12:10 +0000178 unsigned long offset;
179 unsigned long size;
180 unsigned long reg_pause_addr;
Erdi Chen25e319c2004-08-24 01:44:37 +0000181} drm_via_dma_init_t;
182
183typedef struct _drm_via_cmdbuffer {
Thomas Hellstrom56711372005-07-15 21:22:51 +0000184 char __user *buf;
Jon Smirl9f9a8f12004-09-30 21:12:10 +0000185 unsigned long size;
Erdi Chen25e319c2004-08-24 01:44:37 +0000186} drm_via_cmdbuffer_t;
187
Thomas Hellstrom6cd88312004-03-23 21:08:48 +0000188/* Warning: If you change the SAREA structure you must change the Xserver
189 * structure as well */
190
191typedef struct _drm_via_tex_region {
Jon Smirl9f9a8f12004-09-30 21:12:10 +0000192 unsigned char next, prev; /* indices to form a circular LRU */
193 unsigned char inUse; /* owned by a client, or free? */
194 int age; /* tracked by clients to update local LRU's */
Thomas Hellstrom6cd88312004-03-23 21:08:48 +0000195} drm_via_tex_region_t;
196
197typedef struct _drm_via_sarea {
Jon Smirl9f9a8f12004-09-30 21:12:10 +0000198 unsigned int dirty;
199 unsigned int nbox;
200 drm_clip_rect_t boxes[VIA_NR_SAREA_CLIPRECTS];
201 drm_via_tex_region_t texList[VIA_NR_TEX_REGIONS + 1];
202 int texAge; /* last time texture was uploaded */
203 int ctxOwner; /* last context to upload state */
204 int vertexPrim;
Thomas Hellstrom6cd88312004-03-23 21:08:48 +0000205
Jon Smirl9f9a8f12004-09-30 21:12:10 +0000206 /*
207 * Below is for XvMC.
208 * We want the lock integers alone on, and aligned to, a cache line.
209 * Therefore this somewhat strange construct.
210 */
Thomas Hellstrom6cd88312004-03-23 21:08:48 +0000211
Jon Smirl9f9a8f12004-09-30 21:12:10 +0000212 char XvMCLockArea[VIA_MAX_CACHELINE_SIZE * (VIA_NR_XVMC_LOCKS + 1)];
Thomas Hellstrom6cd88312004-03-23 21:08:48 +0000213
Jon Smirl9f9a8f12004-09-30 21:12:10 +0000214 unsigned int XvMCDisplaying[VIA_NR_XVMC_PORTS];
215 unsigned int XvMCSubPicOn[VIA_NR_XVMC_PORTS];
Thomas Hellstromb63b7712005-10-22 15:12:05 +0000216 unsigned int XvMCCtxNoGrabbed; /* Last context to hold decoder */
Thomas Hellstrom6f6d2a52004-04-12 10:18:18 +0000217
Thomas Hellstromb63b7712005-10-22 15:12:05 +0000218 /* Used by the 3d driver only at this point, for pageflipping:
219 */
Dave Airlie9b984b32006-08-19 17:59:18 +1000220 unsigned int pfCurrentOffset;
Thomas Hellstrom6cd88312004-03-23 21:08:48 +0000221} drm_via_sarea_t;
222
Thomas Hellstromaff0a252004-12-13 13:53:12 +0000223typedef struct _drm_via_cmdbuf_size {
224 enum {
225 VIA_CMDBUF_SPACE = 0x01,
226 VIA_CMDBUF_LAG = 0x02
227 } func;
228 int wait;
229 uint32_t size;
230} drm_via_cmdbuf_size_t;
Thomas Hellstrom4f8fa602004-11-27 22:55:31 +0000231
Thomas Hellstrom532ccb92005-03-28 21:21:42 +0000232typedef enum {
233 VIA_IRQ_ABSOLUTE = 0x0,
234 VIA_IRQ_RELATIVE = 0x1,
235 VIA_IRQ_SIGNAL = 0x10000000,
236 VIA_IRQ_FORCE_SEQUENCE = 0x20000000
237} via_irq_seq_type_t;
238
239#define VIA_IRQ_FLAGS_MASK 0xF0000000
240
Dave Airlie42cd50f2006-01-02 03:25:49 +0000241enum drm_via_irqs{
242 drm_via_irq_hqv0 = 0,
243 drm_via_irq_hqv1,
244 drm_via_irq_dma0_dd,
245 drm_via_irq_dma0_td,
246 drm_via_irq_dma1_dd,
247 drm_via_irq_dma1_td,
248 drm_via_irq_num
249};
Thomas Hellstrom903e5702005-09-25 12:54:12 +0000250
Thomas Hellstrom532ccb92005-03-28 21:21:42 +0000251struct drm_via_wait_irq_request{
252 unsigned irq;
253 via_irq_seq_type_t type;
254 uint32_t sequence;
255 uint32_t signal;
256};
257
258typedef union drm_via_irqwait {
259 struct drm_via_wait_irq_request request;
260 struct drm_wait_vblank_reply reply;
261} drm_via_irqwait_t;
Thomas Hellstrom4f8fa602004-11-27 22:55:31 +0000262
Thomas Hellstrom903e5702005-09-25 12:54:12 +0000263typedef struct drm_via_blitsync {
264 uint32_t sync_handle;
265 unsigned engine;
266} drm_via_blitsync_t;
267
Thomas Hellstrom2e0c2812006-01-06 11:57:40 +0000268/*
269 * Below,"flags" is currently unused but will be used for possible future
270 * extensions like kernel space bounce buffers for bad alignments and
271 * blit engine busy-wait polling for better latency in the absence of
272 * interrupts.
273 */
274
Thomas Hellstrom903e5702005-09-25 12:54:12 +0000275typedef struct drm_via_dmablit {
Dave Airlie9b984b32006-08-19 17:59:18 +1000276 uint32_t num_lines;
277 uint32_t line_length;
Thomas Hellstrom903e5702005-09-25 12:54:12 +0000278
Dave Airlie9b984b32006-08-19 17:59:18 +1000279 uint32_t fb_addr;
280 uint32_t fb_stride;
Thomas Hellstrom903e5702005-09-25 12:54:12 +0000281
Dave Airlie9b984b32006-08-19 17:59:18 +1000282 unsigned char *mem_addr;
283 uint32_t mem_stride;
Thomas Hellstrom903e5702005-09-25 12:54:12 +0000284
Thomas Hellstrom2e0c2812006-01-06 11:57:40 +0000285 uint32_t flags;
Dave Airlie9b984b32006-08-19 17:59:18 +1000286 int to_fb;
Thomas Hellstrom903e5702005-09-25 12:54:12 +0000287
288 drm_via_blitsync_t sync;
289} drm_via_dmablit_t;
290
291
Jon Smirl9f9a8f12004-09-30 21:12:10 +0000292#endif /* _VIA_DRM_H_ */