Guchun Chen | 0000162 | 2019-07-31 16:56:49 +0800 | [diff] [blame] | 1 | { |
| 2 | "version": "0.0.1", |
| 3 | "block": { |
Guchun Chen | 1492255 | 2019-08-06 15:14:29 +0800 | [diff] [blame] | 4 | "umc": { |
| 5 | "index": 0 |
| 6 | }, |
Guchun Chen | 0000162 | 2019-07-31 16:56:49 +0800 | [diff] [blame] | 7 | "gfx": { |
| 8 | "index": 2, |
| 9 | "subblock": { |
| 10 | "gfx_cpc_scratch": 0, |
| 11 | "gfx_cpc_ucode": 1, |
| 12 | "gfx_dc_state_me1": 2, |
| 13 | "gfx_dc_csinvoc_me1": 3, |
| 14 | "gfx_dc_restore_me1": 4, |
| 15 | "gfx_dc_state_me2": 5, |
| 16 | "gfx_dc_csinvoc_me2": 6, |
| 17 | "gfx_dc_restore_me2": 7, |
| 18 | "gfx_cpf_roq_me2": 8, |
| 19 | "gfx_cpf_roq_me1": 9, |
| 20 | "gfx_cpf_tag": 10, |
| 21 | "gfx_cpg_dma_roq": 11, |
| 22 | "gfx_cpg_dma_tag": 12, |
| 23 | "gfx_cpg_tag": 13, |
| 24 | "gfx_gds_mem": 14, |
| 25 | "gfx_gds_input_queue": 15, |
| 26 | "gfx_gds_oa_phy_cmd_ram_mem": 16, |
| 27 | "gfx_gds_oa_phy_data_ram_mem": 17, |
| 28 | "gfx_gds_oa_pipe_mem": 18, |
| 29 | "gfx_spi_sr_mem": 19, |
| 30 | "gfx_sq_sgpr": 20, |
| 31 | "gfx_sq_lds_d": 21, |
| 32 | "gfx_sq_lds_i": 22, |
| 33 | "gfx_sq_vgpr": 23, |
| 34 | "gfx_sqc_inst_utcl1_lfifo": 24, |
| 35 | "gfx_sqc_data_cu0_write_data_buf": 25, |
| 36 | "gfx_sqc_data_cu0_utcl1_lfifo": 26, |
| 37 | "gfx_sqc_data_cu1_write_data_buf": 27, |
| 38 | "gfx_sqc_data_cu1_utcl1_lfifo": 28, |
| 39 | "gfx_sqc_data_cu2_write_data_buf": 29, |
| 40 | "gfx_sqc_data_cu2_utcl1_lfifo": 30, |
| 41 | "gfx_sqc_inst_banka_tag_ram": 31, |
| 42 | "gfx_sqc_inst_banka_utcl1_miss_fifo": 32, |
| 43 | "gfx_sqc_inst_banka_miss_fifo": 33, |
| 44 | "gfx_sqc_inst_banka_bank_ram": 34, |
| 45 | "gfx_sqc_data_banka_tag_ram": 35, |
| 46 | "gfx_sqc_data_banka_hit_fifo": 36, |
| 47 | "gfx_sqc_data_banka_miss_fifo": 37, |
| 48 | "gfx_sqc_data_banka_dirty_bit_ram": 38, |
| 49 | "gfx_sqc_data_banka_bank_ram": 39, |
| 50 | "gfx_sqc_inst_bankb_tag_ram": 40, |
| 51 | "gfx_sqc_inst_bankb_utcl1_miss_fifo": 41, |
| 52 | "gfx_sqc_inst_bankb_miss_fifo": 42, |
| 53 | "gfx_sqc_inst_bankb_bank_ram": 43, |
| 54 | "gfx_sqc_data_bankb_tag_ram": 44, |
| 55 | "gfx_sqc_data_bankb_hit_fifo": 45, |
| 56 | "gfx_sqc_data_bankb_miss_fifo": 46, |
| 57 | "gfx_sqc_data_bankb_dirty_bit_ram": 47, |
| 58 | "gfx_sqc_data_bankb_bank_ram": 48, |
| 59 | "gfx_ta_fs_dfifo": 49, |
| 60 | "gfx_ta_fs_afifo": 50, |
| 61 | "gfx_ta_fl_lfifo": 51, |
| 62 | "gfx_ta_fx_lfifo": 52, |
| 63 | "gfx_ta_fs_cfifo": 53, |
| 64 | "gfx_tca_hole_fifo": 54, |
| 65 | "gfx_tca_req_fifo": 55, |
| 66 | "gfx_tcc_cache_data": 56, |
| 67 | "gfx_tcc_cache_data_bank_0_1": 57, |
| 68 | "gfx_tcc_cache_data_bank_1_0": 58, |
| 69 | "gfx_tcc_cache_data_bank_1_1": 59, |
| 70 | "gfx_tcc_cache_dirty_bank_0": 60, |
| 71 | "gfx_tcc_cache_dirty_bank_1": 61, |
| 72 | "gfx_tcc_high_rate_tag": 62, |
| 73 | "gfx_tcc_low_rate_tag": 63, |
| 74 | "gfx_tcc_in_use_dec": 64, |
| 75 | "gfx_tcc_in_use_transfer": 65, |
| 76 | "gfx_tcc_return_data": 66, |
| 77 | "gfx_tcc_return_control": 67, |
| 78 | "gfx_tcc_uc_atomic_fifo": 68, |
| 79 | "gfx_tcc_write_return": 69, |
| 80 | "gfx_tcc_write_cache_read": 70, |
| 81 | "gfx_tcc_src_fifo": 71, |
| 82 | "gfx_tcc_src_fifo_next_ram": 72, |
| 83 | "gfx_tcc_cache_tag_probe_fifo": 73, |
| 84 | "gfx_tcc_latency_fifo": 74, |
| 85 | "gfx_tcc_latency_fifo_next_ram": 75, |
| 86 | "gfx_tcc_wrret_tag_write_return": 76, |
| 87 | "gfx_tcc_atomic_return_buffer": 77, |
| 88 | "gfx_tci_write_ram": 78, |
| 89 | "gfx_tcp_cache_ram": 79, |
| 90 | "gfx_tcp_lfifo_ram": 80, |
| 91 | "gfx_tcp_cmd_fifo": 81, |
| 92 | "gfx_tcp_vm_fifo": 82, |
| 93 | "gfx_tcp_db_ram": 83, |
| 94 | "gfx_tcp_utcl1_lfifo0": 84, |
| 95 | "gfx_tcp_utcl1_lfifo1": 85, |
| 96 | "gfx_td_ss_fifo_lo": 86, |
| 97 | "gfx_td_ss_fifo_hi": 87, |
| 98 | "gfx_td_cs_fifo": 88, |
| 99 | "gfx_ea_dramrd_cmdmem": 89, |
| 100 | "gfx_ea_dramwr_cmdmem": 90, |
| 101 | "gfx_ea_dramwr_datamem": 91, |
| 102 | "gfx_ea_rret_tagmem": 92, |
| 103 | "gfx_ea_wret_tagmem": 93, |
| 104 | "gfx_ea_gmird_cmdmem": 94, |
| 105 | "gfx_ea_gmiwr_cmdmem": 95, |
| 106 | "gfx_ea_gmiwr_datamem": 96, |
| 107 | "gfx_ea_dramrd_pagemem": 97, |
| 108 | "gfx_ea_dramwr_pagemem": 98, |
| 109 | "gfx_ea_iord_cmdmem": 99, |
| 110 | "gfx_ea_iowr_cmdmem": 100, |
| 111 | "gfx_ea_iowr_datamem": 101, |
| 112 | "gfx_ea_gmird_pagemem": 102, |
| 113 | "gfx_ea_gmiwr_pagemem": 103, |
| 114 | "gfx_ea_mam_d0mem": 104, |
| 115 | "gfx_ea_mam_d1mem": 105, |
| 116 | "gfx_ea_mam_d2mem": 106, |
| 117 | "gfx_ea_mam_d3mem": 107, |
| 118 | "utc_vml2_bank_cache": 108, |
| 119 | "utc_vml2_walker": 109, |
| 120 | "utc_atcl2_cache_2m_bank": 110, |
| 121 | "utc_atcl2_cache_4k_bank": 111 |
| 122 | } |
| 123 | }, |
| 124 | }, |
| 125 | "type": { |
| 126 | "parity": 1, |
| 127 | "single_correctable": 2, |
| 128 | "multi_uncorrectable": 4, |
| 129 | "poison": 8 |
| 130 | }, |
| 131 | "tests": [ |
| 132 | { |
Guchun Chen | 1492255 | 2019-08-06 15:14:29 +0800 | [diff] [blame] | 133 | "name": "ras_umc.1.0", |
| 134 | "block": "umc", |
| 135 | "type": "single_correctable", |
| 136 | "address": 0, |
| 137 | "value": 0 |
| 138 | }, |
| 139 | { |
| 140 | "name": "ras_umc.1.0", |
| 141 | "block": "umc", |
| 142 | "type": "multi_uncorrectable", |
| 143 | "address": 0, |
| 144 | "value": 0 |
| 145 | }, |
| 146 | { |
Guchun Chen | 0000162 | 2019-07-31 16:56:49 +0800 | [diff] [blame] | 147 | "name": "ras_gfx.2.1", |
| 148 | "block": "gfx", |
| 149 | "subblock": "gfx_cpc_ucode", |
| 150 | "type": "single_correctable", |
| 151 | "address": 0, |
| 152 | "value": 0 |
| 153 | }, |
| 154 | { |
| 155 | "name": "ras_gfx.2.10", |
| 156 | "block": "gfx", |
| 157 | "subblock": "gfx_cpf_tag", |
| 158 | "type": "single_correctable", |
| 159 | "address": 0, |
| 160 | "value": 0 |
| 161 | }, |
| 162 | { |
| 163 | "name": "ras_gfx.2.13", |
| 164 | "block": "gfx", |
| 165 | "subblock": "gfx_cpg_tag", |
| 166 | "type": "single_correctable", |
| 167 | "address": 0, |
| 168 | "value": 0 |
| 169 | }, |
| 170 | { |
| 171 | "name": "ras_gfx.2.21", |
| 172 | "block": "gfx", |
| 173 | "subblock": "gfx_sq_lds_d", |
| 174 | "type": "single_correctable", |
| 175 | "address": 0, |
| 176 | "value": 0 |
| 177 | }, |
| 178 | { |
| 179 | "name": "ras_gfx.2.28", |
| 180 | "block": "gfx", |
| 181 | "subblock": "gfx_sqc_data_cu1_utcl1_lfifo", |
| 182 | "type": "single_correctable", |
| 183 | "address": 0, |
| 184 | "value": 0 |
| 185 | }, |
| 186 | { |
| 187 | "name": "ras_gfx.2.31", |
| 188 | "block": "gfx", |
| 189 | "subblock": "gfx_sqc_inst_banka_tag_ram", |
| 190 | "type": "single_correctable", |
| 191 | "address": 0, |
| 192 | "value": 0 |
| 193 | }, |
| 194 | { |
| 195 | "name": "ras_gfx.2.40", |
| 196 | "block": "gfx", |
| 197 | "subblock": "gfx_sqc_inst_bankb_tag_ram", |
| 198 | "type": "single_correctable", |
| 199 | "address": 0, |
| 200 | "value": 0 |
| 201 | }, |
| 202 | { |
| 203 | "name": "ras_gfx.2.49", |
| 204 | "block": "gfx", |
| 205 | "subblock": "gfx_ta_fs_dfifo", |
| 206 | "type": "single_correctable", |
| 207 | "address": 0, |
| 208 | "value": 0 |
| 209 | }, |
| 210 | { |
| 211 | "name": "ras_gfx.2.56", |
| 212 | "block": "gfx", |
| 213 | "subblock": "gfx_tcc_cache_data", |
| 214 | "type": "single_correctable", |
| 215 | "address": 0, |
| 216 | "value": 0 |
| 217 | }, |
| 218 | { |
| 219 | "name": "ras_gfx.2.57", |
| 220 | "block": "gfx", |
| 221 | "subblock": "gfx_tcc_cache_data_bank_0_1", |
| 222 | "type": "single_correctable", |
| 223 | "address": 0, |
| 224 | "value": 0 |
| 225 | }, |
| 226 | { |
| 227 | "name": "ras_gfx.2.58", |
| 228 | "block": "gfx", |
| 229 | "subblock": "gfx_tcc_cache_data_bank_1_0", |
| 230 | "type": "single_correctable", |
| 231 | "address": 0, |
| 232 | "value": 0 |
| 233 | }, |
| 234 | { |
| 235 | "name": "ras_gfx.2.59", |
| 236 | "block": "gfx", |
| 237 | "subblock": "gfx_tcc_cache_data_bank_1_1", |
| 238 | "type": "single_correctable", |
| 239 | "address": 0, |
| 240 | "value": 0 |
| 241 | }, |
| 242 | { |
| 243 | "name": "ras_gfx.2.79", |
| 244 | "block": "gfx", |
| 245 | "subblock": "gfx_tcp_cache_ram", |
| 246 | "type": "single_correctable", |
| 247 | "address": 0, |
| 248 | "value": 0 |
| 249 | }, |
| 250 | { |
| 251 | "name": "ras_gfx.2.86", |
| 252 | "block": "gfx", |
| 253 | "subblock": "gfx_td_ss_fifo_lo", |
| 254 | "type": "single_correctable", |
| 255 | "address": 0, |
| 256 | "value": 0 |
| 257 | }, |
| 258 | { |
| 259 | "name": "ras_gfx.2.89", |
| 260 | "block": "gfx", |
| 261 | "subblock": "gfx_ea_dramrd_cmdmem", |
| 262 | "type": "single_correctable", |
| 263 | "address": 0, |
| 264 | "value": 0 |
| 265 | }, |
| 266 | ] |
| 267 | } |