Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1 | /************************************************************************** |
| 2 | * |
| 3 | * Copyright © 2007 Red Hat Inc. |
| 4 | * Copyright © 2007 Intel Corporation |
| 5 | * Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND., USA |
| 6 | * All Rights Reserved. |
| 7 | * |
| 8 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 9 | * copy of this software and associated documentation files (the |
| 10 | * "Software"), to deal in the Software without restriction, including |
| 11 | * without limitation the rights to use, copy, modify, merge, publish, |
| 12 | * distribute, sub license, and/or sell copies of the Software, and to |
| 13 | * permit persons to whom the Software is furnished to do so, subject to |
| 14 | * the following conditions: |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, |
| 20 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR |
| 21 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE |
| 22 | * USE OR OTHER DEALINGS IN THE SOFTWARE. |
| 23 | * |
| 24 | * The above copyright notice and this permission notice (including the |
| 25 | * next paragraph) shall be included in all copies or substantial portions |
| 26 | * of the Software. |
| 27 | * |
| 28 | * |
| 29 | **************************************************************************/ |
| 30 | /* |
| 31 | * Authors: Thomas Hellström <thomas-at-tungstengraphics-dot-com> |
| 32 | * Keith Whitwell <keithw-at-tungstengraphics-dot-com> |
| 33 | * Eric Anholt <eric@anholt.net> |
| 34 | * Dave Airlie <airlied@linux.ie> |
| 35 | */ |
| 36 | |
Eric Anholt | 368b392 | 2008-09-10 13:54:34 -0700 | [diff] [blame] | 37 | #ifdef HAVE_CONFIG_H |
| 38 | #include "config.h" |
| 39 | #endif |
| 40 | |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 41 | #include <xf86drm.h> |
Jesse Barnes | 276c07d | 2008-11-13 13:52:04 -0800 | [diff] [blame] | 42 | #include <fcntl.h> |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 43 | #include <stdio.h> |
| 44 | #include <stdlib.h> |
| 45 | #include <string.h> |
| 46 | #include <unistd.h> |
| 47 | #include <assert.h> |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 48 | #include <pthread.h> |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 49 | #include <sys/ioctl.h> |
| 50 | #include <sys/mman.h> |
Jesse Barnes | 276c07d | 2008-11-13 13:52:04 -0800 | [diff] [blame] | 51 | #include <sys/stat.h> |
| 52 | #include <sys/types.h> |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 53 | |
| 54 | #include "errno.h" |
Eric Anholt | 72abe98 | 2009-02-18 13:06:35 -0800 | [diff] [blame] | 55 | #include "libdrm_lists.h" |
Chris Wilson | 04495ee | 2009-10-02 04:39:22 +0100 | [diff] [blame] | 56 | #include "intel_atomic.h" |
Eric Anholt | c485742 | 2008-06-03 10:20:49 -0700 | [diff] [blame] | 57 | #include "intel_bufmgr.h" |
Eric Anholt | 738e36a | 2008-09-05 10:35:32 +0100 | [diff] [blame] | 58 | #include "intel_bufmgr_priv.h" |
Eric Anholt | cbdd627 | 2009-01-27 17:16:11 -0800 | [diff] [blame] | 59 | #include "intel_chipset.h" |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 60 | #include "string.h" |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 61 | |
| 62 | #include "i915_drm.h" |
| 63 | |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 64 | #define DBG(...) do { \ |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 65 | if (bufmgr_gem->bufmgr.debug) \ |
| 66 | fprintf(stderr, __VA_ARGS__); \ |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 67 | } while (0) |
| 68 | |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 69 | typedef struct _drm_intel_bo_gem drm_intel_bo_gem; |
Keith Packard | a919ff5 | 2008-06-05 15:58:09 -0700 | [diff] [blame] | 70 | |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 71 | struct drm_intel_gem_bo_bucket { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 72 | drmMMListHead head; |
| 73 | unsigned long size; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 74 | }; |
| 75 | |
Eric Anholt | 469655f | 2009-05-18 16:07:45 -0700 | [diff] [blame] | 76 | /* Only cache objects up to 64MB. Bigger than that, and the rounding of the |
| 77 | * size makes many operations fail that wouldn't otherwise. |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 78 | */ |
Eric Anholt | 469655f | 2009-05-18 16:07:45 -0700 | [diff] [blame] | 79 | #define DRM_INTEL_GEM_BO_BUCKETS 14 |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 80 | typedef struct _drm_intel_bufmgr_gem { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 81 | drm_intel_bufmgr bufmgr; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 82 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 83 | int fd; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 84 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 85 | int max_relocs; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 86 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 87 | pthread_mutex_t lock; |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 88 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 89 | struct drm_i915_gem_exec_object *exec_objects; |
| 90 | drm_intel_bo **exec_bos; |
| 91 | int exec_size; |
| 92 | int exec_count; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 93 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 94 | /** Array of lists of cached gem objects of power-of-two sizes */ |
| 95 | struct drm_intel_gem_bo_bucket cache_bucket[DRM_INTEL_GEM_BO_BUCKETS]; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 96 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 97 | uint64_t gtt_size; |
| 98 | int available_fences; |
| 99 | int pci_device; |
| 100 | char bo_reuse; |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 101 | } drm_intel_bufmgr_gem; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 102 | |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 103 | struct _drm_intel_bo_gem { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 104 | drm_intel_bo bo; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 105 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 106 | atomic_t refcount; |
| 107 | uint32_t gem_handle; |
| 108 | const char *name; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 109 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 110 | /** |
| 111 | * Kenel-assigned global name for this object |
| 112 | */ |
| 113 | unsigned int global_name; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 114 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 115 | /** |
| 116 | * Index of the buffer within the validation list while preparing a |
| 117 | * batchbuffer execution. |
| 118 | */ |
| 119 | int validate_index; |
Keith Packard | 18f091d | 2008-12-15 15:08:12 -0800 | [diff] [blame] | 120 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 121 | /** |
| 122 | * Current tiling mode |
| 123 | */ |
| 124 | uint32_t tiling_mode; |
| 125 | uint32_t swizzle_mode; |
Eric Anholt | 3f3c5be | 2009-07-09 17:49:46 -0700 | [diff] [blame] | 126 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 127 | time_t free_time; |
Keith Packard | 329e086 | 2008-06-05 16:05:35 -0700 | [diff] [blame] | 128 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 129 | /** Array passed to the DRM containing relocation information. */ |
| 130 | struct drm_i915_gem_relocation_entry *relocs; |
| 131 | /** Array of bos corresponding to relocs[i].target_handle */ |
| 132 | drm_intel_bo **reloc_target_bo; |
| 133 | /** Number of entries in relocs */ |
| 134 | int reloc_count; |
| 135 | /** Mapped address for the buffer, saved across map/unmap cycles */ |
| 136 | void *mem_virtual; |
| 137 | /** GTT virtual address for the buffer, saved across map/unmap cycles */ |
| 138 | void *gtt_virtual; |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 139 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 140 | /** BO cache list */ |
| 141 | drmMMListHead head; |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 142 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 143 | /** |
| 144 | * Boolean of whether this BO and its children have been included in |
| 145 | * the current drm_intel_bufmgr_check_aperture_space() total. |
| 146 | */ |
| 147 | char included_in_check_aperture; |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 148 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 149 | /** |
| 150 | * Boolean of whether this buffer has been used as a relocation |
| 151 | * target and had its size accounted for, and thus can't have any |
| 152 | * further relocations added to it. |
| 153 | */ |
| 154 | char used_as_reloc_target; |
Keith Packard | 5b5ce30 | 2009-05-11 13:42:12 -0700 | [diff] [blame] | 155 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 156 | /** |
| 157 | * Boolean of whether this buffer can be re-used |
| 158 | */ |
| 159 | char reusable; |
| 160 | |
| 161 | /** |
| 162 | * Size in bytes of this buffer and its relocation descendents. |
| 163 | * |
| 164 | * Used to avoid costly tree walking in |
| 165 | * drm_intel_bufmgr_check_aperture in the common case. |
| 166 | */ |
| 167 | int reloc_tree_size; |
| 168 | |
| 169 | /** |
| 170 | * Number of potential fence registers required by this buffer and its |
| 171 | * relocations. |
| 172 | */ |
| 173 | int reloc_tree_fences; |
Keith Packard | a919ff5 | 2008-06-05 15:58:09 -0700 | [diff] [blame] | 174 | }; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 175 | |
Keith Packard | b13f4e1 | 2008-11-21 01:49:39 -0800 | [diff] [blame] | 176 | static unsigned int |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 177 | drm_intel_gem_estimate_batch_space(drm_intel_bo ** bo_array, int count); |
Keith Packard | b13f4e1 | 2008-11-21 01:49:39 -0800 | [diff] [blame] | 178 | |
| 179 | static unsigned int |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 180 | drm_intel_gem_compute_batch_space(drm_intel_bo ** bo_array, int count); |
Keith Packard | b13f4e1 | 2008-11-21 01:49:39 -0800 | [diff] [blame] | 181 | |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 182 | static int |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 183 | drm_intel_gem_bo_get_tiling(drm_intel_bo *bo, uint32_t * tiling_mode, |
| 184 | uint32_t * swizzle_mode); |
Keith Packard | 18f091d | 2008-12-15 15:08:12 -0800 | [diff] [blame] | 185 | |
| 186 | static int |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 187 | drm_intel_gem_bo_set_tiling(drm_intel_bo *bo, uint32_t * tiling_mode, |
Keith Packard | 18f091d | 2008-12-15 15:08:12 -0800 | [diff] [blame] | 188 | uint32_t stride); |
| 189 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 190 | static void drm_intel_gem_bo_unreference_locked(drm_intel_bo *bo); |
Eric Anholt | 0d7ad7e | 2009-10-20 14:19:38 -0700 | [diff] [blame] | 191 | static void drm_intel_gem_bo_unreference_locked_timed(drm_intel_bo *bo, |
| 192 | time_t time); |
Chris Wilson | 04495ee | 2009-10-02 04:39:22 +0100 | [diff] [blame] | 193 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 194 | static void drm_intel_gem_bo_unreference(drm_intel_bo *bo); |
Keith Packard | 18f091d | 2008-12-15 15:08:12 -0800 | [diff] [blame] | 195 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 196 | static void drm_intel_gem_bo_free(drm_intel_bo *bo); |
Chris Wilson | 0fb215a | 2009-10-02 04:31:34 +0100 | [diff] [blame] | 197 | |
Jesse Barnes | 3a7dfcd | 2009-10-06 14:34:06 -0700 | [diff] [blame] | 198 | static unsigned long |
| 199 | drm_intel_gem_bo_tile_size(drm_intel_bufmgr_gem *bufmgr_gem, unsigned long size, |
| 200 | uint32_t *tiling_mode) |
| 201 | { |
| 202 | unsigned long min_size, max_size; |
| 203 | unsigned long i; |
| 204 | |
| 205 | if (*tiling_mode == I915_TILING_NONE) |
| 206 | return size; |
| 207 | |
| 208 | /* 965+ just need multiples of page size for tiling */ |
| 209 | if (IS_I965G(bufmgr_gem)) |
| 210 | return ROUND_UP_TO(size, 4096); |
| 211 | |
| 212 | /* Older chips need powers of two, of at least 512k or 1M */ |
| 213 | if (IS_I9XX(bufmgr_gem)) { |
| 214 | min_size = 1024*1024; |
| 215 | max_size = 128*1024*1024; |
| 216 | } else { |
| 217 | min_size = 512*1024; |
| 218 | max_size = 64*1024*1024; |
| 219 | } |
| 220 | |
| 221 | if (size > max_size) { |
| 222 | *tiling_mode = I915_TILING_NONE; |
| 223 | return size; |
| 224 | } |
| 225 | |
| 226 | for (i = min_size; i < size; i <<= 1) |
| 227 | ; |
| 228 | |
| 229 | return i; |
| 230 | } |
| 231 | |
| 232 | /* |
| 233 | * Round a given pitch up to the minimum required for X tiling on a |
| 234 | * given chip. We use 512 as the minimum to allow for a later tiling |
| 235 | * change. |
| 236 | */ |
| 237 | static unsigned long |
| 238 | drm_intel_gem_bo_tile_pitch(drm_intel_bufmgr_gem *bufmgr_gem, |
| 239 | unsigned long pitch, uint32_t tiling_mode) |
| 240 | { |
| 241 | unsigned long tile_width = 512; |
| 242 | unsigned long i; |
| 243 | |
| 244 | if (tiling_mode == I915_TILING_NONE) |
| 245 | return ROUND_UP_TO(pitch, tile_width); |
| 246 | |
| 247 | /* 965 is flexible */ |
| 248 | if (IS_I965G(bufmgr_gem)) |
| 249 | return ROUND_UP_TO(pitch, tile_width); |
| 250 | |
| 251 | /* Pre-965 needs power of two tile width */ |
| 252 | for (i = tile_width; i < pitch; i <<= 1) |
| 253 | ; |
| 254 | |
| 255 | return i; |
| 256 | } |
| 257 | |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 258 | static struct drm_intel_gem_bo_bucket * |
| 259 | drm_intel_gem_bo_bucket_for_size(drm_intel_bufmgr_gem *bufmgr_gem, |
| 260 | unsigned long size) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 261 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 262 | int i; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 263 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 264 | for (i = 0; i < DRM_INTEL_GEM_BO_BUCKETS; i++) { |
| 265 | struct drm_intel_gem_bo_bucket *bucket = |
| 266 | &bufmgr_gem->cache_bucket[i]; |
| 267 | if (bucket->size >= size) { |
| 268 | return bucket; |
| 269 | } |
Eric Anholt | 78fa590 | 2009-07-06 11:55:28 -0700 | [diff] [blame] | 270 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 271 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 272 | return NULL; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 273 | } |
| 274 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 275 | static void |
| 276 | drm_intel_gem_dump_validation_list(drm_intel_bufmgr_gem *bufmgr_gem) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 277 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 278 | int i, j; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 279 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 280 | for (i = 0; i < bufmgr_gem->exec_count; i++) { |
| 281 | drm_intel_bo *bo = bufmgr_gem->exec_bos[i]; |
| 282 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 283 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 284 | if (bo_gem->relocs == NULL) { |
| 285 | DBG("%2d: %d (%s)\n", i, bo_gem->gem_handle, |
| 286 | bo_gem->name); |
| 287 | continue; |
| 288 | } |
| 289 | |
| 290 | for (j = 0; j < bo_gem->reloc_count; j++) { |
| 291 | drm_intel_bo *target_bo = bo_gem->reloc_target_bo[j]; |
| 292 | drm_intel_bo_gem *target_gem = |
| 293 | (drm_intel_bo_gem *) target_bo; |
| 294 | |
| 295 | DBG("%2d: %d (%s)@0x%08llx -> " |
| 296 | "%d (%s)@0x%08lx + 0x%08x\n", |
| 297 | i, |
| 298 | bo_gem->gem_handle, bo_gem->name, |
| 299 | (unsigned long long)bo_gem->relocs[j].offset, |
| 300 | target_gem->gem_handle, |
| 301 | target_gem->name, |
| 302 | target_bo->offset, |
| 303 | bo_gem->relocs[j].delta); |
| 304 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 305 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 306 | } |
| 307 | |
Chris Wilson | 04495ee | 2009-10-02 04:39:22 +0100 | [diff] [blame] | 308 | static void |
| 309 | drm_intel_gem_bo_reference(drm_intel_bo *bo) |
| 310 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 311 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
Chris Wilson | 04495ee | 2009-10-02 04:39:22 +0100 | [diff] [blame] | 312 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 313 | assert(atomic_read(&bo_gem->refcount) > 0); |
| 314 | atomic_inc(&bo_gem->refcount); |
Chris Wilson | 04495ee | 2009-10-02 04:39:22 +0100 | [diff] [blame] | 315 | } |
| 316 | |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 317 | /** |
| 318 | * Adds the given buffer to the list of buffers to be validated (moved into the |
| 319 | * appropriate memory type) with the next batch submission. |
| 320 | * |
| 321 | * If a buffer is validated multiple times in a batch submission, it ends up |
| 322 | * with the intersection of the memory type flags and the union of the |
| 323 | * access flags. |
| 324 | */ |
| 325 | static void |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 326 | drm_intel_add_validate_buffer(drm_intel_bo *bo) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 327 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 328 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; |
| 329 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 330 | int index; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 331 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 332 | if (bo_gem->validate_index != -1) |
| 333 | return; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 334 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 335 | /* Extend the array of validation entries as necessary. */ |
| 336 | if (bufmgr_gem->exec_count == bufmgr_gem->exec_size) { |
| 337 | int new_size = bufmgr_gem->exec_size * 2; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 338 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 339 | if (new_size == 0) |
| 340 | new_size = 5; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 341 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 342 | bufmgr_gem->exec_objects = |
| 343 | realloc(bufmgr_gem->exec_objects, |
| 344 | sizeof(*bufmgr_gem->exec_objects) * new_size); |
| 345 | bufmgr_gem->exec_bos = |
| 346 | realloc(bufmgr_gem->exec_bos, |
| 347 | sizeof(*bufmgr_gem->exec_bos) * new_size); |
| 348 | bufmgr_gem->exec_size = new_size; |
| 349 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 350 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 351 | index = bufmgr_gem->exec_count; |
| 352 | bo_gem->validate_index = index; |
| 353 | /* Fill in array entry */ |
| 354 | bufmgr_gem->exec_objects[index].handle = bo_gem->gem_handle; |
| 355 | bufmgr_gem->exec_objects[index].relocation_count = bo_gem->reloc_count; |
| 356 | bufmgr_gem->exec_objects[index].relocs_ptr = (uintptr_t) bo_gem->relocs; |
| 357 | bufmgr_gem->exec_objects[index].alignment = 0; |
| 358 | bufmgr_gem->exec_objects[index].offset = 0; |
| 359 | bufmgr_gem->exec_bos[index] = bo; |
| 360 | drm_intel_gem_bo_reference(bo); |
| 361 | bufmgr_gem->exec_count++; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 362 | } |
| 363 | |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 364 | #define RELOC_BUF_SIZE(x) ((I915_RELOC_HEADER + x * I915_RELOC0_STRIDE) * \ |
| 365 | sizeof(uint32_t)) |
| 366 | |
Chris Wilson | e22fb79 | 2009-11-30 22:14:30 +0000 | [diff] [blame^] | 367 | static void |
| 368 | drm_intel_bo_gem_set_in_aperture_size(drm_intel_bufmgr_gem *bufmgr_gem, |
| 369 | drm_intel_bo_gem *bo_gem) |
| 370 | { |
| 371 | int size; |
| 372 | |
| 373 | assert(!bo_gem->used_as_reloc_target); |
| 374 | |
| 375 | /* The older chipsets are far-less flexible in terms of tiling, |
| 376 | * and require tiled buffer to be size aligned in the aperture. |
| 377 | * This means that in the worst possible case we will need a hole |
| 378 | * twice as large as the object in order for it to fit into the |
| 379 | * aperture. Optimal packing is for wimps. |
| 380 | */ |
| 381 | size = bo_gem->bo.size; |
| 382 | if (!IS_I965G(bufmgr_gem) && bo_gem->tiling_mode != I915_TILING_NONE) |
| 383 | size *= 2; |
| 384 | |
| 385 | bo_gem->reloc_tree_size = size; |
| 386 | } |
| 387 | |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 388 | static int |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 389 | drm_intel_setup_reloc_list(drm_intel_bo *bo) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 390 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 391 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 392 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; |
| 393 | unsigned int max_relocs = bufmgr_gem->max_relocs; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 394 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 395 | if (bo->size / 4 < max_relocs) |
| 396 | max_relocs = bo->size / 4; |
Eric Anholt | 3c9bd06 | 2009-10-05 16:35:32 -0700 | [diff] [blame] | 397 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 398 | bo_gem->relocs = malloc(max_relocs * |
| 399 | sizeof(struct drm_i915_gem_relocation_entry)); |
| 400 | bo_gem->reloc_target_bo = malloc(max_relocs * sizeof(drm_intel_bo *)); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 401 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 402 | return 0; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 403 | } |
| 404 | |
Eric Anholt | 8214a65 | 2009-08-27 18:32:07 -0700 | [diff] [blame] | 405 | static int |
| 406 | drm_intel_gem_bo_busy(drm_intel_bo *bo) |
| 407 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 408 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; |
| 409 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 410 | struct drm_i915_gem_busy busy; |
| 411 | int ret; |
Eric Anholt | 8214a65 | 2009-08-27 18:32:07 -0700 | [diff] [blame] | 412 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 413 | memset(&busy, 0, sizeof(busy)); |
| 414 | busy.handle = bo_gem->gem_handle; |
Eric Anholt | 8214a65 | 2009-08-27 18:32:07 -0700 | [diff] [blame] | 415 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 416 | ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_BUSY, &busy); |
Eric Anholt | 8214a65 | 2009-08-27 18:32:07 -0700 | [diff] [blame] | 417 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 418 | return (ret == 0 && busy.busy); |
Eric Anholt | 8214a65 | 2009-08-27 18:32:07 -0700 | [diff] [blame] | 419 | } |
| 420 | |
Chris Wilson | 0fb215a | 2009-10-02 04:31:34 +0100 | [diff] [blame] | 421 | static int |
Chris Wilson | 83a35b6 | 2009-11-11 13:04:38 +0000 | [diff] [blame] | 422 | drm_intel_gem_bo_madvise_internal(drm_intel_bufmgr_gem *bufmgr_gem, |
| 423 | drm_intel_bo_gem *bo_gem, int state) |
Chris Wilson | 0fb215a | 2009-10-02 04:31:34 +0100 | [diff] [blame] | 424 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 425 | struct drm_i915_gem_madvise madv; |
Chris Wilson | 0fb215a | 2009-10-02 04:31:34 +0100 | [diff] [blame] | 426 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 427 | madv.handle = bo_gem->gem_handle; |
| 428 | madv.madv = state; |
| 429 | madv.retained = 1; |
| 430 | ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_MADVISE, &madv); |
Chris Wilson | 0fb215a | 2009-10-02 04:31:34 +0100 | [diff] [blame] | 431 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 432 | return madv.retained; |
Chris Wilson | 0fb215a | 2009-10-02 04:31:34 +0100 | [diff] [blame] | 433 | } |
| 434 | |
Chris Wilson | 83a35b6 | 2009-11-11 13:04:38 +0000 | [diff] [blame] | 435 | static int |
| 436 | drm_intel_gem_bo_madvise(drm_intel_bo *bo, int madv) |
| 437 | { |
| 438 | return drm_intel_gem_bo_madvise_internal |
| 439 | ((drm_intel_bufmgr_gem *) bo->bufmgr, |
| 440 | (drm_intel_bo_gem *) bo, |
| 441 | madv); |
| 442 | } |
| 443 | |
Chris Wilson | 0fb215a | 2009-10-02 04:31:34 +0100 | [diff] [blame] | 444 | /* drop the oldest entries that have been purged by the kernel */ |
| 445 | static void |
| 446 | drm_intel_gem_bo_cache_purge_bucket(drm_intel_bufmgr_gem *bufmgr_gem, |
| 447 | struct drm_intel_gem_bo_bucket *bucket) |
| 448 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 449 | while (!DRMLISTEMPTY(&bucket->head)) { |
| 450 | drm_intel_bo_gem *bo_gem; |
Chris Wilson | 0fb215a | 2009-10-02 04:31:34 +0100 | [diff] [blame] | 451 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 452 | bo_gem = DRMLISTENTRY(drm_intel_bo_gem, |
| 453 | bucket->head.next, head); |
Chris Wilson | 83a35b6 | 2009-11-11 13:04:38 +0000 | [diff] [blame] | 454 | if (drm_intel_gem_bo_madvise_internal |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 455 | (bufmgr_gem, bo_gem, I915_MADV_DONTNEED)) |
| 456 | break; |
Chris Wilson | 0fb215a | 2009-10-02 04:31:34 +0100 | [diff] [blame] | 457 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 458 | DRMLISTDEL(&bo_gem->head); |
| 459 | drm_intel_gem_bo_free(&bo_gem->bo); |
| 460 | } |
Chris Wilson | 0fb215a | 2009-10-02 04:31:34 +0100 | [diff] [blame] | 461 | } |
| 462 | |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 463 | static drm_intel_bo * |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 464 | drm_intel_gem_bo_alloc_internal(drm_intel_bufmgr *bufmgr, |
| 465 | const char *name, |
| 466 | unsigned long size, |
Jesse Barnes | 3a7dfcd | 2009-10-06 14:34:06 -0700 | [diff] [blame] | 467 | unsigned long flags) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 468 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 469 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bufmgr; |
| 470 | drm_intel_bo_gem *bo_gem; |
| 471 | unsigned int page_size = getpagesize(); |
| 472 | int ret; |
| 473 | struct drm_intel_gem_bo_bucket *bucket; |
| 474 | int alloc_from_cache; |
| 475 | unsigned long bo_size; |
Jesse Barnes | 3a7dfcd | 2009-10-06 14:34:06 -0700 | [diff] [blame] | 476 | int for_render = 0; |
| 477 | |
| 478 | if (flags & BO_ALLOC_FOR_RENDER) |
| 479 | for_render = 1; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 480 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 481 | /* Round the allocated size up to a power of two number of pages. */ |
| 482 | bucket = drm_intel_gem_bo_bucket_for_size(bufmgr_gem, size); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 483 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 484 | /* If we don't have caching at this size, don't actually round the |
| 485 | * allocation up. |
| 486 | */ |
| 487 | if (bucket == NULL) { |
| 488 | bo_size = size; |
| 489 | if (bo_size < page_size) |
| 490 | bo_size = page_size; |
Eric Anholt | 72abe98 | 2009-02-18 13:06:35 -0800 | [diff] [blame] | 491 | } else { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 492 | bo_size = bucket->size; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 493 | } |
Chris Wilson | 0fb215a | 2009-10-02 04:31:34 +0100 | [diff] [blame] | 494 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 495 | pthread_mutex_lock(&bufmgr_gem->lock); |
| 496 | /* Get a buffer out of the cache if available */ |
| 497 | retry: |
| 498 | alloc_from_cache = 0; |
| 499 | if (bucket != NULL && !DRMLISTEMPTY(&bucket->head)) { |
| 500 | if (for_render) { |
| 501 | /* Allocate new render-target BOs from the tail (MRU) |
| 502 | * of the list, as it will likely be hot in the GPU |
| 503 | * cache and in the aperture for us. |
| 504 | */ |
| 505 | bo_gem = DRMLISTENTRY(drm_intel_bo_gem, |
| 506 | bucket->head.prev, head); |
| 507 | DRMLISTDEL(&bo_gem->head); |
| 508 | alloc_from_cache = 1; |
| 509 | } else { |
| 510 | /* For non-render-target BOs (where we're probably |
| 511 | * going to map it first thing in order to fill it |
| 512 | * with data), check if the last BO in the cache is |
| 513 | * unbusy, and only reuse in that case. Otherwise, |
| 514 | * allocating a new buffer is probably faster than |
| 515 | * waiting for the GPU to finish. |
| 516 | */ |
| 517 | bo_gem = DRMLISTENTRY(drm_intel_bo_gem, |
| 518 | bucket->head.next, head); |
| 519 | if (!drm_intel_gem_bo_busy(&bo_gem->bo)) { |
| 520 | alloc_from_cache = 1; |
| 521 | DRMLISTDEL(&bo_gem->head); |
| 522 | } |
| 523 | } |
| 524 | |
| 525 | if (alloc_from_cache) { |
Chris Wilson | 83a35b6 | 2009-11-11 13:04:38 +0000 | [diff] [blame] | 526 | if (!drm_intel_gem_bo_madvise_internal |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 527 | (bufmgr_gem, bo_gem, I915_MADV_WILLNEED)) { |
| 528 | drm_intel_gem_bo_free(&bo_gem->bo); |
| 529 | drm_intel_gem_bo_cache_purge_bucket(bufmgr_gem, |
| 530 | bucket); |
| 531 | goto retry; |
| 532 | } |
| 533 | } |
Chris Wilson | 0fb215a | 2009-10-02 04:31:34 +0100 | [diff] [blame] | 534 | } |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 535 | pthread_mutex_unlock(&bufmgr_gem->lock); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 536 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 537 | if (!alloc_from_cache) { |
| 538 | struct drm_i915_gem_create create; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 539 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 540 | bo_gem = calloc(1, sizeof(*bo_gem)); |
| 541 | if (!bo_gem) |
| 542 | return NULL; |
Keith Packard | a919ff5 | 2008-06-05 15:58:09 -0700 | [diff] [blame] | 543 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 544 | bo_gem->bo.size = bo_size; |
| 545 | memset(&create, 0, sizeof(create)); |
| 546 | create.size = bo_size; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 547 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 548 | ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_CREATE, &create); |
| 549 | bo_gem->gem_handle = create.handle; |
| 550 | bo_gem->bo.handle = bo_gem->gem_handle; |
| 551 | if (ret != 0) { |
| 552 | free(bo_gem); |
| 553 | return NULL; |
| 554 | } |
| 555 | bo_gem->bo.bufmgr = bufmgr; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 556 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 557 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 558 | bo_gem->name = name; |
| 559 | atomic_set(&bo_gem->refcount, 1); |
| 560 | bo_gem->validate_index = -1; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 561 | bo_gem->reloc_tree_fences = 0; |
| 562 | bo_gem->used_as_reloc_target = 0; |
| 563 | bo_gem->tiling_mode = I915_TILING_NONE; |
| 564 | bo_gem->swizzle_mode = I915_BIT_6_SWIZZLE_NONE; |
| 565 | bo_gem->reusable = 1; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 566 | |
Chris Wilson | e22fb79 | 2009-11-30 22:14:30 +0000 | [diff] [blame^] | 567 | drm_intel_bo_gem_set_in_aperture_size(bufmgr_gem, bo_gem); |
| 568 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 569 | DBG("bo_create: buf %d (%s) %ldb\n", |
| 570 | bo_gem->gem_handle, bo_gem->name, size); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 571 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 572 | return &bo_gem->bo; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 573 | } |
| 574 | |
Eric Anholt | 72abe98 | 2009-02-18 13:06:35 -0800 | [diff] [blame] | 575 | static drm_intel_bo * |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 576 | drm_intel_gem_bo_alloc_for_render(drm_intel_bufmgr *bufmgr, |
| 577 | const char *name, |
| 578 | unsigned long size, |
| 579 | unsigned int alignment) |
Eric Anholt | 72abe98 | 2009-02-18 13:06:35 -0800 | [diff] [blame] | 580 | { |
Jesse Barnes | 3a7dfcd | 2009-10-06 14:34:06 -0700 | [diff] [blame] | 581 | return drm_intel_gem_bo_alloc_internal(bufmgr, name, size, |
| 582 | BO_ALLOC_FOR_RENDER); |
Eric Anholt | 72abe98 | 2009-02-18 13:06:35 -0800 | [diff] [blame] | 583 | } |
| 584 | |
| 585 | static drm_intel_bo * |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 586 | drm_intel_gem_bo_alloc(drm_intel_bufmgr *bufmgr, |
| 587 | const char *name, |
| 588 | unsigned long size, |
| 589 | unsigned int alignment) |
Eric Anholt | 72abe98 | 2009-02-18 13:06:35 -0800 | [diff] [blame] | 590 | { |
Jesse Barnes | 3a7dfcd | 2009-10-06 14:34:06 -0700 | [diff] [blame] | 591 | return drm_intel_gem_bo_alloc_internal(bufmgr, name, size, 0); |
| 592 | } |
| 593 | |
| 594 | static drm_intel_bo * |
| 595 | drm_intel_gem_bo_alloc_tiled(drm_intel_bufmgr *bufmgr, const char *name, |
| 596 | int x, int y, int cpp, uint32_t *tiling_mode, |
| 597 | unsigned long *pitch, unsigned long flags) |
| 598 | { |
| 599 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *)bufmgr; |
| 600 | drm_intel_bo *bo; |
| 601 | unsigned long size, stride, aligned_y = y; |
| 602 | int ret; |
| 603 | |
| 604 | if (*tiling_mode == I915_TILING_NONE) |
| 605 | aligned_y = ALIGN(y, 2); |
| 606 | else if (*tiling_mode == I915_TILING_X) |
| 607 | aligned_y = ALIGN(y, 8); |
| 608 | else if (*tiling_mode == I915_TILING_Y) |
| 609 | aligned_y = ALIGN(y, 32); |
| 610 | |
| 611 | stride = x * cpp; |
| 612 | stride = drm_intel_gem_bo_tile_pitch(bufmgr_gem, stride, *tiling_mode); |
| 613 | size = stride * aligned_y; |
| 614 | size = drm_intel_gem_bo_tile_size(bufmgr_gem, size, tiling_mode); |
| 615 | |
| 616 | bo = drm_intel_gem_bo_alloc_internal(bufmgr, name, size, flags); |
| 617 | if (!bo) |
| 618 | return NULL; |
| 619 | |
| 620 | ret = drm_intel_gem_bo_set_tiling(bo, tiling_mode, stride); |
| 621 | if (ret != 0) { |
| 622 | drm_intel_gem_bo_unreference(bo); |
| 623 | return NULL; |
| 624 | } |
| 625 | |
| 626 | *pitch = stride; |
| 627 | |
| 628 | return bo; |
Eric Anholt | 72abe98 | 2009-02-18 13:06:35 -0800 | [diff] [blame] | 629 | } |
| 630 | |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 631 | /** |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 632 | * Returns a drm_intel_bo wrapping the given buffer object handle. |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 633 | * |
| 634 | * This can be used when one application needs to pass a buffer object |
| 635 | * to another. |
| 636 | */ |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 637 | drm_intel_bo * |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 638 | drm_intel_bo_gem_create_from_name(drm_intel_bufmgr *bufmgr, |
| 639 | const char *name, |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 640 | unsigned int handle) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 641 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 642 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bufmgr; |
| 643 | drm_intel_bo_gem *bo_gem; |
| 644 | int ret; |
| 645 | struct drm_gem_open open_arg; |
| 646 | struct drm_i915_gem_get_tiling get_tiling; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 647 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 648 | bo_gem = calloc(1, sizeof(*bo_gem)); |
| 649 | if (!bo_gem) |
| 650 | return NULL; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 651 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 652 | memset(&open_arg, 0, sizeof(open_arg)); |
| 653 | open_arg.name = handle; |
| 654 | ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_GEM_OPEN, &open_arg); |
| 655 | if (ret != 0) { |
| 656 | fprintf(stderr, "Couldn't reference %s handle 0x%08x: %s\n", |
| 657 | name, handle, strerror(errno)); |
| 658 | free(bo_gem); |
| 659 | return NULL; |
| 660 | } |
| 661 | bo_gem->bo.size = open_arg.size; |
| 662 | bo_gem->bo.offset = 0; |
| 663 | bo_gem->bo.virtual = NULL; |
| 664 | bo_gem->bo.bufmgr = bufmgr; |
| 665 | bo_gem->name = name; |
| 666 | atomic_set(&bo_gem->refcount, 1); |
| 667 | bo_gem->validate_index = -1; |
| 668 | bo_gem->gem_handle = open_arg.handle; |
| 669 | bo_gem->global_name = handle; |
| 670 | bo_gem->reusable = 0; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 671 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 672 | memset(&get_tiling, 0, sizeof(get_tiling)); |
| 673 | get_tiling.handle = bo_gem->gem_handle; |
| 674 | ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_GET_TILING, &get_tiling); |
| 675 | if (ret != 0) { |
| 676 | drm_intel_gem_bo_unreference(&bo_gem->bo); |
| 677 | return NULL; |
| 678 | } |
| 679 | bo_gem->tiling_mode = get_tiling.tiling_mode; |
| 680 | bo_gem->swizzle_mode = get_tiling.swizzle_mode; |
| 681 | if (bo_gem->tiling_mode == I915_TILING_NONE) |
| 682 | bo_gem->reloc_tree_fences = 0; |
| 683 | else |
| 684 | bo_gem->reloc_tree_fences = 1; |
Chris Wilson | e22fb79 | 2009-11-30 22:14:30 +0000 | [diff] [blame^] | 685 | drm_intel_bo_gem_set_in_aperture_size(bufmgr_gem, bo_gem); |
Keith Packard | 18f091d | 2008-12-15 15:08:12 -0800 | [diff] [blame] | 686 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 687 | DBG("bo_create_from_handle: %d (%s)\n", handle, bo_gem->name); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 688 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 689 | return &bo_gem->bo; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 690 | } |
| 691 | |
| 692 | static void |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 693 | drm_intel_gem_bo_free(drm_intel_bo *bo) |
Eric Anholt | 500c81d | 2008-06-06 17:13:16 -0700 | [diff] [blame] | 694 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 695 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; |
| 696 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 697 | struct drm_gem_close close; |
| 698 | int ret; |
Eric Anholt | 500c81d | 2008-06-06 17:13:16 -0700 | [diff] [blame] | 699 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 700 | if (bo_gem->mem_virtual) |
| 701 | munmap(bo_gem->mem_virtual, bo_gem->bo.size); |
| 702 | if (bo_gem->gtt_virtual) |
| 703 | munmap(bo_gem->gtt_virtual, bo_gem->bo.size); |
Eric Anholt | 500c81d | 2008-06-06 17:13:16 -0700 | [diff] [blame] | 704 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 705 | free(bo_gem->reloc_target_bo); |
| 706 | free(bo_gem->relocs); |
Eric Anholt | 12d9b7c | 2009-10-02 11:11:31 -0700 | [diff] [blame] | 707 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 708 | /* Close this object */ |
| 709 | memset(&close, 0, sizeof(close)); |
| 710 | close.handle = bo_gem->gem_handle; |
| 711 | ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_GEM_CLOSE, &close); |
| 712 | if (ret != 0) { |
| 713 | fprintf(stderr, |
| 714 | "DRM_IOCTL_GEM_CLOSE %d failed (%s): %s\n", |
| 715 | bo_gem->gem_handle, bo_gem->name, strerror(errno)); |
| 716 | } |
| 717 | free(bo); |
Eric Anholt | 500c81d | 2008-06-06 17:13:16 -0700 | [diff] [blame] | 718 | } |
| 719 | |
Eric Anholt | 3f3c5be | 2009-07-09 17:49:46 -0700 | [diff] [blame] | 720 | /** Frees all cached buffers significantly older than @time. */ |
| 721 | static void |
| 722 | drm_intel_gem_cleanup_bo_cache(drm_intel_bufmgr_gem *bufmgr_gem, time_t time) |
| 723 | { |
Chris Wilson | 04495ee | 2009-10-02 04:39:22 +0100 | [diff] [blame] | 724 | int i; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 725 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 726 | for (i = 0; i < DRM_INTEL_GEM_BO_BUCKETS; i++) { |
| 727 | struct drm_intel_gem_bo_bucket *bucket = |
| 728 | &bufmgr_gem->cache_bucket[i]; |
Chris Wilson | 04495ee | 2009-10-02 04:39:22 +0100 | [diff] [blame] | 729 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 730 | while (!DRMLISTEMPTY(&bucket->head)) { |
| 731 | drm_intel_bo_gem *bo_gem; |
Chris Wilson | 04495ee | 2009-10-02 04:39:22 +0100 | [diff] [blame] | 732 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 733 | bo_gem = DRMLISTENTRY(drm_intel_bo_gem, |
| 734 | bucket->head.next, head); |
| 735 | if (time - bo_gem->free_time <= 1) |
| 736 | break; |
Chris Wilson | 04495ee | 2009-10-02 04:39:22 +0100 | [diff] [blame] | 737 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 738 | DRMLISTDEL(&bo_gem->head); |
Chris Wilson | 04495ee | 2009-10-02 04:39:22 +0100 | [diff] [blame] | 739 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 740 | drm_intel_gem_bo_free(&bo_gem->bo); |
| 741 | } |
| 742 | } |
Chris Wilson | 04495ee | 2009-10-02 04:39:22 +0100 | [diff] [blame] | 743 | } |
| 744 | |
Eric Anholt | 0d7ad7e | 2009-10-20 14:19:38 -0700 | [diff] [blame] | 745 | static void |
| 746 | drm_intel_gem_bo_unreference_final(drm_intel_bo *bo, time_t time) |
Chris Wilson | 04495ee | 2009-10-02 04:39:22 +0100 | [diff] [blame] | 747 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 748 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; |
| 749 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 750 | struct drm_intel_gem_bo_bucket *bucket; |
| 751 | uint32_t tiling_mode; |
Eric Anholt | 0d7ad7e | 2009-10-20 14:19:38 -0700 | [diff] [blame] | 752 | int i; |
Chris Wilson | 04495ee | 2009-10-02 04:39:22 +0100 | [diff] [blame] | 753 | |
Eric Anholt | 0d7ad7e | 2009-10-20 14:19:38 -0700 | [diff] [blame] | 754 | /* Unreference all the target buffers */ |
| 755 | for (i = 0; i < bo_gem->reloc_count; i++) { |
| 756 | drm_intel_gem_bo_unreference_locked_timed(bo_gem-> |
| 757 | reloc_target_bo[i], |
| 758 | time); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 759 | } |
| 760 | |
| 761 | DBG("bo_unreference final: %d (%s)\n", |
| 762 | bo_gem->gem_handle, bo_gem->name); |
| 763 | |
| 764 | bucket = drm_intel_gem_bo_bucket_for_size(bufmgr_gem, bo->size); |
| 765 | /* Put the buffer into our internal cache for reuse if we can. */ |
| 766 | tiling_mode = I915_TILING_NONE; |
| 767 | if (bufmgr_gem->bo_reuse && bo_gem->reusable && bucket != NULL && |
Chris Wilson | 60aa803 | 2009-11-30 20:02:05 +0000 | [diff] [blame] | 768 | drm_intel_gem_bo_set_tiling(bo, &tiling_mode, 0) == 0 && |
| 769 | drm_intel_gem_bo_madvise_internal(bufmgr_gem, bo_gem, |
| 770 | I915_MADV_DONTNEED)) { |
Eric Anholt | 0d7ad7e | 2009-10-20 14:19:38 -0700 | [diff] [blame] | 771 | bo_gem->free_time = time; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 772 | |
| 773 | bo_gem->name = NULL; |
| 774 | bo_gem->validate_index = -1; |
| 775 | bo_gem->reloc_count = 0; |
| 776 | |
| 777 | DRMLISTADDTAIL(&bo_gem->head, &bucket->head); |
| 778 | |
Eric Anholt | 0d7ad7e | 2009-10-20 14:19:38 -0700 | [diff] [blame] | 779 | drm_intel_gem_cleanup_bo_cache(bufmgr_gem, time); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 780 | } else { |
| 781 | drm_intel_gem_bo_free(bo); |
| 782 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 783 | } |
| 784 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 785 | static void drm_intel_gem_bo_unreference_locked(drm_intel_bo *bo) |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 786 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 787 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 788 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 789 | assert(atomic_read(&bo_gem->refcount) > 0); |
Eric Anholt | 0d7ad7e | 2009-10-20 14:19:38 -0700 | [diff] [blame] | 790 | if (atomic_dec_and_test(&bo_gem->refcount)) { |
| 791 | struct timespec time; |
| 792 | |
| 793 | clock_gettime(CLOCK_MONOTONIC, &time); |
| 794 | drm_intel_gem_bo_unreference_final(bo, time.tv_sec); |
| 795 | } |
| 796 | } |
| 797 | |
| 798 | static void drm_intel_gem_bo_unreference_locked_timed(drm_intel_bo *bo, |
| 799 | time_t time) |
| 800 | { |
| 801 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 802 | |
| 803 | assert(atomic_read(&bo_gem->refcount) > 0); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 804 | if (atomic_dec_and_test(&bo_gem->refcount)) |
Eric Anholt | 0d7ad7e | 2009-10-20 14:19:38 -0700 | [diff] [blame] | 805 | drm_intel_gem_bo_unreference_final(bo, time); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 806 | } |
| 807 | |
| 808 | static void drm_intel_gem_bo_unreference(drm_intel_bo *bo) |
| 809 | { |
| 810 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 811 | |
| 812 | assert(atomic_read(&bo_gem->refcount) > 0); |
| 813 | if (atomic_dec_and_test(&bo_gem->refcount)) { |
| 814 | drm_intel_bufmgr_gem *bufmgr_gem = |
| 815 | (drm_intel_bufmgr_gem *) bo->bufmgr; |
Eric Anholt | 0d7ad7e | 2009-10-20 14:19:38 -0700 | [diff] [blame] | 816 | struct timespec time; |
| 817 | |
| 818 | clock_gettime(CLOCK_MONOTONIC, &time); |
| 819 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 820 | pthread_mutex_lock(&bufmgr_gem->lock); |
Eric Anholt | 0d7ad7e | 2009-10-20 14:19:38 -0700 | [diff] [blame] | 821 | drm_intel_gem_bo_unreference_final(bo, time.tv_sec); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 822 | pthread_mutex_unlock(&bufmgr_gem->lock); |
| 823 | } |
| 824 | } |
| 825 | |
| 826 | static int drm_intel_gem_bo_map(drm_intel_bo *bo, int write_enable) |
| 827 | { |
| 828 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; |
| 829 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 830 | struct drm_i915_gem_set_domain set_domain; |
| 831 | int ret; |
| 832 | |
Chris Wilson | 04495ee | 2009-10-02 04:39:22 +0100 | [diff] [blame] | 833 | pthread_mutex_lock(&bufmgr_gem->lock); |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 834 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 835 | /* Allow recursive mapping. Mesa may recursively map buffers with |
| 836 | * nested display loops. |
Carl Worth | afd245d | 2009-04-29 14:43:55 -0700 | [diff] [blame] | 837 | */ |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 838 | if (!bo_gem->mem_virtual) { |
| 839 | struct drm_i915_gem_mmap mmap_arg; |
Carl Worth | afd245d | 2009-04-29 14:43:55 -0700 | [diff] [blame] | 840 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 841 | DBG("bo_map: %d (%s)\n", bo_gem->gem_handle, bo_gem->name); |
| 842 | |
| 843 | memset(&mmap_arg, 0, sizeof(mmap_arg)); |
| 844 | mmap_arg.handle = bo_gem->gem_handle; |
| 845 | mmap_arg.offset = 0; |
| 846 | mmap_arg.size = bo->size; |
| 847 | ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_MMAP, &mmap_arg); |
| 848 | if (ret != 0) { |
| 849 | fprintf(stderr, |
| 850 | "%s:%d: Error mapping buffer %d (%s): %s .\n", |
| 851 | __FILE__, __LINE__, bo_gem->gem_handle, |
| 852 | bo_gem->name, strerror(errno)); |
| 853 | pthread_mutex_unlock(&bufmgr_gem->lock); |
| 854 | return ret; |
| 855 | } |
| 856 | bo_gem->mem_virtual = (void *)(uintptr_t) mmap_arg.addr_ptr; |
| 857 | } |
| 858 | DBG("bo_map: %d (%s) -> %p\n", bo_gem->gem_handle, bo_gem->name, |
| 859 | bo_gem->mem_virtual); |
| 860 | bo->virtual = bo_gem->mem_virtual; |
| 861 | |
| 862 | set_domain.handle = bo_gem->gem_handle; |
| 863 | set_domain.read_domains = I915_GEM_DOMAIN_CPU; |
| 864 | if (write_enable) |
| 865 | set_domain.write_domain = I915_GEM_DOMAIN_CPU; |
| 866 | else |
| 867 | set_domain.write_domain = 0; |
| 868 | do { |
| 869 | ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_SET_DOMAIN, |
| 870 | &set_domain); |
| 871 | } while (ret == -1 && errno == EINTR); |
| 872 | if (ret != 0) { |
| 873 | fprintf(stderr, "%s:%d: Error setting to CPU domain %d: %s\n", |
| 874 | __FILE__, __LINE__, bo_gem->gem_handle, |
| 875 | strerror(errno)); |
| 876 | pthread_mutex_unlock(&bufmgr_gem->lock); |
| 877 | return ret; |
| 878 | } |
| 879 | |
| 880 | pthread_mutex_unlock(&bufmgr_gem->lock); |
| 881 | |
| 882 | return 0; |
| 883 | } |
| 884 | |
| 885 | int drm_intel_gem_bo_map_gtt(drm_intel_bo *bo) |
| 886 | { |
| 887 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; |
| 888 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 889 | struct drm_i915_gem_set_domain set_domain; |
| 890 | int ret; |
| 891 | |
| 892 | pthread_mutex_lock(&bufmgr_gem->lock); |
| 893 | |
| 894 | /* Get a mapping of the buffer if we haven't before. */ |
| 895 | if (bo_gem->gtt_virtual == NULL) { |
| 896 | struct drm_i915_gem_mmap_gtt mmap_arg; |
| 897 | |
| 898 | DBG("bo_map_gtt: mmap %d (%s)\n", bo_gem->gem_handle, |
| 899 | bo_gem->name); |
| 900 | |
| 901 | memset(&mmap_arg, 0, sizeof(mmap_arg)); |
| 902 | mmap_arg.handle = bo_gem->gem_handle; |
| 903 | |
| 904 | /* Get the fake offset back... */ |
| 905 | ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_MMAP_GTT, |
| 906 | &mmap_arg); |
| 907 | if (ret != 0) { |
| 908 | fprintf(stderr, |
| 909 | "%s:%d: Error preparing buffer map %d (%s): %s .\n", |
| 910 | __FILE__, __LINE__, |
| 911 | bo_gem->gem_handle, bo_gem->name, |
| 912 | strerror(errno)); |
| 913 | pthread_mutex_unlock(&bufmgr_gem->lock); |
| 914 | return ret; |
| 915 | } |
| 916 | |
| 917 | /* and mmap it */ |
| 918 | bo_gem->gtt_virtual = mmap(0, bo->size, PROT_READ | PROT_WRITE, |
| 919 | MAP_SHARED, bufmgr_gem->fd, |
| 920 | mmap_arg.offset); |
| 921 | if (bo_gem->gtt_virtual == MAP_FAILED) { |
| 922 | fprintf(stderr, |
| 923 | "%s:%d: Error mapping buffer %d (%s): %s .\n", |
| 924 | __FILE__, __LINE__, |
| 925 | bo_gem->gem_handle, bo_gem->name, |
| 926 | strerror(errno)); |
| 927 | pthread_mutex_unlock(&bufmgr_gem->lock); |
| 928 | return errno; |
| 929 | } |
| 930 | } |
| 931 | |
| 932 | bo->virtual = bo_gem->gtt_virtual; |
| 933 | |
| 934 | DBG("bo_map_gtt: %d (%s) -> %p\n", bo_gem->gem_handle, bo_gem->name, |
| 935 | bo_gem->gtt_virtual); |
| 936 | |
| 937 | /* Now move it to the GTT domain so that the CPU caches are flushed */ |
| 938 | set_domain.handle = bo_gem->gem_handle; |
| 939 | set_domain.read_domains = I915_GEM_DOMAIN_GTT; |
| 940 | set_domain.write_domain = I915_GEM_DOMAIN_GTT; |
| 941 | do { |
| 942 | ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_SET_DOMAIN, |
| 943 | &set_domain); |
| 944 | } while (ret == -1 && errno == EINTR); |
| 945 | |
| 946 | if (ret != 0) { |
| 947 | fprintf(stderr, "%s:%d: Error setting domain %d: %s\n", |
| 948 | __FILE__, __LINE__, bo_gem->gem_handle, |
| 949 | strerror(errno)); |
| 950 | } |
| 951 | |
| 952 | pthread_mutex_unlock(&bufmgr_gem->lock); |
| 953 | |
Chris Wilson | 60aa803 | 2009-11-30 20:02:05 +0000 | [diff] [blame] | 954 | return ret; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 955 | } |
| 956 | |
| 957 | int drm_intel_gem_bo_unmap_gtt(drm_intel_bo *bo) |
| 958 | { |
| 959 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; |
| 960 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 961 | int ret = 0; |
| 962 | |
| 963 | if (bo == NULL) |
| 964 | return 0; |
| 965 | |
| 966 | assert(bo_gem->gtt_virtual != NULL); |
| 967 | |
| 968 | pthread_mutex_lock(&bufmgr_gem->lock); |
| 969 | bo->virtual = NULL; |
| 970 | pthread_mutex_unlock(&bufmgr_gem->lock); |
| 971 | |
| 972 | return ret; |
| 973 | } |
| 974 | |
| 975 | static int drm_intel_gem_bo_unmap(drm_intel_bo *bo) |
| 976 | { |
| 977 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; |
| 978 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 979 | struct drm_i915_gem_sw_finish sw_finish; |
| 980 | int ret; |
| 981 | |
| 982 | if (bo == NULL) |
| 983 | return 0; |
| 984 | |
| 985 | assert(bo_gem->mem_virtual != NULL); |
| 986 | |
| 987 | pthread_mutex_lock(&bufmgr_gem->lock); |
| 988 | |
| 989 | /* Cause a flush to happen if the buffer's pinned for scanout, so the |
| 990 | * results show up in a timely manner. |
| 991 | */ |
| 992 | sw_finish.handle = bo_gem->gem_handle; |
| 993 | do { |
| 994 | ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_SW_FINISH, |
| 995 | &sw_finish); |
| 996 | } while (ret == -1 && errno == EINTR); |
| 997 | |
| 998 | bo->virtual = NULL; |
| 999 | pthread_mutex_unlock(&bufmgr_gem->lock); |
| 1000 | return 0; |
Carl Worth | afd245d | 2009-04-29 14:43:55 -0700 | [diff] [blame] | 1001 | } |
| 1002 | |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1003 | static int |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1004 | drm_intel_gem_bo_subdata(drm_intel_bo *bo, unsigned long offset, |
| 1005 | unsigned long size, const void *data) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1006 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1007 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; |
| 1008 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 1009 | struct drm_i915_gem_pwrite pwrite; |
| 1010 | int ret; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1011 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1012 | memset(&pwrite, 0, sizeof(pwrite)); |
| 1013 | pwrite.handle = bo_gem->gem_handle; |
| 1014 | pwrite.offset = offset; |
| 1015 | pwrite.size = size; |
| 1016 | pwrite.data_ptr = (uint64_t) (uintptr_t) data; |
| 1017 | do { |
| 1018 | ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_PWRITE, &pwrite); |
| 1019 | } while (ret == -1 && errno == EINTR); |
| 1020 | if (ret != 0) { |
| 1021 | fprintf(stderr, |
| 1022 | "%s:%d: Error writing data to buffer %d: (%d %d) %s .\n", |
| 1023 | __FILE__, __LINE__, bo_gem->gem_handle, (int)offset, |
| 1024 | (int)size, strerror(errno)); |
| 1025 | } |
| 1026 | return 0; |
| 1027 | } |
| 1028 | |
| 1029 | static int |
| 1030 | drm_intel_gem_get_pipe_from_crtc_id(drm_intel_bufmgr *bufmgr, int crtc_id) |
| 1031 | { |
| 1032 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bufmgr; |
| 1033 | struct drm_i915_get_pipe_from_crtc_id get_pipe_from_crtc_id; |
| 1034 | int ret; |
| 1035 | |
| 1036 | get_pipe_from_crtc_id.crtc_id = crtc_id; |
| 1037 | ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GET_PIPE_FROM_CRTC_ID, |
| 1038 | &get_pipe_from_crtc_id); |
| 1039 | if (ret != 0) { |
| 1040 | /* We return -1 here to signal that we don't |
| 1041 | * know which pipe is associated with this crtc. |
| 1042 | * This lets the caller know that this information |
| 1043 | * isn't available; using the wrong pipe for |
| 1044 | * vblank waiting can cause the chipset to lock up |
| 1045 | */ |
| 1046 | return -1; |
| 1047 | } |
| 1048 | |
| 1049 | return get_pipe_from_crtc_id.pipe; |
| 1050 | } |
| 1051 | |
| 1052 | static int |
| 1053 | drm_intel_gem_bo_get_subdata(drm_intel_bo *bo, unsigned long offset, |
| 1054 | unsigned long size, void *data) |
| 1055 | { |
| 1056 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; |
| 1057 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 1058 | struct drm_i915_gem_pread pread; |
| 1059 | int ret; |
| 1060 | |
| 1061 | memset(&pread, 0, sizeof(pread)); |
| 1062 | pread.handle = bo_gem->gem_handle; |
| 1063 | pread.offset = offset; |
| 1064 | pread.size = size; |
| 1065 | pread.data_ptr = (uint64_t) (uintptr_t) data; |
| 1066 | do { |
| 1067 | ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_PREAD, &pread); |
| 1068 | } while (ret == -1 && errno == EINTR); |
| 1069 | if (ret != 0) { |
| 1070 | fprintf(stderr, |
| 1071 | "%s:%d: Error reading data from buffer %d: (%d %d) %s .\n", |
| 1072 | __FILE__, __LINE__, bo_gem->gem_handle, (int)offset, |
| 1073 | (int)size, strerror(errno)); |
| 1074 | } |
| 1075 | return 0; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1076 | } |
| 1077 | |
Eric Anholt | 6fb1ad7 | 2008-11-13 11:44:22 -0800 | [diff] [blame] | 1078 | /** Waits for all GPU rendering to the object to have completed. */ |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1079 | static void |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 1080 | drm_intel_gem_bo_wait_rendering(drm_intel_bo *bo) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1081 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1082 | drm_intel_gem_bo_start_gtt_access(bo, 0); |
Eric Anholt | 6fb1ad7 | 2008-11-13 11:44:22 -0800 | [diff] [blame] | 1083 | } |
| 1084 | |
| 1085 | /** |
| 1086 | * Sets the object to the GTT read and possibly write domain, used by the X |
| 1087 | * 2D driver in the absence of kernel support to do drm_intel_gem_bo_map_gtt(). |
| 1088 | * |
| 1089 | * In combination with drm_intel_gem_bo_pin() and manual fence management, we |
| 1090 | * can do tiled pixmaps this way. |
| 1091 | */ |
| 1092 | void |
| 1093 | drm_intel_gem_bo_start_gtt_access(drm_intel_bo *bo, int write_enable) |
| 1094 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1095 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; |
| 1096 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 1097 | struct drm_i915_gem_set_domain set_domain; |
| 1098 | int ret; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1099 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1100 | set_domain.handle = bo_gem->gem_handle; |
| 1101 | set_domain.read_domains = I915_GEM_DOMAIN_GTT; |
| 1102 | set_domain.write_domain = write_enable ? I915_GEM_DOMAIN_GTT : 0; |
| 1103 | do { |
| 1104 | ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_SET_DOMAIN, |
| 1105 | &set_domain); |
| 1106 | } while (ret == -1 && errno == EINTR); |
| 1107 | if (ret != 0) { |
| 1108 | fprintf(stderr, |
| 1109 | "%s:%d: Error setting memory domains %d (%08x %08x): %s .\n", |
| 1110 | __FILE__, __LINE__, bo_gem->gem_handle, |
| 1111 | set_domain.read_domains, set_domain.write_domain, |
| 1112 | strerror(errno)); |
| 1113 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1114 | } |
| 1115 | |
| 1116 | static void |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 1117 | drm_intel_bufmgr_gem_destroy(drm_intel_bufmgr *bufmgr) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1118 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1119 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bufmgr; |
| 1120 | int i; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1121 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1122 | free(bufmgr_gem->exec_objects); |
| 1123 | free(bufmgr_gem->exec_bos); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1124 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1125 | pthread_mutex_destroy(&bufmgr_gem->lock); |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 1126 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1127 | /* Free any cached buffer objects we were going to reuse */ |
| 1128 | for (i = 0; i < DRM_INTEL_GEM_BO_BUCKETS; i++) { |
| 1129 | struct drm_intel_gem_bo_bucket *bucket = |
| 1130 | &bufmgr_gem->cache_bucket[i]; |
| 1131 | drm_intel_bo_gem *bo_gem; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1132 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1133 | while (!DRMLISTEMPTY(&bucket->head)) { |
| 1134 | bo_gem = DRMLISTENTRY(drm_intel_bo_gem, |
| 1135 | bucket->head.next, head); |
| 1136 | DRMLISTDEL(&bo_gem->head); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1137 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1138 | drm_intel_gem_bo_free(&bo_gem->bo); |
| 1139 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1140 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1141 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1142 | free(bufmgr); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1143 | } |
| 1144 | |
| 1145 | /** |
| 1146 | * Adds the target buffer to the validation list and adds the relocation |
| 1147 | * to the reloc_buffer's relocation list. |
| 1148 | * |
| 1149 | * The relocation entry at the given offset must already contain the |
| 1150 | * precomputed relocation value, because the kernel will optimize out |
| 1151 | * the relocation entry write when the buffer hasn't moved from the |
| 1152 | * last known offset in target_bo. |
| 1153 | */ |
| 1154 | static int |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 1155 | drm_intel_gem_bo_emit_reloc(drm_intel_bo *bo, uint32_t offset, |
| 1156 | drm_intel_bo *target_bo, uint32_t target_offset, |
| 1157 | uint32_t read_domains, uint32_t write_domain) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1158 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1159 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; |
| 1160 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 1161 | drm_intel_bo_gem *target_bo_gem = (drm_intel_bo_gem *) target_bo; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1162 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1163 | pthread_mutex_lock(&bufmgr_gem->lock); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1164 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1165 | /* Create a new relocation list if needed */ |
| 1166 | if (bo_gem->relocs == NULL) |
| 1167 | drm_intel_setup_reloc_list(bo); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1168 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1169 | /* Check overflow */ |
| 1170 | assert(bo_gem->reloc_count < bufmgr_gem->max_relocs); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1171 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1172 | /* Check args */ |
| 1173 | assert(offset <= bo->size - 4); |
| 1174 | assert((write_domain & (write_domain - 1)) == 0); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1175 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1176 | /* Make sure that we're not adding a reloc to something whose size has |
| 1177 | * already been accounted for. |
| 1178 | */ |
| 1179 | assert(!bo_gem->used_as_reloc_target); |
| 1180 | bo_gem->reloc_tree_size += target_bo_gem->reloc_tree_size; |
| 1181 | bo_gem->reloc_tree_fences += target_bo_gem->reloc_tree_fences; |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 1182 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1183 | /* Flag the target to disallow further relocations in it. */ |
| 1184 | target_bo_gem->used_as_reloc_target = 1; |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 1185 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1186 | bo_gem->relocs[bo_gem->reloc_count].offset = offset; |
| 1187 | bo_gem->relocs[bo_gem->reloc_count].delta = target_offset; |
| 1188 | bo_gem->relocs[bo_gem->reloc_count].target_handle = |
| 1189 | target_bo_gem->gem_handle; |
| 1190 | bo_gem->relocs[bo_gem->reloc_count].read_domains = read_domains; |
| 1191 | bo_gem->relocs[bo_gem->reloc_count].write_domain = write_domain; |
| 1192 | bo_gem->relocs[bo_gem->reloc_count].presumed_offset = target_bo->offset; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1193 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1194 | bo_gem->reloc_target_bo[bo_gem->reloc_count] = target_bo; |
| 1195 | drm_intel_gem_bo_reference(target_bo); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1196 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1197 | bo_gem->reloc_count++; |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 1198 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1199 | pthread_mutex_unlock(&bufmgr_gem->lock); |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 1200 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1201 | return 0; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1202 | } |
| 1203 | |
| 1204 | /** |
| 1205 | * Walk the tree of relocations rooted at BO and accumulate the list of |
| 1206 | * validations to be performed and update the relocation buffers with |
| 1207 | * index values into the validation list. |
| 1208 | */ |
| 1209 | static void |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 1210 | drm_intel_gem_bo_process_reloc(drm_intel_bo *bo) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1211 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1212 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 1213 | int i; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1214 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1215 | if (bo_gem->relocs == NULL) |
| 1216 | return; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1217 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1218 | for (i = 0; i < bo_gem->reloc_count; i++) { |
| 1219 | drm_intel_bo *target_bo = bo_gem->reloc_target_bo[i]; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1220 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1221 | /* Continue walking the tree depth-first. */ |
| 1222 | drm_intel_gem_bo_process_reloc(target_bo); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1223 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1224 | /* Add the target to the validate list */ |
| 1225 | drm_intel_add_validate_buffer(target_bo); |
| 1226 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1227 | } |
| 1228 | |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1229 | static void |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1230 | drm_intel_update_buffer_offsets(drm_intel_bufmgr_gem *bufmgr_gem) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1231 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1232 | int i; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1233 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1234 | for (i = 0; i < bufmgr_gem->exec_count; i++) { |
| 1235 | drm_intel_bo *bo = bufmgr_gem->exec_bos[i]; |
| 1236 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1237 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1238 | /* Update the buffer offset */ |
| 1239 | if (bufmgr_gem->exec_objects[i].offset != bo->offset) { |
| 1240 | DBG("BO %d (%s) migrated: 0x%08lx -> 0x%08llx\n", |
| 1241 | bo_gem->gem_handle, bo_gem->name, bo->offset, |
| 1242 | (unsigned long long)bufmgr_gem->exec_objects[i]. |
| 1243 | offset); |
| 1244 | bo->offset = bufmgr_gem->exec_objects[i].offset; |
| 1245 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1246 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1247 | } |
| 1248 | |
Eric Anholt | f9d98be | 2008-09-08 08:51:40 -0700 | [diff] [blame] | 1249 | static int |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 1250 | drm_intel_gem_bo_exec(drm_intel_bo *bo, int used, |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1251 | drm_clip_rect_t * cliprects, int num_cliprects, int DR4) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1252 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1253 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; |
| 1254 | struct drm_i915_gem_execbuffer execbuf; |
| 1255 | int ret, i; |
Eric Anholt | f9d98be | 2008-09-08 08:51:40 -0700 | [diff] [blame] | 1256 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1257 | pthread_mutex_lock(&bufmgr_gem->lock); |
| 1258 | /* Update indices and set up the validate list. */ |
| 1259 | drm_intel_gem_bo_process_reloc(bo); |
Eric Anholt | f9d98be | 2008-09-08 08:51:40 -0700 | [diff] [blame] | 1260 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1261 | /* Add the batch buffer to the validation list. There are no |
| 1262 | * relocations pointing to it. |
| 1263 | */ |
| 1264 | drm_intel_add_validate_buffer(bo); |
Eric Anholt | f9d98be | 2008-09-08 08:51:40 -0700 | [diff] [blame] | 1265 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1266 | execbuf.buffers_ptr = (uintptr_t) bufmgr_gem->exec_objects; |
| 1267 | execbuf.buffer_count = bufmgr_gem->exec_count; |
| 1268 | execbuf.batch_start_offset = 0; |
| 1269 | execbuf.batch_len = used; |
| 1270 | execbuf.cliprects_ptr = (uintptr_t) cliprects; |
| 1271 | execbuf.num_cliprects = num_cliprects; |
| 1272 | execbuf.DR1 = 0; |
| 1273 | execbuf.DR4 = DR4; |
Eric Anholt | f9d98be | 2008-09-08 08:51:40 -0700 | [diff] [blame] | 1274 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1275 | do { |
| 1276 | ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_EXECBUFFER, |
| 1277 | &execbuf); |
| 1278 | } while (ret != 0 && errno == EAGAIN); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1279 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1280 | if (ret != 0 && errno == ENOMEM) { |
| 1281 | fprintf(stderr, |
| 1282 | "Execbuffer fails to pin. " |
| 1283 | "Estimate: %u. Actual: %u. Available: %u\n", |
| 1284 | drm_intel_gem_estimate_batch_space(bufmgr_gem->exec_bos, |
| 1285 | bufmgr_gem-> |
| 1286 | exec_count), |
| 1287 | drm_intel_gem_compute_batch_space(bufmgr_gem->exec_bos, |
| 1288 | bufmgr_gem-> |
| 1289 | exec_count), |
| 1290 | (unsigned int)bufmgr_gem->gtt_size); |
| 1291 | } |
| 1292 | drm_intel_update_buffer_offsets(bufmgr_gem); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1293 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1294 | if (bufmgr_gem->bufmgr.debug) |
| 1295 | drm_intel_gem_dump_validation_list(bufmgr_gem); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1296 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1297 | for (i = 0; i < bufmgr_gem->exec_count; i++) { |
| 1298 | drm_intel_bo *bo = bufmgr_gem->exec_bos[i]; |
| 1299 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1300 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1301 | /* Disconnect the buffer from the validate list */ |
| 1302 | bo_gem->validate_index = -1; |
| 1303 | drm_intel_gem_bo_unreference_locked(bo); |
| 1304 | bufmgr_gem->exec_bos[i] = NULL; |
| 1305 | } |
| 1306 | bufmgr_gem->exec_count = 0; |
| 1307 | pthread_mutex_unlock(&bufmgr_gem->lock); |
Eric Anholt | f9d98be | 2008-09-08 08:51:40 -0700 | [diff] [blame] | 1308 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1309 | return 0; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1310 | } |
| 1311 | |
Keith Packard | 8e41ce1 | 2008-08-04 00:34:08 -0700 | [diff] [blame] | 1312 | static int |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 1313 | drm_intel_gem_bo_pin(drm_intel_bo *bo, uint32_t alignment) |
Keith Packard | 8e41ce1 | 2008-08-04 00:34:08 -0700 | [diff] [blame] | 1314 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1315 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; |
| 1316 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 1317 | struct drm_i915_gem_pin pin; |
| 1318 | int ret; |
Keith Packard | 8e41ce1 | 2008-08-04 00:34:08 -0700 | [diff] [blame] | 1319 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1320 | memset(&pin, 0, sizeof(pin)); |
| 1321 | pin.handle = bo_gem->gem_handle; |
| 1322 | pin.alignment = alignment; |
Keith Packard | 8e41ce1 | 2008-08-04 00:34:08 -0700 | [diff] [blame] | 1323 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1324 | do { |
| 1325 | ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_PIN, &pin); |
| 1326 | } while (ret == -1 && errno == EINTR); |
Eric Anholt | 02445ea | 2009-01-04 17:37:18 -0800 | [diff] [blame] | 1327 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1328 | if (ret != 0) |
| 1329 | return -errno; |
Keith Packard | 8e41ce1 | 2008-08-04 00:34:08 -0700 | [diff] [blame] | 1330 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1331 | bo->offset = pin.offset; |
| 1332 | return 0; |
Keith Packard | 8e41ce1 | 2008-08-04 00:34:08 -0700 | [diff] [blame] | 1333 | } |
| 1334 | |
| 1335 | static int |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 1336 | drm_intel_gem_bo_unpin(drm_intel_bo *bo) |
Keith Packard | 8e41ce1 | 2008-08-04 00:34:08 -0700 | [diff] [blame] | 1337 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1338 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; |
| 1339 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 1340 | struct drm_i915_gem_unpin unpin; |
| 1341 | int ret; |
Keith Packard | 8e41ce1 | 2008-08-04 00:34:08 -0700 | [diff] [blame] | 1342 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1343 | memset(&unpin, 0, sizeof(unpin)); |
| 1344 | unpin.handle = bo_gem->gem_handle; |
Keith Packard | 8e41ce1 | 2008-08-04 00:34:08 -0700 | [diff] [blame] | 1345 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1346 | ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_UNPIN, &unpin); |
| 1347 | if (ret != 0) |
| 1348 | return -errno; |
Keith Packard | 8e41ce1 | 2008-08-04 00:34:08 -0700 | [diff] [blame] | 1349 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1350 | return 0; |
Keith Packard | 8e41ce1 | 2008-08-04 00:34:08 -0700 | [diff] [blame] | 1351 | } |
| 1352 | |
| 1353 | static int |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1354 | drm_intel_gem_bo_set_tiling(drm_intel_bo *bo, uint32_t * tiling_mode, |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 1355 | uint32_t stride) |
Keith Packard | 8e41ce1 | 2008-08-04 00:34:08 -0700 | [diff] [blame] | 1356 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1357 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; |
| 1358 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 1359 | struct drm_i915_gem_set_tiling set_tiling; |
| 1360 | int ret; |
Keith Packard | 8e41ce1 | 2008-08-04 00:34:08 -0700 | [diff] [blame] | 1361 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1362 | if (bo_gem->global_name == 0 && *tiling_mode == bo_gem->tiling_mode) |
| 1363 | return 0; |
Keith Packard | 18f091d | 2008-12-15 15:08:12 -0800 | [diff] [blame] | 1364 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1365 | /* If we're going from non-tiling to tiling, bump fence count */ |
| 1366 | if (bo_gem->tiling_mode == I915_TILING_NONE) |
| 1367 | bo_gem->reloc_tree_fences++; |
Eric Anholt | 9209c9a | 2009-01-27 16:54:11 -0800 | [diff] [blame] | 1368 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1369 | memset(&set_tiling, 0, sizeof(set_tiling)); |
| 1370 | set_tiling.handle = bo_gem->gem_handle; |
| 1371 | set_tiling.tiling_mode = *tiling_mode; |
| 1372 | set_tiling.stride = stride; |
Keith Packard | 8e41ce1 | 2008-08-04 00:34:08 -0700 | [diff] [blame] | 1373 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1374 | ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_SET_TILING, &set_tiling); |
| 1375 | if (ret != 0) { |
| 1376 | *tiling_mode = bo_gem->tiling_mode; |
| 1377 | return -errno; |
| 1378 | } |
| 1379 | bo_gem->tiling_mode = set_tiling.tiling_mode; |
| 1380 | bo_gem->swizzle_mode = set_tiling.swizzle_mode; |
| 1381 | |
| 1382 | /* If we're going from tiling to non-tiling, drop fence count */ |
| 1383 | if (bo_gem->tiling_mode == I915_TILING_NONE) |
| 1384 | bo_gem->reloc_tree_fences--; |
| 1385 | |
Chris Wilson | e22fb79 | 2009-11-30 22:14:30 +0000 | [diff] [blame^] | 1386 | drm_intel_bo_gem_set_in_aperture_size(bufmgr_gem, bo_gem); |
| 1387 | |
Keith Packard | 18f091d | 2008-12-15 15:08:12 -0800 | [diff] [blame] | 1388 | *tiling_mode = bo_gem->tiling_mode; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1389 | return 0; |
Keith Packard | 8e41ce1 | 2008-08-04 00:34:08 -0700 | [diff] [blame] | 1390 | } |
| 1391 | |
| 1392 | static int |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1393 | drm_intel_gem_bo_get_tiling(drm_intel_bo *bo, uint32_t * tiling_mode, |
| 1394 | uint32_t * swizzle_mode) |
Keith Packard | 8e41ce1 | 2008-08-04 00:34:08 -0700 | [diff] [blame] | 1395 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1396 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
Eric Anholt | 9933838 | 2008-10-14 13:18:11 -0700 | [diff] [blame] | 1397 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1398 | *tiling_mode = bo_gem->tiling_mode; |
| 1399 | *swizzle_mode = bo_gem->swizzle_mode; |
| 1400 | return 0; |
Eric Anholt | 9933838 | 2008-10-14 13:18:11 -0700 | [diff] [blame] | 1401 | } |
| 1402 | |
| 1403 | static int |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1404 | drm_intel_gem_bo_flink(drm_intel_bo *bo, uint32_t * name) |
Keith Packard | 8e41ce1 | 2008-08-04 00:34:08 -0700 | [diff] [blame] | 1405 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1406 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; |
| 1407 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 1408 | struct drm_gem_flink flink; |
| 1409 | int ret; |
Keith Packard | 8e41ce1 | 2008-08-04 00:34:08 -0700 | [diff] [blame] | 1410 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1411 | if (!bo_gem->global_name) { |
| 1412 | memset(&flink, 0, sizeof(flink)); |
| 1413 | flink.handle = bo_gem->gem_handle; |
| 1414 | |
| 1415 | ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_GEM_FLINK, &flink); |
| 1416 | if (ret != 0) |
| 1417 | return -errno; |
| 1418 | bo_gem->global_name = flink.name; |
| 1419 | bo_gem->reusable = 0; |
| 1420 | } |
| 1421 | |
| 1422 | *name = bo_gem->global_name; |
| 1423 | return 0; |
Keith Packard | 8e41ce1 | 2008-08-04 00:34:08 -0700 | [diff] [blame] | 1424 | } |
| 1425 | |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1426 | /** |
| 1427 | * Enables unlimited caching of buffer objects for reuse. |
| 1428 | * |
| 1429 | * This is potentially very memory expensive, as the cache at each bucket |
| 1430 | * size is only bounded by how many buffers of that size we've managed to have |
| 1431 | * in flight at once. |
| 1432 | */ |
| 1433 | void |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 1434 | drm_intel_bufmgr_gem_enable_reuse(drm_intel_bufmgr *bufmgr) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1435 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1436 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bufmgr; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1437 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1438 | bufmgr_gem->bo_reuse = 1; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1439 | } |
| 1440 | |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 1441 | /** |
| 1442 | * Return the additional aperture space required by the tree of buffer objects |
| 1443 | * rooted at bo. |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1444 | */ |
| 1445 | static int |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 1446 | drm_intel_gem_bo_get_aperture_space(drm_intel_bo *bo) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1447 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1448 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 1449 | int i; |
| 1450 | int total = 0; |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 1451 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1452 | if (bo == NULL || bo_gem->included_in_check_aperture) |
| 1453 | return 0; |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 1454 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1455 | total += bo->size; |
| 1456 | bo_gem->included_in_check_aperture = 1; |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 1457 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1458 | for (i = 0; i < bo_gem->reloc_count; i++) |
| 1459 | total += |
| 1460 | drm_intel_gem_bo_get_aperture_space(bo_gem-> |
| 1461 | reloc_target_bo[i]); |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 1462 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1463 | return total; |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 1464 | } |
| 1465 | |
| 1466 | /** |
Jesse Barnes | 2fa5f28 | 2009-01-23 14:13:45 -0800 | [diff] [blame] | 1467 | * Count the number of buffers in this list that need a fence reg |
| 1468 | * |
| 1469 | * If the count is greater than the number of available regs, we'll have |
| 1470 | * to ask the caller to resubmit a batch with fewer tiled buffers. |
| 1471 | * |
Eric Anholt | 9209c9a | 2009-01-27 16:54:11 -0800 | [diff] [blame] | 1472 | * This function over-counts if the same buffer is used multiple times. |
Jesse Barnes | 2fa5f28 | 2009-01-23 14:13:45 -0800 | [diff] [blame] | 1473 | */ |
| 1474 | static unsigned int |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1475 | drm_intel_gem_total_fences(drm_intel_bo ** bo_array, int count) |
Jesse Barnes | 2fa5f28 | 2009-01-23 14:13:45 -0800 | [diff] [blame] | 1476 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1477 | int i; |
| 1478 | unsigned int total = 0; |
Jesse Barnes | 2fa5f28 | 2009-01-23 14:13:45 -0800 | [diff] [blame] | 1479 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1480 | for (i = 0; i < count; i++) { |
| 1481 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo_array[i]; |
Jesse Barnes | 2fa5f28 | 2009-01-23 14:13:45 -0800 | [diff] [blame] | 1482 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1483 | if (bo_gem == NULL) |
| 1484 | continue; |
Jesse Barnes | 2fa5f28 | 2009-01-23 14:13:45 -0800 | [diff] [blame] | 1485 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1486 | total += bo_gem->reloc_tree_fences; |
| 1487 | } |
| 1488 | return total; |
Jesse Barnes | 2fa5f28 | 2009-01-23 14:13:45 -0800 | [diff] [blame] | 1489 | } |
| 1490 | |
| 1491 | /** |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 1492 | * Clear the flag set by drm_intel_gem_bo_get_aperture_space() so we're ready |
| 1493 | * for the next drm_intel_bufmgr_check_aperture_space() call. |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 1494 | */ |
| 1495 | static void |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 1496 | drm_intel_gem_bo_clear_aperture_space_flag(drm_intel_bo *bo) |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 1497 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1498 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 1499 | int i; |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 1500 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1501 | if (bo == NULL || !bo_gem->included_in_check_aperture) |
| 1502 | return; |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 1503 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1504 | bo_gem->included_in_check_aperture = 0; |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 1505 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1506 | for (i = 0; i < bo_gem->reloc_count; i++) |
| 1507 | drm_intel_gem_bo_clear_aperture_space_flag(bo_gem-> |
| 1508 | reloc_target_bo[i]); |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 1509 | } |
| 1510 | |
| 1511 | /** |
Keith Packard | b13f4e1 | 2008-11-21 01:49:39 -0800 | [diff] [blame] | 1512 | * Return a conservative estimate for the amount of aperture required |
| 1513 | * for a collection of buffers. This may double-count some buffers. |
| 1514 | */ |
| 1515 | static unsigned int |
| 1516 | drm_intel_gem_estimate_batch_space(drm_intel_bo **bo_array, int count) |
| 1517 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1518 | int i; |
| 1519 | unsigned int total = 0; |
Keith Packard | b13f4e1 | 2008-11-21 01:49:39 -0800 | [diff] [blame] | 1520 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1521 | for (i = 0; i < count; i++) { |
| 1522 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo_array[i]; |
| 1523 | if (bo_gem != NULL) |
| 1524 | total += bo_gem->reloc_tree_size; |
| 1525 | } |
| 1526 | return total; |
Keith Packard | b13f4e1 | 2008-11-21 01:49:39 -0800 | [diff] [blame] | 1527 | } |
| 1528 | |
| 1529 | /** |
| 1530 | * Return the amount of aperture needed for a collection of buffers. |
| 1531 | * This avoids double counting any buffers, at the cost of looking |
| 1532 | * at every buffer in the set. |
| 1533 | */ |
| 1534 | static unsigned int |
| 1535 | drm_intel_gem_compute_batch_space(drm_intel_bo **bo_array, int count) |
| 1536 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1537 | int i; |
| 1538 | unsigned int total = 0; |
Keith Packard | b13f4e1 | 2008-11-21 01:49:39 -0800 | [diff] [blame] | 1539 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1540 | for (i = 0; i < count; i++) { |
| 1541 | total += drm_intel_gem_bo_get_aperture_space(bo_array[i]); |
| 1542 | /* For the first buffer object in the array, we get an |
| 1543 | * accurate count back for its reloc_tree size (since nothing |
| 1544 | * had been flagged as being counted yet). We can save that |
| 1545 | * value out as a more conservative reloc_tree_size that |
| 1546 | * avoids double-counting target buffers. Since the first |
| 1547 | * buffer happens to usually be the batch buffer in our |
| 1548 | * callers, this can pull us back from doing the tree |
| 1549 | * walk on every new batch emit. |
| 1550 | */ |
| 1551 | if (i == 0) { |
| 1552 | drm_intel_bo_gem *bo_gem = |
| 1553 | (drm_intel_bo_gem *) bo_array[i]; |
| 1554 | bo_gem->reloc_tree_size = total; |
| 1555 | } |
Eric Anholt | 7ce8d4c | 2009-02-27 13:46:31 -0800 | [diff] [blame] | 1556 | } |
Keith Packard | b13f4e1 | 2008-11-21 01:49:39 -0800 | [diff] [blame] | 1557 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1558 | for (i = 0; i < count; i++) |
| 1559 | drm_intel_gem_bo_clear_aperture_space_flag(bo_array[i]); |
| 1560 | return total; |
Keith Packard | b13f4e1 | 2008-11-21 01:49:39 -0800 | [diff] [blame] | 1561 | } |
| 1562 | |
| 1563 | /** |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 1564 | * Return -1 if the batchbuffer should be flushed before attempting to |
| 1565 | * emit rendering referencing the buffers pointed to by bo_array. |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1566 | * |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 1567 | * This is required because if we try to emit a batchbuffer with relocations |
| 1568 | * to a tree of buffers that won't simultaneously fit in the aperture, |
| 1569 | * the rendering will return an error at a point where the software is not |
| 1570 | * prepared to recover from it. |
| 1571 | * |
| 1572 | * However, we also want to emit the batchbuffer significantly before we reach |
| 1573 | * the limit, as a series of batchbuffers each of which references buffers |
| 1574 | * covering almost all of the aperture means that at each emit we end up |
| 1575 | * waiting to evict a buffer from the last rendering, and we get synchronous |
| 1576 | * performance. By emitting smaller batchbuffers, we eat some CPU overhead to |
| 1577 | * get better parallelism. |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1578 | */ |
| 1579 | static int |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 1580 | drm_intel_gem_check_aperture_space(drm_intel_bo **bo_array, int count) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1581 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1582 | drm_intel_bufmgr_gem *bufmgr_gem = |
| 1583 | (drm_intel_bufmgr_gem *) bo_array[0]->bufmgr; |
| 1584 | unsigned int total = 0; |
| 1585 | unsigned int threshold = bufmgr_gem->gtt_size * 3 / 4; |
| 1586 | int total_fences; |
Jesse Barnes | 2fa5f28 | 2009-01-23 14:13:45 -0800 | [diff] [blame] | 1587 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1588 | /* Check for fence reg constraints if necessary */ |
| 1589 | if (bufmgr_gem->available_fences) { |
| 1590 | total_fences = drm_intel_gem_total_fences(bo_array, count); |
| 1591 | if (total_fences > bufmgr_gem->available_fences) |
| 1592 | return -1; |
| 1593 | } |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 1594 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1595 | total = drm_intel_gem_estimate_batch_space(bo_array, count); |
Jesse Barnes | 2fa5f28 | 2009-01-23 14:13:45 -0800 | [diff] [blame] | 1596 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1597 | if (total > threshold) |
| 1598 | total = drm_intel_gem_compute_batch_space(bo_array, count); |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 1599 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1600 | if (total > threshold) { |
| 1601 | DBG("check_space: overflowed available aperture, " |
| 1602 | "%dkb vs %dkb\n", |
| 1603 | total / 1024, (int)bufmgr_gem->gtt_size / 1024); |
| 1604 | return -1; |
| 1605 | } else { |
| 1606 | DBG("drm_check_space: total %dkb vs bufgr %dkb\n", total / 1024, |
| 1607 | (int)bufmgr_gem->gtt_size / 1024); |
| 1608 | return 0; |
| 1609 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1610 | } |
| 1611 | |
Keith Packard | 5b5ce30 | 2009-05-11 13:42:12 -0700 | [diff] [blame] | 1612 | /* |
| 1613 | * Disable buffer reuse for objects which are shared with the kernel |
| 1614 | * as scanout buffers |
| 1615 | */ |
| 1616 | static int |
| 1617 | drm_intel_gem_bo_disable_reuse(drm_intel_bo *bo) |
| 1618 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1619 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
Keith Packard | 5b5ce30 | 2009-05-11 13:42:12 -0700 | [diff] [blame] | 1620 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1621 | bo_gem->reusable = 0; |
| 1622 | return 0; |
Keith Packard | 5b5ce30 | 2009-05-11 13:42:12 -0700 | [diff] [blame] | 1623 | } |
| 1624 | |
Eric Anholt | 769b105 | 2009-10-01 19:09:26 -0700 | [diff] [blame] | 1625 | static int |
Eric Anholt | 66d2714 | 2009-10-20 13:20:55 -0700 | [diff] [blame] | 1626 | _drm_intel_gem_bo_references(drm_intel_bo *bo, drm_intel_bo *target_bo) |
Eric Anholt | 769b105 | 2009-10-01 19:09:26 -0700 | [diff] [blame] | 1627 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1628 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 1629 | int i; |
Eric Anholt | 769b105 | 2009-10-01 19:09:26 -0700 | [diff] [blame] | 1630 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1631 | for (i = 0; i < bo_gem->reloc_count; i++) { |
| 1632 | if (bo_gem->reloc_target_bo[i] == target_bo) |
| 1633 | return 1; |
Eric Anholt | 66d2714 | 2009-10-20 13:20:55 -0700 | [diff] [blame] | 1634 | if (_drm_intel_gem_bo_references(bo_gem->reloc_target_bo[i], |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1635 | target_bo)) |
| 1636 | return 1; |
| 1637 | } |
| 1638 | |
Eric Anholt | 769b105 | 2009-10-01 19:09:26 -0700 | [diff] [blame] | 1639 | return 0; |
Eric Anholt | 769b105 | 2009-10-01 19:09:26 -0700 | [diff] [blame] | 1640 | } |
| 1641 | |
Eric Anholt | 66d2714 | 2009-10-20 13:20:55 -0700 | [diff] [blame] | 1642 | /** Return true if target_bo is referenced by bo's relocation tree. */ |
| 1643 | static int |
| 1644 | drm_intel_gem_bo_references(drm_intel_bo *bo, drm_intel_bo *target_bo) |
| 1645 | { |
| 1646 | drm_intel_bo_gem *target_bo_gem = (drm_intel_bo_gem *) target_bo; |
| 1647 | |
| 1648 | if (bo == NULL || target_bo == NULL) |
| 1649 | return 0; |
| 1650 | if (target_bo_gem->used_as_reloc_target) |
| 1651 | return _drm_intel_gem_bo_references(bo, target_bo); |
| 1652 | return 0; |
| 1653 | } |
| 1654 | |
Eric Anholt | 769b105 | 2009-10-01 19:09:26 -0700 | [diff] [blame] | 1655 | /** |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1656 | * Initializes the GEM buffer manager, which uses the kernel to allocate, map, |
| 1657 | * and manage map buffer objections. |
| 1658 | * |
| 1659 | * \param fd File descriptor of the opened DRM device. |
| 1660 | */ |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 1661 | drm_intel_bufmgr * |
| 1662 | drm_intel_bufmgr_gem_init(int fd, int batch_size) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1663 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1664 | drm_intel_bufmgr_gem *bufmgr_gem; |
| 1665 | struct drm_i915_gem_get_aperture aperture; |
| 1666 | drm_i915_getparam_t gp; |
| 1667 | int ret, i; |
| 1668 | unsigned long size; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1669 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1670 | bufmgr_gem = calloc(1, sizeof(*bufmgr_gem)); |
| 1671 | bufmgr_gem->fd = fd; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1672 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1673 | if (pthread_mutex_init(&bufmgr_gem->lock, NULL) != 0) { |
| 1674 | free(bufmgr_gem); |
| 1675 | return NULL; |
| 1676 | } |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 1677 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1678 | ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_GET_APERTURE, &aperture); |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 1679 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1680 | if (ret == 0) |
| 1681 | bufmgr_gem->gtt_size = aperture.aper_available_size; |
| 1682 | else { |
| 1683 | fprintf(stderr, "DRM_IOCTL_I915_GEM_APERTURE failed: %s\n", |
| 1684 | strerror(errno)); |
| 1685 | bufmgr_gem->gtt_size = 128 * 1024 * 1024; |
| 1686 | fprintf(stderr, "Assuming %dkB available aperture size.\n" |
| 1687 | "May lead to reduced performance or incorrect " |
| 1688 | "rendering.\n", |
| 1689 | (int)bufmgr_gem->gtt_size / 1024); |
| 1690 | } |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 1691 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1692 | gp.param = I915_PARAM_CHIPSET_ID; |
| 1693 | gp.value = &bufmgr_gem->pci_device; |
Eric Anholt | cbdd627 | 2009-01-27 17:16:11 -0800 | [diff] [blame] | 1694 | ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp); |
| 1695 | if (ret) { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1696 | fprintf(stderr, "get chip id failed: %d [%d]\n", ret, errno); |
| 1697 | fprintf(stderr, "param: %d, val: %d\n", gp.param, *gp.value); |
Eric Anholt | cbdd627 | 2009-01-27 17:16:11 -0800 | [diff] [blame] | 1698 | } |
Jesse Barnes | 2fa5f28 | 2009-01-23 14:13:45 -0800 | [diff] [blame] | 1699 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1700 | if (!IS_I965G(bufmgr_gem)) { |
| 1701 | gp.param = I915_PARAM_NUM_FENCES_AVAIL; |
| 1702 | gp.value = &bufmgr_gem->available_fences; |
| 1703 | ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp); |
| 1704 | if (ret) { |
| 1705 | fprintf(stderr, "get fences failed: %d [%d]\n", ret, |
| 1706 | errno); |
| 1707 | fprintf(stderr, "param: %d, val: %d\n", gp.param, |
| 1708 | *gp.value); |
| 1709 | bufmgr_gem->available_fences = 0; |
| 1710 | } |
| 1711 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1712 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1713 | /* Let's go with one relocation per every 2 dwords (but round down a bit |
| 1714 | * since a power of two will mean an extra page allocation for the reloc |
| 1715 | * buffer). |
| 1716 | * |
| 1717 | * Every 4 was too few for the blender benchmark. |
| 1718 | */ |
| 1719 | bufmgr_gem->max_relocs = batch_size / sizeof(uint32_t) / 2 - 2; |
Eric Anholt | 769b105 | 2009-10-01 19:09:26 -0700 | [diff] [blame] | 1720 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1721 | bufmgr_gem->bufmgr.bo_alloc = drm_intel_gem_bo_alloc; |
| 1722 | bufmgr_gem->bufmgr.bo_alloc_for_render = |
| 1723 | drm_intel_gem_bo_alloc_for_render; |
Jesse Barnes | 3a7dfcd | 2009-10-06 14:34:06 -0700 | [diff] [blame] | 1724 | bufmgr_gem->bufmgr.bo_alloc_tiled = drm_intel_gem_bo_alloc_tiled; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1725 | bufmgr_gem->bufmgr.bo_reference = drm_intel_gem_bo_reference; |
| 1726 | bufmgr_gem->bufmgr.bo_unreference = drm_intel_gem_bo_unreference; |
| 1727 | bufmgr_gem->bufmgr.bo_map = drm_intel_gem_bo_map; |
| 1728 | bufmgr_gem->bufmgr.bo_unmap = drm_intel_gem_bo_unmap; |
| 1729 | bufmgr_gem->bufmgr.bo_subdata = drm_intel_gem_bo_subdata; |
| 1730 | bufmgr_gem->bufmgr.bo_get_subdata = drm_intel_gem_bo_get_subdata; |
| 1731 | bufmgr_gem->bufmgr.bo_wait_rendering = drm_intel_gem_bo_wait_rendering; |
| 1732 | bufmgr_gem->bufmgr.bo_emit_reloc = drm_intel_gem_bo_emit_reloc; |
| 1733 | bufmgr_gem->bufmgr.bo_pin = drm_intel_gem_bo_pin; |
| 1734 | bufmgr_gem->bufmgr.bo_unpin = drm_intel_gem_bo_unpin; |
| 1735 | bufmgr_gem->bufmgr.bo_get_tiling = drm_intel_gem_bo_get_tiling; |
| 1736 | bufmgr_gem->bufmgr.bo_set_tiling = drm_intel_gem_bo_set_tiling; |
| 1737 | bufmgr_gem->bufmgr.bo_flink = drm_intel_gem_bo_flink; |
| 1738 | bufmgr_gem->bufmgr.bo_exec = drm_intel_gem_bo_exec; |
| 1739 | bufmgr_gem->bufmgr.bo_busy = drm_intel_gem_bo_busy; |
Chris Wilson | 83a35b6 | 2009-11-11 13:04:38 +0000 | [diff] [blame] | 1740 | bufmgr_gem->bufmgr.bo_madvise = drm_intel_gem_bo_madvise; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1741 | bufmgr_gem->bufmgr.destroy = drm_intel_bufmgr_gem_destroy; |
| 1742 | bufmgr_gem->bufmgr.debug = 0; |
| 1743 | bufmgr_gem->bufmgr.check_aperture_space = |
| 1744 | drm_intel_gem_check_aperture_space; |
| 1745 | bufmgr_gem->bufmgr.bo_disable_reuse = drm_intel_gem_bo_disable_reuse; |
| 1746 | bufmgr_gem->bufmgr.get_pipe_from_crtc_id = |
| 1747 | drm_intel_gem_get_pipe_from_crtc_id; |
| 1748 | bufmgr_gem->bufmgr.bo_references = drm_intel_gem_bo_references; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1749 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1750 | /* Initialize the linked lists for BO reuse cache. */ |
| 1751 | for (i = 0, size = 4096; i < DRM_INTEL_GEM_BO_BUCKETS; i++, size *= 2) { |
| 1752 | DRMINITLISTHEAD(&bufmgr_gem->cache_bucket[i].head); |
| 1753 | bufmgr_gem->cache_bucket[i].size = size; |
| 1754 | } |
| 1755 | |
| 1756 | return &bufmgr_gem->bufmgr; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1757 | } |