Inki Dae | bbf6e3d | 2013-02-18 21:51:00 +0900 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2013 Samsung Electronics Co.Ltd |
| 3 | * Authors: |
| 4 | * Inki Dae <inki.dae@samsung.com> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms of the GNU General Public License as published by the |
| 8 | * Free Software Foundation; either version 2 of the License, or (at your |
| 9 | * option) any later version. |
| 10 | * |
| 11 | */ |
| 12 | |
| 13 | #ifndef _FIMG2D_REG_H_ |
| 14 | #define _FIMG2D_REG_H_ |
| 15 | |
| 16 | #define SOFT_RESET_REG (0x0000) |
| 17 | #define INTEN_REG (0x0004) |
| 18 | #define INTC_PEND_REG (0x000c) |
| 19 | #define FIFO_STAT_REG (0x0010) |
| 20 | #define AXI_MODE_REG (0x001C) |
| 21 | #define DMA_SFR_BASE_ADDR_REG (0x0080) |
| 22 | #define DMA_COMMAND_REG (0x0084) |
| 23 | #define DMA_EXE_LIST_NUM_REG (0x0088) |
| 24 | #define DMA_STATUS_REG (0x008C) |
| 25 | #define DMA_HOLD_CMD_REG (0x0090) |
| 26 | |
| 27 | /* COMMAND REGISTER */ |
| 28 | #define BITBLT_START_REG (0x0100) |
| 29 | #define BITBLT_COMMAND_REG (0x0104) |
| 30 | #define BLEND_FUNCTION_REG (0x0108) /* VER4.1 */ |
| 31 | #define ROUND_MODE_REG (0x010C) /* VER4.1 */ |
| 32 | |
| 33 | /* PARAMETER SETTING REGISTER */ |
| 34 | #define ROTATE_REG (0x0200) |
| 35 | #define SRC_MASK_DIRECT_REG (0x0204) |
| 36 | #define DST_PAT_DIRECT_REG (0x0208) |
| 37 | |
| 38 | /* SOURCE */ |
| 39 | #define SRC_SELECT_REG (0x0300) |
| 40 | #define SRC_BASE_ADDR_REG (0x0304) |
| 41 | #define SRC_STRIDE_REG (0x0308) |
| 42 | #define SRC_COLOR_MODE_REG (0x030c) |
| 43 | #define SRC_LEFT_TOP_REG (0x0310) |
| 44 | #define SRC_RIGHT_BOTTOM_REG (0x0314) |
| 45 | #define SRC_PLANE2_BASE_ADDR_REG (0x0318) /* VER4.1 */ |
| 46 | #define SRC_REPEAT_MODE_REG (0x031C) |
| 47 | #define SRC_PAD_VALUE_REG (0x0320) |
| 48 | #define SRC_A8_RGB_EXT_REG (0x0324) |
| 49 | #define SRC_SCALE_CTRL_REG (0x0328) |
| 50 | #define SRC_XSCALE_REG (0x032C) |
| 51 | #define SRC_YSCALE_REG (0x0330) |
| 52 | |
| 53 | /* DESTINATION */ |
| 54 | #define DST_SELECT_REG (0x0400) |
| 55 | #define DST_BASE_ADDR_REG (0x0404) |
| 56 | #define DST_STRIDE_REG (0x0408) |
| 57 | #define DST_COLOR_MODE_REG (0x040C) |
| 58 | #define DST_LEFT_TOP_REG (0x0410) |
| 59 | #define DST_RIGHT_BOTTOM_REG (0x0414) |
| 60 | #define DST_PLANE2_BASE_ADDR_REG (0x0418) /* VER4.1 */ |
| 61 | #define DST_A8_RGB_EXT_REG (0x041C) |
| 62 | |
| 63 | /* PATTERN */ |
| 64 | #define PAT_BASE_ADDR_REG (0x0500) |
| 65 | #define PAT_SIZE_REG (0x0504) |
| 66 | #define PAT_COLOR_MODE_REG (0x0508) |
| 67 | #define PAT_OFFSET_REG (0x050C) |
| 68 | #define PAT_STRIDE_REG (0x0510) |
| 69 | |
| 70 | /* MASK */ |
| 71 | #define MASK_BASE_ADDR_REG (0x0520) |
| 72 | #define MASK_STRIDE_REG (0x0524) |
| 73 | #define MASK_LEFT_TOP_REG (0x0528) /* VER4.1 */ |
| 74 | #define MASK_RIGHT_BOTTOM_REG (0x052C) /* VER4.1 */ |
| 75 | #define MASK_MODE_REG (0x0530) /* VER4.1 */ |
| 76 | #define MASK_REPEAT_MODE_REG (0x0534) |
| 77 | #define MASK_PAD_VALUE_REG (0x0538) |
| 78 | #define MASK_SCALE_CTRL_REG (0x053C) |
| 79 | #define MASK_XSCALE_REG (0x0540) |
| 80 | #define MASK_YSCALE_REG (0x0544) |
| 81 | |
| 82 | /* CLIPPING WINDOW */ |
| 83 | #define CW_LT_REG (0x0600) |
| 84 | #define CW_RB_REG (0x0604) |
| 85 | |
| 86 | /* ROP & ALPHA SETTING */ |
| 87 | #define THIRD_OPERAND_REG (0x0610) |
| 88 | #define ROP4_REG (0x0614) |
| 89 | #define ALPHA_REG (0x0618) |
| 90 | |
| 91 | /* COLOR SETTING */ |
| 92 | #define FG_COLOR_REG (0x0700) |
| 93 | #define BG_COLOR_REG (0x0704) |
| 94 | #define BS_COLOR_REG (0x0708) |
| 95 | #define SF_COLOR_REG (0x070C) /* VER4.1 */ |
| 96 | |
| 97 | /* COLOR KEY */ |
| 98 | #define SRC_COLORKEY_CTRL_REG (0x0710) |
| 99 | #define SRC_COLORKEY_DR_MIN_REG (0x0714) |
| 100 | #define SRC_COLORKEY_DR_MAX_REG (0x0718) |
| 101 | #define DST_COLORKEY_CTRL_REG (0x071C) |
| 102 | #define DST_COLORKEY_DR_MIN_REG (0x0720) |
| 103 | #define DST_COLORKEY_DR_MAX_REG (0x0724) |
| 104 | /* YCbCr src Color Key */ |
| 105 | #define YCbCr_SRC_COLORKEY_CTRL_REG (0x0728) /* VER4.1 */ |
| 106 | #define YCbCr_SRC_COLORKEY_DR_MIN_REG (0x072C) /* VER4.1 */ |
| 107 | #define YCbCr_SRC_COLORKEY_DR_MAX_REG (0x0730) /* VER4.1 */ |
| 108 | /*Y CbCr dst Color Key */ |
| 109 | #define YCbCr_DST_COLORKEY_CTRL_REG (0x0734) /* VER4.1 */ |
| 110 | #define YCbCr_DST_COLORKEY_DR_MIN_REG (0x0738) /* VER4.1 */ |
| 111 | #define YCbCr_DST_COLORKEY_DR_MAX_REG (0x073C) /* VER4.1 */ |
| 112 | |
| 113 | #endif |
| 114 | |