blob: 77118fa971771dfd5dd32084e743908fc0fa9630 [file] [log] [blame]
Will Drewryd4ae5282017-01-03 22:06:26 -06001/*
2 * Copyright (C) 2017 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 *
16 * Tests a very simple end to end T=1 using the echo backend.
17 */
18
19#include <string.h>
20
21#include <vector>
22#include <gtest/gtest.h>
23
24#include <ese/ese.h>
25#include <ese/teq1.h>
26#define LOG_TAG "TEQ1_UNITTESTS"
27#include <ese/log.h>
28
29#include "teq1_private.h"
30
31ESE_INCLUDE_HW(ESE_HW_FAKE);
32
33using ::testing::Test;
34
35// TODO:
36// - Unittests of each function
37// - teq1_rules matches Annex A of ISO 7816-3
38
39
40// Tests teq1_frame_error_check to avoid testing every combo that
41// ends in 255 in the rule engine.
42class Teq1FrameErrorCheck : public virtual Test {
43 public:
44 Teq1FrameErrorCheck() { }
45 virtual ~Teq1FrameErrorCheck() { }
46 struct Teq1Frame tx_frame_, rx_frame_;
47 struct Teq1State state_;
48 struct Teq1CardState card_state_;
49};
50
51TEST_F(Teq1FrameErrorCheck, info_parity) {
52 static const uint8_t kRxPCBs[] = {
53 TEQ1_I(0, 0),
54 TEQ1_I(1, 0),
55 TEQ1_I(0, 1),
56 TEQ1_I(1, 1),
57 255,
58 };
59 const uint8_t *pcb = &kRxPCBs[0];
60 /* The PCBs above are all valid for a sent unchained I block with advancing
61 * sequence #s.
62 */
63 tx_frame_.header.PCB.val = TEQ1_I(0, 0);
64 state_.card_state = &card_state_;
65 state_.card_state->seq.card = 1;
66 while (*pcb != 255) {
67 rx_frame_.header.PCB.val = *pcb;
68 rx_frame_.header.LEN = 2;
69 rx_frame_.INF[0] = 'A';
70 rx_frame_.INF[1] = 'B';
71 rx_frame_.INF[2] = teq1_compute_LRC(&rx_frame_);
72 EXPECT_EQ(0, teq1_frame_error_check(&state_, &tx_frame_, &rx_frame_)) << teq1_pcb_to_name(rx_frame_.header.PCB.val);
73 rx_frame_.INF[2] = teq1_compute_LRC(&rx_frame_) - 1;
74 // Reset so we check the LRC error instead of a wrong seq.
75 state_.card_state->seq.card = !state_.card_state->seq.card;
76 EXPECT_EQ(TEQ1_R(0, 0, 1), teq1_frame_error_check(&state_, &tx_frame_, &rx_frame_));
77 state_.card_state->seq.card = !state_.card_state->seq.card;
78 pcb++;
79 }
80};
81
82TEST_F(Teq1FrameErrorCheck, length_mismatch) {
83};
84
85TEST_F(Teq1FrameErrorCheck, unchained_r_block) {
86};
87
88TEST_F(Teq1FrameErrorCheck, unexpected_seq) {
89};
90
91class Teq1RulesTest : public virtual Test {
92 public:
93 Teq1RulesTest() :
94 tx_data_(INF_LEN, 'A'),
95 rx_data_(INF_LEN, 'B'),
96 card_state_({ .seq = { .card = 1, .interface = 1, }, }),
97 state_(TEQ1_INIT_STATE(tx_data_.data(), tx_data_.size(),
98 rx_data_.data(), rx_data_.size(), &card_state_)) {
99 memset(&tx_frame_, 0, sizeof(struct Teq1Frame));
100 memset(&tx_next_, 0, sizeof(struct Teq1Frame));
101 memset(&rx_frame_, 0, sizeof(struct Teq1Frame));
102 }
103 virtual ~Teq1RulesTest() { }
104 virtual void SetUp() {}
105 virtual void TearDown() { }
106
107 struct Teq1Frame tx_frame_;
108 struct Teq1Frame tx_next_;
109 struct Teq1Frame rx_frame_;
110 std::vector<uint8_t> tx_data_;
111 std::vector<uint8_t> rx_data_;
112 struct Teq1CardState card_state_;
113 struct Teq1State state_;
114};
115
116class Teq1ErrorFreeTest : public Teq1RulesTest {
117};
118
119class Teq1ErrorHandlingTest : public Teq1RulesTest {
120};
121
122class Teq1CompleteTest : public Teq1ErrorFreeTest {
123 public:
124 virtual void SetUp() {
125 tx_frame_.header.PCB.val = TEQ1_I(0, 0);
126 teq1_fill_info_block(&state_, &tx_frame_);
127 // Check that the tx_data was fully consumed.
128 EXPECT_EQ(0UL, state_.app_data.tx_len);
129
130 rx_frame_.header.PCB.val = TEQ1_I(0, 0);
131 rx_frame_.header.LEN = INF_LEN;
132 ASSERT_EQ(static_cast<unsigned long>(INF_LEN), tx_data_.size()); // Catch fixture changes.
133 // Supply TX data and make sure it overwrites RX data on consumption.
134 memcpy(rx_frame_.INF, tx_data_.data(), INF_LEN);
135 rx_frame_.INF[INF_LEN] = teq1_compute_LRC(&rx_frame_);
136 }
137
138 virtual void RunRules() {
139 teq1_trace_header();
140 teq1_trace_transmit(tx_frame_.header.PCB.val, tx_frame_.header.LEN);
141 teq1_trace_receive(rx_frame_.header.PCB.val, rx_frame_.header.LEN);
142
143 enum RuleResult result = teq1_rules(&state_, &tx_frame_, &rx_frame_, &tx_next_);
144 EXPECT_EQ(0, state_.errors);
145 EXPECT_EQ(NULL, state_.last_error_message)
146 << "Last error: " << state_.last_error_message;
147 EXPECT_EQ(0, tx_next_.header.PCB.val)
148 << "Actual next TX: " << teq1_pcb_to_name(tx_next_.header.PCB.val);
149 EXPECT_EQ(kRuleResultComplete, result)
150 << "Actual result name: " << teq1_rule_result_to_name(result);
151 }
152};
153
154TEST_F(Teq1CompleteTest, I00_I00_empty) {
155 // No data.
156 state_.app_data.tx_len = 0;
157 state_.app_data.rx_len = 0;
158 // Re-zero the prepared frames.
159 teq1_fill_info_block(&state_, &tx_frame_);
160 rx_frame_.header.LEN = 0;
161 rx_frame_.INF[0] = teq1_compute_LRC(&rx_frame_);
162 RunRules();
163 EXPECT_EQ(0U, rx_frame_.header.LEN);
164};
165
166TEST_F(Teq1CompleteTest, I00_I00_data) {
167 RunRules();
168 // Ensure that the rx_frame data was copied out to rx_data.
169 EXPECT_EQ(0UL, state_.app_data.rx_len);
170 EXPECT_EQ(tx_data_, rx_data_);
171};
172
173TEST_F(Teq1CompleteTest, I10_I10_data) {
174 tx_frame_.header.PCB.val = TEQ1_I(1, 0);
175 rx_frame_.header.PCB.val = TEQ1_I(0, 0);
176 rx_frame_.INF[INF_LEN] = teq1_compute_LRC(&rx_frame_);
177 RunRules();
178 // Ensure that the rx_frame data was copied out to rx_data.
179 EXPECT_EQ(INF_LEN, rx_frame_.header.LEN);
180 EXPECT_EQ(0UL, state_.app_data.rx_len);
181 EXPECT_EQ(tx_data_, rx_data_);
182};
183
184// Note, IFS is not tested as it is not supported on current hardware.
185
186TEST_F(Teq1ErrorFreeTest, I00_WTX0_WTX1_data) {
187 tx_frame_.header.PCB.val = TEQ1_I(0, 0);
188 teq1_fill_info_block(&state_, &tx_frame_);
189 // Check that the tx_data was fully consumed.
190 EXPECT_EQ(0UL, state_.app_data.tx_len);
191
192 rx_frame_.header.PCB.val = TEQ1_S_WTX(0);
193 rx_frame_.header.LEN = 1;
194 rx_frame_.INF[0] = 2; /* Wait x 2 */
195 rx_frame_.INF[1] = teq1_compute_LRC(&rx_frame_);
196
197 teq1_trace_header();
198 teq1_trace_transmit(tx_frame_.header.PCB.val, tx_frame_.header.LEN);
199 teq1_trace_receive(rx_frame_.header.PCB.val, rx_frame_.header.LEN);
200
201 enum RuleResult result = teq1_rules(&state_, &tx_frame_, &rx_frame_, &tx_next_);
202 teq1_trace_transmit(tx_next_.header.PCB.val, tx_next_.header.LEN);
203
204 EXPECT_EQ(0, state_.errors);
205 EXPECT_EQ(NULL, state_.last_error_message)
206 << "Last error: " << state_.last_error_message;
207 EXPECT_EQ(TEQ1_S_WTX(1), tx_next_.header.PCB.val)
208 << "Actual next TX: " << teq1_pcb_to_name(tx_next_.header.PCB.val);
209 EXPECT_EQ(state_.wait_mult, 2);
210 EXPECT_EQ(state_.wait_mult, rx_frame_.INF[0]);
211 // Ensure the next call will use the original TX frame.
212 EXPECT_EQ(kRuleResultSingleShot, result)
213 << "Actual result name: " << teq1_rule_result_to_name(result);
214};
215
216class Teq1ErrorFreeChainingTest : public Teq1ErrorFreeTest {
217 public:
218 virtual void RunRules() {
219 state_.app_data.tx_len = oversized_data_len_;
220 tx_data_.resize(oversized_data_len_, 'C');
221 state_.app_data.tx_buf = tx_data_.data();
222 teq1_fill_info_block(&state_, &tx_frame_);
223 // Ensure More bit was set.
224 EXPECT_EQ(1, tx_frame_.header.PCB.I.more_data);
225 // Check that the tx_data was fully consumed.
226 EXPECT_EQ(static_cast<size_t>(oversized_data_len_ - INF_LEN),
227 state_.app_data.tx_len);
228 // No one is checking the TX LRC since there is no card present.
229
230 rx_frame_.header.LEN = 0;
231 rx_frame_.INF[0] = teq1_compute_LRC(&rx_frame_);
232
233 teq1_trace_header();
234 teq1_trace_transmit(tx_frame_.header.PCB.val, tx_frame_.header.LEN);
235 teq1_trace_receive(rx_frame_.header.PCB.val, rx_frame_.header.LEN);
236
237 enum RuleResult result = teq1_rules(&state_, &tx_frame_, &rx_frame_, &tx_next_);
238 teq1_trace_transmit(tx_next_.header.PCB.val, tx_next_.header.LEN);
239 EXPECT_EQ(0, state_.errors);
240 EXPECT_EQ(NULL, state_.last_error_message)
241 << "Last error: " << state_.last_error_message;
242 EXPECT_EQ(kRuleResultContinue, result)
243 << "Actual result name: " << teq1_rule_result_to_name(result);
244 // Check that the tx_buf was drained already for the next frame.
245 // ...
246 EXPECT_EQ(static_cast<size_t>(oversized_data_len_ - (2 * INF_LEN)),
247 state_.app_data.tx_len);
248 // Belt and suspenders: make sure no RX buf was used.
249 EXPECT_EQ(rx_data_.size(), state_.app_data.rx_len);
250 }
251 int oversized_data_len_;
252};
253
254TEST_F(Teq1ErrorFreeChainingTest, I01_R1_I11_chaining) {
255 oversized_data_len_ = INF_LEN * 3;
256 tx_frame_.header.PCB.val = TEQ1_I(0, 0);
257 rx_frame_.header.PCB.val = TEQ1_R(1, 0, 0);
258 RunRules();
259 EXPECT_EQ(TEQ1_I(1, 1), tx_next_.header.PCB.val)
260 << "Actual next TX: " << teq1_pcb_to_name(tx_next_.header.PCB.val);
261};
262
263TEST_F(Teq1ErrorFreeChainingTest, I11_R0_I01_chaining) {
264 oversized_data_len_ = INF_LEN * 3;
265 tx_frame_.header.PCB.val = TEQ1_I(1, 0);
266 rx_frame_.header.PCB.val = TEQ1_R(0, 0, 0);
267 RunRules();
268 EXPECT_EQ(TEQ1_I(0, 1), tx_next_.header.PCB.val)
269 << "Actual next TX: " << teq1_pcb_to_name(tx_next_.header.PCB.val);
270};
271
272TEST_F(Teq1ErrorFreeChainingTest, I11_R0_I00_chaining) {
273 oversized_data_len_ = INF_LEN * 2; // Exactly 2 frames worth.
274 tx_frame_.header.PCB.val = TEQ1_I(1, 0);
275 rx_frame_.header.PCB.val = TEQ1_R(0, 0, 0);
276 RunRules();
277 EXPECT_EQ(TEQ1_I(0, 0), tx_next_.header.PCB.val)
278 << "Actual next TX: " << teq1_pcb_to_name(tx_next_.header.PCB.val);
279};
280
281//
282// Error handling tests
283//
284//
285
286class Teq1Retransmit : public Teq1ErrorHandlingTest {
287 public:
288 virtual void SetUp() {
289 // No data.
290 state_.app_data.rx_len = 0;
291 state_.app_data.tx_len = 0;
292
293 tx_frame_.header.PCB.val = TEQ1_I(0, 0);
294 teq1_fill_info_block(&state_, &tx_frame_);
295 // No one is checking the TX LRC since there is no card present.
296
297 // Assume the card may not even set the error bit.
298 rx_frame_.header.LEN = 0;
299 rx_frame_.header.PCB.val = TEQ1_R(0, 0, 0);
300 rx_frame_.INF[0] = teq1_compute_LRC(&rx_frame_);
301 }
302 virtual void TearDown() {
303 teq1_trace_header();
304 teq1_trace_transmit(tx_frame_.header.PCB.val, tx_frame_.header.LEN);
305 teq1_trace_receive(rx_frame_.header.PCB.val, rx_frame_.header.LEN);
306
307 enum RuleResult result = teq1_rules(&state_, &tx_frame_, &rx_frame_, &tx_next_);
308 // Not counted as an error as it was on the card-side.
309 EXPECT_EQ(0, state_.errors);
310 const char *kNull = NULL;
311 EXPECT_EQ(kNull, state_.last_error_message) << state_.last_error_message;
312 EXPECT_EQ(kRuleResultRetransmit, result)
313 << "Actual result name: " << teq1_rule_result_to_name(result);
314 }
315};
316
317TEST_F(Teq1Retransmit, I00_R000_I00) {
318 rx_frame_.header.PCB.val = TEQ1_R(0, 0, 0);
319 rx_frame_.INF[0] = teq1_compute_LRC(&rx_frame_);
320};
321
322TEST_F(Teq1Retransmit, I00_R001_I00) {
323 rx_frame_.header.PCB.val = TEQ1_R(0, 0, 1);
324 rx_frame_.INF[0] = teq1_compute_LRC(&rx_frame_);
325};
326
327TEST_F(Teq1Retransmit, I00_R010_I00) {
328 rx_frame_.header.PCB.val = TEQ1_R(0, 1, 0);
329 rx_frame_.INF[0] = teq1_compute_LRC(&rx_frame_);
330};
331
332TEST_F(Teq1Retransmit, I00_R011_I00) {
333 rx_frame_.header.PCB.val = TEQ1_R(0, 1, 1);
334 rx_frame_.INF[0] = teq1_compute_LRC(&rx_frame_);
335}
336
337TEST_F(Teq1ErrorHandlingTest, I00_I00_bad_lrc) {
338 // No data.
339 state_.app_data.rx_len = 0;
340 state_.app_data.tx_len = 0;
341
342 tx_frame_.header.PCB.val = TEQ1_I(0, 0);
343 teq1_fill_info_block(&state_, &tx_frame_);
344 // No one is checking the TX LRC since there is no card present.
345
346 rx_frame_.header.PCB.val = TEQ1_I(0, 0);
347 rx_frame_.header.LEN = 0;
348 rx_frame_.INF[0] = teq1_compute_LRC(&rx_frame_) - 1;
349
350 teq1_trace_header();
351 teq1_trace_transmit(tx_frame_.header.PCB.val, tx_frame_.header.LEN);
352 teq1_trace_receive(rx_frame_.header.PCB.val, rx_frame_.header.LEN);
353
354 enum RuleResult result = teq1_rules(&state_, &tx_frame_, &rx_frame_, &tx_next_);
355 EXPECT_EQ(1, state_.errors);
356 const char *kNull = NULL;
357 EXPECT_NE(kNull, state_.last_error_message);
358 EXPECT_STREQ("Invalid frame received", state_.last_error_message);
359 EXPECT_EQ(TEQ1_R(0, 0, 1), tx_next_.header.PCB.val)
360 << "Actual next TX: " << teq1_pcb_to_name(tx_next_.header.PCB.val);
361 EXPECT_EQ(kRuleResultSingleShot, result)
362 << "Actual result name: " << teq1_rule_result_to_name(result);
363};
364
365