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gerrit-public.fairphone.software / platform / external / lldb / 21b604bbe9b0c6e1ebd275c1beff24aa2fa8732c / source / Plugins / Instruction / ARM / EmulateInstructionARM.cpp
  1. 21b604b by Caroline Tice · 14 years ago
  2. e97c0d5 Add emulation methods for "AND (immediate)" and "AND (register)". by Johnny Chen · 14 years ago
  3. fe47911 by Caroline Tice · 14 years ago
  4. e92b27c Fix typo. by Johnny Chen · 14 years ago
  5. 8fa2059 Add emulation of Encoding A1 "A8.6.6 ADD (register)" and "A8.6.5 ADD (immediate, ARM)". by Johnny Chen · 14 years ago
  6. 4d729c5 by Caroline Tice · 14 years ago
  7. 864a8e8 Finished renamings to make the emulation method names consistent case-wise. by Johnny Chen · 14 years ago
  8. 9f68772 Some renamings to make the emulation method names consistent case-wise. by Johnny Chen · 14 years ago
  9. 104c8b6 Fix a bug in EmulateTB() (TBB, TBH) where the branch length should be "twice" by Johnny Chen · 14 years ago
  10. 10530c2 Refactoring. Abstracted the set flags operation into its own helper method by Johnny Chen · 14 years ago
  11. d761dcf A8.6.6 ADD (register) by Johnny Chen · 14 years ago
  12. 60299ec Add EmulateTB() method to emulate "Table Branch Byte" and "Table Branch Halfword" by Johnny Chen · 14 years ago
  13. cc96eb5 by Caroline Tice · 14 years ago
  14. 7c677ac Move Align(val, alignment) utility function to ARMUtils.h. by Johnny Chen · 14 years ago
  15. ca67d1c Refactoring. Wrap the following pseudocode from the ARM Architecture Reference Manul: by Johnny Chen · 14 years ago
  16. eeab485 Add emulation methods for ROR (immediate), ROR (register), and RRX. by Johnny Chen · 14 years ago
  17. 73a29de by Caroline Tice · 14 years ago
  18. 2ee35bc Add encoding entries for LSL (immediate and register) and LSR (immediate and register) to by Johnny Chen · 14 years ago
  19. 41a0a15 Add emulation methods for LSL (immediate), LSL (register), LSR (immediate), and LSR (register). by Johnny Chen · 14 years ago
  20. 3fd63e9 by Caroline Tice · 14 years ago
  21. e7f8953 A8.6.14 ASR (register) by Johnny Chen · 14 years ago
  22. 7fac857 Add eContextRegisterLoad instruction emulation context. by Caroline Tice · 14 years ago
  23. 395fc33 Made lldb_private::ArchSpec contain much more than just an architecture. It by Greg Clayton · 14 years ago
  24. 668b451 Remove the "Register &reg" parameter from the BXWritePC(), LoadWritePC(), and ALUWritePC() by Johnny Chen · 14 years ago
  25. 4d896db Fix wrong mask and encoding for T2 of ASR (immediate). by Johnny Chen · 14 years ago
  26. 82f16aa A8.6.14 ASR (immediate) by Johnny Chen · 14 years ago
  27. af55656 by Caroline Tice · 14 years ago
  28. b6f8d7e by Caroline Tice · 14 years ago
  29. 2fd5034 Remove the unnecessary assignment of m_inst_cpsr inside EvaluateInstruction(), by Johnny Chen · 14 years ago
  30. 1511f50 by Caroline Tice · 14 years ago
  31. 9798cfc Add missing logic (if BadReg(d) then UNPREDICTABLE;) for Encoding T2 of EmulateMovRdImm(). by Johnny Chen · 14 years ago
  32. e524a35 Fix build warning (unused variable). by Johnny Chen · 14 years ago
  33. 9bfe7f2 - Rearrange instruction emulation contexts to use a union for the by Caroline Tice · 14 years ago
  34. 357c30f Add entries for EmulateMovRdImm() -- "MOV (immediate)" -- Encodings T1 & T2 into g_thumb_opcodes by Johnny Chen · 14 years ago
  35. 33bf6ab Add impl for EmulateMvnRdImm() -- "MVN (immediate)". Plus zero out the arg0 field of by Johnny Chen · 14 years ago
  36. 28070c3 Add entries for Encodings T1 and A1 of "MVN (immediate)" to g_arm_opcodes and g_thumb_opcodes by Johnny Chen · 14 years ago
  37. 098ae2d Add helper methods InITBlock() and LastInITBlock() to EmulateInstructionARM class by Johnny Chen · 14 years ago
  38. ab3b351 Add EmulateBXRm() ("Branch and Exchange") to both g_arm_opcodes and g_thumb_opcodes table. by Johnny Chen · 14 years ago
  39. fa17220 by Caroline Tice · 14 years ago
  40. e4a4d30 Add EmulateCmpRnRm() for Encodings T1 & T2 to the g_thumb_opcodes table to emulate by Johnny Chen · 14 years ago
  41. 383d629 Rearraned some emulate instruction entries under the appropriate category. by Johnny Chen · 14 years ago
  42. 44c10f0 Handle the case of interworking branch for EmulateLDMDA. by Johnny Chen · 14 years ago
  43. c9de910 Add Thumb2 LDR (literal) instruction into the g_thumb_opcodes table. by Johnny Chen · 14 years ago
  44. 62ff6f5 Fix build. by Johnny Chen · 14 years ago
  45. 713c266 Add new instruction context, eContextWriteRegisterRandomBits. by Caroline Tice · 14 years ago
  46. d4dc444 Add an entry for CMP (immediate) (Encoding T1) to the g_thumb_opcodes table. by Johnny Chen · 14 years ago
  47. bf6ad17 Add a helper method AddWithCarry() to the EmulateInstructionARM class. by Johnny Chen · 14 years ago
  48. bd59990 Namings are important. Renamed Bits32(const uint32_t val, uint32_t bit) to Bit32(val, bit) and by Johnny Chen · 14 years ago
  49. 1928020 Some refactorings to use the convenience function: Bits32(const uint32_t value, const uint32_t bit). by Johnny Chen · 14 years ago
  50. 0e00af2 Add some comment markers. by Johnny Chen · 14 years ago
  51. 338bf54 Add a generic EmulateMovRdRm() method and modify/add entries to the g_thumb_opcodes by Johnny Chen · 14 years ago
  52. e7cf420 Rearrange the order of g_thumb_opcodes entries. by Johnny Chen · 14 years ago
  53. ef21b59 Add EmulateLDRRtRnImm() for EncodingT1 of LDR (immediate, Thumb) to the g_thumb_opcodes table, by Johnny Chen · 14 years ago
  54. 558133b Add a new member variable m_new_inst_cpsr to catch the to-be-updated state by Johnny Chen · 14 years ago
  55. 26863dc Add EmulateAddRdnRm() for EncodingT2 of ADD(register) to the g_thumb_opcodes table, by Johnny Chen · 14 years ago
  56. e62b50d Modified existing Emulate* methods to call LoadWritePC(context, data) where appropriate to by Johnny Chen · 14 years ago
  57. f3eaacf Modified EmulatePop impl to use the helper method LoadWritePC(context, data) since if PC by Johnny Chen · 14 years ago
  58. 0f309db If the CPSR is changed due to switching between ARM and Thumb ISETSTATE, by Johnny Chen · 14 years ago
  59. f29a08f Patch from Kirk Beitz to make things compile on MinGW minus the putenv part. by Greg Clayton · 14 years ago
  60. ee9b1f7 Add some helper methods to the EmulateInstructionARM class as a first step in the by Johnny Chen · 14 years ago
  61. 85aab33 by Caroline Tice · 14 years ago
  62. 7c1bf92 Fix typos. by Johnny Chen · 14 years ago
  63. 53ebab7 Add EmulateCB() entry to the g_thumb_opcodes table to represent "Compare and Branch by Johnny Chen · 14 years ago
  64. 0b29e24 by Caroline Tice · 14 years ago
  65. b9f76c3 Add code to emulate the LDM ARM instruction. by Caroline Tice · 14 years ago
  66. d6c13f0 Add missing implementation for "BL, BLX (immediate)" Encoding T1 and an entry for "bl <label>" by Johnny Chen · 14 years ago
  67. c47d0ca Add missing implementation for "BL, BLX (immediate)" Encoding A1. by Johnny Chen · 14 years ago
  68. 9ee056b Add implementation for EmulateInstructionARM::EmulateB() and fixed two typos in g_thumb_opcodes by Johnny Chen · 14 years ago
  69. 3b620b3 Add EmulateInstructionARM::EmulateB entries to the g_arm_opcodes and g_thumb_opcodes by Johnny Chen · 14 years ago
  70. 8f128eb Handle the thumb branch instructions which have their cond bits embedded in the instruction stream. by Johnny Chen · 14 years ago
  71. c315f86 Add EmulateInstructionARM::EmulateIT() to the g_thumb_opcodes table, by Johnny Chen · 14 years ago
  72. 9307047 Add a utility class ITSession to maintain the ITState for the Thumb ISA. by Johnny Chen · 14 years ago
  73. b77be41 Add EmulateInstructionARM::EmulateSVC() to the g_arm_opcodes and g_thumb_opcodes tables, by Johnny Chen · 14 years ago
  74. 9b8d783 Add EmulateBLXImmediate() and EmulateBLXRm() to the g_arm_opcodes and g_thumb_opcodes tables, by Johnny Chen · 14 years ago
  75. c28a76d Remove the 'lldb_private::' namespace resolution operator. by Johnny Chen · 14 years ago
  76. 587a0a4 Add EmulateVPOP() to the g_arm_opcodes and g_thumb_opcodes tables, which represents by Johnny Chen · 14 years ago
  77. 2b8e8b0 Cleaned up the EmulateInstructionARM to have the evaluate instruction by Greg Clayton · 14 years ago
  78. 8482ded Made the EmulateInstruction class into a plug-in interface and moved the by Greg Clayton · 14 years ago[Renamed (99%) from source/Plugins/Process/Utility/EmulateInstructionARM.cpp]
  79. ef85e91 Add emulate_pop (loads multiple registers from the stack) entries to both the by Johnny Chen · 14 years ago
  80. fdd179e Add emulate_add_sp_imm entry to the g_thumb_opcodes table, which represents an operation by Johnny Chen · 14 years ago
  81. 08c25e8 Add some comments to the emulate_* functions. by Johnny Chen · 14 years ago
  82. 31e2a38 Added the start of the plug-in interface to EmulateInstruction by Greg Clayton · 14 years ago
  83. 1c13b62 Add emulate_mov_low_high() entry to the g_thumb_opcodes table to capture moving by Johnny Chen · 14 years ago
  84. 2ccad83 Add emulate_mov_rd_sp() entries to the g_arm_opcodes and g_thumb_opcodes tables. by Johnny Chen · 14 years ago
  85. 0d0148e Add emulate_sub_r7_ip_imm() (set frame pointer to some ip offset) and emulate_sub_ip_sp_imm() ( by Johnny Chen · 14 years ago
  86. 809742e Should provide more useful context info for the emulate_ldr_rd_pc_rel() impl. by Johnny Chen · 14 years ago
  87. 788e055 Add emulate_ldr_rd_pc_rel entry to the g_thumb_opcodes table, which represents a by Johnny Chen · 14 years ago
  88. 5b442b7 Add emulate_add_sp_rm entry to the g_thumb_opcodes table, which represents an operation by Johnny Chen · 14 years ago
  89. bcec3af Add emulate_add_rd_sp_imm (SP plus immediate) to the g_arm_opcodes and g_thumb_opcodes tables. by Johnny Chen · 14 years ago
  90. 799dfd0 Add emulate_vpush (stores multiple consecutive extension registers to the stack) entries by Johnny Chen · 14 years ago
  91. a8e31c0 Remove duplicated comments. by Johnny Chen · 14 years ago
  92. 8584c92 Move #define's out of ARMUtils.h and into a newly created file ARMDefines.h. by Johnny Chen · 14 years ago
  93. 108d5aa Move the generic instruction bits manipulation routines into a newly created file by Johnny Chen · 14 years ago
  94. e445502 Add Encoding T1 entry of emulate_sub_sp_imm to the g_thumb_opcodes table. by Johnny Chen · 14 years ago
  95. 60c0d62 Add Encoding T2 & T3 entries of emulate_sub_sp_imm to the g_thumb_opcodes table. by Johnny Chen · 14 years ago
  96. 4c0e0bc Add an entry to the g_arm_opcodes table named emulate_sub_sp_imm which corresponds by Johnny Chen · 14 years ago
  97. 91d9986 Variable renaming for better readability. by Johnny Chen · 14 years ago
  98. ce1ca77 Add an emulate-callback function emulate_str_rt_sp() to the g_arm_opcodes table. by Johnny Chen · 14 years ago
  99. 347320d Use two opcode tables g_arm_opcodes and g_thumb_opcodes, instead of lumping arm and thumb opcodes together. by Johnny Chen · 14 years ago
  100. 7d193c1 Fix typo of encoding T2 (push) in the original ARM Architecture Reference Manual, by Johnny Chen · 14 years ago