- 672f311 by Caroline Tice · 14 years ago
- 5f59391 by Caroline Tice · 14 years ago
- a5e28af by Caroline Tice · 14 years ago
- 0e6bc95 by Caroline Tice · 14 years ago
- 952b538 by Caroline Tice · 14 years ago
- 0491b3b by Caroline Tice · 14 years ago
- 01d6157 Add emulation for Encoding A1 of A8.6.97 MOV (register). by Johnny Chen · 14 years ago
- 696b4ef Fix typos in the opcode entries for branch instructions. by Johnny Chen · 14 years ago
- 59e6ab7 Add emulation for BXJ (Branch and Exchange Jazelle), assuming that the attempt to by Johnny Chen · 14 years ago
- b9f02cf Add emulation methods for Bitwise Bit Clear (immediate and register) operations. by Johnny Chen · 14 years ago
- 15a7a6b Add emulation methods for "SUB (immediate, Thumb)" and "SUB (immediate, ARM)" operations. by Johnny Chen · 14 years ago
- a695f95 Add emulation for "ADR" operations. Add a ThumbImm8Scaled() convenience function by Johnny Chen · 14 years ago
- c9e747f Modify EmulateSUBSPImm() to handle the cases with generic Rd value instead of by Johnny Chen · 14 years ago
- 9b38177 Add emulation methods for "SBC (immediate)" and "SBC (register)" operations. by Johnny Chen · 14 years ago
- 940b103 Abtracted all mach-o and ELF out of ArchSpec. This patch is a modified form by Greg Clayton · 14 years ago
- 2434884 Renamed macro definition of CPSR_C to be CPSR_C_POS to avoid confusions and subtle bugs. by Johnny Chen · 14 years ago
- 90e607b Add emulation methods for "RSC (immediate)" and "RSC (register)" operations. by Johnny Chen · 14 years ago
- ed32e7c Add emulation methods for "RSB (immediate)" and "RSB (register)". by Johnny Chen · 14 years ago
- 3dd0605 Add two convenience functions: DecodeImmShiftThumb() and DecodeImmShiftARM() to ARMUtils.h. by Johnny Chen · 14 years ago
- 078fbc6 Add "cmp<c>.w <Rn>, #<const>" emulation to EmulateCMPImm() method, by Johnny Chen · 14 years ago
- 688926f Fix the 'variants' field of "CMN (immediate)" Encoding T1 entry, it should be ARMV6T2_ABOVE, not ARMvAll. by Johnny Chen · 14 years ago
- 3847dad Add ARM encoding entries for "CMN (immediate)" and "CMN (register)" operations. by Johnny Chen · 14 years ago
- 34075cb Add ARM encoding entries for "CMP (immediate)" and "CMP (register)" operations. by Johnny Chen · 14 years ago
- d642a6a Add emulation methods for "MVN (immediate)" and "MVN (register)". by Johnny Chen · 14 years ago
- 2115b41 Add emulation methods for "EOR (Immediate)", "EOR (register)", by Johnny Chen · 14 years ago
- de3cce3 Add emulation methods for "TST (immediate)" and "TST (register)". by Johnny Chen · 14 years ago
- e39f22d Make the helper method ReadCoreReg(uint32_t reg, bool *success) more generic by Johnny Chen · 14 years ago
- 30fec12 by Caroline Tice · 14 years ago
- 7c5234d Add emulation methods for "ORR (immediate)" and "ORR (register)". by Johnny Chen · 14 years ago
- f55261f by Caroline Tice · 14 years ago
- 157b959 Add emulation methods for "ADC (immediate)" and "ADC (register)". by Johnny Chen · 14 years ago
- 21b604b by Caroline Tice · 14 years ago
- e97c0d5 Add emulation methods for "AND (immediate)" and "AND (register)". by Johnny Chen · 14 years ago
- fe47911 by Caroline Tice · 14 years ago
- e92b27c Fix typo. by Johnny Chen · 14 years ago
- 8fa2059 Add emulation of Encoding A1 "A8.6.6 ADD (register)" and "A8.6.5 ADD (immediate, ARM)". by Johnny Chen · 14 years ago
- 4d729c5 by Caroline Tice · 14 years ago
- 864a8e8 Finished renamings to make the emulation method names consistent case-wise. by Johnny Chen · 14 years ago
- 9f68772 Some renamings to make the emulation method names consistent case-wise. by Johnny Chen · 14 years ago
- 104c8b6 Fix a bug in EmulateTB() (TBB, TBH) where the branch length should be "twice" by Johnny Chen · 14 years ago
- 10530c2 Refactoring. Abstracted the set flags operation into its own helper method by Johnny Chen · 14 years ago
- d761dcf A8.6.6 ADD (register) by Johnny Chen · 14 years ago
- 60299ec Add EmulateTB() method to emulate "Table Branch Byte" and "Table Branch Halfword" by Johnny Chen · 14 years ago
- cc96eb5 by Caroline Tice · 14 years ago
- 7c677ac Move Align(val, alignment) utility function to ARMUtils.h. by Johnny Chen · 14 years ago
- ca67d1c Refactoring. Wrap the following pseudocode from the ARM Architecture Reference Manul: by Johnny Chen · 14 years ago
- eeab485 Add emulation methods for ROR (immediate), ROR (register), and RRX. by Johnny Chen · 14 years ago
- 73a29de by Caroline Tice · 14 years ago
- 2ee35bc Add encoding entries for LSL (immediate and register) and LSR (immediate and register) to by Johnny Chen · 14 years ago
- 41a0a15 Add emulation methods for LSL (immediate), LSL (register), LSR (immediate), and LSR (register). by Johnny Chen · 14 years ago
- 3fd63e9 by Caroline Tice · 14 years ago
- e7f8953 A8.6.14 ASR (register) by Johnny Chen · 14 years ago
- 7fac857 Add eContextRegisterLoad instruction emulation context. by Caroline Tice · 14 years ago
- 395fc33 Made lldb_private::ArchSpec contain much more than just an architecture. It by Greg Clayton · 14 years ago
- 668b451 Remove the "Register ®" parameter from the BXWritePC(), LoadWritePC(), and ALUWritePC() by Johnny Chen · 14 years ago
- 4d896db Fix wrong mask and encoding for T2 of ASR (immediate). by Johnny Chen · 14 years ago
- 82f16aa A8.6.14 ASR (immediate) by Johnny Chen · 14 years ago
- af55656 by Caroline Tice · 14 years ago
- b6f8d7e by Caroline Tice · 14 years ago
- 2fd5034 Remove the unnecessary assignment of m_inst_cpsr inside EvaluateInstruction(), by Johnny Chen · 14 years ago
- 1511f50 by Caroline Tice · 14 years ago
- 9798cfc Add missing logic (if BadReg(d) then UNPREDICTABLE;) for Encoding T2 of EmulateMovRdImm(). by Johnny Chen · 14 years ago
- e524a35 Fix build warning (unused variable). by Johnny Chen · 14 years ago
- 9bfe7f2 - Rearrange instruction emulation contexts to use a union for the by Caroline Tice · 14 years ago
- 357c30f Add entries for EmulateMovRdImm() -- "MOV (immediate)" -- Encodings T1 & T2 into g_thumb_opcodes by Johnny Chen · 14 years ago
- 33bf6ab Add impl for EmulateMvnRdImm() -- "MVN (immediate)". Plus zero out the arg0 field of by Johnny Chen · 14 years ago
- 28070c3 Add entries for Encodings T1 and A1 of "MVN (immediate)" to g_arm_opcodes and g_thumb_opcodes by Johnny Chen · 14 years ago
- 098ae2d Add helper methods InITBlock() and LastInITBlock() to EmulateInstructionARM class by Johnny Chen · 14 years ago
- ab3b351 Add EmulateBXRm() ("Branch and Exchange") to both g_arm_opcodes and g_thumb_opcodes table. by Johnny Chen · 14 years ago
- fa17220 by Caroline Tice · 14 years ago
- e4a4d30 Add EmulateCmpRnRm() for Encodings T1 & T2 to the g_thumb_opcodes table to emulate by Johnny Chen · 14 years ago
- 383d629 Rearraned some emulate instruction entries under the appropriate category. by Johnny Chen · 14 years ago
- 44c10f0 Handle the case of interworking branch for EmulateLDMDA. by Johnny Chen · 14 years ago
- c9de910 Add Thumb2 LDR (literal) instruction into the g_thumb_opcodes table. by Johnny Chen · 14 years ago
- 62ff6f5 Fix build. by Johnny Chen · 14 years ago
- 713c266 Add new instruction context, eContextWriteRegisterRandomBits. by Caroline Tice · 14 years ago
- d4dc444 Add an entry for CMP (immediate) (Encoding T1) to the g_thumb_opcodes table. by Johnny Chen · 14 years ago
- bf6ad17 Add a helper method AddWithCarry() to the EmulateInstructionARM class. by Johnny Chen · 14 years ago
- bd59990 Namings are important. Renamed Bits32(const uint32_t val, uint32_t bit) to Bit32(val, bit) and by Johnny Chen · 14 years ago
- 1928020 Some refactorings to use the convenience function: Bits32(const uint32_t value, const uint32_t bit). by Johnny Chen · 14 years ago
- 0e00af2 Add some comment markers. by Johnny Chen · 14 years ago
- 338bf54 Add a generic EmulateMovRdRm() method and modify/add entries to the g_thumb_opcodes by Johnny Chen · 14 years ago
- e7cf420 Rearrange the order of g_thumb_opcodes entries. by Johnny Chen · 14 years ago
- ef21b59 Add EmulateLDRRtRnImm() for EncodingT1 of LDR (immediate, Thumb) to the g_thumb_opcodes table, by Johnny Chen · 14 years ago
- 558133b Add a new member variable m_new_inst_cpsr to catch the to-be-updated state by Johnny Chen · 14 years ago
- 26863dc Add EmulateAddRdnRm() for EncodingT2 of ADD(register) to the g_thumb_opcodes table, by Johnny Chen · 14 years ago
- e62b50d Modified existing Emulate* methods to call LoadWritePC(context, data) where appropriate to by Johnny Chen · 14 years ago
- f3eaacf Modified EmulatePop impl to use the helper method LoadWritePC(context, data) since if PC by Johnny Chen · 14 years ago
- 0f309db If the CPSR is changed due to switching between ARM and Thumb ISETSTATE, by Johnny Chen · 14 years ago
- f29a08f Patch from Kirk Beitz to make things compile on MinGW minus the putenv part. by Greg Clayton · 14 years ago
- ee9b1f7 Add some helper methods to the EmulateInstructionARM class as a first step in the by Johnny Chen · 14 years ago
- 85aab33 by Caroline Tice · 14 years ago
- 7c1bf92 Fix typos. by Johnny Chen · 14 years ago
- 53ebab7 Add EmulateCB() entry to the g_thumb_opcodes table to represent "Compare and Branch by Johnny Chen · 14 years ago
- 0b29e24 by Caroline Tice · 14 years ago
- b9f76c3 Add code to emulate the LDM ARM instruction. by Caroline Tice · 14 years ago
- d6c13f0 Add missing implementation for "BL, BLX (immediate)" Encoding T1 and an entry for "bl <label>" by Johnny Chen · 14 years ago
- c47d0ca Add missing implementation for "BL, BLX (immediate)" Encoding A1. by Johnny Chen · 14 years ago
- 9ee056b Add implementation for EmulateInstructionARM::EmulateB() and fixed two typos in g_thumb_opcodes by Johnny Chen · 14 years ago
- 3b620b3 Add EmulateInstructionARM::EmulateB entries to the g_arm_opcodes and g_thumb_opcodes by Johnny Chen · 14 years ago