commit fe60104ac97f3a8736dcfbfdf9547c7b7cc7b951
author Dan Gohman <gohman@apple.com> Tue Jun 22 15:08:57 2010 +0000
committer Dan Gohman <gohman@apple.com> Tue Jun 22 15:08:57 2010 +0000
tree 02450dfc556b99a1efe3a67572392b18b301abef
parent 30f30e43861512d78023c84952e5e524c0003ae9

Use pre-increment instead of post-increment when the result is not used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106542 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/ARM/ARMLoadStoreOptimizer.cpp

diff --git a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
index 915c381..9fc97a8 100644
--- a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
+++ b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
@@ -131,30 +131,30 @@
 static int getLoadStoreMultipleOpcode(int Opcode) {
   switch (Opcode) {
   case ARM::LDR:
-    NumLDMGened++;
+    ++NumLDMGened;
     return ARM::LDM;
   case ARM::STR:
-    NumSTMGened++;
+    ++NumSTMGened;
     return ARM::STM;
   case ARM::t2LDRi8:
   case ARM::t2LDRi12:
-    NumLDMGened++;
+    ++NumLDMGened;
     return ARM::t2LDM;
   case ARM::t2STRi8:
   case ARM::t2STRi12:
-    NumSTMGened++;
+    ++NumSTMGened;
     return ARM::t2STM;
   case ARM::VLDRS:
-    NumVLDMGened++;
+    ++NumVLDMGened;
     return ARM::VLDMS;
   case ARM::VSTRS:
-    NumVSTMGened++;
+    ++NumVSTMGened;
     return ARM::VSTMS;
   case ARM::VLDRD:
-    NumVLDMGened++;
+    ++NumVLDMGened;
     return ARM::VLDMD;
   case ARM::VSTRD:
-    NumVSTMGened++;
+    ++NumVSTMGened;
     return ARM::VSTMD;
   default: llvm_unreachable("Unhandled opcode!");
   }
@@ -319,7 +319,7 @@
 
   // Try to do the merge.
   MachineBasicBlock::iterator Loc = memOps[insertAfter].MBBI;
-  Loc++;
+  ++Loc;
   if (!MergeOps(MBB, Loc, Offset, Base, BaseKill, Opcode,
                 Pred, PredReg, Scratch, dl, Regs))
     return;
@@ -1082,7 +1082,7 @@
         CurrPred = Pred;
         CurrPredReg = PredReg;
         MemOps.push_back(MemOpQueueEntry(Offset, Reg, isKill, Position, MBBI));
-        NumMemOps++;
+        ++NumMemOps;
         Advance = true;
       } else {
         if (Clobber) {
@@ -1096,7 +1096,7 @@
           if (Offset > MemOps.back().Offset) {
             MemOps.push_back(MemOpQueueEntry(Offset, Reg, isKill,
                                              Position, MBBI));
-            NumMemOps++;
+            ++NumMemOps;
             Advance = true;
           } else {
             for (MemOpQueueIter I = MemOps.begin(), E = MemOps.end();
@@ -1104,7 +1104,7 @@
               if (Offset < I->Offset) {
                 MemOps.insert(I, MemOpQueueEntry(Offset, Reg, isKill,
                                                  Position, MBBI));
-                NumMemOps++;
+                ++NumMemOps;
                 Advance = true;
                 break;
               } else if (Offset == I->Offset) {