blob: 3e4e369657b08ae1fe79c20aa2f65561b30c2bdf [file] [log] [blame]
Andrew Trick0c0a3ef2012-03-22 17:10:07 +00001; RUN: opt < %s -loop-reduce -S | FileCheck %s
2; CHECK: bb1:
3; CHECK: load double* [[IV:%[^,]+]]
4; CHECK: store double {{.*}}, double* [[IV]]
5; CHECK: getelementptr double*
Andrew Trick26e52852011-09-12 20:26:34 +00006; CHECK-NOT: cast
Andrew Trick0c0a3ef2012-03-22 17:10:07 +00007; CHECK: br {{.*}} label %bb1
Dan Gohman453aa4f2009-05-24 18:06:31 +00008
9; This test tests several things. The load and store should use the
10; same address instead of having it computed twice, and SCEVExpander should
11; be able to reconstruct the full getelementptr, despite it having a few
12; obstacles set in its way.
Andrew Trick0c0a3ef2012-03-22 17:10:07 +000013; We only check that the inner loop (bb1-bb2) is "reduced" because LSR
14; currently only operates on inner loops.
Dan Gohman453aa4f2009-05-24 18:06:31 +000015
Lang Hames68df7502011-10-12 22:24:17 +000016target datalayout = "e-p:64:64:64-n32:64"
Dan Gohman453aa4f2009-05-24 18:06:31 +000017
18define void @foo(i64 %n, i64 %m, i64 %o, i64 %q, double* nocapture %p) nounwind {
19entry:
20 %tmp = icmp sgt i64 %n, 0 ; <i1> [#uses=1]
21 br i1 %tmp, label %bb.nph3, label %return
22
23bb.nph: ; preds = %bb2.preheader
24 %tmp1 = mul i64 %tmp16, %i.02 ; <i64> [#uses=1]
25 %tmp2 = mul i64 %tmp19, %i.02 ; <i64> [#uses=1]
26 br label %bb1
27
28bb1: ; preds = %bb2, %bb.nph
29 %j.01 = phi i64 [ %tmp9, %bb2 ], [ 0, %bb.nph ] ; <i64> [#uses=3]
30 %tmp3 = add i64 %j.01, %tmp1 ; <i64> [#uses=1]
31 %tmp4 = add i64 %j.01, %tmp2 ; <i64> [#uses=1]
Dan Gohman572645c2010-02-12 10:34:29 +000032 %z0 = add i64 %tmp3, 5203
Dan Gohman453aa4f2009-05-24 18:06:31 +000033 %tmp5 = getelementptr double* %p, i64 %z0 ; <double*> [#uses=1]
34 %tmp6 = load double* %tmp5, align 8 ; <double> [#uses=1]
35 %tmp7 = fdiv double %tmp6, 2.100000e+00 ; <double> [#uses=1]
36 %z1 = add i64 %tmp4, 5203
37 %tmp8 = getelementptr double* %p, i64 %z1 ; <double*> [#uses=1]
38 store double %tmp7, double* %tmp8, align 8
39 %tmp9 = add i64 %j.01, 1 ; <i64> [#uses=2]
40 br label %bb2
41
42bb2: ; preds = %bb1
43 %tmp10 = icmp slt i64 %tmp9, %m ; <i1> [#uses=1]
44 br i1 %tmp10, label %bb1, label %bb2.bb3_crit_edge
45
46bb2.bb3_crit_edge: ; preds = %bb2
47 br label %bb3
48
49bb3: ; preds = %bb2.preheader, %bb2.bb3_crit_edge
50 %tmp11 = add i64 %i.02, 1 ; <i64> [#uses=2]
51 br label %bb4
52
53bb4: ; preds = %bb3
54 %tmp12 = icmp slt i64 %tmp11, %n ; <i1> [#uses=1]
55 br i1 %tmp12, label %bb2.preheader, label %bb4.return_crit_edge
56
57bb4.return_crit_edge: ; preds = %bb4
58 br label %bb4.return_crit_edge.split
59
60bb4.return_crit_edge.split: ; preds = %bb.nph3, %bb4.return_crit_edge
61 br label %return
62
63bb.nph3: ; preds = %entry
64 %tmp13 = icmp sgt i64 %m, 0 ; <i1> [#uses=1]
65 %tmp14 = mul i64 %n, 37 ; <i64> [#uses=1]
66 %tmp15 = mul i64 %tmp14, %o ; <i64> [#uses=1]
67 %tmp16 = mul i64 %tmp15, %q ; <i64> [#uses=1]
68 %tmp17 = mul i64 %n, 37 ; <i64> [#uses=1]
69 %tmp18 = mul i64 %tmp17, %o ; <i64> [#uses=1]
70 %tmp19 = mul i64 %tmp18, %q ; <i64> [#uses=1]
71 br i1 %tmp13, label %bb.nph3.split, label %bb4.return_crit_edge.split
72
73bb.nph3.split: ; preds = %bb.nph3
74 br label %bb2.preheader
75
76bb2.preheader: ; preds = %bb.nph3.split, %bb4
77 %i.02 = phi i64 [ %tmp11, %bb4 ], [ 0, %bb.nph3.split ] ; <i64> [#uses=3]
78 br i1 true, label %bb.nph, label %bb3
79
80return: ; preds = %bb4.return_crit_edge.split, %entry
81 ret void
82}