Evan Cheng | 78a9f13 | 2011-07-06 22:02:34 +0000 | [diff] [blame] | 1 | //===-- ARMMCTargetDesc.h - ARM Target Descriptions -------------*- C++ -*-===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This file provides ARM specific target descriptions. |
| 11 | // |
| 12 | //===----------------------------------------------------------------------===// |
| 13 | |
| 14 | #ifndef ARMMCTARGETDESC_H |
| 15 | #define ARMMCTARGETDESC_H |
| 16 | |
NAKAMURA Takumi | 883d99f | 2011-07-23 01:16:22 +0000 | [diff] [blame] | 17 | #include "llvm/Support/DataTypes.h" |
Evan Cheng | 94ca42f | 2011-07-07 00:08:19 +0000 | [diff] [blame] | 18 | #include <string> |
| 19 | |
Evan Cheng | 78a9f13 | 2011-07-06 22:02:34 +0000 | [diff] [blame] | 20 | namespace llvm { |
Evan Cheng | 78c10ee | 2011-07-25 23:24:55 +0000 | [diff] [blame] | 21 | class MCAsmBackend; |
Evan Cheng | be74029 | 2011-07-23 00:00:19 +0000 | [diff] [blame] | 22 | class MCCodeEmitter; |
| 23 | class MCContext; |
| 24 | class MCInstrInfo; |
| 25 | class MCObjectWriter; |
Evan Cheng | ebdeeab | 2011-07-08 01:53:10 +0000 | [diff] [blame] | 26 | class MCSubtargetInfo; |
Evan Cheng | 94ca42f | 2011-07-07 00:08:19 +0000 | [diff] [blame] | 27 | class StringRef; |
Evan Cheng | be74029 | 2011-07-23 00:00:19 +0000 | [diff] [blame] | 28 | class Target; |
Evan Cheng | be74029 | 2011-07-23 00:00:19 +0000 | [diff] [blame] | 29 | class raw_ostream; |
Evan Cheng | 78a9f13 | 2011-07-06 22:02:34 +0000 | [diff] [blame] | 30 | |
| 31 | extern Target TheARMTarget, TheThumbTarget; |
Evan Cheng | 94ca42f | 2011-07-07 00:08:19 +0000 | [diff] [blame] | 32 | |
| 33 | namespace ARM_MC { |
Evan Cheng | db06873 | 2011-07-07 08:26:46 +0000 | [diff] [blame] | 34 | std::string ParseARMTriple(StringRef TT); |
Evan Cheng | ebdeeab | 2011-07-08 01:53:10 +0000 | [diff] [blame] | 35 | |
| 36 | /// createARMMCSubtargetInfo - Create a ARM MCSubtargetInfo instance. |
| 37 | /// This is exposed so Asm parser, etc. do not need to go through |
| 38 | /// TargetRegistry. |
| 39 | MCSubtargetInfo *createARMMCSubtargetInfo(StringRef TT, StringRef CPU, |
| 40 | StringRef FS); |
Evan Cheng | 94ca42f | 2011-07-07 00:08:19 +0000 | [diff] [blame] | 41 | } |
| 42 | |
Evan Cheng | be74029 | 2011-07-23 00:00:19 +0000 | [diff] [blame] | 43 | MCCodeEmitter *createARMMCCodeEmitter(const MCInstrInfo &MCII, |
| 44 | const MCSubtargetInfo &STI, |
| 45 | MCContext &Ctx); |
| 46 | |
Evan Cheng | 78c10ee | 2011-07-25 23:24:55 +0000 | [diff] [blame] | 47 | MCAsmBackend *createARMAsmBackend(const Target &T, StringRef TT); |
Evan Cheng | be74029 | 2011-07-23 00:00:19 +0000 | [diff] [blame] | 48 | |
| 49 | /// createARMMachObjectWriter - Construct an ARM Mach-O object writer. |
| 50 | MCObjectWriter *createARMMachObjectWriter(raw_ostream &OS, |
| 51 | bool Is64Bit, |
| 52 | uint32_t CPUType, |
| 53 | uint32_t CPUSubtype); |
| 54 | |
Evan Cheng | 78a9f13 | 2011-07-06 22:02:34 +0000 | [diff] [blame] | 55 | } // End llvm namespace |
| 56 | |
| 57 | // Defines symbolic names for ARM registers. This defines a mapping from |
| 58 | // register name to register number. |
| 59 | // |
| 60 | #define GET_REGINFO_ENUM |
| 61 | #include "ARMGenRegisterInfo.inc" |
| 62 | |
| 63 | // Defines symbolic names for the ARM instructions. |
| 64 | // |
| 65 | #define GET_INSTRINFO_ENUM |
| 66 | #include "ARMGenInstrInfo.inc" |
| 67 | |
Evan Cheng | c60f9b7 | 2011-07-14 20:59:42 +0000 | [diff] [blame] | 68 | #define GET_SUBTARGETINFO_ENUM |
| 69 | #include "ARMGenSubtargetInfo.inc" |
| 70 | |
Evan Cheng | 78a9f13 | 2011-07-06 22:02:34 +0000 | [diff] [blame] | 71 | #endif |