| Andrew Trick | 87896d9 | 2011-04-13 00:38:32 +0000 | [diff] [blame] | 1 | ; RUN: llc < %s -march=arm -mattr=+neon -pre-RA-sched=source | FileCheck %s |
| Nate Begeman | 7973f35 | 2011-02-11 20:53:29 +0000 | [diff] [blame] | 2 | |
| 3 | define <8 x i8> @sdivi8(<8 x i8>* %A, <8 x i8>* %B) nounwind { |
| 4 | ;CHECK: vrecpe.f32 |
| 5 | ;CHECK: vrecpe.f32 |
| 6 | ;CHECK: vmovn.i32 |
| 7 | ;CHECK: vmovn.i32 |
| 8 | ;CHECK: vmovn.i16 |
| 9 | %tmp1 = load <8 x i8>* %A |
| 10 | %tmp2 = load <8 x i8>* %B |
| 11 | %tmp3 = sdiv <8 x i8> %tmp1, %tmp2 |
| 12 | ret <8 x i8> %tmp3 |
| 13 | } |
| 14 | |
| 15 | define <8 x i8> @udivi8(<8 x i8>* %A, <8 x i8>* %B) nounwind { |
| 16 | ;CHECK: vrecpe.f32 |
| 17 | ;CHECK: vrecps.f32 |
| 18 | ;CHECK: vrecpe.f32 |
| 19 | ;CHECK: vrecps.f32 |
| 20 | ;CHECK: vmovn.i32 |
| 21 | ;CHECK: vmovn.i32 |
| 22 | ;CHECK: vqmovun.s16 |
| 23 | %tmp1 = load <8 x i8>* %A |
| 24 | %tmp2 = load <8 x i8>* %B |
| 25 | %tmp3 = udiv <8 x i8> %tmp1, %tmp2 |
| 26 | ret <8 x i8> %tmp3 |
| 27 | } |
| 28 | |
| 29 | define <4 x i16> @sdivi16(<4 x i16>* %A, <4 x i16>* %B) nounwind { |
| 30 | ;CHECK: vrecpe.f32 |
| 31 | ;CHECK: vrecps.f32 |
| 32 | ;CHECK: vmovn.i32 |
| 33 | %tmp1 = load <4 x i16>* %A |
| 34 | %tmp2 = load <4 x i16>* %B |
| 35 | %tmp3 = sdiv <4 x i16> %tmp1, %tmp2 |
| 36 | ret <4 x i16> %tmp3 |
| 37 | } |
| 38 | |
| 39 | define <4 x i16> @udivi16(<4 x i16>* %A, <4 x i16>* %B) nounwind { |
| 40 | ;CHECK: vrecpe.f32 |
| 41 | ;CHECK: vrecps.f32 |
| 42 | ;CHECK: vrecps.f32 |
| 43 | ;CHECK: vmovn.i32 |
| 44 | %tmp1 = load <4 x i16>* %A |
| 45 | %tmp2 = load <4 x i16>* %B |
| 46 | %tmp3 = udiv <4 x i16> %tmp1, %tmp2 |
| 47 | ret <4 x i16> %tmp3 |
| 48 | } |