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gerrit-public.fairphone.software / platform / external / llvm / 34c4485b7479a12b5ef1cb15d27e96277e8a499a / . / test / CodeGen / X86 / bswap-inline-asm.ll
blob: 3bb9124633d6b97af0d16d224758fec07290b1ec [file] [log] [blame]
Evan Cheng55d42002011-01-08 01:24:27 +0000[diff] [blame]1; RUN: llc < %s -mtriple=x86_64-apple-darwin > %t
2; RUN: not grep InlineAsm %t
Dan Gohman0ef701e2010-03-04 19:58:08 +0000[diff] [blame]3; RUN: FileCheck %s < %t
Dan Gohmand7356662009-03-17 02:17:27 +0000[diff] [blame]4
Dan Gohman0ef701e2010-03-04 19:58:08 +0000[diff] [blame]5; CHECK: foo:
6; CHECK: bswapq
Dan Gohmand7356662009-03-17 02:17:27 +0000[diff] [blame]7define i64 @foo(i64 %x) nounwind {
8 %asmtmp = tail call i64 asm "bswap $0", "=r,0,~{dirflag},~{fpsr},~{flags}"(i64 %x) nounwind
9 ret i64 %asmtmp
10}
Dan Gohman0ef701e2010-03-04 19:58:08 +0000[diff] [blame]11
12; CHECK: bar:
13; CHECK: bswapq
Dan Gohmand7356662009-03-17 02:17:27 +0000[diff] [blame]14define i64 @bar(i64 %x) nounwind {
15 %asmtmp = tail call i64 asm "bswapq ${0:q}", "=r,0,~{dirflag},~{fpsr},~{flags}"(i64 %x) nounwind
16 ret i64 %asmtmp
17}
Dan Gohman0ef701e2010-03-04 19:58:08 +0000[diff] [blame]18
19; CHECK: pen:
20; CHECK: bswapl
Dan Gohman96264472009-03-17 02:45:40 +0000[diff] [blame]21define i32 @pen(i32 %x) nounwind {
22 %asmtmp = tail call i32 asm "bswapl ${0:q}", "=r,0,~{dirflag},~{fpsr},~{flags}"(i32 %x) nounwind
23 ret i32 %asmtmp
24}
Dan Gohman0ef701e2010-03-04 19:58:08 +0000[diff] [blame]25
26; CHECK: s16:
27; CHECK: rolw $8,
28define zeroext i16 @s16(i16 zeroext %x) nounwind {
29 %asmtmp = tail call i16 asm "rorw $$8, ${0:w}", "=r,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i16 %x) nounwind
30 ret i16 %asmtmp
31}
32
33; CHECK: t16:
34; CHECK: rolw $8,
35define zeroext i16 @t16(i16 zeroext %x) nounwind {
36 %asmtmp = tail call i16 asm "rorw $$8, ${0:w}", "=r,0,~{cc},~{dirflag},~{fpsr},~{flags}"(i16 %x) nounwind
37 ret i16 %asmtmp
38}
39
40; CHECK: u16:
41; CHECK: rolw $8,
42define zeroext i16 @u16(i16 zeroext %x) nounwind {
43 %asmtmp = tail call i16 asm "rolw $$8, ${0:w}", "=r,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i16 %x) nounwind
44 ret i16 %asmtmp
45}
46
47; CHECK: v16:
48; CHECK: rolw $8,
49define zeroext i16 @v16(i16 zeroext %x) nounwind {
50 %asmtmp = tail call i16 asm "rolw $$8, ${0:w}", "=r,0,~{cc},~{dirflag},~{fpsr},~{flags}"(i16 %x) nounwind
51 ret i16 %asmtmp
52}
53
54; CHECK: s32:
55; CHECK: bswapl
56define i32 @s32(i32 %x) nounwind {
57 %asmtmp = tail call i32 asm "bswap $0", "=r,0,~{dirflag},~{fpsr},~{flags}"(i32 %x) nounwind
58 ret i32 %asmtmp
59}
60
61; CHECK: t32:
62; CHECK: bswapl
63define i32 @t32(i32 %x) nounwind {
64 %asmtmp = tail call i32 asm "bswap $0", "=r,0,~{dirflag},~{flags},~{fpsr}"(i32 %x) nounwind
65 ret i32 %asmtmp
66}
67
Peter Collingbourne948cf022010-11-13 19:54:30 +0000[diff] [blame]68; CHECK: u32:
69; CHECK: bswapl
70define i32 @u32(i32 %x) nounwind {
71 %asmtmp = tail call i32 asm "rorw $$8, ${0:w};rorl $$16, $0;rorw $$8, ${0:w}", "=r,0,~{cc},~{dirflag},~{flags},~{fpsr}"(i32 %x) nounwind
72 ret i32 %asmtmp
73}
74
Dan Gohman0ef701e2010-03-04 19:58:08 +0000[diff] [blame]75; CHECK: s64:
76; CHECK: bswapq
77define i64 @s64(i64 %x) nounwind {
78 %asmtmp = tail call i64 asm "bswap ${0:q}", "=r,0,~{dirflag},~{fpsr},~{flags}"(i64 %x) nounwind
79 ret i64 %asmtmp
80}
81
82; CHECK: t64:
83; CHECK: bswapq
84define i64 @t64(i64 %x) nounwind {
85 %asmtmp = tail call i64 asm "bswap ${0:q}", "=r,0,~{fpsr},~{dirflag},~{flags}"(i64 %x) nounwind
86 ret i64 %asmtmp
87}