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Misha Brukmanbc9ccf62005-02-04 20:25:52 +00001//===- AlphaInstrInfo.h - Alpha Instruction Information ---------*- C++ -*-===//
Misha Brukman4633f1c2005-04-21 23:13:11 +00002//
Andrew Lenharth304d0f32005-01-22 23:41:55 +00003// The LLVM Compiler Infrastructure
4//
Chris Lattner4ee451d2007-12-29 20:36:04 +00005// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
Misha Brukman4633f1c2005-04-21 23:13:11 +00007//
Andrew Lenharth304d0f32005-01-22 23:41:55 +00008//===----------------------------------------------------------------------===//
9//
10// This file contains the Alpha implementation of the TargetInstrInfo class.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef ALPHAINSTRUCTIONINFO_H
15#define ALPHAINSTRUCTIONINFO_H
16
17#include "llvm/Target/TargetInstrInfo.h"
18#include "AlphaRegisterInfo.h"
19
20namespace llvm {
21
22class AlphaInstrInfo : public TargetInstrInfo {
23 const AlphaRegisterInfo RI;
24public:
25 AlphaInstrInfo();
26
27 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
28 /// such, whenever a client has an instance of instruction info, it should
29 /// always be able to get register info as well (through this method).
30 ///
31 virtual const MRegisterInfo &getRegisterInfo() const { return RI; }
32
33 /// Return true if the instruction is a register to register move and
34 /// leave the source and dest operands in the passed parameters.
35 ///
36 virtual bool isMoveInstr(const MachineInstr &MI,
37 unsigned &SrcReg, unsigned &DstReg) const;
Chris Lattner40839602006-02-02 20:12:32 +000038
39 virtual unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const;
Andrew Lenharth133d3102006-02-03 03:07:37 +000040 virtual unsigned isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const;
Chris Lattner0476b282006-10-24 16:41:36 +000041
Evan Chengb5cdaa22007-05-18 00:05:48 +000042 virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
Chris Lattner0476b282006-10-24 16:41:36 +000043 MachineBasicBlock *FBB,
44 const std::vector<MachineOperand> &Cond) const;
Andrew Lenharthf81173f2006-10-31 16:49:55 +000045 bool AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB,
46 MachineBasicBlock *&FBB,
47 std::vector<MachineOperand> &Cond) const;
Evan Chengb5cdaa22007-05-18 00:05:48 +000048 unsigned RemoveBranch(MachineBasicBlock &MBB) const;
Andrew Lenharthf81173f2006-10-31 16:49:55 +000049 void insertNoop(MachineBasicBlock &MBB,
50 MachineBasicBlock::iterator MI) const;
51 bool BlockHasNoFallThrough(MachineBasicBlock &MBB) const;
52 bool ReverseBranchCondition(std::vector<MachineOperand> &Cond) const;
Andrew Lenharth304d0f32005-01-22 23:41:55 +000053};
54
55}
56
57#endif