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Chris Lattnerc6644182006-03-07 06:32:48 +00001//===-- PPCHazardRecognizers.h - PowerPC Hazard Recognizers -----*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
Chris Lattner4ee451d2007-12-29 20:36:04 +00005// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
Chris Lattnerc6644182006-03-07 06:32:48 +00007//
8//===----------------------------------------------------------------------===//
9//
10// This file defines hazard recognizers for scheduling on PowerPC processors.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef PPCHAZRECS_H
15#define PPCHAZRECS_H
16
17#include "llvm/CodeGen/ScheduleDAG.h"
Chris Lattner88d211f2006-03-12 09:13:49 +000018#include "PPCInstrInfo.h"
Chris Lattnerc6644182006-03-07 06:32:48 +000019
20namespace llvm {
21
22/// PPCHazardRecognizer970 - This class defines a finite state automata that
23/// models the dispatch logic on the PowerPC 970 (aka G5) processor. This
24/// promotes good dispatch group formation and implements noop insertion to
25/// avoid structural hazards that cause significant performance penalties (e.g.
26/// setting the CTR register then branching through it within a dispatch group),
27/// or storing then loading from the same address within a dispatch group.
28class PPCHazardRecognizer970 : public HazardRecognizer {
Chris Lattner88d211f2006-03-12 09:13:49 +000029 const TargetInstrInfo &TII;
Chris Lattnerc6644182006-03-07 06:32:48 +000030
Chris Lattner88d211f2006-03-12 09:13:49 +000031 unsigned NumIssued; // Number of insts issued, including advanced cycles.
Chris Lattnerc6644182006-03-07 06:32:48 +000032
33 // Various things that can cause a structural hazard.
34
35 // HasCTRSet - If the CTR register is set in this group, disallow BCTRL.
36 bool HasCTRSet;
37
38 // StoredPtr - Keep track of the address of any store. If we see a load from
Chris Lattner88d211f2006-03-12 09:13:49 +000039 // the same address (or one that aliases it), disallow the store. We can have
40 // up to four stores in one dispatch group, hence we track up to 4.
Chris Lattnerc6644182006-03-07 06:32:48 +000041 //
42 // This is null if we haven't seen a store yet. We keep track of both
43 // operands of the store here, since we support [r+r] and [r+i] addressing.
Chris Lattner88d211f2006-03-12 09:13:49 +000044 SDOperand StorePtr1[4], StorePtr2[4];
45 unsigned StoreSize[4];
46 unsigned NumStores;
Chris Lattnerc6644182006-03-07 06:32:48 +000047
48public:
Chris Lattner88d211f2006-03-12 09:13:49 +000049 PPCHazardRecognizer970(const TargetInstrInfo &TII);
Chris Lattnerc6644182006-03-07 06:32:48 +000050 virtual HazardType getHazardType(SDNode *Node);
51 virtual void EmitInstruction(SDNode *Node);
52 virtual void AdvanceCycle();
53 virtual void EmitNoop();
54
55private:
56 /// EndDispatchGroup - Called when we are finishing a new dispatch group.
57 ///
58 void EndDispatchGroup();
59
Chris Lattnerc6644182006-03-07 06:32:48 +000060 /// GetInstrType - Classify the specified powerpc opcode according to its
61 /// pipeline.
Chris Lattner88d211f2006-03-12 09:13:49 +000062 PPCII::PPC970_Unit GetInstrType(unsigned Opcode,
Chris Lattner3faad492006-03-13 05:20:04 +000063 bool &isFirst, bool &isSingle,bool &isCracked,
Chris Lattner88d211f2006-03-12 09:13:49 +000064 bool &isLoad, bool &isStore);
Chris Lattnerc6644182006-03-07 06:32:48 +000065
66 bool isLoadOfStoredAddress(unsigned LoadSize,
67 SDOperand Ptr1, SDOperand Ptr2) const;
68};
69
70} // end namespace llvm
71
Chris Lattnerab5801c2006-03-07 16:19:46 +000072#endif
73