blob: 54963b5e9ad806133d60d7c91b18ca88883ca1bd [file] [log] [blame]
Nate Begeman21e463b2005-10-16 05:39:50 +00001//===- PPCRegisterInfo.h - PowerPC Register Information Impl -----*- C++ -*-==//
Misha Brukmanb5f662f2005-04-21 23:30:14 +00002//
Misha Brukmanf2ccb772004-08-17 04:55:41 +00003// The LLVM Compiler Infrastructure
4//
Chris Lattner4ee451d2007-12-29 20:36:04 +00005// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
Misha Brukmanb5f662f2005-04-21 23:30:14 +00007//
Misha Brukmanf2ccb772004-08-17 04:55:41 +00008//===----------------------------------------------------------------------===//
9//
10// This file contains the PowerPC implementation of the MRegisterInfo class.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef POWERPC32_REGISTERINFO_H
15#define POWERPC32_REGISTERINFO_H
16
Chris Lattner26689592005-10-14 23:51:18 +000017#include "PPC.h"
Chris Lattner4c7b43b2005-10-14 23:37:35 +000018#include "PPCGenRegisterInfo.h.inc"
Misha Brukmanf2ccb772004-08-17 04:55:41 +000019#include <map>
20
21namespace llvm {
Chris Lattner804e0672006-07-11 00:48:23 +000022class PPCSubtarget;
Evan Chengc0f64ff2006-11-27 23:37:22 +000023class TargetInstrInfo;
Misha Brukmanf2ccb772004-08-17 04:55:41 +000024class Type;
25
Nate Begeman21e463b2005-10-16 05:39:50 +000026class PPCRegisterInfo : public PPCGenRegisterInfo {
Misha Brukmanf2ccb772004-08-17 04:55:41 +000027 std::map<unsigned, unsigned> ImmToIdxMap;
Chris Lattner804e0672006-07-11 00:48:23 +000028 const PPCSubtarget &Subtarget;
Evan Cheng7ce45782006-11-13 23:36:35 +000029 const TargetInstrInfo &TII;
Misha Brukmanf2ccb772004-08-17 04:55:41 +000030public:
Evan Cheng7ce45782006-11-13 23:36:35 +000031 PPCRegisterInfo(const PPCSubtarget &SubTarget, const TargetInstrInfo &tii);
Chris Lattner369503f2006-04-17 21:07:20 +000032
33 /// getRegisterNumbering - Given the enum value for some register, e.g.
34 /// PPC::F14, return the number that it corresponds to (e.g. 14).
35 static unsigned getRegisterNumbering(unsigned RegEnum);
Misha Brukmanf2ccb772004-08-17 04:55:41 +000036
37 /// Code Generation virtual methods...
38 void storeRegToStackSlot(MachineBasicBlock &MBB,
39 MachineBasicBlock::iterator MBBI,
Evan Chengd64b5c82007-12-05 03:14:33 +000040 unsigned SrcReg, bool isKill, int FrameIndex,
Chris Lattner0ffb1a52005-09-30 01:30:55 +000041 const TargetRegisterClass *RC) const;
Misha Brukmanf2ccb772004-08-17 04:55:41 +000042
Evan Chengd64b5c82007-12-05 03:14:33 +000043 void storeRegToAddr(MachineFunction &MF, unsigned SrcReg, bool isKill,
Evan Chengf0a0cdd2007-10-18 22:40:57 +000044 SmallVectorImpl<MachineOperand> &Addr,
Evan Cheng66f0f642007-10-05 01:32:41 +000045 const TargetRegisterClass *RC,
Evan Cheng58184e62007-10-18 21:29:24 +000046 SmallVectorImpl<MachineInstr*> &NewMIs) const;
Evan Cheng66f0f642007-10-05 01:32:41 +000047
Misha Brukmanf2ccb772004-08-17 04:55:41 +000048 void loadRegFromStackSlot(MachineBasicBlock &MBB,
49 MachineBasicBlock::iterator MBBI,
Chris Lattner0ffb1a52005-09-30 01:30:55 +000050 unsigned DestReg, int FrameIndex,
51 const TargetRegisterClass *RC) const;
Misha Brukmanb5f662f2005-04-21 23:30:14 +000052
Evan Cheng66f0f642007-10-05 01:32:41 +000053 void loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
Evan Chengf0a0cdd2007-10-18 22:40:57 +000054 SmallVectorImpl<MachineOperand> &Addr,
Evan Cheng66f0f642007-10-05 01:32:41 +000055 const TargetRegisterClass *RC,
Evan Cheng58184e62007-10-18 21:29:24 +000056 SmallVectorImpl<MachineInstr*> &NewMIs) const;
Evan Cheng66f0f642007-10-05 01:32:41 +000057
Misha Brukmanf2ccb772004-08-17 04:55:41 +000058 void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
59 unsigned DestReg, unsigned SrcReg,
Evan Cheng9efce632007-09-26 06:25:56 +000060 const TargetRegisterClass *DestRC,
61 const TargetRegisterClass *SrcRC) const;
Misha Brukmanf2ccb772004-08-17 04:55:41 +000062
Evan Chengbf2c8b32007-03-20 08:09:38 +000063 void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
64 unsigned DestReg, const MachineInstr *Orig) const;
65
Chris Lattnerf38df042005-09-09 21:46:49 +000066 /// foldMemoryOperand - PowerPC (like most RISC's) can only fold spills into
67 /// copy instructions, turning them into load/store instructions.
Evan Chengaee4af62007-12-02 08:30:39 +000068 virtual MachineInstr* foldMemoryOperand(MachineInstr* MI,
69 SmallVectorImpl<unsigned> &Ops,
Chris Lattnerf38df042005-09-09 21:46:49 +000070 int FrameIndex) const;
Evan Cheng35b35c52007-08-30 05:52:20 +000071
Evan Chenge62f97c2007-12-01 02:07:52 +000072 virtual MachineInstr* foldMemoryOperand(MachineInstr* MI,
Evan Chengaee4af62007-12-02 08:30:39 +000073 SmallVectorImpl<unsigned> &Ops,
Evan Chenge62f97c2007-12-01 02:07:52 +000074 MachineInstr* LoadMI) const {
75 return 0;
76 }
77
Evan Cheng8c24e742007-12-05 18:41:29 +000078 virtual bool canFoldMemoryOperand(MachineInstr *MI,
79 SmallVectorImpl<unsigned> &Ops) const;
80
Anton Korobeynikov2365f512007-07-14 14:06:15 +000081 const unsigned *getCalleeSavedRegs(const MachineFunction* MF = 0) const;
Evan Cheng0f3ac8d2006-05-18 00:12:58 +000082
Evan Cheng64d80e32007-07-19 01:14:50 +000083 const TargetRegisterClass* const*
84 getCalleeSavedRegClasses(const MachineFunction *MF = 0) const;
Evan Cheng0f3ac8d2006-05-18 00:12:58 +000085
Evan Chengb371f452007-02-19 21:49:54 +000086 BitVector getReservedRegs(const MachineFunction &MF) const;
87
Evan Cheng99403b62007-01-25 22:25:04 +000088 /// targetHandlesStackFrameRounding - Returns true if the target is
89 /// responsible for rounding up the stack frame (probably at emitPrologue
90 /// time).
91 bool targetHandlesStackFrameRounding() const { return true; }
92
Evan Chengdc775402007-01-23 00:57:47 +000093 bool hasFP(const MachineFunction &MF) const;
94
Misha Brukmanf2ccb772004-08-17 04:55:41 +000095 void eliminateCallFramePseudoInstr(MachineFunction &MF,
96 MachineBasicBlock &MBB,
97 MachineBasicBlock::iterator I) const;
98
Jim Laskey2f616bf2006-11-16 22:43:37 +000099 void lowerDynamicAlloc(MachineBasicBlock::iterator II) const;
Evan Cheng5e6df462007-02-28 00:21:17 +0000100 void eliminateFrameIndex(MachineBasicBlock::iterator II,
Evan Cheng97de9132007-05-01 09:13:03 +0000101 int SPAdj, RegScavenger *RS = NULL) const;
Misha Brukmanf2ccb772004-08-17 04:55:41 +0000102
Jim Laskey2f616bf2006-11-16 22:43:37 +0000103 /// determineFrameLayout - Determine the size of the frame and maximum call
104 /// frame size.
105 void determineFrameLayout(MachineFunction &MF) const;
106
Evan Cheng28b3c452007-03-06 10:05:14 +0000107 void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
108 RegScavenger *RS = NULL) const;
Misha Brukmanf2ccb772004-08-17 04:55:41 +0000109 void emitPrologue(MachineFunction &MF) const;
110 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
Jim Laskeyf1d78e82006-03-23 18:12:57 +0000111
Jim Laskeya9979182006-03-28 13:48:33 +0000112 // Debug information queries.
Jim Laskey41886992006-04-07 16:34:46 +0000113 unsigned getRARegister() const;
Jim Laskeya9979182006-03-28 13:48:33 +0000114 unsigned getFrameRegister(MachineFunction &MF) const;
Jim Laskey5e73d5b2007-01-24 18:45:13 +0000115 void getInitialFrameState(std::vector<MachineMove> &Moves) const;
Jim Laskey62819f32007-02-21 22:54:50 +0000116
117 // Exception handling queries.
118 unsigned getEHExceptionRegister() const;
119 unsigned getEHHandlerRegister() const;
Anton Korobeynikovf191c802007-11-11 19:50:10 +0000120
Dale Johannesenb97aec62007-11-13 19:13:01 +0000121 int getDwarfRegNum(unsigned RegNum, bool isEH) const;
Misha Brukmanf2ccb772004-08-17 04:55:41 +0000122};
123
124} // end namespace llvm
125
126#endif