Nate Begeman | 21e463b | 2005-10-16 05:39:50 +0000 | [diff] [blame] | 1 | //===- PPCRegisterInfo.h - PowerPC Register Information Impl -----*- C++ -*-==// |
Misha Brukman | b5f662f | 2005-04-21 23:30:14 +0000 | [diff] [blame] | 2 | // |
Misha Brukman | f2ccb77 | 2004-08-17 04:55:41 +0000 | [diff] [blame] | 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
Chris Lattner | 4ee451d | 2007-12-29 20:36:04 +0000 | [diff] [blame^] | 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
Misha Brukman | b5f662f | 2005-04-21 23:30:14 +0000 | [diff] [blame] | 7 | // |
Misha Brukman | f2ccb77 | 2004-08-17 04:55:41 +0000 | [diff] [blame] | 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This file contains the PowerPC implementation of the MRegisterInfo class. |
| 11 | // |
| 12 | //===----------------------------------------------------------------------===// |
| 13 | |
| 14 | #ifndef POWERPC32_REGISTERINFO_H |
| 15 | #define POWERPC32_REGISTERINFO_H |
| 16 | |
Chris Lattner | 2668959 | 2005-10-14 23:51:18 +0000 | [diff] [blame] | 17 | #include "PPC.h" |
Chris Lattner | 4c7b43b | 2005-10-14 23:37:35 +0000 | [diff] [blame] | 18 | #include "PPCGenRegisterInfo.h.inc" |
Misha Brukman | f2ccb77 | 2004-08-17 04:55:41 +0000 | [diff] [blame] | 19 | #include <map> |
| 20 | |
| 21 | namespace llvm { |
Chris Lattner | 804e067 | 2006-07-11 00:48:23 +0000 | [diff] [blame] | 22 | class PPCSubtarget; |
Evan Cheng | c0f64ff | 2006-11-27 23:37:22 +0000 | [diff] [blame] | 23 | class TargetInstrInfo; |
Misha Brukman | f2ccb77 | 2004-08-17 04:55:41 +0000 | [diff] [blame] | 24 | class Type; |
| 25 | |
Nate Begeman | 21e463b | 2005-10-16 05:39:50 +0000 | [diff] [blame] | 26 | class PPCRegisterInfo : public PPCGenRegisterInfo { |
Misha Brukman | f2ccb77 | 2004-08-17 04:55:41 +0000 | [diff] [blame] | 27 | std::map<unsigned, unsigned> ImmToIdxMap; |
Chris Lattner | 804e067 | 2006-07-11 00:48:23 +0000 | [diff] [blame] | 28 | const PPCSubtarget &Subtarget; |
Evan Cheng | 7ce4578 | 2006-11-13 23:36:35 +0000 | [diff] [blame] | 29 | const TargetInstrInfo &TII; |
Misha Brukman | f2ccb77 | 2004-08-17 04:55:41 +0000 | [diff] [blame] | 30 | public: |
Evan Cheng | 7ce4578 | 2006-11-13 23:36:35 +0000 | [diff] [blame] | 31 | PPCRegisterInfo(const PPCSubtarget &SubTarget, const TargetInstrInfo &tii); |
Chris Lattner | 369503f | 2006-04-17 21:07:20 +0000 | [diff] [blame] | 32 | |
| 33 | /// getRegisterNumbering - Given the enum value for some register, e.g. |
| 34 | /// PPC::F14, return the number that it corresponds to (e.g. 14). |
| 35 | static unsigned getRegisterNumbering(unsigned RegEnum); |
Misha Brukman | f2ccb77 | 2004-08-17 04:55:41 +0000 | [diff] [blame] | 36 | |
| 37 | /// Code Generation virtual methods... |
| 38 | void storeRegToStackSlot(MachineBasicBlock &MBB, |
| 39 | MachineBasicBlock::iterator MBBI, |
Evan Cheng | d64b5c8 | 2007-12-05 03:14:33 +0000 | [diff] [blame] | 40 | unsigned SrcReg, bool isKill, int FrameIndex, |
Chris Lattner | 0ffb1a5 | 2005-09-30 01:30:55 +0000 | [diff] [blame] | 41 | const TargetRegisterClass *RC) const; |
Misha Brukman | f2ccb77 | 2004-08-17 04:55:41 +0000 | [diff] [blame] | 42 | |
Evan Cheng | d64b5c8 | 2007-12-05 03:14:33 +0000 | [diff] [blame] | 43 | void storeRegToAddr(MachineFunction &MF, unsigned SrcReg, bool isKill, |
Evan Cheng | f0a0cdd | 2007-10-18 22:40:57 +0000 | [diff] [blame] | 44 | SmallVectorImpl<MachineOperand> &Addr, |
Evan Cheng | 66f0f64 | 2007-10-05 01:32:41 +0000 | [diff] [blame] | 45 | const TargetRegisterClass *RC, |
Evan Cheng | 58184e6 | 2007-10-18 21:29:24 +0000 | [diff] [blame] | 46 | SmallVectorImpl<MachineInstr*> &NewMIs) const; |
Evan Cheng | 66f0f64 | 2007-10-05 01:32:41 +0000 | [diff] [blame] | 47 | |
Misha Brukman | f2ccb77 | 2004-08-17 04:55:41 +0000 | [diff] [blame] | 48 | void loadRegFromStackSlot(MachineBasicBlock &MBB, |
| 49 | MachineBasicBlock::iterator MBBI, |
Chris Lattner | 0ffb1a5 | 2005-09-30 01:30:55 +0000 | [diff] [blame] | 50 | unsigned DestReg, int FrameIndex, |
| 51 | const TargetRegisterClass *RC) const; |
Misha Brukman | b5f662f | 2005-04-21 23:30:14 +0000 | [diff] [blame] | 52 | |
Evan Cheng | 66f0f64 | 2007-10-05 01:32:41 +0000 | [diff] [blame] | 53 | void loadRegFromAddr(MachineFunction &MF, unsigned DestReg, |
Evan Cheng | f0a0cdd | 2007-10-18 22:40:57 +0000 | [diff] [blame] | 54 | SmallVectorImpl<MachineOperand> &Addr, |
Evan Cheng | 66f0f64 | 2007-10-05 01:32:41 +0000 | [diff] [blame] | 55 | const TargetRegisterClass *RC, |
Evan Cheng | 58184e6 | 2007-10-18 21:29:24 +0000 | [diff] [blame] | 56 | SmallVectorImpl<MachineInstr*> &NewMIs) const; |
Evan Cheng | 66f0f64 | 2007-10-05 01:32:41 +0000 | [diff] [blame] | 57 | |
Misha Brukman | f2ccb77 | 2004-08-17 04:55:41 +0000 | [diff] [blame] | 58 | void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, |
| 59 | unsigned DestReg, unsigned SrcReg, |
Evan Cheng | 9efce63 | 2007-09-26 06:25:56 +0000 | [diff] [blame] | 60 | const TargetRegisterClass *DestRC, |
| 61 | const TargetRegisterClass *SrcRC) const; |
Misha Brukman | f2ccb77 | 2004-08-17 04:55:41 +0000 | [diff] [blame] | 62 | |
Evan Cheng | bf2c8b3 | 2007-03-20 08:09:38 +0000 | [diff] [blame] | 63 | void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, |
| 64 | unsigned DestReg, const MachineInstr *Orig) const; |
| 65 | |
Chris Lattner | f38df04 | 2005-09-09 21:46:49 +0000 | [diff] [blame] | 66 | /// foldMemoryOperand - PowerPC (like most RISC's) can only fold spills into |
| 67 | /// copy instructions, turning them into load/store instructions. |
Evan Cheng | aee4af6 | 2007-12-02 08:30:39 +0000 | [diff] [blame] | 68 | virtual MachineInstr* foldMemoryOperand(MachineInstr* MI, |
| 69 | SmallVectorImpl<unsigned> &Ops, |
Chris Lattner | f38df04 | 2005-09-09 21:46:49 +0000 | [diff] [blame] | 70 | int FrameIndex) const; |
Evan Cheng | 35b35c5 | 2007-08-30 05:52:20 +0000 | [diff] [blame] | 71 | |
Evan Cheng | e62f97c | 2007-12-01 02:07:52 +0000 | [diff] [blame] | 72 | virtual MachineInstr* foldMemoryOperand(MachineInstr* MI, |
Evan Cheng | aee4af6 | 2007-12-02 08:30:39 +0000 | [diff] [blame] | 73 | SmallVectorImpl<unsigned> &Ops, |
Evan Cheng | e62f97c | 2007-12-01 02:07:52 +0000 | [diff] [blame] | 74 | MachineInstr* LoadMI) const { |
| 75 | return 0; |
| 76 | } |
| 77 | |
Evan Cheng | 8c24e74 | 2007-12-05 18:41:29 +0000 | [diff] [blame] | 78 | virtual bool canFoldMemoryOperand(MachineInstr *MI, |
| 79 | SmallVectorImpl<unsigned> &Ops) const; |
| 80 | |
Anton Korobeynikov | 2365f51 | 2007-07-14 14:06:15 +0000 | [diff] [blame] | 81 | const unsigned *getCalleeSavedRegs(const MachineFunction* MF = 0) const; |
Evan Cheng | 0f3ac8d | 2006-05-18 00:12:58 +0000 | [diff] [blame] | 82 | |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 83 | const TargetRegisterClass* const* |
| 84 | getCalleeSavedRegClasses(const MachineFunction *MF = 0) const; |
Evan Cheng | 0f3ac8d | 2006-05-18 00:12:58 +0000 | [diff] [blame] | 85 | |
Evan Cheng | b371f45 | 2007-02-19 21:49:54 +0000 | [diff] [blame] | 86 | BitVector getReservedRegs(const MachineFunction &MF) const; |
| 87 | |
Evan Cheng | 99403b6 | 2007-01-25 22:25:04 +0000 | [diff] [blame] | 88 | /// targetHandlesStackFrameRounding - Returns true if the target is |
| 89 | /// responsible for rounding up the stack frame (probably at emitPrologue |
| 90 | /// time). |
| 91 | bool targetHandlesStackFrameRounding() const { return true; } |
| 92 | |
Evan Cheng | dc77540 | 2007-01-23 00:57:47 +0000 | [diff] [blame] | 93 | bool hasFP(const MachineFunction &MF) const; |
| 94 | |
Misha Brukman | f2ccb77 | 2004-08-17 04:55:41 +0000 | [diff] [blame] | 95 | void eliminateCallFramePseudoInstr(MachineFunction &MF, |
| 96 | MachineBasicBlock &MBB, |
| 97 | MachineBasicBlock::iterator I) const; |
| 98 | |
Jim Laskey | 2f616bf | 2006-11-16 22:43:37 +0000 | [diff] [blame] | 99 | void lowerDynamicAlloc(MachineBasicBlock::iterator II) const; |
Evan Cheng | 5e6df46 | 2007-02-28 00:21:17 +0000 | [diff] [blame] | 100 | void eliminateFrameIndex(MachineBasicBlock::iterator II, |
Evan Cheng | 97de913 | 2007-05-01 09:13:03 +0000 | [diff] [blame] | 101 | int SPAdj, RegScavenger *RS = NULL) const; |
Misha Brukman | f2ccb77 | 2004-08-17 04:55:41 +0000 | [diff] [blame] | 102 | |
Jim Laskey | 2f616bf | 2006-11-16 22:43:37 +0000 | [diff] [blame] | 103 | /// determineFrameLayout - Determine the size of the frame and maximum call |
| 104 | /// frame size. |
| 105 | void determineFrameLayout(MachineFunction &MF) const; |
| 106 | |
Evan Cheng | 28b3c45 | 2007-03-06 10:05:14 +0000 | [diff] [blame] | 107 | void processFunctionBeforeCalleeSavedScan(MachineFunction &MF, |
| 108 | RegScavenger *RS = NULL) const; |
Misha Brukman | f2ccb77 | 2004-08-17 04:55:41 +0000 | [diff] [blame] | 109 | void emitPrologue(MachineFunction &MF) const; |
| 110 | void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const; |
Jim Laskey | f1d78e8 | 2006-03-23 18:12:57 +0000 | [diff] [blame] | 111 | |
Jim Laskey | a997918 | 2006-03-28 13:48:33 +0000 | [diff] [blame] | 112 | // Debug information queries. |
Jim Laskey | 4188699 | 2006-04-07 16:34:46 +0000 | [diff] [blame] | 113 | unsigned getRARegister() const; |
Jim Laskey | a997918 | 2006-03-28 13:48:33 +0000 | [diff] [blame] | 114 | unsigned getFrameRegister(MachineFunction &MF) const; |
Jim Laskey | 5e73d5b | 2007-01-24 18:45:13 +0000 | [diff] [blame] | 115 | void getInitialFrameState(std::vector<MachineMove> &Moves) const; |
Jim Laskey | 62819f3 | 2007-02-21 22:54:50 +0000 | [diff] [blame] | 116 | |
| 117 | // Exception handling queries. |
| 118 | unsigned getEHExceptionRegister() const; |
| 119 | unsigned getEHHandlerRegister() const; |
Anton Korobeynikov | f191c80 | 2007-11-11 19:50:10 +0000 | [diff] [blame] | 120 | |
Dale Johannesen | b97aec6 | 2007-11-13 19:13:01 +0000 | [diff] [blame] | 121 | int getDwarfRegNum(unsigned RegNum, bool isEH) const; |
Misha Brukman | f2ccb77 | 2004-08-17 04:55:41 +0000 | [diff] [blame] | 122 | }; |
| 123 | |
| 124 | } // end namespace llvm |
| 125 | |
| 126 | #endif |