blob: eb5e3a5e1fdc519a0037c1d6634da11526184399 [file] [log] [blame]
Scott Michel4c07cbd2007-12-19 21:17:42 +00001; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s
Scott Michel56a125e2008-11-22 23:50:42 +00002; RUN: grep shufb %t1.s | count 39
3; RUN: grep ilhu %t1.s | count 31
4; RUN: grep iohl %t1.s | count 31
5; RUN: grep lqa %t1.s | count 10
6; RUN: grep shlqbyi %t1.s | count 8
7; RUN: grep selb %t1.s | count 4
8; RUN: grep cgti %t1.s | count 4
9; RUN: grep 515 %t1.s | count 5
10; RUN: grep 1029 %t1.s | count 2
11; RUN: grep 1543 %t1.s | count 2
12; RUN: grep 2057 %t1.s | count 2
13; RUN: grep 2571 %t1.s | count 2
14; RUN: grep 3085 %t1.s | count 2
15; RUN: grep 3599 %t1.s | count 2
16; RUN: grep 32768 %t1.s | count 1
17; RUN: grep 32769 %t1.s | count 1
18; RUN: grep 32770 %t1.s | count 1
19; RUN: grep 32771 %t1.s | count 1
20; RUN: grep 32772 %t1.s | count 1
21; RUN: grep 32773 %t1.s | count 1
22; RUN: grep 32774 %t1.s | count 1
23; RUN: grep 32775 %t1.s | count 1
24; RUN: grep 32776 %t1.s | count 1
25; RUN: grep 32777 %t1.s | count 1
26; RUN: grep 32778 %t1.s | count 1
27; RUN: grep 32779 %t1.s | count 1
28; RUN: grep 32780 %t1.s | count 1
29; RUN: grep 32781 %t1.s | count 1
30; RUN: grep 32782 %t1.s | count 1
31; RUN: grep 32783 %t1.s | count 1
32; RUN: grep 32896 %t1.s | count 24
33
Scott Micheldbac4cf2008-01-11 02:53:15 +000034target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
35target triple = "spu"
Scott Michel4c07cbd2007-12-19 21:17:42 +000036
37define i32 @i32_extract_0(<4 x i32> %v) {
38entry:
39 %a = extractelement <4 x i32> %v, i32 0
40 ret i32 %a
41}
42
43define i32 @i32_extract_1(<4 x i32> %v) {
44entry:
45 %a = extractelement <4 x i32> %v, i32 1
46 ret i32 %a
47}
48
49define i32 @i32_extract_2(<4 x i32> %v) {
50entry:
51 %a = extractelement <4 x i32> %v, i32 2
52 ret i32 %a
53}
54
55define i32 @i32_extract_3(<4 x i32> %v) {
56entry:
57 %a = extractelement <4 x i32> %v, i32 3
58 ret i32 %a
59}
60
61define i16 @i16_extract_0(<8 x i16> %v) {
62entry:
63 %a = extractelement <8 x i16> %v, i32 0
64 ret i16 %a
65}
66
67define i16 @i16_extract_1(<8 x i16> %v) {
68entry:
69 %a = extractelement <8 x i16> %v, i32 1
70 ret i16 %a
71}
72
73define i16 @i16_extract_2(<8 x i16> %v) {
74entry:
75 %a = extractelement <8 x i16> %v, i32 2
76 ret i16 %a
77}
78
79define i16 @i16_extract_3(<8 x i16> %v) {
80entry:
81 %a = extractelement <8 x i16> %v, i32 3
82 ret i16 %a
83}
84
85define i16 @i16_extract_4(<8 x i16> %v) {
86entry:
87 %a = extractelement <8 x i16> %v, i32 4
88 ret i16 %a
89}
90
91define i16 @i16_extract_5(<8 x i16> %v) {
92entry:
93 %a = extractelement <8 x i16> %v, i32 5
94 ret i16 %a
95}
96
97define i16 @i16_extract_6(<8 x i16> %v) {
98entry:
99 %a = extractelement <8 x i16> %v, i32 6
100 ret i16 %a
101}
102
103define i16 @i16_extract_7(<8 x i16> %v) {
104entry:
105 %a = extractelement <8 x i16> %v, i32 7
106 ret i16 %a
107}
108
109define i8 @i8_extract_0(<16 x i8> %v) {
110entry:
111 %a = extractelement <16 x i8> %v, i32 0
112 ret i8 %a
113}
114
115define i8 @i8_extract_1(<16 x i8> %v) {
116entry:
117 %a = extractelement <16 x i8> %v, i32 1
118 ret i8 %a
119}
120
121define i8 @i8_extract_2(<16 x i8> %v) {
122entry:
123 %a = extractelement <16 x i8> %v, i32 2
124 ret i8 %a
125}
126
127define i8 @i8_extract_3(<16 x i8> %v) {
128entry:
129 %a = extractelement <16 x i8> %v, i32 3
130 ret i8 %a
131}
132
133define i8 @i8_extract_4(<16 x i8> %v) {
134entry:
135 %a = extractelement <16 x i8> %v, i32 4
136 ret i8 %a
137}
138
139define i8 @i8_extract_5(<16 x i8> %v) {
140entry:
141 %a = extractelement <16 x i8> %v, i32 5
142 ret i8 %a
143}
144
145define i8 @i8_extract_6(<16 x i8> %v) {
146entry:
147 %a = extractelement <16 x i8> %v, i32 6
148 ret i8 %a
149}
150
151define i8 @i8_extract_7(<16 x i8> %v) {
152entry:
153 %a = extractelement <16 x i8> %v, i32 7
154 ret i8 %a
155}
156
157define i8 @i8_extract_8(<16 x i8> %v) {
158entry:
159 %a = extractelement <16 x i8> %v, i32 8
160 ret i8 %a
161}
162
163define i8 @i8_extract_9(<16 x i8> %v) {
164entry:
165 %a = extractelement <16 x i8> %v, i32 9
166 ret i8 %a
167}
168
169define i8 @i8_extract_10(<16 x i8> %v) {
170entry:
171 %a = extractelement <16 x i8> %v, i32 10
172 ret i8 %a
173}
174
175define i8 @i8_extract_11(<16 x i8> %v) {
176entry:
177 %a = extractelement <16 x i8> %v, i32 11
178 ret i8 %a
179}
180
181define i8 @i8_extract_12(<16 x i8> %v) {
182entry:
183 %a = extractelement <16 x i8> %v, i32 12
184 ret i8 %a
185}
186
187define i8 @i8_extract_13(<16 x i8> %v) {
188entry:
189 %a = extractelement <16 x i8> %v, i32 13
190 ret i8 %a
191}
192
193define i8 @i8_extract_14(<16 x i8> %v) {
194entry:
195 %a = extractelement <16 x i8> %v, i32 14
196 ret i8 %a
197}
198
199define i8 @i8_extract_15(<16 x i8> %v) {
200entry:
201 %a = extractelement <16 x i8> %v, i32 15
202 ret i8 %a
203}
Scott Michel56a125e2008-11-22 23:50:42 +0000204
205;;--------------------------------------------------------------------------
206;; extract element, variable index:
207;;--------------------------------------------------------------------------
208
209define i8 @extract_varadic_i8(i32 %i) nounwind readnone {
210entry:
211 %0 = extractelement <16 x i8> < i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>, i32 %i
212 ret i8 %0
213}
214
215define i8 @extract_varadic_i8_1(<16 x i8> %v, i32 %i) nounwind readnone {
216entry:
217 %0 = extractelement <16 x i8> %v, i32 %i
218 ret i8 %0
219}
220
221define i16 @extract_varadic_i16(i32 %i) nounwind readnone {
222entry:
223 %0 = extractelement <8 x i16> < i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7>, i32 %i
224 ret i16 %0
225}
226
227define i16 @extract_varadic_i16_1(<8 x i16> %v, i32 %i) nounwind readnone {
228entry:
229 %0 = extractelement <8 x i16> %v, i32 %i
230 ret i16 %0
231}
232
233define i32 @extract_varadic_i32(i32 %i) nounwind readnone {
234entry:
235 %0 = extractelement <4 x i32> < i32 0, i32 1, i32 2, i32 3>, i32 %i
236 ret i32 %0
237}
238
239define i32 @extract_varadic_i32_1(<4 x i32> %v, i32 %i) nounwind readnone {
240entry:
241 %0 = extractelement <4 x i32> %v, i32 %i
242 ret i32 %0
243}
244
245define float @extract_varadic_f32(i32 %i) nounwind readnone {
246entry:
247 %0 = extractelement <4 x float> < float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00 >, i32 %i
248 ret float %0
249}
250
251define float @extract_varadic_f32_1(<4 x float> %v, i32 %i) nounwind readnone {
252entry:
253 %0 = extractelement <4 x float> %v, i32 %i
254 ret float %0
255}
256
257define i64 @extract_varadic_i64(i32 %i) nounwind readnone {
258entry:
259 %0 = extractelement <2 x i64> < i64 0, i64 1>, i32 %i
260 ret i64 %0
261}
262
263define i64 @extract_varadic_i64_1(<2 x i64> %v, i32 %i) nounwind readnone {
264entry:
265 %0 = extractelement <2 x i64> %v, i32 %i
266 ret i64 %0
267}
268
269define double @extract_varadic_f64(i32 %i) nounwind readnone {
270entry:
271 %0 = extractelement <2 x double> < double 1.000000e+00, double 2.000000e+00>, i32 %i
272 ret double %0
273}
274
275define double @extract_varadic_f64_1(<2 x double> %v, i32 %i) nounwind readnone {
276entry:
277 %0 = extractelement <2 x double> %v, i32 %i
278 ret double %0
279}