| Chris Lattner | 8829cec | 2010-04-09 01:14:31 +0000 | [diff] [blame] | 1 | ; RUN: opt %s -sccp -S | FileCheck %s |
| Chris Lattner | 8581c26 | 2010-04-26 18:21:23 +0000 | [diff] [blame^] | 2 | |
| 3 | |
| 4 | ; PR6940 |
| 5 | define double @test1() { |
| 6 | %t = sitofp i32 undef to double |
| 7 | ret double %t |
| 8 | ; CHECK: @test1 |
| 9 | ; CHECK: ret double 0.0 |
| 10 | } |
| 11 | |
| 12 | |
| Chris Lattner | 8829cec | 2010-04-09 01:14:31 +0000 | [diff] [blame] | 13 | ; rdar://7832370 |
| 14 | ; Check that lots of stuff doesn't get turned into undef. |
| Chris Lattner | 8581c26 | 2010-04-26 18:21:23 +0000 | [diff] [blame^] | 15 | define i32 @test2() nounwind readnone ssp { |
| 16 | ; CHECK: @test2 |
| Chris Lattner | 8829cec | 2010-04-09 01:14:31 +0000 | [diff] [blame] | 17 | init: |
| 18 | br label %control.outer.outer |
| 19 | |
| 20 | control.outer.loopexit.us-lcssa: ; preds = %control |
| 21 | br label %control.outer.loopexit |
| 22 | |
| 23 | control.outer.loopexit: ; preds = %control.outer.loopexit.us-lcssa.us, %control.outer.loopexit.us-lcssa |
| 24 | br label %control.outer.outer.backedge |
| 25 | |
| 26 | control.outer.outer: ; preds = %control.outer.outer.backedge, %init |
| 27 | %switchCond.0.ph.ph = phi i32 [ 2, %init ], [ 3, %control.outer.outer.backedge ] ; <i32> [#uses=2] |
| 28 | %i.0.ph.ph = phi i32 [ undef, %init ], [ %i.0.ph.ph.be, %control.outer.outer.backedge ] ; <i32> [#uses=1] |
| 29 | %tmp4 = icmp eq i32 %i.0.ph.ph, 0 ; <i1> [#uses=1] |
| 30 | br i1 %tmp4, label %control.outer.outer.split.us, label %control.outer.outer.control.outer.outer.split_crit_edge |
| 31 | |
| 32 | control.outer.outer.control.outer.outer.split_crit_edge: ; preds = %control.outer.outer |
| 33 | br label %control.outer |
| 34 | |
| 35 | control.outer.outer.split.us: ; preds = %control.outer.outer |
| 36 | br label %control.outer.us |
| 37 | |
| 38 | control.outer.us: ; preds = %bb3.us, %control.outer.outer.split.us |
| 39 | %A.0.ph.us = phi i32 [ %switchCond.0.us, %bb3.us ], [ 4, %control.outer.outer.split.us ] ; <i32> [#uses=2] |
| 40 | %switchCond.0.ph.us = phi i32 [ %A.0.ph.us, %bb3.us ], [ %switchCond.0.ph.ph, %control.outer.outer.split.us ] ; <i32> [#uses=1] |
| 41 | br label %control.us |
| 42 | |
| 43 | bb3.us: ; preds = %control.us |
| 44 | br label %control.outer.us |
| 45 | |
| 46 | bb0.us: ; preds = %control.us |
| 47 | br label %control.us |
| 48 | |
| 49 | ; CHECK: control.us: ; preds = %bb0.us, %control.outer.us |
| 50 | ; CHECK-NEXT: %switchCond.0.us = phi i32 |
| 51 | ; CHECK-NEXT: switch i32 %switchCond.0.us |
| 52 | control.us: ; preds = %bb0.us, %control.outer.us |
| 53 | %switchCond.0.us = phi i32 [ %A.0.ph.us, %bb0.us ], [ %switchCond.0.ph.us, %control.outer.us ] ; <i32> [#uses=2] |
| 54 | switch i32 %switchCond.0.us, label %control.outer.loopexit.us-lcssa.us [ |
| 55 | i32 0, label %bb0.us |
| 56 | i32 1, label %bb1.us-lcssa.us |
| 57 | i32 3, label %bb3.us |
| 58 | i32 4, label %bb4.us-lcssa.us |
| 59 | ] |
| 60 | |
| 61 | control.outer.loopexit.us-lcssa.us: ; preds = %control.us |
| 62 | br label %control.outer.loopexit |
| 63 | |
| 64 | bb1.us-lcssa.us: ; preds = %control.us |
| 65 | br label %bb1 |
| 66 | |
| 67 | bb4.us-lcssa.us: ; preds = %control.us |
| 68 | br label %bb4 |
| 69 | |
| 70 | control.outer: ; preds = %bb3, %control.outer.outer.control.outer.outer.split_crit_edge |
| 71 | %A.0.ph = phi i32 [ %nextId17, %bb3 ], [ 4, %control.outer.outer.control.outer.outer.split_crit_edge ] ; <i32> [#uses=1] |
| 72 | %switchCond.0.ph = phi i32 [ 0, %bb3 ], [ %switchCond.0.ph.ph, %control.outer.outer.control.outer.outer.split_crit_edge ] ; <i32> [#uses=1] |
| 73 | br label %control |
| 74 | |
| 75 | control: ; preds = %bb0, %control.outer |
| 76 | %switchCond.0 = phi i32 [ %A.0.ph, %bb0 ], [ %switchCond.0.ph, %control.outer ] ; <i32> [#uses=2] |
| 77 | switch i32 %switchCond.0, label %control.outer.loopexit.us-lcssa [ |
| 78 | i32 0, label %bb0 |
| 79 | i32 1, label %bb1.us-lcssa |
| 80 | i32 3, label %bb3 |
| 81 | i32 4, label %bb4.us-lcssa |
| 82 | ] |
| 83 | |
| 84 | bb4.us-lcssa: ; preds = %control |
| 85 | br label %bb4 |
| 86 | |
| 87 | bb4: ; preds = %bb4.us-lcssa, %bb4.us-lcssa.us |
| 88 | br label %control.outer.outer.backedge |
| 89 | |
| 90 | control.outer.outer.backedge: ; preds = %bb4, %control.outer.loopexit |
| 91 | %i.0.ph.ph.be = phi i32 [ 1, %bb4 ], [ 0, %control.outer.loopexit ] ; <i32> [#uses=1] |
| 92 | br label %control.outer.outer |
| 93 | |
| 94 | bb3: ; preds = %control |
| 95 | %nextId17 = add i32 %switchCond.0, -2 ; <i32> [#uses=1] |
| 96 | br label %control.outer |
| 97 | |
| 98 | bb0: ; preds = %control |
| 99 | br label %control |
| 100 | |
| 101 | bb1.us-lcssa: ; preds = %control |
| 102 | br label %bb1 |
| 103 | |
| 104 | bb1: ; preds = %bb1.us-lcssa, %bb1.us-lcssa.us |
| 105 | ret i32 0 |
| 106 | } |