blob: b08f18618f3c9593c385dbc0f25c28bd38159676 [file] [log] [blame]
Dan Gohmanf17a25c2007-07-18 16:29:46 +00001//===- PowerPCInstrFormats.td - PowerPC Instruction Formats --*- tablegen -*-=//
2//
3// The LLVM Compiler Infrastructure
4//
Chris Lattner081ce942007-12-29 20:36:04 +00005// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
Dan Gohmanf17a25c2007-07-18 16:29:46 +00007//
8//===----------------------------------------------------------------------===//
9
10//===----------------------------------------------------------------------===//
11//
12// PowerPC instruction formats
13
Evan Chengb783fa32007-07-19 01:14:50 +000014class I<bits<6> opcode, dag OOL, dag IOL, string asmstr, InstrItinClass itin>
Dan Gohmanf17a25c2007-07-18 16:29:46 +000015 : Instruction {
16 field bits<32> Inst;
17
18 bit PPC64 = 0; // Default value, override with isPPC64
19
Dan Gohmanf17a25c2007-07-18 16:29:46 +000020 let Namespace = "PPC";
21 let Inst{0-5} = opcode;
Evan Chengb783fa32007-07-19 01:14:50 +000022 let OutOperandList = OOL;
23 let InOperandList = IOL;
Dan Gohmanf17a25c2007-07-18 16:29:46 +000024 let AsmString = asmstr;
25 let Itinerary = itin;
26
27 /// These fields correspond to the fields in PPCInstrInfo.h. Any changes to
28 /// these must be reflected there! See comments there for what these are.
29 bits<1> PPC970_First = 0;
30 bits<1> PPC970_Single = 0;
31 bits<1> PPC970_Cracked = 0;
32 bits<3> PPC970_Unit = 0;
33}
34
35class PPC970_DGroup_First { bits<1> PPC970_First = 1; }
36class PPC970_DGroup_Single { bits<1> PPC970_Single = 1; }
37class PPC970_DGroup_Cracked { bits<1> PPC970_Cracked = 1; }
38class PPC970_MicroCode;
39
40class PPC970_Unit_Pseudo { bits<3> PPC970_Unit = 0; }
41class PPC970_Unit_FXU { bits<3> PPC970_Unit = 1; }
42class PPC970_Unit_LSU { bits<3> PPC970_Unit = 2; }
43class PPC970_Unit_FPU { bits<3> PPC970_Unit = 3; }
44class PPC970_Unit_CRU { bits<3> PPC970_Unit = 4; }
45class PPC970_Unit_VALU { bits<3> PPC970_Unit = 5; }
46class PPC970_Unit_VPERM { bits<3> PPC970_Unit = 6; }
47class PPC970_Unit_BRU { bits<3> PPC970_Unit = 7; }
48
49
50// 1.7.1 I-Form
Evan Chengb783fa32007-07-19 01:14:50 +000051class IForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +000052 InstrItinClass itin, list<dag> pattern>
Evan Chengb783fa32007-07-19 01:14:50 +000053 : I<opcode, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +000054 let Pattern = pattern;
55 bits<24> LI;
56
57 let Inst{6-29} = LI;
58 let Inst{30} = aa;
59 let Inst{31} = lk;
60}
61
62// 1.7.2 B-Form
Evan Chengb783fa32007-07-19 01:14:50 +000063class BForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr>
64 : I<opcode, OOL, IOL, asmstr, BrB> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +000065 bits<7> BIBO; // 2 bits of BI and 5 bits of BO.
66 bits<3> CR;
67 bits<14> BD;
68
69 bits<5> BI;
70 let BI{0-1} = BIBO{5-6};
71 let BI{2-4} = CR{0-2};
72
73 let Inst{6-10} = BIBO{4-0};
74 let Inst{11-15} = BI;
75 let Inst{16-29} = BD;
76 let Inst{30} = aa;
77 let Inst{31} = lk;
78}
79
80
81// 1.7.4 D-Form
Evan Chengb783fa32007-07-19 01:14:50 +000082class DForm_base<bits<6> opcode, dag OOL, dag IOL, string asmstr,
83 InstrItinClass itin, list<dag> pattern>
84 : I<opcode, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +000085 bits<5> A;
86 bits<5> B;
87 bits<16> C;
88
89 let Pattern = pattern;
90
91 let Inst{6-10} = A;
92 let Inst{11-15} = B;
93 let Inst{16-31} = C;
94}
95
Evan Chengb783fa32007-07-19 01:14:50 +000096class DForm_1<bits<6> opcode, dag OOL, dag IOL, string asmstr,
97 InstrItinClass itin, list<dag> pattern>
98 : I<opcode, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +000099 bits<5> A;
100 bits<16> C;
101 bits<5> B;
102
103 let Pattern = pattern;
104
105 let Inst{6-10} = A;
106 let Inst{11-15} = B;
107 let Inst{16-31} = C;
108}
109
Evan Chengb783fa32007-07-19 01:14:50 +0000110class DForm_2<bits<6> opcode, dag OOL, dag IOL, string asmstr,
111 InstrItinClass itin, list<dag> pattern>
112 : DForm_base<opcode, OOL, IOL, asmstr, itin, pattern>;
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000113
Evan Chengb783fa32007-07-19 01:14:50 +0000114class DForm_2_r0<bits<6> opcode, dag OOL, dag IOL, string asmstr,
115 InstrItinClass itin, list<dag> pattern>
116 : I<opcode, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000117 bits<5> A;
118 bits<16> B;
119
120 let Pattern = pattern;
121
122 let Inst{6-10} = A;
123 let Inst{11-15} = 0;
124 let Inst{16-31} = B;
125}
126
Evan Chengb783fa32007-07-19 01:14:50 +0000127class DForm_4<bits<6> opcode, dag OOL, dag IOL, string asmstr,
128 InstrItinClass itin, list<dag> pattern>
129 : I<opcode, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000130 bits<5> B;
131 bits<5> A;
132 bits<16> C;
133
134 let Pattern = pattern;
135
136 let Inst{6-10} = A;
137 let Inst{11-15} = B;
138 let Inst{16-31} = C;
139}
140
Evan Chengb783fa32007-07-19 01:14:50 +0000141class DForm_4_zero<bits<6> opcode, dag OOL, dag IOL, string asmstr,
142 InstrItinClass itin, list<dag> pattern>
143 : DForm_1<opcode, OOL, IOL, asmstr, itin, pattern> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000144 let A = 0;
145 let B = 0;
146 let C = 0;
147}
148
Evan Chengb783fa32007-07-19 01:14:50 +0000149class DForm_5<bits<6> opcode, dag OOL, dag IOL, string asmstr,
150 InstrItinClass itin>
151 : I<opcode, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000152 bits<3> BF;
153 bits<1> L;
154 bits<5> RA;
155 bits<16> I;
156
157 let Inst{6-8} = BF;
158 let Inst{9} = 0;
159 let Inst{10} = L;
160 let Inst{11-15} = RA;
161 let Inst{16-31} = I;
162}
163
Evan Chengb783fa32007-07-19 01:14:50 +0000164class DForm_5_ext<bits<6> opcode, dag OOL, dag IOL, string asmstr,
165 InstrItinClass itin>
166 : DForm_5<opcode, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000167 let L = PPC64;
168}
169
Evan Chengb783fa32007-07-19 01:14:50 +0000170class DForm_6<bits<6> opcode, dag OOL, dag IOL, string asmstr,
171 InstrItinClass itin>
172 : DForm_5<opcode, OOL, IOL, asmstr, itin>;
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000173
Evan Chengb783fa32007-07-19 01:14:50 +0000174class DForm_6_ext<bits<6> opcode, dag OOL, dag IOL, string asmstr,
175 InstrItinClass itin>
176 : DForm_6<opcode, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000177 let L = PPC64;
178}
179
180
181// 1.7.5 DS-Form
Evan Chengb783fa32007-07-19 01:14:50 +0000182class DSForm_1<bits<6> opcode, bits<2> xo, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000183 InstrItinClass itin, list<dag> pattern>
Evan Chengb783fa32007-07-19 01:14:50 +0000184 : I<opcode, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000185 bits<5> RST;
186 bits<14> DS;
187 bits<5> RA;
188
189 let Pattern = pattern;
190
191 let Inst{6-10} = RST;
192 let Inst{11-15} = RA;
193 let Inst{16-29} = DS;
194 let Inst{30-31} = xo;
195}
196
197// 1.7.6 X-Form
Evan Chengb783fa32007-07-19 01:14:50 +0000198class XForm_base_r3xo<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000199 InstrItinClass itin, list<dag> pattern>
Evan Chengb783fa32007-07-19 01:14:50 +0000200 : I<opcode, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000201 bits<5> RST;
202 bits<5> A;
203 bits<5> B;
204
205 let Pattern = pattern;
206
207 bit RC = 0; // set by isDOT
208
209 let Inst{6-10} = RST;
210 let Inst{11-15} = A;
211 let Inst{16-20} = B;
212 let Inst{21-30} = xo;
213 let Inst{31} = RC;
214}
215
216// This is the same as XForm_base_r3xo, but the first two operands are swapped
217// when code is emitted.
218class XForm_base_r3xo_swapped
Evan Chengb783fa32007-07-19 01:14:50 +0000219 <bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000220 InstrItinClass itin>
Evan Chengb783fa32007-07-19 01:14:50 +0000221 : I<opcode, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000222 bits<5> A;
223 bits<5> RST;
224 bits<5> B;
225
226 bit RC = 0; // set by isDOT
227
228 let Inst{6-10} = RST;
229 let Inst{11-15} = A;
230 let Inst{16-20} = B;
231 let Inst{21-30} = xo;
232 let Inst{31} = RC;
233}
234
235
Evan Chengb783fa32007-07-19 01:14:50 +0000236class XForm_1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000237 InstrItinClass itin, list<dag> pattern>
Evan Chengb783fa32007-07-19 01:14:50 +0000238 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern>;
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000239
Evan Chengb783fa32007-07-19 01:14:50 +0000240class XForm_6<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000241 InstrItinClass itin, list<dag> pattern>
Evan Chengb783fa32007-07-19 01:14:50 +0000242 : XForm_base_r3xo_swapped<opcode, xo, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000243 let Pattern = pattern;
244}
245
Evan Chengb783fa32007-07-19 01:14:50 +0000246class XForm_8<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000247 InstrItinClass itin, list<dag> pattern>
Evan Chengb783fa32007-07-19 01:14:50 +0000248 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern>;
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000249
Evan Chengb783fa32007-07-19 01:14:50 +0000250class XForm_10<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000251 InstrItinClass itin, list<dag> pattern>
Evan Chengb783fa32007-07-19 01:14:50 +0000252 : XForm_base_r3xo_swapped<opcode, xo, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000253 let Pattern = pattern;
254}
255
Evan Chengb783fa32007-07-19 01:14:50 +0000256class XForm_11<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000257 InstrItinClass itin, list<dag> pattern>
Evan Chengb783fa32007-07-19 01:14:50 +0000258 : XForm_base_r3xo_swapped<opcode, xo, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000259 let B = 0;
260 let Pattern = pattern;
261}
262
Evan Chengb783fa32007-07-19 01:14:50 +0000263class XForm_16<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000264 InstrItinClass itin>
Evan Chengb783fa32007-07-19 01:14:50 +0000265 : I<opcode, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000266 bits<3> BF;
267 bits<1> L;
268 bits<5> RA;
269 bits<5> RB;
270
271 let Inst{6-8} = BF;
272 let Inst{9} = 0;
273 let Inst{10} = L;
274 let Inst{11-15} = RA;
275 let Inst{16-20} = RB;
276 let Inst{21-30} = xo;
277 let Inst{31} = 0;
278}
279
Evan Chengb783fa32007-07-19 01:14:50 +0000280class XForm_16_ext<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000281 InstrItinClass itin>
Evan Chengb783fa32007-07-19 01:14:50 +0000282 : XForm_16<opcode, xo, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000283 let L = PPC64;
284}
285
Evan Chengb783fa32007-07-19 01:14:50 +0000286class XForm_17<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000287 InstrItinClass itin>
Evan Chengb783fa32007-07-19 01:14:50 +0000288 : I<opcode, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000289 bits<3> BF;
290 bits<5> FRA;
291 bits<5> FRB;
292
293 let Inst{6-8} = BF;
294 let Inst{9-10} = 0;
295 let Inst{11-15} = FRA;
296 let Inst{16-20} = FRB;
297 let Inst{21-30} = xo;
298 let Inst{31} = 0;
299}
300
Nate Begemanf46776e2008-08-11 17:36:31 +0000301class XForm_24<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
302 InstrItinClass itin, list<dag> pattern>
303 : I<opcode, OOL, IOL, asmstr, itin> {
304 let Pattern = pattern;
305 let Inst{6-10} = 31;
306 let Inst{11-15} = 0;
307 let Inst{16-20} = 0;
308 let Inst{21-30} = xo;
309 let Inst{31} = 0;
310}
311
Evan Chengb783fa32007-07-19 01:14:50 +0000312class XForm_25<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000313 InstrItinClass itin, list<dag> pattern>
Evan Chengb783fa32007-07-19 01:14:50 +0000314 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000315}
316
Evan Chengb783fa32007-07-19 01:14:50 +0000317class XForm_26<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000318 InstrItinClass itin, list<dag> pattern>
Evan Chengb783fa32007-07-19 01:14:50 +0000319 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000320 let A = 0;
321}
322
Evan Chengb783fa32007-07-19 01:14:50 +0000323class XForm_28<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000324 InstrItinClass itin, list<dag> pattern>
Evan Chengb783fa32007-07-19 01:14:50 +0000325 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000326}
327
Dale Johannesen3d8578b2007-10-10 01:01:31 +0000328// This is used for MFFS, MTFSB0, MTFSB1. 42 is arbitrary; this series of
329// numbers presumably relates to some document, but I haven't found it.
330class XForm_42<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
331 InstrItinClass itin, list<dag> pattern>
332 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
333 let Pattern = pattern;
334
335 bit RC = 0; // set by isDOT
336
337 let Inst{6-10} = RST;
338 let Inst{11-20} = 0;
339 let Inst{21-30} = xo;
340 let Inst{31} = RC;
341}
342class XForm_43<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
343 InstrItinClass itin, list<dag> pattern>
344 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
345 let Pattern = pattern;
346 bits<5> FM;
347
348 bit RC = 0; // set by isDOT
349
350 let Inst{6-10} = FM;
351 let Inst{11-20} = 0;
352 let Inst{21-30} = xo;
353 let Inst{31} = RC;
354}
355
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000356// DCB_Form - Form X instruction, used for dcb* instructions.
Evan Chengb783fa32007-07-19 01:14:50 +0000357class DCB_Form<bits<10> xo, bits<5> immfield, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000358 InstrItinClass itin, list<dag> pattern>
Evan Chengb783fa32007-07-19 01:14:50 +0000359 : I<31, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000360 bits<5> A;
361 bits<5> B;
362
363 let Pattern = pattern;
364
365 let Inst{6-10} = immfield;
366 let Inst{11-15} = A;
367 let Inst{16-20} = B;
368 let Inst{21-30} = xo;
369 let Inst{31} = 0;
370}
371
372
373// DSS_Form - Form X instruction, used for altivec dss* instructions.
Evan Chengb783fa32007-07-19 01:14:50 +0000374class DSS_Form<bits<10> xo, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000375 InstrItinClass itin, list<dag> pattern>
Evan Chengb783fa32007-07-19 01:14:50 +0000376 : I<31, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000377 bits<1> T;
378 bits<2> STRM;
379 bits<5> A;
380 bits<5> B;
381
382 let Pattern = pattern;
383
384 let Inst{6} = T;
385 let Inst{7-8} = 0;
386 let Inst{9-10} = STRM;
387 let Inst{11-15} = A;
388 let Inst{16-20} = B;
389 let Inst{21-30} = xo;
390 let Inst{31} = 0;
391}
392
393// 1.7.7 XL-Form
Evan Chengb783fa32007-07-19 01:14:50 +0000394class XLForm_1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000395 InstrItinClass itin, list<dag> pattern>
Evan Chengb783fa32007-07-19 01:14:50 +0000396 : I<opcode, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000397 bits<5> CRD;
398 bits<5> CRA;
399 bits<5> CRB;
400
401 let Pattern = pattern;
402
403 let Inst{6-10} = CRD;
404 let Inst{11-15} = CRA;
405 let Inst{16-20} = CRB;
406 let Inst{21-30} = xo;
407 let Inst{31} = 0;
408}
409
Evan Chengb783fa32007-07-19 01:14:50 +0000410class XLForm_1_ext<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000411 InstrItinClass itin, list<dag> pattern>
Evan Chengb783fa32007-07-19 01:14:50 +0000412 : I<opcode, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000413 bits<5> CRD;
414
415 let Pattern = pattern;
416
417 let Inst{6-10} = CRD;
418 let Inst{11-15} = CRD;
419 let Inst{16-20} = CRD;
420 let Inst{21-30} = xo;
421 let Inst{31} = 0;
422}
423
Evan Chengb783fa32007-07-19 01:14:50 +0000424class XLForm_2<bits<6> opcode, bits<10> xo, bit lk, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000425 InstrItinClass itin, list<dag> pattern>
Evan Chengb783fa32007-07-19 01:14:50 +0000426 : I<opcode, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000427 bits<5> BO;
428 bits<5> BI;
429 bits<2> BH;
430
431 let Pattern = pattern;
432
433 let Inst{6-10} = BO;
434 let Inst{11-15} = BI;
435 let Inst{16-18} = 0;
436 let Inst{19-20} = BH;
437 let Inst{21-30} = xo;
438 let Inst{31} = lk;
439}
440
441class XLForm_2_br<bits<6> opcode, bits<10> xo, bit lk,
Evan Chengb783fa32007-07-19 01:14:50 +0000442 dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern>
443 : XLForm_2<opcode, xo, lk, OOL, IOL, asmstr, itin, pattern> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000444 bits<7> BIBO; // 2 bits of BI and 5 bits of BO.
445 bits<3> CR;
446
447 let BO = BIBO{2-6};
448 let BI{0-1} = BIBO{0-1};
449 let BI{2-4} = CR;
450 let BH = 0;
451}
452
453
454class XLForm_2_ext<bits<6> opcode, bits<10> xo, bits<5> bo, bits<5> bi, bit lk,
Evan Chengb783fa32007-07-19 01:14:50 +0000455 dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern>
456 : XLForm_2<opcode, xo, lk, OOL, IOL, asmstr, itin, pattern> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000457 let BO = bo;
458 let BI = bi;
459 let BH = 0;
460}
461
Evan Chengb783fa32007-07-19 01:14:50 +0000462class XLForm_3<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000463 InstrItinClass itin>
Evan Chengb783fa32007-07-19 01:14:50 +0000464 : I<opcode, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000465 bits<3> BF;
466 bits<3> BFA;
467
468 let Inst{6-8} = BF;
469 let Inst{9-10} = 0;
470 let Inst{11-13} = BFA;
471 let Inst{14-15} = 0;
472 let Inst{16-20} = 0;
473 let Inst{21-30} = xo;
474 let Inst{31} = 0;
475}
476
477// 1.7.8 XFX-Form
Evan Chengb783fa32007-07-19 01:14:50 +0000478class XFXForm_1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000479 InstrItinClass itin>
Evan Chengb783fa32007-07-19 01:14:50 +0000480 : I<opcode, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000481 bits<5> RT;
482 bits<10> SPR;
483
484 let Inst{6-10} = RT;
485 let Inst{11} = SPR{4};
486 let Inst{12} = SPR{3};
487 let Inst{13} = SPR{2};
488 let Inst{14} = SPR{1};
489 let Inst{15} = SPR{0};
490 let Inst{16} = SPR{9};
491 let Inst{17} = SPR{8};
492 let Inst{18} = SPR{7};
493 let Inst{19} = SPR{6};
494 let Inst{20} = SPR{5};
495 let Inst{21-30} = xo;
496 let Inst{31} = 0;
497}
498
499class XFXForm_1_ext<bits<6> opcode, bits<10> xo, bits<10> spr,
Evan Chengb783fa32007-07-19 01:14:50 +0000500 dag OOL, dag IOL, string asmstr, InstrItinClass itin>
501 : XFXForm_1<opcode, xo, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000502 let SPR = spr;
503}
504
Evan Chengb783fa32007-07-19 01:14:50 +0000505class XFXForm_3<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000506 InstrItinClass itin>
Evan Chengb783fa32007-07-19 01:14:50 +0000507 : I<opcode, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000508 bits<5> RT;
509
510 let Inst{6-10} = RT;
511 let Inst{11-20} = 0;
512 let Inst{21-30} = xo;
513 let Inst{31} = 0;
514}
515
Evan Chengb783fa32007-07-19 01:14:50 +0000516class XFXForm_5<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000517 InstrItinClass itin>
Evan Chengb783fa32007-07-19 01:14:50 +0000518 : I<opcode, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000519 bits<8> FXM;
520 bits<5> ST;
521
522 let Inst{6-10} = ST;
523 let Inst{11} = 0;
524 let Inst{12-19} = FXM;
525 let Inst{20} = 0;
526 let Inst{21-30} = xo;
527 let Inst{31} = 0;
528}
529
Evan Chengb783fa32007-07-19 01:14:50 +0000530class XFXForm_5a<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000531 InstrItinClass itin>
Evan Chengb783fa32007-07-19 01:14:50 +0000532 : I<opcode, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000533 bits<5> ST;
534 bits<8> FXM;
535
536 let Inst{6-10} = ST;
537 let Inst{11} = 1;
538 let Inst{12-19} = FXM;
539 let Inst{20} = 0;
540 let Inst{21-30} = xo;
541 let Inst{31} = 0;
542}
543
Evan Chengb783fa32007-07-19 01:14:50 +0000544class XFXForm_7<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000545 InstrItinClass itin>
Evan Chengb783fa32007-07-19 01:14:50 +0000546 : XFXForm_1<opcode, xo, OOL, IOL, asmstr, itin>;
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000547
548class XFXForm_7_ext<bits<6> opcode, bits<10> xo, bits<10> spr,
Evan Chengb783fa32007-07-19 01:14:50 +0000549 dag OOL, dag IOL, string asmstr, InstrItinClass itin>
550 : XFXForm_7<opcode, xo, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000551 let SPR = spr;
552}
553
Dale Johannesen3d8578b2007-10-10 01:01:31 +0000554// XFL-Form - MTFSF
555// This is probably 1.7.9, but I don't have the reference that uses this
556// numbering scheme...
557class XFLForm<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
558 string cstr, InstrItinClass itin, list<dag>pattern>
559 : I<opcode, OOL, IOL, asmstr, itin> {
560 bits<8> FM;
561 bits<5> RT;
562
563 bit RC = 0; // set by isDOT
564 let Pattern = pattern;
565 let Constraints = cstr;
566
567 let Inst{6} = 0;
568 let Inst{7-14} = FM;
569 let Inst{15} = 0;
570 let Inst{16-20} = RT;
571 let Inst{21-30} = xo;
572 let Inst{31} = RC;
573}
574
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000575// 1.7.10 XS-Form - SRADI.
Evan Chengb783fa32007-07-19 01:14:50 +0000576class XSForm_1<bits<6> opcode, bits<9> xo, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000577 InstrItinClass itin, list<dag> pattern>
Evan Chengb783fa32007-07-19 01:14:50 +0000578 : I<opcode, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000579 bits<5> A;
580 bits<5> RS;
581 bits<6> SH;
582
583 bit RC = 0; // set by isDOT
584 let Pattern = pattern;
585
586 let Inst{6-10} = RS;
587 let Inst{11-15} = A;
588 let Inst{16-20} = SH{4,3,2,1,0};
589 let Inst{21-29} = xo;
590 let Inst{30} = SH{5};
591 let Inst{31} = RC;
592}
593
594// 1.7.11 XO-Form
Evan Chengb783fa32007-07-19 01:14:50 +0000595class XOForm_1<bits<6> opcode, bits<9> xo, bit oe, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000596 InstrItinClass itin, list<dag> pattern>
Evan Chengb783fa32007-07-19 01:14:50 +0000597 : I<opcode, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000598 bits<5> RT;
599 bits<5> RA;
600 bits<5> RB;
601
602 let Pattern = pattern;
603
604 bit RC = 0; // set by isDOT
605
606 let Inst{6-10} = RT;
607 let Inst{11-15} = RA;
608 let Inst{16-20} = RB;
609 let Inst{21} = oe;
610 let Inst{22-30} = xo;
611 let Inst{31} = RC;
612}
613
614class XOForm_3<bits<6> opcode, bits<9> xo, bit oe,
Evan Chengb783fa32007-07-19 01:14:50 +0000615 dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern>
616 : XOForm_1<opcode, xo, oe, OOL, IOL, asmstr, itin, pattern> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000617 let RB = 0;
618}
619
620// 1.7.12 A-Form
Evan Chengb783fa32007-07-19 01:14:50 +0000621class AForm_1<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000622 InstrItinClass itin, list<dag> pattern>
Evan Chengb783fa32007-07-19 01:14:50 +0000623 : I<opcode, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000624 bits<5> FRT;
625 bits<5> FRA;
626 bits<5> FRC;
627 bits<5> FRB;
628
629 let Pattern = pattern;
630
631 bit RC = 0; // set by isDOT
632
633 let Inst{6-10} = FRT;
634 let Inst{11-15} = FRA;
635 let Inst{16-20} = FRB;
636 let Inst{21-25} = FRC;
637 let Inst{26-30} = xo;
638 let Inst{31} = RC;
639}
640
Evan Chengb783fa32007-07-19 01:14:50 +0000641class AForm_2<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000642 InstrItinClass itin, list<dag> pattern>
Evan Chengb783fa32007-07-19 01:14:50 +0000643 : AForm_1<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000644 let FRC = 0;
645}
646
Evan Chengb783fa32007-07-19 01:14:50 +0000647class AForm_3<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000648 InstrItinClass itin, list<dag> pattern>
Evan Chengb783fa32007-07-19 01:14:50 +0000649 : AForm_1<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000650 let FRB = 0;
651}
652
653// 1.7.13 M-Form
Evan Chengb783fa32007-07-19 01:14:50 +0000654class MForm_1<bits<6> opcode, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000655 InstrItinClass itin, list<dag> pattern>
Evan Chengb783fa32007-07-19 01:14:50 +0000656 : I<opcode, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000657 bits<5> RA;
658 bits<5> RS;
659 bits<5> RB;
660 bits<5> MB;
661 bits<5> ME;
662
663 let Pattern = pattern;
664
665 bit RC = 0; // set by isDOT
666
667 let Inst{6-10} = RS;
668 let Inst{11-15} = RA;
669 let Inst{16-20} = RB;
670 let Inst{21-25} = MB;
671 let Inst{26-30} = ME;
672 let Inst{31} = RC;
673}
674
Evan Chengb783fa32007-07-19 01:14:50 +0000675class MForm_2<bits<6> opcode, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000676 InstrItinClass itin, list<dag> pattern>
Evan Chengb783fa32007-07-19 01:14:50 +0000677 : MForm_1<opcode, OOL, IOL, asmstr, itin, pattern> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000678}
679
680// 1.7.14 MD-Form
Evan Chengb783fa32007-07-19 01:14:50 +0000681class MDForm_1<bits<6> opcode, bits<3> xo, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000682 InstrItinClass itin, list<dag> pattern>
Evan Chengb783fa32007-07-19 01:14:50 +0000683 : I<opcode, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000684 bits<5> RA;
685 bits<5> RS;
686 bits<6> SH;
687 bits<6> MBE;
688
689 let Pattern = pattern;
690
691 bit RC = 0; // set by isDOT
692
693 let Inst{6-10} = RS;
694 let Inst{11-15} = RA;
695 let Inst{16-20} = SH{4,3,2,1,0};
696 let Inst{21-26} = MBE{4,3,2,1,0,5};
697 let Inst{27-29} = xo;
698 let Inst{30} = SH{5};
699 let Inst{31} = RC;
700}
701
702
703
704// E-1 VA-Form
705
706// VAForm_1 - DACB ordering.
Evan Chengb783fa32007-07-19 01:14:50 +0000707class VAForm_1<bits<6> xo, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000708 InstrItinClass itin, list<dag> pattern>
Evan Chengb783fa32007-07-19 01:14:50 +0000709 : I<4, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000710 bits<5> VD;
711 bits<5> VA;
712 bits<5> VC;
713 bits<5> VB;
714
715 let Pattern = pattern;
716
717 let Inst{6-10} = VD;
718 let Inst{11-15} = VA;
719 let Inst{16-20} = VB;
720 let Inst{21-25} = VC;
721 let Inst{26-31} = xo;
722}
723
724// VAForm_1a - DABC ordering.
Evan Chengb783fa32007-07-19 01:14:50 +0000725class VAForm_1a<bits<6> xo, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000726 InstrItinClass itin, list<dag> pattern>
Evan Chengb783fa32007-07-19 01:14:50 +0000727 : I<4, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000728 bits<5> VD;
729 bits<5> VA;
730 bits<5> VB;
731 bits<5> VC;
732
733 let Pattern = pattern;
734
735 let Inst{6-10} = VD;
736 let Inst{11-15} = VA;
737 let Inst{16-20} = VB;
738 let Inst{21-25} = VC;
739 let Inst{26-31} = xo;
740}
741
Evan Chengb783fa32007-07-19 01:14:50 +0000742class VAForm_2<bits<6> xo, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000743 InstrItinClass itin, list<dag> pattern>
Evan Chengb783fa32007-07-19 01:14:50 +0000744 : I<4, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000745 bits<5> VD;
746 bits<5> VA;
747 bits<5> VB;
748 bits<4> SH;
749
750 let Pattern = pattern;
751
752 let Inst{6-10} = VD;
753 let Inst{11-15} = VA;
754 let Inst{16-20} = VB;
755 let Inst{21} = 0;
756 let Inst{22-25} = SH;
757 let Inst{26-31} = xo;
758}
759
760// E-2 VX-Form
Evan Chengb783fa32007-07-19 01:14:50 +0000761class VXForm_1<bits<11> xo, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000762 InstrItinClass itin, list<dag> pattern>
Evan Chengb783fa32007-07-19 01:14:50 +0000763 : I<4, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000764 bits<5> VD;
765 bits<5> VA;
766 bits<5> VB;
767
768 let Pattern = pattern;
769
770 let Inst{6-10} = VD;
771 let Inst{11-15} = VA;
772 let Inst{16-20} = VB;
773 let Inst{21-31} = xo;
774}
775
Evan Chengb783fa32007-07-19 01:14:50 +0000776class VXForm_setzero<bits<11> xo, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000777 InstrItinClass itin, list<dag> pattern>
Evan Chengb783fa32007-07-19 01:14:50 +0000778 : VXForm_1<xo, OOL, IOL, asmstr, itin, pattern> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000779 let VA = VD;
780 let VB = VD;
781}
782
783
Evan Chengb783fa32007-07-19 01:14:50 +0000784class VXForm_2<bits<11> xo, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000785 InstrItinClass itin, list<dag> pattern>
Evan Chengb783fa32007-07-19 01:14:50 +0000786 : I<4, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000787 bits<5> VD;
788 bits<5> VB;
789
790 let Pattern = pattern;
791
792 let Inst{6-10} = VD;
793 let Inst{11-15} = 0;
794 let Inst{16-20} = VB;
795 let Inst{21-31} = xo;
796}
797
Evan Chengb783fa32007-07-19 01:14:50 +0000798class VXForm_3<bits<11> xo, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000799 InstrItinClass itin, list<dag> pattern>
Evan Chengb783fa32007-07-19 01:14:50 +0000800 : I<4, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000801 bits<5> VD;
802 bits<5> IMM;
803
804 let Pattern = pattern;
805
806 let Inst{6-10} = VD;
807 let Inst{11-15} = IMM;
808 let Inst{16-20} = 0;
809 let Inst{21-31} = xo;
810}
811
812/// VXForm_4 - VX instructions with "VD,0,0" register fields, like mfvscr.
Evan Chengb783fa32007-07-19 01:14:50 +0000813class VXForm_4<bits<11> xo, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000814 InstrItinClass itin, list<dag> pattern>
Evan Chengb783fa32007-07-19 01:14:50 +0000815 : I<4, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000816 bits<5> VD;
817
818 let Pattern = pattern;
819
820 let Inst{6-10} = VD;
821 let Inst{11-15} = 0;
822 let Inst{16-20} = 0;
823 let Inst{21-31} = xo;
824}
825
826/// VXForm_5 - VX instructions with "0,0,VB" register fields, like mtvscr.
Evan Chengb783fa32007-07-19 01:14:50 +0000827class VXForm_5<bits<11> xo, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000828 InstrItinClass itin, list<dag> pattern>
Evan Chengb783fa32007-07-19 01:14:50 +0000829 : I<4, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000830 bits<5> VB;
831
832 let Pattern = pattern;
833
834 let Inst{6-10} = 0;
835 let Inst{11-15} = 0;
836 let Inst{16-20} = VB;
837 let Inst{21-31} = xo;
838}
839
840// E-4 VXR-Form
Evan Chengb783fa32007-07-19 01:14:50 +0000841class VXRForm_1<bits<10> xo, dag OOL, dag IOL, string asmstr,
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000842 InstrItinClass itin, list<dag> pattern>
Evan Chengb783fa32007-07-19 01:14:50 +0000843 : I<4, OOL, IOL, asmstr, itin> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000844 bits<5> VD;
845 bits<5> VA;
846 bits<5> VB;
847 bit RC = 0;
848
849 let Pattern = pattern;
850
851 let Inst{6-10} = VD;
852 let Inst{11-15} = VA;
853 let Inst{16-20} = VB;
854 let Inst{21} = RC;
855 let Inst{22-31} = xo;
856}
857
858//===----------------------------------------------------------------------===//
Evan Chengb783fa32007-07-19 01:14:50 +0000859class Pseudo<dag OOL, dag IOL, string asmstr, list<dag> pattern>
860 : I<0, OOL, IOL, asmstr, NoItinerary> {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000861 let PPC64 = 0;
862 let Pattern = pattern;
863 let Inst{31-0} = 0;
864}