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Dan Gohmanf17a25c2007-07-18 16:29:46 +00001//===- PowerPCInstrFormats.td - PowerPC Instruction Formats --*- tablegen -*-=//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10//===----------------------------------------------------------------------===//
11//
12// PowerPC instruction formats
13
14class I<bits<6> opcode, dag OL, string asmstr, InstrItinClass itin>
15 : Instruction {
16 field bits<32> Inst;
17
18 bit PPC64 = 0; // Default value, override with isPPC64
19
20 let Name = "";
21 let Namespace = "PPC";
22 let Inst{0-5} = opcode;
23 let OperandList = OL;
24 let AsmString = asmstr;
25 let Itinerary = itin;
26
27 /// These fields correspond to the fields in PPCInstrInfo.h. Any changes to
28 /// these must be reflected there! See comments there for what these are.
29 bits<1> PPC970_First = 0;
30 bits<1> PPC970_Single = 0;
31 bits<1> PPC970_Cracked = 0;
32 bits<3> PPC970_Unit = 0;
33}
34
35class PPC970_DGroup_First { bits<1> PPC970_First = 1; }
36class PPC970_DGroup_Single { bits<1> PPC970_Single = 1; }
37class PPC970_DGroup_Cracked { bits<1> PPC970_Cracked = 1; }
38class PPC970_MicroCode;
39
40class PPC970_Unit_Pseudo { bits<3> PPC970_Unit = 0; }
41class PPC970_Unit_FXU { bits<3> PPC970_Unit = 1; }
42class PPC970_Unit_LSU { bits<3> PPC970_Unit = 2; }
43class PPC970_Unit_FPU { bits<3> PPC970_Unit = 3; }
44class PPC970_Unit_CRU { bits<3> PPC970_Unit = 4; }
45class PPC970_Unit_VALU { bits<3> PPC970_Unit = 5; }
46class PPC970_Unit_VPERM { bits<3> PPC970_Unit = 6; }
47class PPC970_Unit_BRU { bits<3> PPC970_Unit = 7; }
48
49
50// 1.7.1 I-Form
51class IForm<bits<6> opcode, bit aa, bit lk, dag OL, string asmstr,
52 InstrItinClass itin, list<dag> pattern>
53 : I<opcode, OL, asmstr, itin> {
54 let Pattern = pattern;
55 bits<24> LI;
56
57 let Inst{6-29} = LI;
58 let Inst{30} = aa;
59 let Inst{31} = lk;
60}
61
62// 1.7.2 B-Form
63class BForm<bits<6> opcode, bit aa, bit lk, dag OL, string asmstr>
64 : I<opcode, OL, asmstr, BrB> {
65 bits<7> BIBO; // 2 bits of BI and 5 bits of BO.
66 bits<3> CR;
67 bits<14> BD;
68
69 bits<5> BI;
70 let BI{0-1} = BIBO{5-6};
71 let BI{2-4} = CR{0-2};
72
73 let Inst{6-10} = BIBO{4-0};
74 let Inst{11-15} = BI;
75 let Inst{16-29} = BD;
76 let Inst{30} = aa;
77 let Inst{31} = lk;
78}
79
80
81// 1.7.4 D-Form
82class DForm_base<bits<6> opcode, dag OL, string asmstr, InstrItinClass itin,
83 list<dag> pattern>
84 : I<opcode, OL, asmstr, itin> {
85 bits<5> A;
86 bits<5> B;
87 bits<16> C;
88
89 let Pattern = pattern;
90
91 let Inst{6-10} = A;
92 let Inst{11-15} = B;
93 let Inst{16-31} = C;
94}
95
96class DForm_1<bits<6> opcode, dag OL, string asmstr, InstrItinClass itin,
97 list<dag> pattern>
98 : I<opcode, OL, asmstr, itin> {
99 bits<5> A;
100 bits<16> C;
101 bits<5> B;
102
103 let Pattern = pattern;
104
105 let Inst{6-10} = A;
106 let Inst{11-15} = B;
107 let Inst{16-31} = C;
108}
109
110class DForm_2<bits<6> opcode, dag OL, string asmstr, InstrItinClass itin,
111 list<dag> pattern>
112 : DForm_base<opcode, OL, asmstr, itin, pattern>;
113
114class DForm_2_r0<bits<6> opcode, dag OL, string asmstr, InstrItinClass itin,
115 list<dag> pattern>
116 : I<opcode, OL, asmstr, itin> {
117 bits<5> A;
118 bits<16> B;
119
120 let Pattern = pattern;
121
122 let Inst{6-10} = A;
123 let Inst{11-15} = 0;
124 let Inst{16-31} = B;
125}
126
127class DForm_4<bits<6> opcode, dag OL, string asmstr, InstrItinClass itin,
128 list<dag> pattern>
129 : I<opcode, OL, asmstr, itin> {
130 bits<5> B;
131 bits<5> A;
132 bits<16> C;
133
134 let Pattern = pattern;
135
136 let Inst{6-10} = A;
137 let Inst{11-15} = B;
138 let Inst{16-31} = C;
139}
140
141class DForm_4_zero<bits<6> opcode, dag OL, string asmstr, InstrItinClass itin,
142 list<dag> pattern>
143 : DForm_1<opcode, OL, asmstr, itin, pattern> {
144 let A = 0;
145 let B = 0;
146 let C = 0;
147}
148
149class DForm_5<bits<6> opcode, dag OL, string asmstr, InstrItinClass itin>
150 : I<opcode, OL, asmstr, itin> {
151 bits<3> BF;
152 bits<1> L;
153 bits<5> RA;
154 bits<16> I;
155
156 let Inst{6-8} = BF;
157 let Inst{9} = 0;
158 let Inst{10} = L;
159 let Inst{11-15} = RA;
160 let Inst{16-31} = I;
161}
162
163class DForm_5_ext<bits<6> opcode, dag OL, string asmstr, InstrItinClass itin>
164 : DForm_5<opcode, OL, asmstr, itin> {
165 let L = PPC64;
166}
167
168class DForm_6<bits<6> opcode, dag OL, string asmstr, InstrItinClass itin>
169 : DForm_5<opcode, OL, asmstr, itin>;
170
171class DForm_6_ext<bits<6> opcode, dag OL, string asmstr, InstrItinClass itin>
172 : DForm_6<opcode, OL, asmstr, itin> {
173 let L = PPC64;
174}
175
176
177// 1.7.5 DS-Form
178class DSForm_1<bits<6> opcode, bits<2> xo, dag OL, string asmstr,
179 InstrItinClass itin, list<dag> pattern>
180 : I<opcode, OL, asmstr, itin> {
181 bits<5> RST;
182 bits<14> DS;
183 bits<5> RA;
184
185 let Pattern = pattern;
186
187 let Inst{6-10} = RST;
188 let Inst{11-15} = RA;
189 let Inst{16-29} = DS;
190 let Inst{30-31} = xo;
191}
192
193// 1.7.6 X-Form
194class XForm_base_r3xo<bits<6> opcode, bits<10> xo, dag OL, string asmstr,
195 InstrItinClass itin, list<dag> pattern>
196 : I<opcode, OL, asmstr, itin> {
197 bits<5> RST;
198 bits<5> A;
199 bits<5> B;
200
201 let Pattern = pattern;
202
203 bit RC = 0; // set by isDOT
204
205 let Inst{6-10} = RST;
206 let Inst{11-15} = A;
207 let Inst{16-20} = B;
208 let Inst{21-30} = xo;
209 let Inst{31} = RC;
210}
211
212// This is the same as XForm_base_r3xo, but the first two operands are swapped
213// when code is emitted.
214class XForm_base_r3xo_swapped
215 <bits<6> opcode, bits<10> xo, dag OL, string asmstr,
216 InstrItinClass itin>
217 : I<opcode, OL, asmstr, itin> {
218 bits<5> A;
219 bits<5> RST;
220 bits<5> B;
221
222 bit RC = 0; // set by isDOT
223
224 let Inst{6-10} = RST;
225 let Inst{11-15} = A;
226 let Inst{16-20} = B;
227 let Inst{21-30} = xo;
228 let Inst{31} = RC;
229}
230
231
232class XForm_1<bits<6> opcode, bits<10> xo, dag OL, string asmstr,
233 InstrItinClass itin, list<dag> pattern>
234 : XForm_base_r3xo<opcode, xo, OL, asmstr, itin, pattern>;
235
236class XForm_6<bits<6> opcode, bits<10> xo, dag OL, string asmstr,
237 InstrItinClass itin, list<dag> pattern>
238 : XForm_base_r3xo_swapped<opcode, xo, OL, asmstr, itin> {
239 let Pattern = pattern;
240}
241
242class XForm_8<bits<6> opcode, bits<10> xo, dag OL, string asmstr,
243 InstrItinClass itin, list<dag> pattern>
244 : XForm_base_r3xo<opcode, xo, OL, asmstr, itin, pattern>;
245
246class XForm_10<bits<6> opcode, bits<10> xo, dag OL, string asmstr,
247 InstrItinClass itin, list<dag> pattern>
248 : XForm_base_r3xo_swapped<opcode, xo, OL, asmstr, itin> {
249 let Pattern = pattern;
250}
251
252class XForm_11<bits<6> opcode, bits<10> xo, dag OL, string asmstr,
253 InstrItinClass itin, list<dag> pattern>
254 : XForm_base_r3xo_swapped<opcode, xo, OL, asmstr, itin> {
255 let B = 0;
256 let Pattern = pattern;
257}
258
259class XForm_16<bits<6> opcode, bits<10> xo, dag OL, string asmstr,
260 InstrItinClass itin>
261 : I<opcode, OL, asmstr, itin> {
262 bits<3> BF;
263 bits<1> L;
264 bits<5> RA;
265 bits<5> RB;
266
267 let Inst{6-8} = BF;
268 let Inst{9} = 0;
269 let Inst{10} = L;
270 let Inst{11-15} = RA;
271 let Inst{16-20} = RB;
272 let Inst{21-30} = xo;
273 let Inst{31} = 0;
274}
275
276class XForm_16_ext<bits<6> opcode, bits<10> xo, dag OL, string asmstr,
277 InstrItinClass itin>
278 : XForm_16<opcode, xo, OL, asmstr, itin> {
279 let L = PPC64;
280}
281
282class XForm_17<bits<6> opcode, bits<10> xo, dag OL, string asmstr,
283 InstrItinClass itin>
284 : I<opcode, OL, asmstr, itin> {
285 bits<3> BF;
286 bits<5> FRA;
287 bits<5> FRB;
288
289 let Inst{6-8} = BF;
290 let Inst{9-10} = 0;
291 let Inst{11-15} = FRA;
292 let Inst{16-20} = FRB;
293 let Inst{21-30} = xo;
294 let Inst{31} = 0;
295}
296
297class XForm_25<bits<6> opcode, bits<10> xo, dag OL, string asmstr,
298 InstrItinClass itin, list<dag> pattern>
299 : XForm_base_r3xo<opcode, xo, OL, asmstr, itin, pattern> {
300}
301
302class XForm_26<bits<6> opcode, bits<10> xo, dag OL, string asmstr,
303 InstrItinClass itin, list<dag> pattern>
304 : XForm_base_r3xo<opcode, xo, OL, asmstr, itin, pattern> {
305 let A = 0;
306}
307
308class XForm_28<bits<6> opcode, bits<10> xo, dag OL, string asmstr,
309 InstrItinClass itin, list<dag> pattern>
310 : XForm_base_r3xo<opcode, xo, OL, asmstr, itin, pattern> {
311}
312
313// DCB_Form - Form X instruction, used for dcb* instructions.
314class DCB_Form<bits<10> xo, bits<5> immfield, dag OL, string asmstr,
315 InstrItinClass itin, list<dag> pattern>
316 : I<31, OL, asmstr, itin> {
317 bits<5> A;
318 bits<5> B;
319
320 let Pattern = pattern;
321
322 let Inst{6-10} = immfield;
323 let Inst{11-15} = A;
324 let Inst{16-20} = B;
325 let Inst{21-30} = xo;
326 let Inst{31} = 0;
327}
328
329
330// DSS_Form - Form X instruction, used for altivec dss* instructions.
331class DSS_Form<bits<10> xo, dag OL, string asmstr,
332 InstrItinClass itin, list<dag> pattern>
333 : I<31, OL, asmstr, itin> {
334 bits<1> T;
335 bits<2> STRM;
336 bits<5> A;
337 bits<5> B;
338
339 let Pattern = pattern;
340
341 let Inst{6} = T;
342 let Inst{7-8} = 0;
343 let Inst{9-10} = STRM;
344 let Inst{11-15} = A;
345 let Inst{16-20} = B;
346 let Inst{21-30} = xo;
347 let Inst{31} = 0;
348}
349
350// 1.7.7 XL-Form
351class XLForm_1<bits<6> opcode, bits<10> xo, dag OL, string asmstr,
352 InstrItinClass itin, list<dag> pattern>
353 : I<opcode, OL, asmstr, itin> {
354 bits<5> CRD;
355 bits<5> CRA;
356 bits<5> CRB;
357
358 let Pattern = pattern;
359
360 let Inst{6-10} = CRD;
361 let Inst{11-15} = CRA;
362 let Inst{16-20} = CRB;
363 let Inst{21-30} = xo;
364 let Inst{31} = 0;
365}
366
367class XLForm_1_ext<bits<6> opcode, bits<10> xo, dag OL, string asmstr,
368 InstrItinClass itin, list<dag> pattern>
369 : I<opcode, OL, asmstr, itin> {
370 bits<5> CRD;
371
372 let Pattern = pattern;
373
374 let Inst{6-10} = CRD;
375 let Inst{11-15} = CRD;
376 let Inst{16-20} = CRD;
377 let Inst{21-30} = xo;
378 let Inst{31} = 0;
379}
380
381class XLForm_2<bits<6> opcode, bits<10> xo, bit lk, dag OL, string asmstr,
382 InstrItinClass itin, list<dag> pattern>
383 : I<opcode, OL, asmstr, itin> {
384 bits<5> BO;
385 bits<5> BI;
386 bits<2> BH;
387
388 let Pattern = pattern;
389
390 let Inst{6-10} = BO;
391 let Inst{11-15} = BI;
392 let Inst{16-18} = 0;
393 let Inst{19-20} = BH;
394 let Inst{21-30} = xo;
395 let Inst{31} = lk;
396}
397
398class XLForm_2_br<bits<6> opcode, bits<10> xo, bit lk,
399 dag OL, string asmstr, InstrItinClass itin, list<dag> pattern>
400 : XLForm_2<opcode, xo, lk, OL, asmstr, itin, pattern> {
401 bits<7> BIBO; // 2 bits of BI and 5 bits of BO.
402 bits<3> CR;
403
404 let BO = BIBO{2-6};
405 let BI{0-1} = BIBO{0-1};
406 let BI{2-4} = CR;
407 let BH = 0;
408}
409
410
411class XLForm_2_ext<bits<6> opcode, bits<10> xo, bits<5> bo, bits<5> bi, bit lk,
412 dag OL, string asmstr, InstrItinClass itin, list<dag> pattern>
413 : XLForm_2<opcode, xo, lk, OL, asmstr, itin, pattern> {
414 let BO = bo;
415 let BI = bi;
416 let BH = 0;
417}
418
419class XLForm_3<bits<6> opcode, bits<10> xo, dag OL, string asmstr,
420 InstrItinClass itin>
421 : I<opcode, OL, asmstr, itin> {
422 bits<3> BF;
423 bits<3> BFA;
424
425 let Inst{6-8} = BF;
426 let Inst{9-10} = 0;
427 let Inst{11-13} = BFA;
428 let Inst{14-15} = 0;
429 let Inst{16-20} = 0;
430 let Inst{21-30} = xo;
431 let Inst{31} = 0;
432}
433
434// 1.7.8 XFX-Form
435class XFXForm_1<bits<6> opcode, bits<10> xo, dag OL, string asmstr,
436 InstrItinClass itin>
437 : I<opcode, OL, asmstr, itin> {
438 bits<5> RT;
439 bits<10> SPR;
440
441 let Inst{6-10} = RT;
442 let Inst{11} = SPR{4};
443 let Inst{12} = SPR{3};
444 let Inst{13} = SPR{2};
445 let Inst{14} = SPR{1};
446 let Inst{15} = SPR{0};
447 let Inst{16} = SPR{9};
448 let Inst{17} = SPR{8};
449 let Inst{18} = SPR{7};
450 let Inst{19} = SPR{6};
451 let Inst{20} = SPR{5};
452 let Inst{21-30} = xo;
453 let Inst{31} = 0;
454}
455
456class XFXForm_1_ext<bits<6> opcode, bits<10> xo, bits<10> spr,
457 dag OL, string asmstr, InstrItinClass itin>
458 : XFXForm_1<opcode, xo, OL, asmstr, itin> {
459 let SPR = spr;
460}
461
462class XFXForm_3<bits<6> opcode, bits<10> xo, dag OL, string asmstr,
463 InstrItinClass itin>
464 : I<opcode, OL, asmstr, itin> {
465 bits<5> RT;
466
467 let Inst{6-10} = RT;
468 let Inst{11-20} = 0;
469 let Inst{21-30} = xo;
470 let Inst{31} = 0;
471}
472
473class XFXForm_5<bits<6> opcode, bits<10> xo, dag OL, string asmstr,
474 InstrItinClass itin>
475 : I<opcode, OL, asmstr, itin> {
476 bits<8> FXM;
477 bits<5> ST;
478
479 let Inst{6-10} = ST;
480 let Inst{11} = 0;
481 let Inst{12-19} = FXM;
482 let Inst{20} = 0;
483 let Inst{21-30} = xo;
484 let Inst{31} = 0;
485}
486
487class XFXForm_5a<bits<6> opcode, bits<10> xo, dag OL, string asmstr,
488 InstrItinClass itin>
489 : I<opcode, OL, asmstr, itin> {
490 bits<5> ST;
491 bits<8> FXM;
492
493 let Inst{6-10} = ST;
494 let Inst{11} = 1;
495 let Inst{12-19} = FXM;
496 let Inst{20} = 0;
497 let Inst{21-30} = xo;
498 let Inst{31} = 0;
499}
500
501class XFXForm_7<bits<6> opcode, bits<10> xo, dag OL, string asmstr,
502 InstrItinClass itin>
503 : XFXForm_1<opcode, xo, OL, asmstr, itin>;
504
505class XFXForm_7_ext<bits<6> opcode, bits<10> xo, bits<10> spr,
506 dag OL, string asmstr, InstrItinClass itin>
507 : XFXForm_7<opcode, xo, OL, asmstr, itin> {
508 let SPR = spr;
509}
510
511// 1.7.10 XS-Form - SRADI.
512class XSForm_1<bits<6> opcode, bits<9> xo, dag OL, string asmstr,
513 InstrItinClass itin, list<dag> pattern>
514 : I<opcode, OL, asmstr, itin> {
515 bits<5> A;
516 bits<5> RS;
517 bits<6> SH;
518
519 bit RC = 0; // set by isDOT
520 let Pattern = pattern;
521
522 let Inst{6-10} = RS;
523 let Inst{11-15} = A;
524 let Inst{16-20} = SH{4,3,2,1,0};
525 let Inst{21-29} = xo;
526 let Inst{30} = SH{5};
527 let Inst{31} = RC;
528}
529
530// 1.7.11 XO-Form
531class XOForm_1<bits<6> opcode, bits<9> xo, bit oe, dag OL, string asmstr,
532 InstrItinClass itin, list<dag> pattern>
533 : I<opcode, OL, asmstr, itin> {
534 bits<5> RT;
535 bits<5> RA;
536 bits<5> RB;
537
538 let Pattern = pattern;
539
540 bit RC = 0; // set by isDOT
541
542 let Inst{6-10} = RT;
543 let Inst{11-15} = RA;
544 let Inst{16-20} = RB;
545 let Inst{21} = oe;
546 let Inst{22-30} = xo;
547 let Inst{31} = RC;
548}
549
550class XOForm_3<bits<6> opcode, bits<9> xo, bit oe,
551 dag OL, string asmstr, InstrItinClass itin, list<dag> pattern>
552 : XOForm_1<opcode, xo, oe, OL, asmstr, itin, pattern> {
553 let RB = 0;
554}
555
556// 1.7.12 A-Form
557class AForm_1<bits<6> opcode, bits<5> xo, dag OL, string asmstr,
558 InstrItinClass itin, list<dag> pattern>
559 : I<opcode, OL, asmstr, itin> {
560 bits<5> FRT;
561 bits<5> FRA;
562 bits<5> FRC;
563 bits<5> FRB;
564
565 let Pattern = pattern;
566
567 bit RC = 0; // set by isDOT
568
569 let Inst{6-10} = FRT;
570 let Inst{11-15} = FRA;
571 let Inst{16-20} = FRB;
572 let Inst{21-25} = FRC;
573 let Inst{26-30} = xo;
574 let Inst{31} = RC;
575}
576
577class AForm_2<bits<6> opcode, bits<5> xo, dag OL, string asmstr,
578 InstrItinClass itin, list<dag> pattern>
579 : AForm_1<opcode, xo, OL, asmstr, itin, pattern> {
580 let FRC = 0;
581}
582
583class AForm_3<bits<6> opcode, bits<5> xo, dag OL, string asmstr,
584 InstrItinClass itin, list<dag> pattern>
585 : AForm_1<opcode, xo, OL, asmstr, itin, pattern> {
586 let FRB = 0;
587}
588
589// 1.7.13 M-Form
590class MForm_1<bits<6> opcode, dag OL, string asmstr,
591 InstrItinClass itin, list<dag> pattern>
592 : I<opcode, OL, asmstr, itin> {
593 bits<5> RA;
594 bits<5> RS;
595 bits<5> RB;
596 bits<5> MB;
597 bits<5> ME;
598
599 let Pattern = pattern;
600
601 bit RC = 0; // set by isDOT
602
603 let Inst{6-10} = RS;
604 let Inst{11-15} = RA;
605 let Inst{16-20} = RB;
606 let Inst{21-25} = MB;
607 let Inst{26-30} = ME;
608 let Inst{31} = RC;
609}
610
611class MForm_2<bits<6> opcode, dag OL, string asmstr,
612 InstrItinClass itin, list<dag> pattern>
613 : MForm_1<opcode, OL, asmstr, itin, pattern> {
614}
615
616// 1.7.14 MD-Form
617class MDForm_1<bits<6> opcode, bits<3> xo, dag OL, string asmstr,
618 InstrItinClass itin, list<dag> pattern>
619 : I<opcode, OL, asmstr, itin> {
620 bits<5> RA;
621 bits<5> RS;
622 bits<6> SH;
623 bits<6> MBE;
624
625 let Pattern = pattern;
626
627 bit RC = 0; // set by isDOT
628
629 let Inst{6-10} = RS;
630 let Inst{11-15} = RA;
631 let Inst{16-20} = SH{4,3,2,1,0};
632 let Inst{21-26} = MBE{4,3,2,1,0,5};
633 let Inst{27-29} = xo;
634 let Inst{30} = SH{5};
635 let Inst{31} = RC;
636}
637
638
639
640// E-1 VA-Form
641
642// VAForm_1 - DACB ordering.
643class VAForm_1<bits<6> xo, dag OL, string asmstr,
644 InstrItinClass itin, list<dag> pattern>
645 : I<4, OL, asmstr, itin> {
646 bits<5> VD;
647 bits<5> VA;
648 bits<5> VC;
649 bits<5> VB;
650
651 let Pattern = pattern;
652
653 let Inst{6-10} = VD;
654 let Inst{11-15} = VA;
655 let Inst{16-20} = VB;
656 let Inst{21-25} = VC;
657 let Inst{26-31} = xo;
658}
659
660// VAForm_1a - DABC ordering.
661class VAForm_1a<bits<6> xo, dag OL, string asmstr,
662 InstrItinClass itin, list<dag> pattern>
663 : I<4, OL, asmstr, itin> {
664 bits<5> VD;
665 bits<5> VA;
666 bits<5> VB;
667 bits<5> VC;
668
669 let Pattern = pattern;
670
671 let Inst{6-10} = VD;
672 let Inst{11-15} = VA;
673 let Inst{16-20} = VB;
674 let Inst{21-25} = VC;
675 let Inst{26-31} = xo;
676}
677
678class VAForm_2<bits<6> xo, dag OL, string asmstr,
679 InstrItinClass itin, list<dag> pattern>
680 : I<4, OL, asmstr, itin> {
681 bits<5> VD;
682 bits<5> VA;
683 bits<5> VB;
684 bits<4> SH;
685
686 let Pattern = pattern;
687
688 let Inst{6-10} = VD;
689 let Inst{11-15} = VA;
690 let Inst{16-20} = VB;
691 let Inst{21} = 0;
692 let Inst{22-25} = SH;
693 let Inst{26-31} = xo;
694}
695
696// E-2 VX-Form
697class VXForm_1<bits<11> xo, dag OL, string asmstr,
698 InstrItinClass itin, list<dag> pattern>
699 : I<4, OL, asmstr, itin> {
700 bits<5> VD;
701 bits<5> VA;
702 bits<5> VB;
703
704 let Pattern = pattern;
705
706 let Inst{6-10} = VD;
707 let Inst{11-15} = VA;
708 let Inst{16-20} = VB;
709 let Inst{21-31} = xo;
710}
711
712class VXForm_setzero<bits<11> xo, dag OL, string asmstr,
713 InstrItinClass itin, list<dag> pattern>
714 : VXForm_1<xo, OL, asmstr, itin, pattern> {
715 let VA = VD;
716 let VB = VD;
717}
718
719
720class VXForm_2<bits<11> xo, dag OL, string asmstr,
721 InstrItinClass itin, list<dag> pattern>
722 : I<4, OL, asmstr, itin> {
723 bits<5> VD;
724 bits<5> VB;
725
726 let Pattern = pattern;
727
728 let Inst{6-10} = VD;
729 let Inst{11-15} = 0;
730 let Inst{16-20} = VB;
731 let Inst{21-31} = xo;
732}
733
734class VXForm_3<bits<11> xo, dag OL, string asmstr,
735 InstrItinClass itin, list<dag> pattern>
736 : I<4, OL, asmstr, itin> {
737 bits<5> VD;
738 bits<5> IMM;
739
740 let Pattern = pattern;
741
742 let Inst{6-10} = VD;
743 let Inst{11-15} = IMM;
744 let Inst{16-20} = 0;
745 let Inst{21-31} = xo;
746}
747
748/// VXForm_4 - VX instructions with "VD,0,0" register fields, like mfvscr.
749class VXForm_4<bits<11> xo, dag OL, string asmstr,
750 InstrItinClass itin, list<dag> pattern>
751 : I<4, OL, asmstr, itin> {
752 bits<5> VD;
753
754 let Pattern = pattern;
755
756 let Inst{6-10} = VD;
757 let Inst{11-15} = 0;
758 let Inst{16-20} = 0;
759 let Inst{21-31} = xo;
760}
761
762/// VXForm_5 - VX instructions with "0,0,VB" register fields, like mtvscr.
763class VXForm_5<bits<11> xo, dag OL, string asmstr,
764 InstrItinClass itin, list<dag> pattern>
765 : I<4, OL, asmstr, itin> {
766 bits<5> VB;
767
768 let Pattern = pattern;
769
770 let Inst{6-10} = 0;
771 let Inst{11-15} = 0;
772 let Inst{16-20} = VB;
773 let Inst{21-31} = xo;
774}
775
776// E-4 VXR-Form
777class VXRForm_1<bits<10> xo, dag OL, string asmstr,
778 InstrItinClass itin, list<dag> pattern>
779 : I<4, OL, asmstr, itin> {
780 bits<5> VD;
781 bits<5> VA;
782 bits<5> VB;
783 bit RC = 0;
784
785 let Pattern = pattern;
786
787 let Inst{6-10} = VD;
788 let Inst{11-15} = VA;
789 let Inst{16-20} = VB;
790 let Inst{21} = RC;
791 let Inst{22-31} = xo;
792}
793
794//===----------------------------------------------------------------------===//
795class Pseudo<dag OL, string asmstr, list<dag> pattern>
796 : I<0, OL, asmstr, NoItinerary> {
797 let PPC64 = 0;
798 let Pattern = pattern;
799 let Inst{31-0} = 0;
800}