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gerrit-public.fairphone.software / platform / external / llvm / 901b5750b2af095bb0e359f4d2c3debef3ad57e6 / . / test / CodeGen / Thumb2 / machine-licm.ll
blob: 9ab19e9d5a618df395860d6191162a3f57902979 [file] [log] [blame]
Evan Chengef4c5b22009-11-20 02:10:27 +0000[diff] [blame]1; RUN: llc < %s -mtriple=thumbv7-apple-darwin -disable-fp-elim | FileCheck %s
2; RUN: llc < %s -mtriple=thumbv7-apple-darwin -relocation-model=pic -disable-fp-elim | FileCheck %s --check-prefix=PIC
Evan Cheng326d7242009-10-31 03:39:36 +0000[diff] [blame]3; rdar://7353541
Evan Chengca529232009-11-07 04:04:34 +0000[diff] [blame]4; rdar://7354376
Evan Cheng326d7242009-10-31 03:39:36 +0000[diff] [blame]5
6; The generated code is no where near ideal. It's not recognizing the two
7; constantpool entries being loaded can be merged into one.
8
9@GV = external global i32 ; <i32*> [#uses=2]
10
11define arm_apcscc void @t(i32* nocapture %vals, i32 %c) nounwind {
12entry:
Evan Cheng538da742009-10-31 23:46:45 +0000[diff] [blame]13; CHECK: t:
14; CHECK: cbz
Evan Cheng326d7242009-10-31 03:39:36 +0000[diff] [blame]15 %0 = icmp eq i32 %c, 0 ; <i1> [#uses=1]
16 br i1 %0, label %return, label %bb.nph
17
18bb.nph: ; preds = %entry
19; CHECK: BB#1
Evan Cheng626474d2009-11-07 03:52:02 +0000[diff] [blame]20; CHECK: ldr.n r2, LCPI1_0
Evan Cheng1004f952009-11-20 23:31:34 +0000[diff] [blame]21; CHECK: ldr r3, [r2]
22; CHECK: ldr r3, [r3]
23; CHECK: ldr r2, [r2]
Evan Cheng7921e582009-11-06 23:52:48 +0000[diff] [blame]24; CHECK: LBB1_2
Evan Cheng626474d2009-11-07 03:52:02 +0000[diff] [blame]25; CHECK: LCPI1_0:
26; CHECK-NOT: LCPI1_1:
27; CHECK: .section
Evan Chengef4c5b22009-11-20 02:10:27 +0000[diff] [blame]28
29; PIC: BB#1
30; PIC: ldr.n r2, LCPI1_0
31; PIC: add r2, pc
Evan Cheng1004f952009-11-20 23:31:34 +0000[diff] [blame]32; PIC: ldr r3, [r2]
33; PIC: ldr r3, [r3]
34; PIC: ldr r2, [r2]
Evan Chengef4c5b22009-11-20 02:10:27 +0000[diff] [blame]35; PIC: LBB1_2
36; PIC: LCPI1_0:
37; PIC-NOT: LCPI1_1:
38; PIC: .section
Evan Cheng326d7242009-10-31 03:39:36 +0000[diff] [blame]39 %.pre = load i32* @GV, align 4 ; <i32> [#uses=1]
40 br label %bb
41
42bb: ; preds = %bb, %bb.nph
43 %1 = phi i32 [ %.pre, %bb.nph ], [ %3, %bb ] ; <i32> [#uses=1]
44 %i.03 = phi i32 [ 0, %bb.nph ], [ %4, %bb ] ; <i32> [#uses=2]
45 %scevgep = getelementptr i32* %vals, i32 %i.03 ; <i32*> [#uses=1]
46 %2 = load i32* %scevgep, align 4 ; <i32> [#uses=1]
47 %3 = add nsw i32 %1, %2 ; <i32> [#uses=2]
48 store i32 %3, i32* @GV, align 4
49 %4 = add i32 %i.03, 1 ; <i32> [#uses=2]
50 %exitcond = icmp eq i32 %4, %c ; <i1> [#uses=1]
51 br i1 %exitcond, label %return, label %bb
52
53return: ; preds = %bb, %entry
54 ret void
55}