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gerrit-public.fairphone.software / platform / external / llvm / 9136782d273cd45b6f19a7d0cc0d146d0791bac9 / . / test / Transforms / InstSimplify / 2011-01-18-Compare.ll
blob: ed358443d6384c7f8bf45c4759770fb4b084a610 [file] [log] [blame]
Duncan Sands9d32f602011-01-20 13:21:55 +0000[diff] [blame]1; RUN: opt < %s -instsimplify -S | FileCheck %s
2target datalayout = "p:32:32"
3
4define i1 @ptrtoint() {
5; CHECK: @ptrtoint
6 %a = alloca i8
7 %tmp = ptrtoint i8* %a to i32
8 %r = icmp eq i32 %tmp, 0
9 ret i1 %r
10; CHECK: ret i1 false
11}
12
13define i1 @zext(i32 %x) {
14; CHECK: @zext
15 %e1 = zext i32 %x to i64
16 %e2 = zext i32 %x to i64
17 %r = icmp eq i64 %e1, %e2
18 ret i1 %r
19; CHECK: ret i1 true
20}
21
22define i1 @zext2(i1 %x) {
23; CHECK: @zext2
24 %e = zext i1 %x to i32
25 %c = icmp ne i32 %e, 0
26 ret i1 %c
27; CHECK: ret i1 %x
28}
29
Duncan Sandsd70d1a52011-01-25 09:38:29 +0000[diff] [blame]30define i1 @zext3() {
31; CHECK: @zext3
32 %e = zext i1 1 to i32
33 %c = icmp ne i32 %e, 0
34 ret i1 %c
35; CHECK: ret i1 true
36}
37
Duncan Sands9d32f602011-01-20 13:21:55 +0000[diff] [blame]38define i1 @sext(i32 %x) {
39; CHECK: @sext
40 %e1 = sext i32 %x to i64
41 %e2 = sext i32 %x to i64
42 %r = icmp eq i64 %e1, %e2
43 ret i1 %r
44; CHECK: ret i1 true
45}
46
47define i1 @sext2(i1 %x) {
48; CHECK: @sext2
49 %e = sext i1 %x to i32
50 %c = icmp ne i32 %e, 0
51 ret i1 %c
52; CHECK: ret i1 %x
53}
Duncan Sandsd70d1a52011-01-25 09:38:29 +0000[diff] [blame]54
55define i1 @sext3() {
56; CHECK: @sext3
57 %e = sext i1 1 to i32
58 %c = icmp ne i32 %e, 0
59 ret i1 %c
60; CHECK: ret i1 true
61}
62
63define i1 @add(i32 %x, i32 %y) {
Duncan Sands227fba12011-01-25 15:14:15 +0000[diff] [blame]64; CHECK: @add
Duncan Sandsd70d1a52011-01-25 09:38:29 +0000[diff] [blame]65 %l = lshr i32 %x, 1
Duncan Sands227fba12011-01-25 15:14:15 +0000[diff] [blame]66 %q = lshr i32 %y, 1
67 %r = or i32 %q, 1
Duncan Sandsd70d1a52011-01-25 09:38:29 +0000[diff] [blame]68 %s = add i32 %l, %r
69 %c = icmp eq i32 %s, 0
70 ret i1 %c
Duncan Sands227fba12011-01-25 15:14:15 +0000[diff] [blame]71; CHECK: ret i1 false
Duncan Sandsd70d1a52011-01-25 09:38:29 +0000[diff] [blame]72}
73
74define i1 @add2(i8 %x, i8 %y) {
75; CHECK: @add2
76 %l = or i8 %x, 128
77 %r = or i8 %y, 129
78 %s = add i8 %l, %r
79 %c = icmp eq i8 %s, 0
80 ret i1 %c
81; CHECK: ret i1 false
82}
83
Duncan Sands227fba12011-01-25 15:14:15 +0000[diff] [blame]84define i1 @add3(i8 %x, i8 %y) {
85; CHECK: @add3
86 %l = zext i8 %x to i32
87 %r = zext i8 %y to i32
88 %s = add i32 %l, %r
89 %c = icmp eq i32 %s, 0
90 ret i1 %c
91; CHECK: ret i1 %c
92}
93
Duncan Sandsd70d1a52011-01-25 09:38:29 +0000[diff] [blame]94define i1 @addpowtwo(i32 %x, i32 %y) {
95; CHECK: @addpowtwo
96 %l = lshr i32 %x, 1
97 %r = shl i32 1, %y
98 %s = add i32 %l, %r
99 %c = icmp eq i32 %s, 0
100 ret i1 %c
101; CHECK: ret i1 false
102}
103
104define i1 @or(i32 %x) {
105; CHECK: @or
106 %o = or i32 %x, 1
107 %c = icmp eq i32 %o, 0
108 ret i1 %c
109; CHECK: ret i1 false
110}
Duncan Sands91367822011-01-29 13:27:00 +0000[diff] [blame^]111
112define i1 @shl(i32 %x) {
113; CHECK: @shl
114 %s = shl i32 1, %x
115 %c = icmp eq i32 %s, 0
116 ret i1 %c
117; CHECK: ret i1 false
118}
119
120define i1 @lshr(i32 %x) {
121; CHECK: @lshr
122 %s = lshr i32 -1, %x
123 %c = icmp eq i32 %s, 0
124 ret i1 %c
125; CHECK: ret i1 false
126}
127
128define i1 @ashr(i32 %x) {
129; CHECK: @ashr
130 %s = ashr i32 -1, %x
131 %c = icmp eq i32 %s, 0
132 ret i1 %c
133; CHECK: ret i1 false
134}