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gerrit-public.fairphone.software / platform / external / llvm / a9790d739a7970dd516c57f56d67cf9aa01b9d39 / . / test / CodeGen / ARM / mul_const.ll
blob: 8c102464612cc5523224826adfbe8e0111f86ca7 [file] [log] [blame]
Dan Gohmanfce288f2009-09-09 00:09:15 +0000[diff] [blame]1; RUN: llc < %s -march=arm | FileCheck %s
Evan Chengaf9e7a72009-07-21 00:31:12 +0000[diff] [blame]2
Anton Korobeynikova9790d72010-05-15 18:16:59 +0000[diff] [blame^]3define i32 @t9(i32 %v) nounwind readnone {
Evan Chengaf9e7a72009-07-21 00:31:12 +0000[diff] [blame]4entry:
Anton Korobeynikova9790d72010-05-15 18:16:59 +0000[diff] [blame^]5; CHECK: t9:
Evan Chengaf9e7a72009-07-21 00:31:12 +0000[diff] [blame]6; CHECK: add r0, r0, r0, lsl #3
7 %0 = mul i32 %v, 9
8 ret i32 %0
9}
10
Anton Korobeynikova9790d72010-05-15 18:16:59 +0000[diff] [blame^]11define i32 @t7(i32 %v) nounwind readnone {
Evan Chengaf9e7a72009-07-21 00:31:12 +0000[diff] [blame]12entry:
Anton Korobeynikova9790d72010-05-15 18:16:59 +0000[diff] [blame^]13; CHECK: t7:
Evan Chengaf9e7a72009-07-21 00:31:12 +0000[diff] [blame]14; CHECK: rsb r0, r0, r0, lsl #3
15 %0 = mul i32 %v, 7
16 ret i32 %0
17}
Anton Korobeynikova9790d72010-05-15 18:16:59 +0000[diff] [blame^]18
19define i32 @t5(i32 %v) nounwind readnone {
20entry:
21; CHECK: t5:
22; CHECK: add r0, r0, r0, lsl #2
23 %0 = mul i32 %v, 5
24 ret i32 %0
25}
26
27define i32 @t3(i32 %v) nounwind readnone {
28entry:
29; CHECK: t3:
30; CHECK: add r0, r0, r0, lsl #1
31 %0 = mul i32 %v, 3
32 ret i32 %0
33}
34
35define i32 @t12288(i32 %v) nounwind readnone {
36entry:
37; CHECK: t12288:
38; CHECK: add r0, r0, r0, lsl #1
39; CHECK: mov r0, r0, lsl #12
40 %0 = mul i32 %v, 12288
41 ret i32 %0
42}
43