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Evan Chenge279f592012-03-26 23:31:00 +00001; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-a8 | FileCheck %s
2
3; ARM has a peephole optimization which looks for a def / use pair. The def
4; produces a 32-bit immediate which is consumed by the use. It tries to
5; fold the immediate by breaking it into two parts and fold them into the
6; immmediate fields of two uses. e.g
7; movw r2, #40885
8; movt r3, #46540
9; add r0, r0, r3
10; =>
11; add.w r0, r0, #3019898880
12; add.w r0, r0, #30146560
13;
14; However, this transformation is incorrect if the user produces a flag. e.g.
15; movw r2, #40885
16; movt r3, #46540
17; adds r0, r0, r3
18; =>
19; add.w r0, r0, #3019898880
20; adds.w r0, r0, #30146560
21; Note the adds.w may not set the carry flag even if the original sequence
22; would.
23;
24; rdar://11116189
25define i64 @t(i64 %aInput) nounwind {
26; CHECK: t:
27; CHECK: movs [[REG:(r[0-9]+)]], #0
28; CHECK: movt [[REG]], #46540
29; CHECK: adds r{{[0-9]+}}, r{{[0-9]+}}, [[REG]]
30 %1 = mul i64 %aInput, 1000000
31 %2 = add i64 %1, -7952618389194932224
32 ret i64 %2
33}