blob: 4e227dd5be368aef7c8445ff0d275dcdf3bfa932 [file] [log] [blame]
Chandler Carruth32d75be2012-07-18 18:58:22 +00001; Tests for the two-address instruction pass.
2; RUN: llc -march=arm -mcpu=cortex-a9 < %s | FileCheck %s
3
4define void @PR13378() nounwind {
5; This was orriginally a crasher trying to schedule the instructions.
6; CHECK: PR13378:
7; CHECK: vldmia
8; CHECK-NEXT: vmov.f32
9; CHECK-NEXT: vstmia
10; CHECK-NEXT: vstmia
11; CHECK-NEXT: vmov.f32
12; CHECK-NEXT: vstmia
13
14entry:
15 %0 = load <4 x float>* undef
16 store <4 x float> zeroinitializer, <4 x float>* undef
17 store <4 x float> %0, <4 x float>* undef
18 %1 = insertelement <4 x float> %0, float 1.000000e+00, i32 3
19 store <4 x float> %1, <4 x float>* undef
20 unreachable
21}