blob: 0ac971c58c5b8a9eefab9359f701602ae9a761c5 [file] [log] [blame]
Dan Gohmanb7c0b242009-09-11 18:36:27 +00001; RUN: llc < %s -march=cellspu > %t1.s
Scott Michel7a1c9e92008-11-22 23:50:42 +00002; RUN: grep shufb %t1.s | count 39
Scott Michel104de432008-11-24 17:11:17 +00003; RUN: grep ilhu %t1.s | count 27
4; RUN: grep iohl %t1.s | count 27
Scott Michel7a1c9e92008-11-22 23:50:42 +00005; RUN: grep lqa %t1.s | count 10
Scott Michel97d0a602008-11-25 01:30:37 +00006; RUN: grep shlqby %t1.s | count 12
Scott Michel104de432008-11-24 17:11:17 +00007; RUN: grep 515 %t1.s | count 1
Scott Michel7a1c9e92008-11-22 23:50:42 +00008; RUN: grep 1029 %t1.s | count 2
9; RUN: grep 1543 %t1.s | count 2
10; RUN: grep 2057 %t1.s | count 2
11; RUN: grep 2571 %t1.s | count 2
12; RUN: grep 3085 %t1.s | count 2
13; RUN: grep 3599 %t1.s | count 2
14; RUN: grep 32768 %t1.s | count 1
15; RUN: grep 32769 %t1.s | count 1
16; RUN: grep 32770 %t1.s | count 1
17; RUN: grep 32771 %t1.s | count 1
18; RUN: grep 32772 %t1.s | count 1
19; RUN: grep 32773 %t1.s | count 1
20; RUN: grep 32774 %t1.s | count 1
21; RUN: grep 32775 %t1.s | count 1
22; RUN: grep 32776 %t1.s | count 1
23; RUN: grep 32777 %t1.s | count 1
24; RUN: grep 32778 %t1.s | count 1
25; RUN: grep 32779 %t1.s | count 1
26; RUN: grep 32780 %t1.s | count 1
27; RUN: grep 32781 %t1.s | count 1
28; RUN: grep 32782 %t1.s | count 1
29; RUN: grep 32783 %t1.s | count 1
30; RUN: grep 32896 %t1.s | count 24
31
Scott Michel9de5d0d2008-01-11 02:53:15 +000032target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
33target triple = "spu"
Scott Michel0e5665b2007-12-19 21:17:42 +000034
35define i32 @i32_extract_0(<4 x i32> %v) {
36entry:
37 %a = extractelement <4 x i32> %v, i32 0
38 ret i32 %a
39}
40
41define i32 @i32_extract_1(<4 x i32> %v) {
42entry:
43 %a = extractelement <4 x i32> %v, i32 1
44 ret i32 %a
45}
46
47define i32 @i32_extract_2(<4 x i32> %v) {
48entry:
49 %a = extractelement <4 x i32> %v, i32 2
50 ret i32 %a
51}
52
53define i32 @i32_extract_3(<4 x i32> %v) {
54entry:
55 %a = extractelement <4 x i32> %v, i32 3
56 ret i32 %a
57}
58
59define i16 @i16_extract_0(<8 x i16> %v) {
60entry:
61 %a = extractelement <8 x i16> %v, i32 0
62 ret i16 %a
63}
64
65define i16 @i16_extract_1(<8 x i16> %v) {
66entry:
67 %a = extractelement <8 x i16> %v, i32 1
68 ret i16 %a
69}
70
71define i16 @i16_extract_2(<8 x i16> %v) {
72entry:
73 %a = extractelement <8 x i16> %v, i32 2
74 ret i16 %a
75}
76
77define i16 @i16_extract_3(<8 x i16> %v) {
78entry:
79 %a = extractelement <8 x i16> %v, i32 3
80 ret i16 %a
81}
82
83define i16 @i16_extract_4(<8 x i16> %v) {
84entry:
85 %a = extractelement <8 x i16> %v, i32 4
86 ret i16 %a
87}
88
89define i16 @i16_extract_5(<8 x i16> %v) {
90entry:
91 %a = extractelement <8 x i16> %v, i32 5
92 ret i16 %a
93}
94
95define i16 @i16_extract_6(<8 x i16> %v) {
96entry:
97 %a = extractelement <8 x i16> %v, i32 6
98 ret i16 %a
99}
100
101define i16 @i16_extract_7(<8 x i16> %v) {
102entry:
103 %a = extractelement <8 x i16> %v, i32 7
104 ret i16 %a
105}
106
107define i8 @i8_extract_0(<16 x i8> %v) {
108entry:
109 %a = extractelement <16 x i8> %v, i32 0
110 ret i8 %a
111}
112
113define i8 @i8_extract_1(<16 x i8> %v) {
114entry:
115 %a = extractelement <16 x i8> %v, i32 1
116 ret i8 %a
117}
118
119define i8 @i8_extract_2(<16 x i8> %v) {
120entry:
121 %a = extractelement <16 x i8> %v, i32 2
122 ret i8 %a
123}
124
125define i8 @i8_extract_3(<16 x i8> %v) {
126entry:
127 %a = extractelement <16 x i8> %v, i32 3
128 ret i8 %a
129}
130
131define i8 @i8_extract_4(<16 x i8> %v) {
132entry:
133 %a = extractelement <16 x i8> %v, i32 4
134 ret i8 %a
135}
136
137define i8 @i8_extract_5(<16 x i8> %v) {
138entry:
139 %a = extractelement <16 x i8> %v, i32 5
140 ret i8 %a
141}
142
143define i8 @i8_extract_6(<16 x i8> %v) {
144entry:
145 %a = extractelement <16 x i8> %v, i32 6
146 ret i8 %a
147}
148
149define i8 @i8_extract_7(<16 x i8> %v) {
150entry:
151 %a = extractelement <16 x i8> %v, i32 7
152 ret i8 %a
153}
154
155define i8 @i8_extract_8(<16 x i8> %v) {
156entry:
157 %a = extractelement <16 x i8> %v, i32 8
158 ret i8 %a
159}
160
161define i8 @i8_extract_9(<16 x i8> %v) {
162entry:
163 %a = extractelement <16 x i8> %v, i32 9
164 ret i8 %a
165}
166
167define i8 @i8_extract_10(<16 x i8> %v) {
168entry:
169 %a = extractelement <16 x i8> %v, i32 10
170 ret i8 %a
171}
172
173define i8 @i8_extract_11(<16 x i8> %v) {
174entry:
175 %a = extractelement <16 x i8> %v, i32 11
176 ret i8 %a
177}
178
179define i8 @i8_extract_12(<16 x i8> %v) {
180entry:
181 %a = extractelement <16 x i8> %v, i32 12
182 ret i8 %a
183}
184
185define i8 @i8_extract_13(<16 x i8> %v) {
186entry:
187 %a = extractelement <16 x i8> %v, i32 13
188 ret i8 %a
189}
190
191define i8 @i8_extract_14(<16 x i8> %v) {
192entry:
193 %a = extractelement <16 x i8> %v, i32 14
194 ret i8 %a
195}
196
197define i8 @i8_extract_15(<16 x i8> %v) {
198entry:
199 %a = extractelement <16 x i8> %v, i32 15
200 ret i8 %a
201}
Scott Michel7a1c9e92008-11-22 23:50:42 +0000202
203;;--------------------------------------------------------------------------
204;; extract element, variable index:
205;;--------------------------------------------------------------------------
206
207define i8 @extract_varadic_i8(i32 %i) nounwind readnone {
208entry:
209 %0 = extractelement <16 x i8> < i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>, i32 %i
210 ret i8 %0
211}
212
213define i8 @extract_varadic_i8_1(<16 x i8> %v, i32 %i) nounwind readnone {
214entry:
215 %0 = extractelement <16 x i8> %v, i32 %i
216 ret i8 %0
217}
218
219define i16 @extract_varadic_i16(i32 %i) nounwind readnone {
220entry:
221 %0 = extractelement <8 x i16> < i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7>, i32 %i
222 ret i16 %0
223}
224
225define i16 @extract_varadic_i16_1(<8 x i16> %v, i32 %i) nounwind readnone {
226entry:
227 %0 = extractelement <8 x i16> %v, i32 %i
228 ret i16 %0
229}
230
231define i32 @extract_varadic_i32(i32 %i) nounwind readnone {
232entry:
233 %0 = extractelement <4 x i32> < i32 0, i32 1, i32 2, i32 3>, i32 %i
234 ret i32 %0
235}
236
237define i32 @extract_varadic_i32_1(<4 x i32> %v, i32 %i) nounwind readnone {
238entry:
239 %0 = extractelement <4 x i32> %v, i32 %i
240 ret i32 %0
241}
242
243define float @extract_varadic_f32(i32 %i) nounwind readnone {
244entry:
245 %0 = extractelement <4 x float> < float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00 >, i32 %i
246 ret float %0
247}
248
249define float @extract_varadic_f32_1(<4 x float> %v, i32 %i) nounwind readnone {
250entry:
251 %0 = extractelement <4 x float> %v, i32 %i
252 ret float %0
253}
254
255define i64 @extract_varadic_i64(i32 %i) nounwind readnone {
256entry:
257 %0 = extractelement <2 x i64> < i64 0, i64 1>, i32 %i
258 ret i64 %0
259}
260
261define i64 @extract_varadic_i64_1(<2 x i64> %v, i32 %i) nounwind readnone {
262entry:
263 %0 = extractelement <2 x i64> %v, i32 %i
264 ret i64 %0
265}
266
267define double @extract_varadic_f64(i32 %i) nounwind readnone {
268entry:
269 %0 = extractelement <2 x double> < double 1.000000e+00, double 2.000000e+00>, i32 %i
270 ret double %0
271}
272
273define double @extract_varadic_f64_1(<2 x double> %v, i32 %i) nounwind readnone {
274entry:
275 %0 = extractelement <2 x double> %v, i32 %i
276 ret double %0
277}