blob: a5e13d5a26aec70f215ceb25b98a71fd80abb8a2 [file] [log] [blame]
Devang Patelff7767d2007-11-05 19:32:30 +00001; RUN: llvm-as < %s | opt -disable-output -loop-unroll
2; PR1770
3 %struct.cl_engine = type { i32, i16, i32, i8**, i8**, i8*, i8*, i8*, i8*, i8*, i8*, i8* }
4 %struct.cl_limits = type { i32, i32, i32, i32, i16, i64 }
5 %struct.cli_ac_alt = type { i8, i8*, i16, i16, %struct.cli_ac_alt* }
6 %struct.cli_ac_node = type { i8, i8, %struct.cli_ac_patt*, %struct.cli_ac_node**, %struct.cli_ac_node* }
7 %struct.cli_ac_patt = type { i16*, i16*, i16, i16, i8, i32, i32, i8*, i8*, i32, i16, i16, i16, i16, %struct.cli_ac_alt**, i8, i16, %struct.cli_ac_patt*, %struct.cli_ac_patt* }
8 %struct.cli_bm_patt = type { i8*, i32, i8*, i8*, i8, %struct.cli_bm_patt* }
9 %struct.cli_ctx = type { i8**, i64*, %struct.cli_matcher*, %struct.cl_engine*, %struct.cl_limits*, i32, i32, i32, i32, %struct.cli_dconf* }
10 %struct.cli_dconf = type { i32, i32, i32, i32, i32, i32, i32 }
11 %struct.cli_matcher = type { i16, i8, i32*, %struct.cli_bm_patt**, i32*, i32, i8, i8, %struct.cli_ac_node*, %struct.cli_ac_node**, %struct.cli_ac_patt**, i32, i32, i32 }
12
13declare i8* @calloc(i64, i64)
14
15define fastcc i32 @cli_scanpe(i32 %desc, %struct.cli_ctx* %ctx) {
16entry:
17 br i1 false, label %cond_next17, label %cond_true14
18
19cond_true14: ; preds = %entry
20 ret i32 0
21
22cond_next17: ; preds = %entry
23 br i1 false, label %LeafBlock, label %LeafBlock1250
24
25LeafBlock1250: ; preds = %cond_next17
26 ret i32 0
27
28LeafBlock: ; preds = %cond_next17
29 br i1 false, label %cond_next33, label %cond_true30
30
31cond_true30: ; preds = %LeafBlock
32 ret i32 0
33
34cond_next33: ; preds = %LeafBlock
35 br i1 false, label %cond_next90, label %cond_true42
36
37cond_true42: ; preds = %cond_next33
38 ret i32 0
39
40cond_next90: ; preds = %cond_next33
41 br i1 false, label %cond_next100, label %cond_true97
42
43cond_true97: ; preds = %cond_next90
44 ret i32 0
45
46cond_next100: ; preds = %cond_next90
47 br i1 false, label %cond_next109, label %cond_true106
48
49cond_true106: ; preds = %cond_next100
50 ret i32 0
51
52cond_next109: ; preds = %cond_next100
53 br i1 false, label %cond_false, label %cond_true118
54
55cond_true118: ; preds = %cond_next109
56 ret i32 0
57
58cond_false: ; preds = %cond_next109
59 br i1 false, label %NodeBlock1482, label %cond_true126
60
61cond_true126: ; preds = %cond_false
62 ret i32 0
63
64NodeBlock1482: ; preds = %cond_false
65 br i1 false, label %cond_next285, label %NodeBlock1480
66
67NodeBlock1480: ; preds = %NodeBlock1482
68 ret i32 0
69
70cond_next285: ; preds = %NodeBlock1482
71 br i1 false, label %cond_next320, label %cond_true294
72
73cond_true294: ; preds = %cond_next285
74 ret i32 0
75
76cond_next320: ; preds = %cond_next285
77 br i1 false, label %LeafBlock1491, label %LeafBlock1493
78
79LeafBlock1493: ; preds = %cond_next320
80 ret i32 0
81
82LeafBlock1491: ; preds = %cond_next320
83 br i1 false, label %cond_true400, label %cond_true378
84
85cond_true378: ; preds = %LeafBlock1491
86 ret i32 1
87
88cond_true400: ; preds = %LeafBlock1491
89 br i1 false, label %cond_next413, label %cond_true406
90
91cond_true406: ; preds = %cond_true400
92 ret i32 0
93
94cond_next413: ; preds = %cond_true400
95 br i1 false, label %cond_next429, label %cond_true424
96
97cond_true424: ; preds = %cond_next413
98 ret i32 0
99
100cond_next429: ; preds = %cond_next413
101 br i1 false, label %NodeBlock1557, label %NodeBlock1579
102
103NodeBlock1579: ; preds = %cond_next429
104 ret i32 0
105
106NodeBlock1557: ; preds = %cond_next429
107 br i1 false, label %LeafBlock1543, label %NodeBlock1555
108
109NodeBlock1555: ; preds = %NodeBlock1557
110 ret i32 0
111
112LeafBlock1543: ; preds = %NodeBlock1557
113 br i1 false, label %cond_next870, label %cond_next663
114
115cond_next663: ; preds = %LeafBlock1543
116 ret i32 0
117
118cond_next870: ; preds = %LeafBlock1543
119 br i1 false, label %cond_true1012, label %cond_true916
120
121cond_true916: ; preds = %cond_next870
122 ret i32 0
123
124cond_true1012: ; preds = %cond_next870
125 br i1 false, label %cond_next3849, label %cond_true2105
126
127cond_true2105: ; preds = %cond_true1012
128 ret i32 0
129
130cond_next3849: ; preds = %cond_true1012
131 br i1 false, label %cond_next4378, label %bb6559
132
133bb3862: ; preds = %cond_next4385
134 br i1 false, label %cond_false3904, label %cond_true3876
135
136cond_true3876: ; preds = %bb3862
137 ret i32 0
138
139cond_false3904: ; preds = %bb3862
140 br i1 false, label %cond_next4003, label %cond_true3935
141
142cond_true3935: ; preds = %cond_false3904
143 ret i32 0
144
145cond_next4003: ; preds = %cond_false3904
146 br i1 false, label %cond_next5160, label %cond_next4015
147
148cond_next4015: ; preds = %cond_next4003
149 ret i32 0
150
151cond_next4378: ; preds = %cond_next3849
152 br i1 false, label %cond_next4385, label %bb4393
153
154cond_next4385: ; preds = %cond_next4378
155 br i1 false, label %bb3862, label %bb4393
156
157bb4393: ; preds = %cond_next4385, %cond_next4378
158 ret i32 0
159
160cond_next5160: ; preds = %cond_next4003
161 br i1 false, label %bb5188, label %bb6559
162
163bb5188: ; preds = %cond_next5160
164 br i1 false, label %cond_next5285, label %cond_true5210
165
166cond_true5210: ; preds = %bb5188
167 ret i32 0
168
169cond_next5285: ; preds = %bb5188
170 br i1 false, label %cond_true5302, label %cond_true5330
171
172cond_true5302: ; preds = %cond_next5285
173 br i1 false, label %bb7405, label %bb7367
174
175cond_true5330: ; preds = %cond_next5285
176 ret i32 0
177
178bb6559: ; preds = %cond_next5160, %cond_next3849
179 ret i32 0
180
181bb7367: ; preds = %cond_true5302
182 ret i32 0
183
184bb7405: ; preds = %cond_true5302
185 br i1 false, label %cond_next8154, label %cond_true7410
186
187cond_true7410: ; preds = %bb7405
188 ret i32 0
189
190cond_next8154: ; preds = %bb7405
191 br i1 false, label %cond_true8235, label %bb9065
192
193cond_true8235: ; preds = %cond_next8154
194 br i1 false, label %bb8274, label %bb8245
195
196bb8245: ; preds = %cond_true8235
197 ret i32 0
198
199bb8274: ; preds = %cond_true8235
200 br i1 false, label %cond_next8358, label %cond_true8295
201
202cond_true8295: ; preds = %bb8274
203 ret i32 0
204
205cond_next8358: ; preds = %bb8274
206 br i1 false, label %cond_next.i509, label %cond_true8371
207
208cond_true8371: ; preds = %cond_next8358
209 ret i32 -123
210
211cond_next.i509: ; preds = %cond_next8358
212 br i1 false, label %bb36.i, label %bb33.i
213
214bb33.i: ; preds = %cond_next.i509
215 ret i32 0
216
217bb36.i: ; preds = %cond_next.i509
218 br i1 false, label %cond_next54.i, label %cond_true51.i
219
220cond_true51.i: ; preds = %bb36.i
221 ret i32 0
222
223cond_next54.i: ; preds = %bb36.i
224 %tmp10.i.i527 = call i8* @calloc( i64 0, i64 1 ) ; <i8*> [#uses=1]
225 br i1 false, label %cond_next11.i.i, label %bb132.i
226
227bb132.i: ; preds = %cond_next54.i
228 ret i32 0
229
230cond_next11.i.i: ; preds = %cond_next54.i
231 br i1 false, label %bb32.i.i545, label %cond_true1008.critedge.i
232
233bb32.i.i545: ; preds = %cond_next11.i.i
234 br i1 false, label %cond_next349.i, label %cond_true184.i
235
236cond_true184.i: ; preds = %bb32.i.i545
237 ret i32 0
238
239cond_next349.i: ; preds = %bb32.i.i545
240 br i1 false, label %cond_next535.i, label %cond_true1008.critedge1171.i
241
242cond_next535.i: ; preds = %cond_next349.i
243 br i1 false, label %cond_next569.i, label %cond_false574.i
244
245cond_next569.i: ; preds = %cond_next535.i
246 br i1 false, label %cond_next670.i, label %cond_true1008.critedge1185.i
247
248cond_false574.i: ; preds = %cond_next535.i
249 ret i32 0
250
251cond_next670.i: ; preds = %cond_next569.i
252 br i1 false, label %cond_true692.i, label %cond_next862.i
253
254cond_true692.i: ; preds = %cond_next670.i
255 br i1 false, label %cond_false742.i, label %cond_true718.i
256
257cond_true718.i: ; preds = %cond_true692.i
258 ret i32 0
259
260cond_false742.i: ; preds = %cond_true692.i
261 br i1 false, label %cond_true784.i, label %cond_next9079
262
263cond_true784.i: ; preds = %cond_next811.i, %cond_false742.i
264 %indvar1411.i.reg2mem.0 = phi i8 [ %indvar.next1412.i, %cond_next811.i ], [ 0, %cond_false742.i ] ; <i8> [#uses=1]
265 br i1 false, label %cond_true1008.critedge1190.i, label %cond_next811.i
266
267cond_next811.i: ; preds = %cond_true784.i
268 %indvar.next1412.i = add i8 %indvar1411.i.reg2mem.0, 1 ; <i8> [#uses=2]
269 %tmp781.i = icmp eq i8 %indvar.next1412.i, 3 ; <i1> [#uses=1]
270 br i1 %tmp781.i, label %cond_next9079, label %cond_true784.i
271
272cond_next862.i: ; preds = %cond_next670.i
273 ret i32 0
274
275cond_true1008.critedge.i: ; preds = %cond_next11.i.i
276 ret i32 0
277
278cond_true1008.critedge1171.i: ; preds = %cond_next349.i
279 ret i32 0
280
281cond_true1008.critedge1185.i: ; preds = %cond_next569.i
282 ret i32 0
283
284cond_true1008.critedge1190.i: ; preds = %cond_true784.i
285 %tmp621.i532.lcssa610 = phi i8* [ %tmp10.i.i527, %cond_true784.i ] ; <i8*> [#uses=0]
286 ret i32 0
287
288bb9065: ; preds = %cond_next8154
289 ret i32 0
290
291cond_next9079: ; preds = %cond_next811.i, %cond_false742.i
292 ret i32 0
293}