- 4f1c33f Move merge code into new helper function. by Anton Korobeynikov · 17 years ago
- 75b4e46 Added storeRegToAddr, loadRegFromAddr, and unfoldMemoryOperand's. by Evan Cheng · 17 years ago
- 7f3394f Refactor code to add load / store folded instructions -> register only by Evan Cheng · 17 years ago
- e5f6204 Enabling new condition code modeling scheme. by Evan Cheng · 17 years ago
- 8248294 TargetAsmInfo::getAddressSize() was incorrect for x86-64 and 64-bit targets by Dan Gohman · 17 years ago
- 3f2d9ec Use GR64 in 64-bit mode. by Evan Cheng · 17 years ago
- ff11026 - Added MRegisterInfo::getCrossCopyRegClass() hook. For register classes where reg to reg copies are not possible, this returns another register class which registers in the specified register class can be copied to (and copy back from). by Evan Cheng · 17 years ago
- 9efce63 Allow copyRegToReg to emit cross register classes copies. by Evan Cheng · 17 years ago
- 29be848 Correctly restore stack pointer after realignment in main() on Cygwin/Mingw32 by Anton Korobeynikov · 17 years ago
- fdd0837 Missing load / store folding entries. by Evan Cheng · 17 years ago
- 0488db9 Added support for new condition code modeling scheme (i.e. physical register dependency). These are a bunch of instructions that are duplicated so the x86 backend can support both the old and new schemes at the same time. They will be deleted after by Evan Cheng · 17 years ago
- 5e6e93e The code that used the StartLabelId label was removed, so remove the by Dan Gohman · 17 years ago
- a4ddacf Fix several more entries in the x86 reload/remat folding tables. by Dan Gohman · 17 years ago
- fab7eff PSHUFDmi, etc. are actually folding a load, not a store. by Evan Cheng · 17 years ago
- 869b2b2 Move the entries for 64-bit CMP, IMUL, and a few others into the correct by Dan Gohman · 17 years ago
- ca8035e Remove RSTRegClass case from loadRegFromStackSlot by Dale Johannesen · 17 years ago
- 9e3d3ab Remove the assumption that FP's are either float or by Dale Johannesen · 17 years ago
- 92dfe20 Remove isReg, isImm, and isMBB, and change all their users to use by Dan Gohman · 17 years ago
- b0869ed It's not safe to rematerialize MOV32r0 etc. by simply cloning the original by Evan Cheng · 17 years ago
- 718cb66 Add lengthof and endof templates that hide a lot of sizeof computations. by Owen Anderson · 17 years ago
- f4c3a59 Added support to fold X86 load / store instructions. This allow rematerialized loads to be folded into their uses. by Evan Cheng · 17 years ago
- ee46574 Move getX86RegNum into X86RegisterInfo and use it by Duncan Sands · 17 years ago
- fcc8793 Make sure epilogue esp adjustment is placed before any terminator and pop instructions. by Evan Cheng · 17 years ago
- d97b8cd Heal EH handling stuff by emitting correct offsets to callee-saved registers. by Anton Korobeynikov · 17 years ago
- 64d80e3 Change instruction description to split OperandList into OutOperandList and by Evan Cheng · 17 years ago
- 7e7bbf8 Only adjust esp around calls in presence of alloca. by Evan Cheng · 17 years ago
- 3c46eef Use MOV instead of LEA to restore ESP if callee-saved frame size is 0; if previous instruction updates esp, fold it in. by Evan Cheng · 17 years ago
- 9b8c674 Fold prologue esp update when possible. by Evan Cheng · 17 years ago
- 5b3332c Make sure not to break eh_return. by Evan Cheng · 17 years ago
- f27795d Missed the case where alloca is used but the stack size (not including callee-saved portion) is zero. Thanks Dan. by Evan Cheng · 17 years ago
- 89d1659 Use push / pop for prologues and epilogues. by Evan Cheng · 17 years ago
- 2365f51 Long live the exception handling! by Anton Korobeynikov · 17 years ago
- 2038252 Define non-intrinsic instructions for vector min, max, sqrt, rsqrt, and rcp, by Dan Gohman · 17 years ago
- e377d4d Refactor X87 instructions. As a side effect, all their names are changed. by Dale Johannesen · 17 years ago
- 849f214 Fix for PR 1505 (and 1489). Rewrite X87 register by Dale Johannesen · 17 years ago
- 0ff3ca4 More DWARF-related things cleanup: by Anton Korobeynikov · 17 years ago
- ce3b465 Emit correct register move information in eh frames for X86. This allows Shootout-C++/except to pass on x86/linux by Anton Korobeynikov · 17 years ago
- 038082d Emit correct DWARF reg # for RA (return address) register by Anton Korobeynikov · 17 years ago
- 97de913 eliminateFrameIndex() change. by Evan Cheng · 17 years ago
- a24dddd Fix for PR1348. If stack inc / dec amount is > 32-bits, issue a series of add / sub instructions. by Evan Cheng · 17 years ago
- 7c6eefa do the multiplication as signed, so that 2*-2 == -4 instead of 4294967292 by Chris Lattner · 17 years ago
- ea84c5e support for >4G stack frames by Chris Lattner · 17 years ago
- 6180780 support >4G stack frames by Chris Lattner · 17 years ago
- b53e98e Add the PADDQ to the list. by Bill Wendling · 17 years ago
- d15dff2 rename X86FunctionInfo to X86MachineFunctionInfo to match the header file by Chris Lattner · 17 years ago
- 57fc00d Implemented correct stack probing on mingw/cygwin for dynamic alloca's. by Anton Korobeynikov · 17 years ago
- c9c9d2d Changed to new MMX_ recipes. by Bill Wendling · 17 years ago
- bf2c8b3 Added MRegisterInfo hook to re-materialize an instruction. by Evan Cheng · 18 years ago
- 2f88dcd Added "padd*" support for MMX. Added MMX move stuff to X86InstrInfo so that by Bill Wendling · 18 years ago
- 5e6df46 PEI now passes a RegScavenger ptr to eliminateFrameIndex. by Evan Cheng · 18 years ago
- 0fa1b6d By default, spills kills the register being stored. by Evan Cheng · 18 years ago
- 62819f3 Support to provide exception and selector registers. by Jim Laskey · 18 years ago
- b371f45 Re-apply my liveintervalanalysis changes. Now with PR1207 fixes. by Evan Cheng · 18 years ago
- a284cbf For PR1207: by Reid Spencer · 18 years ago
- eceada6 Added getReservedRegs(). by Evan Cheng · 18 years ago
- e078d1a Only gather frame info if debug or eh. by Jim Laskey · 18 years ago
- 072200c Landing pad-less eh for PPC. by Jim Laskey · 18 years ago
- 44c3b9f Change the MachineDebugInfo to MachineModuleInfo to better reflect usage by Jim Laskey · 18 years ago
- 1ee2925 Make LABEL a builtin opcode. by Jim Laskey · 18 years ago
- 0e41094 Call frames for intel. by Jim Laskey · 18 years ago
- 7ac947d 80 columns by Jim Laskey · 18 years ago
- 367372a PEI is now responsible for adding MaxCallFrameSize to frame size and align the stack. Each target can further adjust the frame size if necessary. by Evan Cheng · 18 years ago
- dc77540 hasFP() is now a virtual method of MRegisterInfo. by Evan Cheng · 18 years ago
- 2bd7b2b One more try... by Evan Cheng · 18 years ago
- 5ad334f Last check-in was bogus. There is no need to align the stack if the function is a leaf function (and without alloca). by Evan Cheng · 18 years ago
- 0327863 Backend is reponsible for aligning the stack. by Evan Cheng · 18 years ago
- 7f70559 * PIC codegen for X86/Linux has been implemented by Anton Korobeynikov · 18 years ago
- 317848f Really big cleanup. by Anton Korobeynikov · 18 years ago
- c2b861d Fix naming inconsistency. by Evan Cheng · 18 years ago
- 21b7612 f64 <-> i64 bit_convert using movq in 64-bit mode. by Evan Cheng · 18 years ago
- 0e8dbc6 Added MOVSS2DIrr and MOVDI2SSrr to foldMemeoryOperand(). by Evan Cheng · 18 years ago
- f5da133 What should be the last unnecessary <iostream>s in the library. by Bill Wendling · 18 years ago
- 51cdcd1 MI keeps a ptr of TargetInstrDescriptor, use it. by Evan Cheng · 18 years ago
- ba59a1e Match TargetInstrInfo changes. by Evan Cheng · 18 years ago
- c0f64ff Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead by Evan Cheng · 18 years ago
- 9dea41d Hopefully a good crack at making debugging work on intel -disable-fp-elim. by Jim Laskey · 18 years ago
- ebf01d6 Correct instructions for moving data between GR64 and SSE registers; also correct load i64 / store i64 from v2i64. by Evan Cheng · 18 years ago
- 6ce7dc2 Properly transfer kill / dead info. by Evan Cheng · 18 years ago
- 7ce4578 Matches MachineInstr changes. by Evan Cheng · 18 years ago
- 50b3b50 Fix a potential bug. by Evan Cheng · 18 years ago
- 438f7bc Add implicit def / use operands to MachineInstr. by Evan Cheng · 18 years ago
- 171d09e Use TargetInstrInfo::getNumOperands() instead of MachineInstr::getNumOperands(). In preparation for implicit reg def/use changes. by Evan Cheng · 18 years ago
- a1fd650 Remove M_2_ADDR_FLAG. by Evan Cheng · 18 years ago
- bdd371c Dead code. by Evan Cheng · 18 years ago
- f10c17f Delete dead code; fix 80 col violations. by Evan Cheng · 18 years ago
- bcb9770 Added some eye-candy for Subtarget type checking by Anton Korobeynikov · 18 years ago
- 6f34b43 Fixed a FuseTwoAddrInst() bug: consider GlobalAddress and JumpTableIndex by Evan Cheng · 18 years ago
- 25ab690 Committing X86-64 support. by Evan Cheng · 18 years ago
- b14ca60 Some notes on better load folding we could do by Chris Lattner · 18 years ago
- 2f5993b Fix a few dejagnu failures. e.g. fast-cc-merge-stack-adj.ll by Evan Cheng · 18 years ago
- 09e4606 Completely eliminate def&use operands. Now a register operand is EITHER a by Chris Lattner · 18 years ago
- 2926869 Fix a long-standing wart in the code generator: two-address instruction lowering by Chris Lattner · 18 years ago
- 5ea64fd Constify some methods. Patch provided by Anton Vayvod, thanks! by Chris Lattner · 18 years ago
- 3c62934 Missing a space. by Evan Cheng · 18 years ago
- 613f1f8 Tidy up a few things. by Jim Laskey · 18 years ago
- f19807c Reduce size of routine. Shrinks .o by 37%. by Jim Laskey · 18 years ago
- 09c5457 Add shift and rotate by 1 instructions / patterns. by Evan Cheng · 18 years ago
- 004fb92 Cygwin support: use _alloca to allocate stack if > 4k. Patch by Anton Korobeynikov. by Evan Cheng · 18 years ago
- e8bd0a3 Added X86FunctionInfo subclass of MachineFunction to record whether the by Evan Cheng · 18 years ago
- 3649b0e Cygwin support. Patch by Anton Korobeynikov! by Evan Cheng · 18 years ago