- 190717d Rename instructions for consistency sake. by Evan Cheng · 18 years ago
- 0f3ac8d getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd. by Evan Cheng · 18 years ago
- 069287d X86 integer register classes naming changes. Make them consistent with FP, vector classes. by Evan Cheng · 18 years ago
- 98d0d7d More coverity fixes by Chris Lattner · 18 years ago
- 403be7e Fixing truncate. Previously we were emitting truncate from r16 to r8 as by Evan Cheng · 18 years ago
- 8f7f712 Better implementation of truncate. ISel matches it to a pseudo instruction by Evan Cheng · 18 years ago
- 8b915b4 Remove and simplify some more machineinstr/machineoperand stuff. by Chris Lattner · 18 years ago
- e53f4a0 Move some methods out of MachineInstr into MachineOperand by Chris Lattner · 18 years ago
- 63b3d71 There shalt be only one "immediate" operand type! by Chris Lattner · 18 years ago
- ea50fab Remove a bunch more SparcV9 specific stuff by Chris Lattner · 18 years ago
- ed1492e Use movaps instead of movapd for spill / restore. by Evan Cheng · 18 years ago
- 49bca85 MakeMIInst() should handle jump table index operands. by Evan Cheng · 18 years ago
- f0d4e3d - PEXTRW cannot take a memory location as its first source operand. by Evan Cheng · 18 years ago
- f463f51 SHUFP{S|D}, PSHUF* encoding bugs. Left out the mask immediate operand. by Evan Cheng · 18 years ago
- a52b214 Encoding bug: CMPPSrmi, CMPPDrmi dropped operand 2 (condtion immediate). by Evan Cheng · 18 years ago
- 51c9c43 Incorrect foldMemoryOperand entries by Evan Cheng · 18 years ago
- 800f12d Can't fold loads into alias vector SSE ops used for scalar operation. The load by Evan Cheng · 18 years ago
- 407428e Added SSE (and other) entries to foldMemoryOperand(). by Evan Cheng · 18 years ago
- d9245ca We were not adjusting the frame size to ensure proper alignment when alloca / by Evan Cheng · 18 years ago
- a964ccd Use movaps to do VR128 reg-to-reg copies for now. It's shorter and available for SSE1. by Evan Cheng · 18 years ago
- 4188699 Foundation for call frame information. by Jim Laskey · 18 years ago
- 8703be4 Minor fixes + naming changes. by Evan Cheng · 18 years ago
- a997918 Expose base register for DwarfWriter. Refactor code accordingly. by Jim Laskey · 18 years ago
- 414e682 Translate llvm target registers to dwarf register numbers properly. by Jim Laskey · 18 years ago
- f1d78e8 Add support to locate local variables in frames (early version.) by Jim Laskey · 19 years ago
- 2246f84 Use the generic vector register classes VR64 / VR128 rather than V4F32, by Evan Cheng · 19 years ago
- 8586b95 Also fold MOV8r0, MOV16r0, MOV32r0 + store to MOV8mi, MOV16mi, and MOV32mi. by Evan Cheng · 19 years ago
- 5bd4d48 Add some missing entries to X86RegisterInfo::foldMemoryOperand(). e.g. ADD32ri8. by Evan Cheng · 19 years ago
- cb4a38e Fix an obvious bug exposed when we are doing ADD X, 4 ==> MOV32ri $X+4, ... by Evan Cheng · 19 years ago
- 933be33 Added SSE2 128-bit integer packed types: V16I8, V8I16, V4I32, and V2I64. by Evan Cheng · 19 years ago
- aea20f5 Added x86 integer vector types: 64-bit packed byte integer (v16i8), 64-bit by Evan Cheng · 19 years ago
- fe5cb19 1. Use pxor instead of xoraps / xorapd to clear FR32 / FR64 registers. This by Evan Cheng · 19 years ago
- 19ade3b Use movaps / movapd to spill / restore V4F4 / V2F8 registers. by Evan Cheng · 19 years ago
- d51425a Use movaps / movapd (instead of movss / movsd) to do FR32 / FR64 reg to reg by Evan Cheng · 19 years ago
- d77525d When rewriting frame instructions, emit the appropriate small-immediate by Chris Lattner · 19 years ago
- 4083960 Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far more logical place. Other methods should also be moved if anyoneis interested. :) by Chris Lattner · 19 years ago
- 9c8dd97 implement isStoreToStackSlot by Chris Lattner · 19 years ago
- b1b4e86 Added SSE entries to foldMemoryOperand(). by Evan Cheng · 19 years ago
- e341316 Support for ADD_PARTS, SUB_PARTS, SHL_PARTS, SHR_PARTS, and SRA_PARTS. by Evan Cheng · 19 years ago
- d9558e0 * Fast call support. * FP cmp, setcc, etc. by Evan Cheng · 19 years ago
- e4672aa Let the helper functions know about X86::FR32RegClass and X86::FR64RegClass. by Evan Cheng · 19 years ago
- 171049d * Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead. by Evan Cheng · 19 years ago
- 58fe459 Rewrite FP stackifier support in the X86InstrInfo.td file, splitting patterns by Chris Lattner · 19 years ago
- 14e2cf6 Properly split f32 and f64 into separate register classes for scalar sse fp by Nate Begeman · 19 years ago
- 56bcae0 simplify this code using the new regclass info passed in by Chris Lattner · 19 years ago
- 97d5e64 Pass extra regclasses into spilling code by Chris Lattner · 19 years ago
- a92aab7 Implement the isLoadFromStackSlot interface by Chris Lattner · 19 years ago
- 2505d6b The simple isel being gone makes this dead! by Chris Lattner · 19 years ago
- 00b16889 Eliminate all remaining tabs and trailing spaces. by Jeff Cohen · 19 years ago
- f63be7d First round of support for doing scalar FP using the SSE2 ISA extension and by Nate Begeman · 19 years ago
- 5fae9cc Teach reginfo how to deal with ADJSTACKPTRri, allowing us to generate: by Chris Lattner · 19 years ago
- 6972177 When emitting the function epilog, check to see if there already a stack by Chris Lattner · 19 years ago
- 2b3d56e Add some new instructions by Chris Lattner · 19 years ago
- 3648c67 switch to having the callee pop stack operands for fastcc. This is currently buggy by Chris Lattner · 19 years ago
- 24ddc6d allow RETI by Chris Lattner · 19 years ago
- 1e6a715 add signed versions of the extra precision multiplies by Chris Lattner · 19 years ago
- 40ff633 Add rotate instructions. by Chris Lattner · 20 years ago
- 0df53d2 Improve coverage of the X86 instruction set by adding 16-bit shift doubles. by Chris Lattner · 20 years ago
- 57fbfb5 Add conditional moves for the parity flag. by Chris Lattner · 20 years ago
- eb96ec5 Add support for SETNPr to lower to memory form. by Chris Lattner · 20 years ago
- 45de191 Spill/restore X86 floating point stack registers with 64-bits of precision by Chris Lattner · 20 years ago
- d93d3b0 Add some new instructions. Fix the asm string for sbb32rr by Chris Lattner · 20 years ago
- 551ccae Changes For Bug 352 by Reid Spencer · 20 years ago
- fae8969 Reduce uses of getRegClass by Chris Lattner · 20 years ago
- 01d0efb Code insertion methods now return void instead of an int. by Chris Lattner · 20 years ago
- 57f1b67 These methods no longer take a TargetRegisterClass* operand. by Chris Lattner · 20 years ago
- f8be5e9 Eliminate MachineFunction& argument from eliminateFrameIndex in x86 Target. Get MachineFunction from MachineInstruction's parent's parent by Nate Begeman · 20 years ago
- 3b5e6e5 Reserve the correct amt of space. by Chris Lattner · 20 years ago
- 0cf0c37 Delete the allocate*TargetMachine function, which is now dead . by Chris Lattner · 20 years ago
- 954da37 Add #include <iostream> since Value.h does not #include it any more. by Reid Spencer · 20 years ago
- 66d6ee4 Spell out `NoFramePointerElim' for readability. by Misha Brukman · 20 years ago
- 83eaa0b Use the common `NoFPElim' setting instead of our own. by Misha Brukman · 20 years ago
- f70c22b Rename Type::PrimitiveID to TypeId and ::getPrimitiveID() to ::getTypeID() by Chris Lattner · 20 years ago
- 665e661 Add support for the setp instructions by Chris Lattner · 20 years ago
- d029cd2 Convert to the new TargetMachine interface. by Chris Lattner · 20 years ago
- 8b28b6d Add more ADC and SBB variants by Alkis Evlogimenos · 20 years ago
- 87d3bb5 Implement spill code folding for all of the conditional move instructions by Chris Lattner · 20 years ago
- a1a7148 Another API change to MRegisterInfo::foldMemoryOperand. Instead of a by Alkis Evlogimenos · 21 years ago
- 39354c9 Change MRegisterInfo::foldMemoryOperand to return the folded by Alkis Evlogimenos · 21 years ago
- 13d362f Add memory operand version of conditional move. by Alkis Evlogimenos · 21 years ago
- 8295f20 A big X86 instruction rename. The instructions are renamed to make by Alkis Evlogimenos · 21 years ago
- da474ad SHLD and SHRD take 32-bit operands but an 8-bit immediate. Rename them by Alkis Evlogimenos · 21 years ago
- 8e475b8 Floating point loads/stores act on memory operands. Rename them to by Alkis Evlogimenos · 21 years ago
- f8da4d8 Uncomment instructions that take both an immediate and a memory by Alkis Evlogimenos · 21 years ago
- 745502a Do not generate instructions with mismatched memory/immediate sized by Alkis Evlogimenos · 21 years ago
- 08388a4 Add memory operand folding support for the SETcc family of instructions. by Alkis Evlogimenos · 21 years ago
- e56508e Add memory operand folding support for SHLD and SHRD instructions. by Alkis Evlogimenos · 21 years ago
- 58ec605 Add memory operand folding support for SHL, SHR and SAR, SHLD instructions. by Alkis Evlogimenos · 21 years ago
- 890f923 Move MOTy::UseType enum into MachineOperand. This eliminates the by Alkis Evlogimenos · 21 years ago
- f216421 When folding memory operands in machine instructions be careful to by Alkis Evlogimenos · 21 years ago
- cc0d2f5 Add support for GlobalAddress's for alkis by Chris Lattner · 21 years ago
- d886ed9 Instructiosn with 1 memory operand have 4 operands in our representation.. duh! by Alkis Evlogimenos · 21 years ago
- f41dada Align case statements. by Alkis Evlogimenos · 21 years ago
- 14ffe75 Add TEST and XCHG memory operand support. by Alkis Evlogimenos · 21 years ago
- 68bff8e Add OR and XOR memory operand support. by Alkis Evlogimenos · 21 years ago
- a7be982 Add memory operand folding support for MUL, DIV, IDIV, NEG, NOT, by Alkis Evlogimenos · 21 years ago
- 89b0214 Add memory operand folding for CMP{rm,mr,mi}{8,16,32}, INCm{8,16,32} by Alkis Evlogimenos · 21 years ago
- 18bd7bb Add support for folding memory operands for ADC, SBB and SUB instructions. by Alkis Evlogimenos · 21 years ago
- ee0919b Add a (hidden) option to print instructions that fail to fuse. It's looking by Chris Lattner · 21 years ago
- 17dc674 Add support for folding memory operands in MOVri{8,16,32} instructions. by Alkis Evlogimenos · 21 years ago