Gitiles
Code Review Sign In
gerrit-public.fairphone.software / platform / external / llvm / 4f1c33f7c801937ff42090fe54256be606da07cb / lib / Target / X86
  1. 1b5dcc3 Initial support for calling functions with byval arguments on x86-64 by Rafael Espindola · 17 years ago
  2. 7240ae3 Align i64 and f64 at 8 byte on x86-64. by Rafael Espindola · 17 years ago
  3. eaf0894 Enhance APFloat to retain bits of NaNs (fixes oggenc). by Dale Johannesen · 17 years ago
  4. f4c3a59 Added support to fold X86 load / store instructions. This allow rematerialized loads to be folded into their uses. by Evan Cheng · 17 years ago
  5. 2f39426 Mark load instructions with isLoad = 1. by Evan Cheng · 17 years ago
  6. f04afdb Change LegalFPImmediates to use APFloat. by Dale Johannesen · 17 years ago
  7. ee46574 Move getX86RegNum into X86RegisterInfo and use it by Duncan Sands · 17 years ago
  8. 44c8265 Add a comment about using libc memset/memcpy or generating inline code. by Rafael Espindola · 17 years ago
  9. 6b83b5d call libc memcpy/memset if array size is bigger then threshold. by Rafael Espindola · 17 years ago
  10. 48884cd rename isOperandValidForConstraint to LowerAsmOperandForConstraint, by Chris Lattner · 17 years ago
  11. b23f4c5 add a note by Chris Lattner · 17 years ago
  12. 9e43d63 add some notes on really poor codegen. by Chris Lattner · 17 years ago
  13. adbda02 Add the PCSymbol for Darwin x86 platforms. by Bill Wendling · 17 years ago
  14. 095546c Use only 1 knob to enable exceptions on Darwin :). by Anton Korobeynikov · 17 years ago
  15. 21485be Partial implementation of calling functions with byval arguments: by Rafael Espindola · 17 years ago
  16. cf8ba69 add a note by Chris Lattner · 17 years ago
  17. a2780e1 Move ReturnAddrIndex variable to X86MachineFunctionInfo structure. This fixed by Anton Korobeynikov · 17 years ago
  18. d42b8be add a note. by Chris Lattner · 17 years ago
  19. 1291438 Fix a typo pointd out by Maarten ter Huurne. by Evan Cheng · 17 years ago
  20. badb2d2 When x86 addresses matching exceeds its recursion limit, check to by Dan Gohman · 17 years ago
  21. a45d9a1 Fix PR1607 by Chris Lattner · 17 years ago
  22. ace2e8a expand a note by Chris Lattner · 17 years ago
  23. 384f4a9 With evan's explicit flag representation, hopefully we will finally be by Chris Lattner · 17 years ago
  24. 01284b4 64-bit SSSE3 ops that use MMX registers don't require 16-byte alignment. by Bill Wendling · 17 years ago
  25. a1eb155 Use subregs to improve any_extend code generation when feasible. by Christopher Lamb · 17 years ago
  26. c59e521 Increase efficiency of sign_extend_inreg by using subregisters for truncation. As the README suggests sign_extend_subreg is selected to (sext(trunc)). by Christopher Lamb · 17 years ago
  27. 6f41435 Edit README in light of previous LEA16 commit. by Christopher Lamb · 17 years ago
  28. b813371 Add 2-addr to 3-addr promotion code that allows 32-bit LEA to be used via subregisters when 16-bit LEA is disabled. by Christopher Lamb · 17 years ago
  29. 594d37e propagate struct size and alignment of byval arguments to the DAG by Rafael Espindola · 17 years ago
  30. ae9671b For kicks, I though it would be fun to use the correct opcode. by Bill Wendling · 17 years ago
  31. 76d708b Adding SSSE3 intrinsics. by Bill Wendling · 17 years ago
  32. a3231ba Temporarily backing out this change until we know why some dejagnu tests are failing. by Evan Cheng · 17 years ago
  33. f7ef26e divb / mulb outputs to ah. Under x86-64 it's not legal to read ah if the instruction requires a rex prefix (i.e. outputs to r8b, etc.). So issue shift right by 8 on AX and then truncate it to 8 bits instead. by Evan Cheng · 17 years ago
  34. a333b41 GR16_ sub-register class should be GR8_, not GR8. That is, it should only be 8-bit registers in 32-bit mode. Ditto for GR32_. by Evan Cheng · 17 years ago
  35. 5411a39 long double 9 of N. This finishes up the X86-32 bits by Dale Johannesen · 17 years ago
  36. cdbe4d3 Long double patch 8 of N: make it partially work in by Dale Johannesen · 17 years ago
  37. a996d52 Long double patch 7 of N, unless I lost count:). by Dale Johannesen · 17 years ago
  38. 9989a65 Replace 4-line function with 10-line version per review comment. by Dale Johannesen · 17 years ago
  39. 27f92be Move lengthy conditional down 1 level per review comment. by Dale Johannesen · 17 years ago
  40. 6a30811 Get X86 long double calling convention to work by Dale Johannesen · 17 years ago
  41. 8883573 Make 80-bit store maintain simulated FP stack correctly. by Dale Johannesen · 17 years ago
  42. 59a5873 Long double patch 4 of N: initial x87 implementation. by Dale Johannesen · 17 years ago
  43. 6994040 This is the patch to provide clean intrinsic function overloading support in LLVM. It cleans up the intrinsic definitions and generally smooths the process for more complicated intrinsic writing. It will be used by the upcoming atomic intrinsics as well as vector and float intrinsics in the future. by Chandler Carruth · 17 years ago
  44. 8c78a26 Make x86 long double alignment 32 for everything but by Dale Johannesen · 17 years ago
  45. 8c1e6a1 long double patch 2 of N. Handle it in TargetData. by Dale Johannesen · 17 years ago
  46. 107f54a add an observation by Chris Lattner · 17 years ago
  47. 61e729e More explicit keywords. by Dan Gohman · 17 years ago
  48. 7f55fcb Fix the alignment requirements of several unpck and shuf instructions. by Dan Gohman · 17 years ago
  49. f3372d1 Fix pastos in vector arithmetic intrinsics. by Dan Gohman · 17 years ago
  50. 73a902b Mark the SSE and MMX load instructions that by Dan Gohman · 17 years ago
  51. 7afa166 Switch some multiplication instructions over to the new scheme for testing. by Evan Cheng · 17 years ago
  52. 5278784 Can't handle offset and scale if rip-relative addressing is to be used. by Evan Cheng · 17 years ago
  53. 0db079e Mac OS X X86-64 low 4G address not available. by Evan Cheng · 17 years ago
  54. f6844ca Mac OS X X86-64 low 4G address not available. by Evan Cheng · 17 years ago
  55. c5dd541 Missing Requires. by Evan Cheng · 17 years ago
  56. 1c3017c Be more precise. by Evan Cheng · 17 years ago
  57. a9f6434 Change a .size directive to use a tab instead of a space, for consistency. by Dan Gohman · 17 years ago
  58. b1576f5 Change the x86 assembly output to use tab characters to separate the by Dan Gohman · 17 years ago
  59. c64a1a9 Redo and generalize previously removed opt for pinsrw: (vextract (v4i32 bc (v4f32 s2v (f32 load ))), 0) -> (i32 load ) by Evan Cheng · 17 years ago
  60. 4ebcc8c This isn't safe when there are uses of load's chain result. by Evan Cheng · 17 years ago
  61. 825811d Use tabs more consistently in assembler pseudo-ops. by Dan Gohman · 17 years ago
  62. 2dc6dc6 Change the x86 backend to use extract_subreg for truncation operations. Passes DejaGnu, SingleSource and MultiSource. by Christopher Lamb · 17 years ago
  63. f9b90ea Add register info needed to use subreg sets on X86. by Christopher Lamb · 17 years ago
  64. b116fac Trampoline codegen support for X86-32. by Duncan Sands · 17 years ago
  65. d300622 Re-apply 40504, but with a fix for the segfault it caused in oggenc: by Dan Gohman · 17 years ago
  66. 3e22947 Reverting 40504 for now. It's breaking oggenc. by Evan Cheng · 17 years ago
  67. fcc8793 Make sure epilogue esp adjustment is placed before any terminator and pop instructions. by Evan Cheng · 17 years ago
  68. 85dce6c Don't pollute the meaning of isUnpredicatedTerminator. by Evan Cheng · 17 years ago
  69. cf5543c Minor bug. by Evan Cheng · 17 years ago
  70. b6bbe39 In the .loc directive, print the fields as "debug" fields, so they by Dan Gohman · 17 years ago
  71. 1704c2f Fix a whitespace difference between CMPSSrr and CMPSDrr. by Dan Gohman · 17 years ago
  72. 518143d Same goes for constantpool, etc. by Evan Cheng · 17 years ago
  73. d328383 Remove X86ISD::LOAD_PACK and X86ISD::LOAD_UA and associated code from the by Dan Gohman · 17 years ago
  74. a49ed78 Mac OS X x86-64 lower 4G address is not available. by Evan Cheng · 17 years ago
  75. ad5e9ca Mac OS X should use 0x90 to fill in gaps to satisfy function alignment requirements. by Evan Cheng · 17 years ago
  76. d88ea4d Functions with LinkOnce and weak linkage still need to be aligned. Doh. by Evan Cheng · 17 years ago
  77. b8275a3 Don't ignore the return value of AsmPrinter::doInitialization and by Dan Gohman · 17 years ago
  78. 59db3ec Minor cleanup: by Anton Korobeynikov · 17 years ago
  79. dc9b3d0 Add const to CanBeFoldedBy, CheckAndMask, and CheckOrMask. by Dan Gohman · 17 years ago
  80. a394117 Use movaps to load a v4f32 build_vector of all-constant values into a by Dan Gohman · 17 years ago
  81. d97b8cd Heal EH handling stuff by emitting correct offsets to callee-saved registers. by Anton Korobeynikov · 17 years ago
  82. 275769a Fix some uses of dyn_cast to be uses of cast. by Dan Gohman · 17 years ago
  83. 63491b2 Delete the svn:executable property on these files, which aren't executable. by Dan Gohman · 17 years ago
  84. 6a20cf0 Add missing SSE builtins: by Bill Wendling · 17 years ago
  85. ffbacca No more noResults. by Evan Cheng · 17 years ago
  86. 8bd6035 Added -print-emitted-asm to print out JIT generated asm to cerr. by Evan Cheng · 17 years ago
  87. b4162fd Because we promote SSE logical ops and loads to v2i64, we often end up generate by Evan Cheng · 17 years ago
  88. d4d01b7 Fix custom lowering of SSE FXOR. by Evan Cheng · 17 years ago
  89. 31d3a65 Fix patterns so we isel the xorps, etc. for floating pt logical SSE ops. DAG combiner may fold away the (bit_convert (load)). by Evan Cheng · 17 years ago
  90. 64d80e3 Change instruction description to split OperandList into OutOperandList and by Evan Cheng · 17 years ago
  91. 7e7bbf8 Only adjust esp around calls in presence of alloca. by Evan Cheng · 17 years ago
  92. 3c46eef Use MOV instead of LEA to restore ESP if callee-saved frame size is 0; if previous instruction updates esp, fold it in. by Evan Cheng · 17 years ago
  93. 4106f37 Implement initial memory alignment awareness for SSE instructions. Vector loads by Dan Gohman · 17 years ago
  94. b5cd249 New entry. by Evan Cheng · 17 years ago
  95. 9b8c674 Fold prologue esp update when possible. by Evan Cheng · 17 years ago
  96. 5b3332c Make sure not to break eh_return. by Evan Cheng · 17 years ago
  97. 698b638 Update. by Evan Cheng · 17 years ago
  98. f27795d Missed the case where alloca is used but the stack size (not including callee-saved portion) is zero. Thanks Dan. by Evan Cheng · 17 years ago
  99. 89d1659 Use push / pop for prologues and epilogues. by Evan Cheng · 17 years ago
  100. 2365f51 Long live the exception handling! by Anton Korobeynikov · 17 years ago