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gerrit-public.fairphone.software / platform / external / llvm / b8e9ac834a9c253e3f8f5caa8f229bafba0b4fcf / lib
  1. b8e9ac8 Emit cross regclass register moves for thumb2. Minor code duplication cleanup. by Anton Korobeynikov · 15 years ago
  2. 2df5e55 Disable this assert for now, it is firing on an llvm-gcc bootstrap. :( by Daniel Dunbar · 15 years ago
  3. a82b22c GV with ghost linkage (module being lazily streamed in in JIT lazy compilation mode) do not require extra load from stub. This fixes ExecutionEngine/2005-12-02-TailCallBug.ll. by Evan Cheng · 15 years ago
  4. 423ccfe Assume an inline asm might be a call, so we get by Dale Johannesen · 15 years ago
  5. 3ac1ab8 by David Greene · 15 years ago
  6. aad3fb7 Privatize the MDString uniquing table. by Owen Anderson · 15 years ago
  7. 24cd3c4 Fix inverted preprocessor conditional. by Daniel Dunbar · 15 years ago
  8. efd280b Fix compiler warning (for -Asserts). by Daniel Dunbar · 15 years ago
  9. 93e55de Silence warning in Linux builds: by Jakob Stoklund Olesen · 15 years ago
  10. 34ccf03 Add raw_null_ostream and llvm::nulls(), a raw_ostream that discards output. by Daniel Dunbar · 15 years ago
  11. 32360a7 Add line numbers to OProfile. To do this, I added a processDebugLoc() by Jeffrey Yasskin · 15 years ago
  12. 57e599a Teach MachineInstr::isRegTiedToDefOperand() to correctly parse inline asm operands. by Jakob Stoklund Olesen · 15 years ago
  13. 5f15992 Changed my mind. We now allow remat of instructions whose defs have subreg indices. by Evan Cheng · 15 years ago
  14. 914e50c Privatize the ConstantFP table. I'm on a roll! by Owen Anderson · 15 years ago
  15. 2b48ab9 With recent MC changes, RIP base register is explicitly modeled. Make sure we add it when x86 V_SET0 / V_SETALLONES (by transforming it into a constpool load) into the use instruction. by Evan Cheng · 15 years ago
  16. da24fe2 Update CMake file. by Ted Kremenek · 15 years ago
  17. 001dbfe Move the ConstantInt uniquing table into LLVMContextImpl. This exposed a number of issues in by Owen Anderson · 15 years ago
  18. f96db46 Removed the SubsectionsViaSymbols MCStreamer API and replaced it with a generic by Kevin Enderby · 15 years ago
  19. 850f791 Fill in some holes in ScalarEvolution's loop iteration condition by Dan Gohman · 15 years ago
  20. 9377386 Add an isLoopSimplifyForm() predicate, following the example of by Dan Gohman · 15 years ago
  21. ad60f66 Use size_t. by Dan Gohman · 15 years ago
  22. 7df8462 Unbreak by Anton Korobeynikov · 15 years ago
  23. c975180 Temporary disable 16 bit bswap by Anton Korobeynikov · 15 years ago
  24. 6d4b270 Add instruction formats and few opcodes by Anton Korobeynikov · 15 years ago
  25. 6ff3f2c Add bswap patterns by Anton Korobeynikov · 15 years ago
  26. 21ddf77 Provide crazy pseudos for regpairs spills / reloads by Anton Korobeynikov · 15 years ago
  27. 9de2848 Handle long-disp stuff more consistently by Anton Korobeynikov · 15 years ago
  28. 74e2dc4 All FP instructions have 12 bit memory displacement field by Anton Korobeynikov · 15 years ago
  29. f1106c4 Another predicate routine by Anton Korobeynikov · 15 years ago
  30. 27bf677 More helpers by Anton Korobeynikov · 15 years ago
  31. ae46db8 Add bunch of branch folding stuff by Anton Korobeynikov · 15 years ago
  32. 27766b5 Add missed opcodes to short => long displacement conversion by Anton Korobeynikov · 15 years ago
  33. c3e48b0 Cleanup by Anton Korobeynikov · 15 years ago
  34. 54681ec Fix logic inversion for RI-mode address selection by Anton Korobeynikov · 15 years ago
  35. bb8a048 Expand 32-bit bitconverts via memory by Anton Korobeynikov · 15 years ago
  36. f2fd8ea Fix incomin arg stack frame offset in case we need to generate stack frame by Anton Korobeynikov · 15 years ago
  37. 8b75813 Fix instruction mnemonics for some fp_to_sint operations by Anton Korobeynikov · 15 years ago
  38. c1a1e4a i32 values are passed extended also on stack. Handle this in generic way by Anton Korobeynikov · 15 years ago
  39. 159ac63 We definitely have 1-0 bools by Anton Korobeynikov · 15 years ago
  40. 5dd38de Revert the commit, it just hides the real bug by Anton Korobeynikov · 15 years ago
  41. 361a787 Out GR128 regclass is not a 'real' i128 one. by Anton Korobeynikov · 15 years ago
  42. 628d419 Add missed condbranch opcodes by Anton Korobeynikov · 15 years ago
  43. 05a0b8b Handle bitconverts by Anton Korobeynikov · 15 years ago
  44. b6831cb Unbreak mvi and friends - emit only 'significant' part of the operand by Anton Korobeynikov · 15 years ago
  45. 98db78a Expand fp_to_uint too by Anton Korobeynikov · 15 years ago
  46. 20d062f We don't have FP truncstores by Anton Korobeynikov · 15 years ago
  47. a89430e Expand uint_to_fp by Anton Korobeynikov · 15 years ago
  48. 4971e1e Emit proper rounding mode for fp_to_sint by Anton Korobeynikov · 15 years ago
  49. 3a9959f f32/f64 regs are stored on stack if we're short in FP regs by Anton Korobeynikov · 15 years ago
  50. 75eef89 Lower anyext to zext, 32-bit stuff does not have any implicit zero-extension side effects by Anton Korobeynikov · 15 years ago
  51. 1ada84d Make FP zero to be legal FP immediate via LOAD ZERO by Anton Korobeynikov · 15 years ago
  52. 5753f47 Loads are not two-address in any way by Anton Korobeynikov · 15 years ago
  53. a61a4f6 Add LOAD NEGATIVE instruction by Anton Korobeynikov · 15 years ago
  54. 03f6000 LOAD COMPLEMENT instruction is not really two-addr by Anton Korobeynikov · 15 years ago
  55. 6495063 Add multiple add/sub instructions by Anton Korobeynikov · 15 years ago
  56. 1733124 Handle FP callee-saved regs by Anton Korobeynikov · 15 years ago
  57. 85c5c3f Proper FP extloads by Anton Korobeynikov · 15 years ago
  58. 299dc78 Add proper PWS impdef's by Anton Korobeynikov · 15 years ago
  59. da723d7 Propagate FP select_cc to dag inserters by Anton Korobeynikov · 15 years ago
  60. 55e96fb Implement fp_to_sint by Anton Korobeynikov · 15 years ago
  61. 92ac82a Implement FP regs spills / restores by Anton Korobeynikov · 15 years ago
  62. c79465d Add fabs by Anton Korobeynikov · 15 years ago
  63. f1e82ce Add fneg by Anton Korobeynikov · 15 years ago
  64. 9b4ae57 We don't have native sine / cosine instructions by Anton Korobeynikov · 15 years ago
  65. 1d0ec0b More sint_to_fp stuff by Anton Korobeynikov · 15 years ago
  66. 7aa03ac Add bunch of FP instructions by Anton Korobeynikov · 15 years ago
  67. 23eff5c We don't have any FP extloads by Anton Korobeynikov · 15 years ago
  68. 10c086c Implement all comparisons by Anton Korobeynikov · 15 years ago
  69. ae53567 Add constpool lowering / printing by Anton Korobeynikov · 15 years ago
  70. 0e31d5c Allow FP arguments pass / return by Anton Korobeynikov · 15 years ago
  71. 2c97ae8 Register FP regclasses by Anton Korobeynikov · 15 years ago
  72. b13057b Add FP regs by Anton Korobeynikov · 15 years ago
  73. 81d533c Fix fallout from prev. patch by Anton Korobeynikov · 15 years ago
  74. 8bd0db7 Provide consistent subreg idx scheme. This (hopefully) fixes remaining divide problems by Anton Korobeynikov · 15 years ago
  75. 09e3900 Use divide single for 32 bit signed divides by Anton Korobeynikov · 15 years ago
  76. cd3dfaf Add missed operands types by Anton Korobeynikov · 15 years ago
  77. e1c9aab Missed part of prev. patch by Anton Korobeynikov · 15 years ago
  78. 9b812b0 Another attempt to fix prologue emission by Anton Korobeynikov · 15 years ago
  79. 6fe326c Implement 'large' PIC model by Anton Korobeynikov · 15 years ago
  80. 48e8b3c Implement shifts properly (hopefilly - finally!) by Anton Korobeynikov · 15 years ago
  81. e3a7f7a Remove redundand register move by Anton Korobeynikov · 15 years ago
  82. 0a42d2b Properly handle divides. As a bonus - implement memory versions of them. by Anton Korobeynikov · 15 years ago
  83. d20af96 Fix epic fail: full-width muls are not commutable. This unbreaks bunch of stuff from SingleSource/Benchmarks/Stanford by Anton Korobeynikov · 15 years ago
  84. c097d5c 32 bit rotate is not twoaddr instruction by Anton Korobeynikov · 15 years ago
  85. 014d463 32 bit shifts have only 12 bit displacements by Anton Korobeynikov · 15 years ago
  86. 54cea74 Add proper register aliases by Anton Korobeynikov · 15 years ago
  87. c3a5196 Properly generate stack frame by Anton Korobeynikov · 15 years ago
  88. 0ba60d9 Unbreak indirect branches by Anton Korobeynikov · 15 years ago
  89. 78085ee Unbreak by Anton Korobeynikov · 15 years ago
  90. 66f1b37 Do not forget to save R15 when we allocate stack frame by Anton Korobeynikov · 15 years ago
  91. c94fdf7 All calls clobbers R14 by Anton Korobeynikov · 15 years ago
  92. 6f66f05 Unbreak calls to vararg functions by Anton Korobeynikov · 15 years ago
  93. 2bbbd5b Stupid typo by Anton Korobeynikov · 15 years ago
  94. 4656760 Typos by Anton Korobeynikov · 15 years ago
  95. 1ed1e3e Consolidate reg-imm / reg-reg-imm address mode selection logic in one place. by Anton Korobeynikov · 15 years ago
  96. 5a11e02 Fix fallout from 12-bit stuff landing: decide whether 20 bit displacements are needed during elimination of frame indexes. by Anton Korobeynikov · 15 years ago
  97. 720e3b0 Add support for 12 bit displacements by Anton Korobeynikov · 15 years ago
  98. 078e007 We already have reserved call frame regardless whether variable sized frame objects were present or not by Anton Korobeynikov · 15 years ago
  99. 980d550 Emit proper lowering of load from arg stack slot by Anton Korobeynikov · 15 years ago
  100. c772c44 Implement dynamic allocas by Anton Korobeynikov · 15 years ago