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gerrit-public.fairphone.software / platform / external / llvm / b8e9ac834a9c253e3f8f5caa8f229bafba0b4fcf / lib
  1. c16cdc5 Add jump tables by Anton Korobeynikov · 15 years ago
  2. 983d3a1 Exapnd br_jt into indirect branch. Provide pattern for indirect branches. by Anton Korobeynikov · 15 years ago
  3. 57b04e6 Implement 64 bit immediates by Anton Korobeynikov · 15 years ago
  4. 759205d Add rotates by Anton Korobeynikov · 15 years ago
  5. cfca8b1 Add patterns for integer negate by Anton Korobeynikov · 15 years ago
  6. 8c993e1 Provide proper patterns for and with imm instructions. Tune the tests accordingly. by Anton Korobeynikov · 15 years ago
  7. 25af733 Add 32 bit and reg-imm and disable invalid patterns for now by Anton Korobeynikov · 15 years ago
  8. 747052c Add z9 and z10 target processors. Mark z10-only instructions as such. by Anton Korobeynikov · 15 years ago
  9. 71fd260 Fix MUL64rm instruction asmprinting by Anton Korobeynikov · 15 years ago
  10. 70f717f Preliminary asmprinting of globals by Anton Korobeynikov · 15 years ago
  11. ed00212 Implement asmprinting for odd-even regpairs by Anton Korobeynikov · 15 years ago
  12. 3166a9a 32-bit ri addressing mode has only 12-bit displacement by Anton Korobeynikov · 15 years ago
  13. 501f55d Forgot to add by Anton Korobeynikov · 15 years ago
  14. f366bec Do not put bunch of target-specific stuff into common namespace by Anton Korobeynikov · 15 years ago
  15. d3ba2f2 Print signed imms properly by Anton Korobeynikov · 15 years ago
  16. 4b73016 Provide hooks for spilling / restoring stuff by Anton Korobeynikov · 15 years ago
  17. 4cc7ce0 Revert thinko by Anton Korobeynikov · 15 years ago
  18. 319f381 Temporary workaround problem with signed 32-bit imm's by Anton Korobeynikov · 15 years ago
  19. 64d52d4 Implement InsertBranch() hook by Anton Korobeynikov · 15 years ago
  20. c9d4a88 Pipehole pattern for i32 imm's by Anton Korobeynikov · 15 years ago
  21. ac16b18 Bunch of sext_inreg patterns by Anton Korobeynikov · 15 years ago
  22. e00f1a7 Provide normal 32 bit load and store by Anton Korobeynikov · 15 years ago
  23. 22836d1 Proper lower 'small' results by Anton Korobeynikov · 15 years ago
  24. eb68f1c Completel forgot about unconditional branches by Anton Korobeynikov · 15 years ago
  25. bad769f Lower addresses of globals by Anton Korobeynikov · 15 years ago
  26. 8d1837d Provide "wide" muls and divs/rems by Anton Korobeynikov · 15 years ago
  27. 11275eb Fix thinko by Anton Korobeynikov · 15 years ago
  28. 338cf05 Fix epic bug with invalid regclass for R0D by Anton Korobeynikov · 15 years ago
  29. d519756 Let RegisterInfo decide whether it can emit cross-class copy or not by Anton Korobeynikov · 15 years ago
  30. 3e980b4 More register pairs (now 32 bit ones) by Anton Korobeynikov · 15 years ago
  31. 05a54ff Add even-odd register pairs by Anton Korobeynikov · 15 years ago
  32. 2fdecaf Unbreak due to mainline api change by Anton Korobeynikov · 15 years ago
  33. dd0239b Preliminary mul lowering by Anton Korobeynikov · 15 years ago
  34. bf02217 More extloads by Anton Korobeynikov · 15 years ago
  35. 7d1e39b SELECT_CC lowering by Anton Korobeynikov · 15 years ago
  36. 4ec3e5f Conditional branches and comparisons by Anton Korobeynikov · 15 years ago
  37. c7b71be Emit correct offset for PseudoSourceValue by Anton Korobeynikov · 15 years ago
  38. 656ac6f Provide proper stack offsets for outgoing arguments by Anton Korobeynikov · 15 years ago
  39. 4f9017f Change register allocation order to reduce amount of callee-saved regs to be spilled. by Anton Korobeynikov · 15 years ago
  40. ef5deca Emit callee-saved regs spills / restores by Anton Korobeynikov · 15 years ago
  41. 33b350b Scan for presence of calls and determine max callframe size early. To allow ProcessFunctionBeforeCalleeSaveScan() use this information by Anton Korobeynikov · 15 years ago
  42. ba249e4 Some preliminary call lowering by Anton Korobeynikov · 15 years ago
  43. 3c98c61 Prologue / epilogue emission by Anton Korobeynikov · 15 years ago
  44. 51f613f Add simple frame index elimination by Anton Korobeynikov · 15 years ago
  45. c4368a1 Swap the order of imm and idx field for rri addrmode in order to make handling of rri and ri addrmodes common by Anton Korobeynikov · 15 years ago
  46. 3240740 Do not truncate sign bits for negative imms by Anton Korobeynikov · 15 years ago
  47. 711d5b6 Add address computation stuff by Anton Korobeynikov · 15 years ago
  48. dfd0dff Cleanup by Anton Korobeynikov · 15 years ago
  49. c8301d1 Add mem-imm stores by Anton Korobeynikov · 15 years ago
  50. 30da538 [PATCH 023/155] Typo by Anton Korobeynikov · 15 years ago
  51. 961bb6f Add stores and truncstores by Anton Korobeynikov · 15 years ago
  52. dc28955 Add patterns for various extloads by Anton Korobeynikov · 15 years ago
  53. 3360da9 Do some heroic rri address matching (shamelessly stolen from x86 backend). Not tested though. by Anton Korobeynikov · 15 years ago
  54. 4cad7d2 Change register allocation order, so R0 will be allocated the last among scratch. This will make address-calculation code much more happy. by Anton Korobeynikov · 15 years ago
  55. 9e4816e Add shifts and reg-imm address matching by Anton Korobeynikov · 15 years ago
  56. a51752c Add bunch of 32-bit patterns... Uffff :) by Anton Korobeynikov · 15 years ago
  57. 0692fab Propagate return result extension type by Anton Korobeynikov · 15 years ago
  58. e0167c1 Add 32 bit subregs by Anton Korobeynikov · 15 years ago
  59. 9342d31 Add another bunch of reg-imm patterns for add/or/and/xor by Anton Korobeynikov · 15 years ago
  60. da308c9 Add bunch of reg-imm movs by Anton Korobeynikov · 15 years ago
  61. fc9ceea Proper match halfword-imm operands for mov and add by Anton Korobeynikov · 15 years ago
  62. 89edcd0 Provide masked reg-imm 'or' and 'and' by Anton Korobeynikov · 15 years ago
  63. e6220fb Add reg-reg and pattern by Anton Korobeynikov · 15 years ago
  64. bdc9081 Add sub reg-reg pattern by Anton Korobeynikov · 15 years ago
  65. b573f99 Add xor reg-reg pattern by Anton Korobeynikov · 15 years ago
  66. 26ba0b1 Add or reg-reg pattern. by Anton Korobeynikov · 15 years ago
  67. 0676d28 Add add reg-reg and reg-imm patterns by Anton Korobeynikov · 15 years ago
  68. 1cc9dc7 Add simple reg-reg and reg-imm moves by Anton Korobeynikov · 15 years ago
  69. 87a24e3 Minimal lowering for formal_arguments / ret by Anton Korobeynikov · 15 years ago
  70. 4403b93 Let's start another backend :) by Anton Korobeynikov · 15 years ago
  71. db9e697 Combine an unaligned store of unaligned load into a memmove. by Richard Osborne · 15 years ago
  72. 787e90f Lower the threshold at which memcpy / memmove / memset stop being expanded by Richard Osborne · 15 years ago
  73. ff4149b Fix typo in last commit on expansion of unaligned loads. by Richard Osborne · 15 years ago
  74. ccb7e96 Expand unaligned 32 bit loads from an address which is a constant by Richard Osborne · 15 years ago
  75. 7f47ce9 Custom lower unaligned 32 bit stores and loads into libcalls. This is by Richard Osborne · 15 years ago
  76. 3784453 Let callers decide the sub-register index on the def operand of rematerialized instructions. by Evan Cheng · 15 years ago
  77. 6ef40b1 use SUBREG_TO_REG instead of INSERT_SUBREG, this way the code by Chris Lattner · 15 years ago
  78. 115934e Fix coding style issues pointed by Bill. by Bruno Cardoso Lopes · 15 years ago
  79. 90bb3f3 add a knob to turn off PrettyStackTrace globally. Patch by Zoltan Varga! by Chris Lattner · 15 years ago
  80. 8e25e2d implement .include in the lexer/parser instead of passing it into the streamer. by Chris Lattner · 15 years ago
  81. c2b443a fix some casts that I improperly refactored, patch by Artur Pietrek! by Chris Lattner · 15 years ago
  82. 1da8be2 Remove unused header. by Daniel Dunbar · 15 years ago
  83. 1d92921 Switch llc and createJIT to use simpler command line parsing for -march. by Daniel Dunbar · 15 years ago
  84. 603bea3 Add registered target list to --version output. by Daniel Dunbar · 15 years ago
  85. 64cc972 Kill off <TARGET>MachineModule variables, and <TARGETASMPRINTER>ForceLink by Daniel Dunbar · 15 years ago
  86. fe2fe70 fix section switching to ensure that stubs are emitted to the right by Chris Lattner · 15 years ago
  87. 53cb17d Skip special LLVM prefix '1' while emitting linknage name. by Devang Patel · 15 years ago
  88. 6687990 Now that we have contexts on types, convert some more internals to use contexts. by Owen Anderson · 15 years ago
  89. 36129db We don't need to use llvm_report_error, this interface can deal with errors by Daniel Dunbar · 15 years ago
  90. 50dead0 Revert yesterday's change by removing the LLVMContext parameter to AllocaInst and MallocInst. by Owen Anderson · 15 years ago
  91. 6d823cd Add missing includes. by Daniel Dunbar · 15 years ago
  92. f7d3e69 Verify that there is no kill flag on tied operands on two-address instructions. by Jakob Stoklund Olesen · 15 years ago
  93. 5d77cad Lift addAssemblyEmitter into LLVMTargetMachine. - No functionality change. by Daniel Dunbar · 15 years ago
  94. e87b2ab Change raw_ostream so that it doesn't call llvm_report_error by Dan Gohman · 15 years ago
  95. 1e1f8ba Register AsmPrinter for XCore, MSP430, and PIC16 targets. by Daniel Dunbar · 15 years ago
  96. 0c77db3 Switch invars away from using isTrapping when it really shouldn't be using it. by Eli Friedman · 15 years ago
  97. cfe9a60 Lift DumpAsm / -print-emitted-asm functionality into LLVMTargetMachine. by Daniel Dunbar · 15 years ago
  98. 72fbc3d Fix bug in RegScavenger::scavengeRegister(). by Jakob Stoklund Olesen · 15 years ago
  99. fd2934f Don't restrict the set of instructions where we try to constant-fold the by Eli Friedman · 15 years ago
  100. f055229 Remove old style hacks to register AsmPrinter into TargetMachine. by Daniel Dunbar · 15 years ago