blob: 61df122ade99939868f929e77fa7a20e0d3ce745 [file] [log] [blame]
Kristian Høgsberg42fa0092010-02-03 10:18:28 -05001/*
2 * Copyright © 2010 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
19 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
20 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Kristian Høgsberg <krh@bitplanet.net>
26 */
27
28#include <stdlib.h>
29#include <string.h>
30#include <stdio.h>
31#include <limits.h>
32#include <dlfcn.h>
33#include <fcntl.h>
34#include <errno.h>
35#include <unistd.h>
36#include <xf86drm.h>
37#include <GL/gl.h>
38#include <GL/internal/dri_interface.h>
Kristian Høgsberg2168b872010-06-02 22:48:06 -040039#include <sys/types.h>
40#include <sys/stat.h>
41
42#ifdef HAVE_LIBUDEV
43#include <libudev.h>
44#endif
Kristian Høgsberg42fa0092010-02-03 10:18:28 -050045
Kristian Høgsberg2889d962011-02-02 22:10:40 -050046#include "egl_dri2.h"
Kristian Høgsberg42fa0092010-02-03 10:18:28 -050047
Kristian Høgsberg2168b872010-06-02 22:48:06 -040048static const __DRIuseInvalidateExtension use_invalidate = {
49 { __DRI_USE_INVALIDATE, 1 }
50};
51
Kristian Høgsberg42fa0092010-02-03 10:18:28 -050052EGLint dri2_to_egl_attribute_map[] = {
53 0,
54 EGL_BUFFER_SIZE, /* __DRI_ATTRIB_BUFFER_SIZE */
55 EGL_LEVEL, /* __DRI_ATTRIB_LEVEL */
56 EGL_RED_SIZE, /* __DRI_ATTRIB_RED_SIZE */
57 EGL_GREEN_SIZE, /* __DRI_ATTRIB_GREEN_SIZE */
58 EGL_BLUE_SIZE, /* __DRI_ATTRIB_BLUE_SIZE */
Kristian Høgsbergc19dab72010-02-09 21:01:04 -050059 EGL_LUMINANCE_SIZE, /* __DRI_ATTRIB_LUMINANCE_SIZE */
Kristian Høgsberg42fa0092010-02-03 10:18:28 -050060 EGL_ALPHA_SIZE, /* __DRI_ATTRIB_ALPHA_SIZE */
61 0, /* __DRI_ATTRIB_ALPHA_MASK_SIZE */
62 EGL_DEPTH_SIZE, /* __DRI_ATTRIB_DEPTH_SIZE */
63 EGL_STENCIL_SIZE, /* __DRI_ATTRIB_STENCIL_SIZE */
64 0, /* __DRI_ATTRIB_ACCUM_RED_SIZE */
65 0, /* __DRI_ATTRIB_ACCUM_GREEN_SIZE */
66 0, /* __DRI_ATTRIB_ACCUM_BLUE_SIZE */
67 0, /* __DRI_ATTRIB_ACCUM_ALPHA_SIZE */
68 EGL_SAMPLE_BUFFERS, /* __DRI_ATTRIB_SAMPLE_BUFFERS */
69 EGL_SAMPLES, /* __DRI_ATTRIB_SAMPLES */
70 0, /* __DRI_ATTRIB_RENDER_TYPE, */
71 0, /* __DRI_ATTRIB_CONFIG_CAVEAT */
72 0, /* __DRI_ATTRIB_CONFORMANT */
73 0, /* __DRI_ATTRIB_DOUBLE_BUFFER */
74 0, /* __DRI_ATTRIB_STEREO */
75 0, /* __DRI_ATTRIB_AUX_BUFFERS */
76 0, /* __DRI_ATTRIB_TRANSPARENT_TYPE */
77 0, /* __DRI_ATTRIB_TRANSPARENT_INDEX_VALUE */
78 0, /* __DRI_ATTRIB_TRANSPARENT_RED_VALUE */
79 0, /* __DRI_ATTRIB_TRANSPARENT_GREEN_VALUE */
80 0, /* __DRI_ATTRIB_TRANSPARENT_BLUE_VALUE */
81 0, /* __DRI_ATTRIB_TRANSPARENT_ALPHA_VALUE */
82 0, /* __DRI_ATTRIB_FLOAT_MODE */
83 0, /* __DRI_ATTRIB_RED_MASK */
84 0, /* __DRI_ATTRIB_GREEN_MASK */
85 0, /* __DRI_ATTRIB_BLUE_MASK */
86 0, /* __DRI_ATTRIB_ALPHA_MASK */
87 EGL_MAX_PBUFFER_WIDTH, /* __DRI_ATTRIB_MAX_PBUFFER_WIDTH */
88 EGL_MAX_PBUFFER_HEIGHT, /* __DRI_ATTRIB_MAX_PBUFFER_HEIGHT */
89 EGL_MAX_PBUFFER_PIXELS, /* __DRI_ATTRIB_MAX_PBUFFER_PIXELS */
90 0, /* __DRI_ATTRIB_OPTIMAL_PBUFFER_WIDTH */
91 0, /* __DRI_ATTRIB_OPTIMAL_PBUFFER_HEIGHT */
92 0, /* __DRI_ATTRIB_VISUAL_SELECT_GROUP */
93 0, /* __DRI_ATTRIB_SWAP_METHOD */
94 EGL_MAX_SWAP_INTERVAL, /* __DRI_ATTRIB_MAX_SWAP_INTERVAL */
95 EGL_MIN_SWAP_INTERVAL, /* __DRI_ATTRIB_MIN_SWAP_INTERVAL */
Kristian Høgsbergc6e830c2010-02-04 21:49:44 -050096 0, /* __DRI_ATTRIB_BIND_TO_TEXTURE_RGB */
97 0, /* __DRI_ATTRIB_BIND_TO_TEXTURE_RGBA */
Kristian Høgsberg42fa0092010-02-03 10:18:28 -050098 0, /* __DRI_ATTRIB_BIND_TO_MIPMAP_TEXTURE */
99 0, /* __DRI_ATTRIB_BIND_TO_TEXTURE_TARGETS */
Kristian Høgsberg5dc0f492010-05-06 22:40:25 -0400100 EGL_Y_INVERTED_NOK, /* __DRI_ATTRIB_YINVERTED */
Kristian Høgsberg42fa0092010-02-03 10:18:28 -0500101};
102
Kristian Høgsberg2889d962011-02-02 22:10:40 -0500103struct dri2_egl_config *
Kristian Høgsbergc3c1a7e2010-02-09 20:49:40 -0500104dri2_add_config(_EGLDisplay *disp, const __DRIconfig *dri_config, int id,
Kristian Høgsbergefd4a8c2010-07-27 18:25:54 -0400105 int depth, EGLint surface_type)
Kristian Høgsberg42fa0092010-02-03 10:18:28 -0500106{
107 struct dri2_egl_config *conf;
108 struct dri2_egl_display *dri2_dpy;
Kristian Høgsbergc19dab72010-02-09 21:01:04 -0500109 _EGLConfig base;
Kristian Høgsbergc6e830c2010-02-04 21:49:44 -0500110 unsigned int attrib, value, double_buffer;
111 EGLint key, bind_to_texture_rgb, bind_to_texture_rgba;
Kristian Høgsberg42fa0092010-02-03 10:18:28 -0500112 int i;
113
114 dri2_dpy = disp->DriverData;
Kristian Høgsbergc19dab72010-02-09 21:01:04 -0500115 _eglInitConfig(&base, disp, id);
Kristian Høgsberg42fa0092010-02-03 10:18:28 -0500116
117 i = 0;
Kristian Høgsbergefd4a8c2010-07-27 18:25:54 -0400118 double_buffer = 0;
119 bind_to_texture_rgb = 0;
120 bind_to_texture_rgba = 0;
121
Kristian Høgsberg42fa0092010-02-03 10:18:28 -0500122 while (dri2_dpy->core->indexConfigAttrib(dri_config, i++, &attrib, &value)) {
123 switch (attrib) {
Kristian Høgsberg42fa0092010-02-03 10:18:28 -0500124 case __DRI_ATTRIB_RENDER_TYPE:
125 if (value & __DRI_ATTRIB_RGBA_BIT)
126 value = EGL_RGB_BUFFER;
127 else if (value & __DRI_ATTRIB_LUMINANCE_BIT)
128 value = EGL_LUMINANCE_BUFFER;
129 else
130 /* not valid */;
Kristian Høgsbergc19dab72010-02-09 21:01:04 -0500131 _eglSetConfigKey(&base, EGL_COLOR_BUFFER_TYPE, value);
Kristian Høgsberg42fa0092010-02-03 10:18:28 -0500132 break;
133
134 case __DRI_ATTRIB_CONFIG_CAVEAT:
135 if (value & __DRI_ATTRIB_NON_CONFORMANT_CONFIG)
136 value = EGL_NON_CONFORMANT_CONFIG;
137 else if (value & __DRI_ATTRIB_SLOW_BIT)
138 value = EGL_SLOW_CONFIG;
139 else
140 value = EGL_NONE;
Kristian Høgsbergc19dab72010-02-09 21:01:04 -0500141 _eglSetConfigKey(&base, EGL_CONFIG_CAVEAT, value);
Kristian Høgsberg42fa0092010-02-03 10:18:28 -0500142 break;
143
Kristian Høgsbergc6e830c2010-02-04 21:49:44 -0500144 case __DRI_ATTRIB_BIND_TO_TEXTURE_RGB:
145 bind_to_texture_rgb = value;
146 break;
147
148 case __DRI_ATTRIB_BIND_TO_TEXTURE_RGBA:
149 bind_to_texture_rgba = value;
150 break;
151
Kristian Høgsberg42fa0092010-02-03 10:18:28 -0500152 case __DRI_ATTRIB_DOUBLE_BUFFER:
Kristian Høgsbergc6e830c2010-02-04 21:49:44 -0500153 double_buffer = value;
Kristian Høgsberg42fa0092010-02-03 10:18:28 -0500154 break;
155
156 default:
157 key = dri2_to_egl_attribute_map[attrib];
158 if (key != 0)
Kristian Høgsbergc19dab72010-02-09 21:01:04 -0500159 _eglSetConfigKey(&base, key, value);
Kristian Høgsberg42fa0092010-02-03 10:18:28 -0500160 break;
161 }
162 }
163
Kristian Høgsbergc3c1a7e2010-02-09 20:49:40 -0500164 /* In EGL, double buffer or not isn't a config attribute. Pixmaps
165 * surfaces are always single buffered, pbuffer surfaces are always
166 * back buffers and windows can be either, selected by passing an
167 * attribute at window surface construction time. To support this
168 * we ignore all double buffer configs and manipulate the buffer we
169 * return in the getBuffer callback to get the behaviour we want. */
170
Kristian Høgsbergc19dab72010-02-09 21:01:04 -0500171 if (double_buffer)
Kristian Høgsbergefd4a8c2010-07-27 18:25:54 -0400172 return NULL;
Kristian Høgsbergc6e830c2010-02-04 21:49:44 -0500173
Chia-I Wub67f7292010-10-22 15:03:11 +0800174 if (depth > 0 && depth != base.BufferSize)
Kristian Høgsbergefd4a8c2010-07-27 18:25:54 -0400175 return NULL;
Kristian Høgsbergc3c1a7e2010-02-09 20:49:40 -0500176
Chia-I Wub67f7292010-10-22 15:03:11 +0800177 base.NativeRenderable = EGL_TRUE;
Kristian Høgsbergefd4a8c2010-07-27 18:25:54 -0400178
Chia-I Wub67f7292010-10-22 15:03:11 +0800179 base.SurfaceType = surface_type;
Kristian Høgsbergefd4a8c2010-07-27 18:25:54 -0400180 if (surface_type & (EGL_PIXMAP_BIT | EGL_PBUFFER_BIT)) {
Chia-I Wub67f7292010-10-22 15:03:11 +0800181 base.BindToTextureRGB = bind_to_texture_rgb;
182 if (base.AlphaSize > 0)
183 base.BindToTextureRGBA = bind_to_texture_rgba;
Kristian Høgsbergefd4a8c2010-07-27 18:25:54 -0400184 }
Kristian Høgsberg42fa0092010-02-03 10:18:28 -0500185
Chia-I Wua4a38dc2011-01-13 16:53:13 +0800186 base.RenderableType = disp->ClientAPIs;
187 base.Conformant = disp->ClientAPIs;
Kristian Høgsberg42fa0092010-02-03 10:18:28 -0500188
Kristian Høgsbergc19dab72010-02-09 21:01:04 -0500189 if (!_eglValidateConfig(&base, EGL_FALSE)) {
Kristian Høgsbergc6e830c2010-02-04 21:49:44 -0500190 _eglLog(_EGL_DEBUG, "DRI2: failed to validate config %d", id);
Kristian Høgsbergefd4a8c2010-07-27 18:25:54 -0400191 return NULL;
Kristian Høgsberg42fa0092010-02-03 10:18:28 -0500192 }
193
Kristian Høgsbergc19dab72010-02-09 21:01:04 -0500194 conf = malloc(sizeof *conf);
195 if (conf != NULL) {
196 memcpy(&conf->base, &base, sizeof base);
197 conf->dri_config = dri_config;
Chia-I Wu8a6bdf32010-10-23 00:47:22 +0800198 _eglLinkConfig(&conf->base);
Kristian Høgsbergc19dab72010-02-09 21:01:04 -0500199 }
Kristian Høgsbergefd4a8c2010-07-27 18:25:54 -0400200
201 return conf;
Kristian Høgsberg42fa0092010-02-03 10:18:28 -0500202}
203
Kristian Høgsbergf4e7d1b2010-02-11 19:28:26 -0500204static __DRIimage *
Kristian Høgsberg17eace52010-09-22 22:01:17 -0400205dri2_lookup_egl_image(__DRIscreen *screen, void *image, void *data)
Kristian Høgsbergf4e7d1b2010-02-11 19:28:26 -0500206{
Kristian Høgsberg17eace52010-09-22 22:01:17 -0400207 _EGLDisplay *disp = data;
Kristian Høgsbergf4e7d1b2010-02-11 19:28:26 -0500208 struct dri2_egl_image *dri2_img;
209 _EGLImage *img;
210
Ian Romanickeade9462010-09-23 09:39:42 -0700211 (void) screen;
212
Kristian Høgsbergf4e7d1b2010-02-11 19:28:26 -0500213 img = _eglLookupImage(image, disp);
214 if (img == NULL) {
215 _eglError(EGL_BAD_PARAMETER, "dri2_lookup_egl_image");
216 return NULL;
217 }
218
219 dri2_img = dri2_egl_image(image);
220
221 return dri2_img->dri_image;
222}
223
Kristian Høgsberg2889d962011-02-02 22:10:40 -0500224const __DRIimageLookupExtension image_lookup_extension = {
Kristian Høgsberg2168b872010-06-02 22:48:06 -0400225 { __DRI_IMAGE_LOOKUP, 1 },
226 dri2_lookup_egl_image
227};
228
Kristian Høgsberg42fa0092010-02-03 10:18:28 -0500229static const char dri_driver_path[] = DEFAULT_DRIVER_DIR;
230
Kristian Høgsberg8c593d32010-02-09 10:57:43 -0500231struct dri2_extension_match {
232 const char *name;
233 int version;
234 int offset;
235};
236
237static struct dri2_extension_match dri2_driver_extensions[] = {
238 { __DRI_CORE, 1, offsetof(struct dri2_egl_display, core) },
239 { __DRI_DRI2, 1, offsetof(struct dri2_egl_display, dri2) },
Ian Romanick137fce22010-09-23 09:40:58 -0700240 { NULL, 0, 0 }
Kristian Høgsberg8c593d32010-02-09 10:57:43 -0500241};
242
243static struct dri2_extension_match dri2_core_extensions[] = {
244 { __DRI2_FLUSH, 1, offsetof(struct dri2_egl_display, flush) },
Kristian Høgsbergbba5a982010-02-09 15:49:28 -0500245 { __DRI_TEX_BUFFER, 2, offsetof(struct dri2_egl_display, tex_buffer) },
Kristian Høgsbergf4e7d1b2010-02-11 19:28:26 -0500246 { __DRI_IMAGE, 1, offsetof(struct dri2_egl_display, image) },
Ian Romanick137fce22010-09-23 09:40:58 -0700247 { NULL, 0, 0 }
Kristian Høgsberg8c593d32010-02-09 10:57:43 -0500248};
249
250static EGLBoolean
251dri2_bind_extensions(struct dri2_egl_display *dri2_dpy,
252 struct dri2_extension_match *matches,
253 const __DRIextension **extensions)
254{
255 int i, j, ret = EGL_TRUE;
256 void *field;
257
258 for (i = 0; extensions[i]; i++) {
259 _eglLog(_EGL_DEBUG, "DRI2: found extension `%s'", extensions[i]->name);
260 for (j = 0; matches[j].name; j++) {
261 if (strcmp(extensions[i]->name, matches[j].name) == 0 &&
262 extensions[i]->version >= matches[j].version) {
263 field = ((char *) dri2_dpy + matches[j].offset);
264 *(const __DRIextension **) field = extensions[i];
265 _eglLog(_EGL_INFO, "DRI2: found extension %s version %d",
266 extensions[i]->name, extensions[i]->version);
267 }
268 }
269 }
270
271 for (j = 0; matches[j].name; j++) {
272 field = ((char *) dri2_dpy + matches[j].offset);
273 if (*(const __DRIextension **) field == NULL) {
274 _eglLog(_EGL_FATAL, "DRI2: did not find extension %s version %d",
275 matches[j].name, matches[j].version);
276 ret = EGL_FALSE;
277 }
278 }
279
280 return ret;
281}
282
Kristian Høgsberg2889d962011-02-02 22:10:40 -0500283EGLBoolean
Kristian Høgsberg0defc252010-05-28 16:16:12 -0400284dri2_load_driver(_EGLDisplay *disp)
Kristian Høgsberg40073422010-03-02 15:34:18 -0500285{
Kristian Høgsberg0defc252010-05-28 16:16:12 -0400286 struct dri2_egl_display *dri2_dpy = disp->DriverData;
Kristian Høgsberg40073422010-03-02 15:34:18 -0500287 const __DRIextension **extensions;
Kristian Høgsberg40073422010-03-02 15:34:18 -0500288 char path[PATH_MAX], *search_paths, *p, *next, *end;
Kristian Høgsberg42fa0092010-02-03 10:18:28 -0500289
290 search_paths = NULL;
291 if (geteuid() == getuid()) {
292 /* don't allow setuid apps to use LIBGL_DRIVERS_PATH */
293 search_paths = getenv("LIBGL_DRIVERS_PATH");
294 }
295 if (search_paths == NULL)
296 search_paths = DEFAULT_DRIVER_DIR;
297
298 dri2_dpy->driver = NULL;
299 end = search_paths + strlen(search_paths);
300 for (p = search_paths; p < end && dri2_dpy->driver == NULL; p = next + 1) {
Eric Anholt6f77b752010-05-20 14:44:43 -0700301 int len;
Kristian Høgsberg42fa0092010-02-03 10:18:28 -0500302 next = strchr(p, ':');
303 if (next == NULL)
304 next = end;
305
Eric Anholt6f77b752010-05-20 14:44:43 -0700306 len = next - p;
307#if GLX_USE_TLS
Kristian Høgsberg42fa0092010-02-03 10:18:28 -0500308 snprintf(path, sizeof path,
Eric Anholt6f77b752010-05-20 14:44:43 -0700309 "%.*s/tls/%s_dri.so", len, p, dri2_dpy->driver_name);
Kristian Høgsberg42fa0092010-02-03 10:18:28 -0500310 dri2_dpy->driver = dlopen(path, RTLD_NOW | RTLD_GLOBAL);
Eric Anholt6f77b752010-05-20 14:44:43 -0700311#endif
312 if (dri2_dpy->driver == NULL) {
313 snprintf(path, sizeof path,
314 "%.*s/%s_dri.so", len, p, dri2_dpy->driver_name);
315 dri2_dpy->driver = dlopen(path, RTLD_NOW | RTLD_GLOBAL);
316 if (dri2_dpy->driver == NULL)
317 _eglLog(_EGL_DEBUG, "failed to open %s: %s\n", path, dlerror());
318 }
Kristian Høgsberg42fa0092010-02-03 10:18:28 -0500319 }
320
321 if (dri2_dpy->driver == NULL) {
Kristian Høgsberg7413d9a2010-05-13 15:42:51 -0400322 _eglLog(_EGL_WARNING,
Kristian Høgsberg42fa0092010-02-03 10:18:28 -0500323 "DRI2: failed to open any driver (search paths %s)",
324 search_paths);
Kristian Høgsberg0defc252010-05-28 16:16:12 -0400325 return EGL_FALSE;
Kristian Høgsberg42fa0092010-02-03 10:18:28 -0500326 }
327
328 _eglLog(_EGL_DEBUG, "DRI2: dlopen(%s)", path);
329 extensions = dlsym(dri2_dpy->driver, __DRI_DRIVER_EXTENSIONS);
330 if (extensions == NULL) {
Kristian Høgsberg7413d9a2010-05-13 15:42:51 -0400331 _eglLog(_EGL_WARNING,
Kristian Høgsberg42fa0092010-02-03 10:18:28 -0500332 "DRI2: driver exports no extensions (%s)", dlerror());
Kristian Høgsberg0defc252010-05-28 16:16:12 -0400333 dlclose(dri2_dpy->driver);
334 return EGL_FALSE;
Kristian Høgsberg42fa0092010-02-03 10:18:28 -0500335 }
336
Kristian Høgsberg0defc252010-05-28 16:16:12 -0400337 if (!dri2_bind_extensions(dri2_dpy, dri2_driver_extensions, extensions)) {
338 dlclose(dri2_dpy->driver);
339 return EGL_FALSE;
340 }
341
342 return EGL_TRUE;
343}
344
Kristian Høgsberg2889d962011-02-02 22:10:40 -0500345EGLBoolean
Kristian Høgsberg2168b872010-06-02 22:48:06 -0400346dri2_create_screen(_EGLDisplay *disp)
Kristian Høgsberg0defc252010-05-28 16:16:12 -0400347{
348 const __DRIextension **extensions;
349 struct dri2_egl_display *dri2_dpy;
350 unsigned int api_mask;
351
Kristian Høgsberg2168b872010-06-02 22:48:06 -0400352 dri2_dpy = disp->DriverData;
353 dri2_dpy->dri_screen =
354 dri2_dpy->dri2->createNewScreen(0, dri2_dpy->fd, dri2_dpy->extensions,
Kristian Høgsberg17eace52010-09-22 22:01:17 -0400355 &dri2_dpy->driver_configs, disp);
Kristian Høgsberg2168b872010-06-02 22:48:06 -0400356
357 if (dri2_dpy->dri_screen == NULL) {
358 _eglLog(_EGL_WARNING, "DRI2: failed to create dri screen");
Chia-I Wuf22665d2010-06-17 17:14:03 +0800359 return EGL_FALSE;
Kristian Høgsberg2168b872010-06-02 22:48:06 -0400360 }
361
362 extensions = dri2_dpy->core->getExtensions(dri2_dpy->dri_screen);
363 if (!dri2_bind_extensions(dri2_dpy, dri2_core_extensions, extensions))
364 goto cleanup_dri_screen;
365
366 if (dri2_dpy->dri2->base.version >= 2)
367 api_mask = dri2_dpy->dri2->getAPIMask(dri2_dpy->dri_screen);
368 else
Chia-I Wuaa139a12010-11-10 23:54:45 +0800369 api_mask = 1 << __DRI_API_OPENGL;
Kristian Høgsberg2168b872010-06-02 22:48:06 -0400370
Chia-I Wua4a38dc2011-01-13 16:53:13 +0800371 disp->ClientAPIs = 0;
Kristian Høgsberg2168b872010-06-02 22:48:06 -0400372 if (api_mask & (1 <<__DRI_API_OPENGL))
Chia-I Wua4a38dc2011-01-13 16:53:13 +0800373 disp->ClientAPIs |= EGL_OPENGL_BIT;
Kristian Høgsberg2168b872010-06-02 22:48:06 -0400374 if (api_mask & (1 <<__DRI_API_GLES))
Chia-I Wua4a38dc2011-01-13 16:53:13 +0800375 disp->ClientAPIs |= EGL_OPENGL_ES_BIT;
Kristian Høgsberg2168b872010-06-02 22:48:06 -0400376 if (api_mask & (1 << __DRI_API_GLES2))
Chia-I Wua4a38dc2011-01-13 16:53:13 +0800377 disp->ClientAPIs |= EGL_OPENGL_ES2_BIT;
Kristian Høgsberg2168b872010-06-02 22:48:06 -0400378
Kristian Høgsbergefd4a8c2010-07-27 18:25:54 -0400379 if (dri2_dpy->dri2->base.version >= 2) {
380 disp->Extensions.KHR_surfaceless_gles1 = EGL_TRUE;
381 disp->Extensions.KHR_surfaceless_gles2 = EGL_TRUE;
382 disp->Extensions.KHR_surfaceless_opengl = EGL_TRUE;
383 }
384
Kristian Høgsberg2168b872010-06-02 22:48:06 -0400385 return EGL_TRUE;
386
387 cleanup_dri_screen:
388 dri2_dpy->core->destroyScreen(dri2_dpy->dri_screen);
389
390 return EGL_FALSE;
391}
392
Kristian Høgsberg2168b872010-06-02 22:48:06 -0400393#ifdef HAVE_LIBUDEV
394
395struct dri2_driver_map {
396 int vendor_id;
397 const char *driver;
398 const int *chip_ids;
399 int num_chips_ids;
400};
401
402const int i915_chip_ids[] = {
403 0x3577, /* PCI_CHIP_I830_M */
404 0x2562, /* PCI_CHIP_845_G */
405 0x3582, /* PCI_CHIP_I855_GM */
406 0x2572, /* PCI_CHIP_I865_G */
407 0x2582, /* PCI_CHIP_I915_G */
408 0x258a, /* PCI_CHIP_E7221_G */
409 0x2592, /* PCI_CHIP_I915_GM */
410 0x2772, /* PCI_CHIP_I945_G */
411 0x27a2, /* PCI_CHIP_I945_GM */
412 0x27ae, /* PCI_CHIP_I945_GME */
413 0x29b2, /* PCI_CHIP_Q35_G */
414 0x29c2, /* PCI_CHIP_G33_G */
415 0x29d2, /* PCI_CHIP_Q33_G */
Robert Hooker77891702010-11-16 15:10:20 -0500416 0xa001, /* PCI_CHIP_IGD_G */
Jesse Barnese7eff0c2010-09-13 10:55:16 -0700417 0xa011, /* Pineview */
Kristian Høgsberg2168b872010-06-02 22:48:06 -0400418};
419
420const int i965_chip_ids[] = {
Robert Hooker77891702010-11-16 15:10:20 -0500421 0x0042, /* PCI_CHIP_ILD_G */
422 0x0046, /* PCI_CHIP_ILM_G */
423 0x0102, /* PCI_CHIP_SANDYBRIDGE_GT1 */
424 0x0106, /* PCI_CHIP_SANDYBRIDGE_M_GT1 */
425 0x010a, /* PCI_CHIP_SANDYBRIDGE_S */
426 0x0112, /* PCI_CHIP_SANDYBRIDGE_GT2 */
427 0x0116, /* PCI_CHIP_SANDYBRIDGE_M_GT2 */
428 0x0122, /* PCI_CHIP_SANDYBRIDGE_GT2_PLUS */
429 0x0126, /* PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS */
Kristian Høgsberg2168b872010-06-02 22:48:06 -0400430 0x29a2, /* PCI_CHIP_I965_G */
431 0x2992, /* PCI_CHIP_I965_Q */
432 0x2982, /* PCI_CHIP_I965_G_1 */
433 0x2972, /* PCI_CHIP_I946_GZ */
434 0x2a02, /* PCI_CHIP_I965_GM */
435 0x2a12, /* PCI_CHIP_I965_GME */
436 0x2a42, /* PCI_CHIP_GM45_GM */
437 0x2e02, /* PCI_CHIP_IGD_E_G */
438 0x2e12, /* PCI_CHIP_Q45_G */
439 0x2e22, /* PCI_CHIP_G45_G */
440 0x2e32, /* PCI_CHIP_G41_G */
Robert Hooker77891702010-11-16 15:10:20 -0500441 0x2e42, /* PCI_CHIP_B43_G */
442 0x2e92, /* PCI_CHIP_B43_G1 */
Kristian Høgsberg2168b872010-06-02 22:48:06 -0400443};
444
Alex Deucher4990b772010-11-08 14:25:38 -0500445const int r100_chip_ids[] = {
446 0x4C57, /* PCI_CHIP_RADEON_LW */
447 0x4C58, /* PCI_CHIP_RADEON_LX */
448 0x4C59, /* PCI_CHIP_RADEON_LY */
449 0x4C5A, /* PCI_CHIP_RADEON_LZ */
450 0x5144, /* PCI_CHIP_RADEON_QD */
451 0x5145, /* PCI_CHIP_RADEON_QE */
452 0x5146, /* PCI_CHIP_RADEON_QF */
453 0x5147, /* PCI_CHIP_RADEON_QG */
454 0x5159, /* PCI_CHIP_RADEON_QY */
455 0x515A, /* PCI_CHIP_RADEON_QZ */
456 0x5157, /* PCI_CHIP_RV200_QW */
457 0x5158, /* PCI_CHIP_RV200_QX */
458 0x515E, /* PCI_CHIP_RN50_515E */
459 0x5969, /* PCI_CHIP_RN50_5969 */
460 0x4136, /* PCI_CHIP_RS100_4136 */
461 0x4336, /* PCI_CHIP_RS100_4336 */
462 0x4137, /* PCI_CHIP_RS200_4137 */
463 0x4337, /* PCI_CHIP_RS200_4337 */
464 0x4237, /* PCI_CHIP_RS250_4237 */
465 0x4437, /* PCI_CHIP_RS250_4437 */
466};
467
468const int r200_chip_ids[] = {
469 0x5148, /* PCI_CHIP_R200_QH */
470 0x514C, /* PCI_CHIP_R200_QL */
471 0x514D, /* PCI_CHIP_R200_QM */
472 0x4242, /* PCI_CHIP_R200_BB */
473 0x4243, /* PCI_CHIP_R200_BC */
474 0x4966, /* PCI_CHIP_RV250_If */
475 0x4967, /* PCI_CHIP_RV250_Ig */
476 0x4C64, /* PCI_CHIP_RV250_Ld */
477 0x4C66, /* PCI_CHIP_RV250_Lf */
478 0x4C67, /* PCI_CHIP_RV250_Lg */
479 0x5960, /* PCI_CHIP_RV280_5960 */
480 0x5961, /* PCI_CHIP_RV280_5961 */
481 0x5962, /* PCI_CHIP_RV280_5962 */
482 0x5964, /* PCI_CHIP_RV280_5964 */
483 0x5965, /* PCI_CHIP_RV280_5965 */
484 0x5C61, /* PCI_CHIP_RV280_5C61 */
485 0x5C63, /* PCI_CHIP_RV280_5C63 */
486 0x5834, /* PCI_CHIP_RS300_5834 */
487 0x5835, /* PCI_CHIP_RS300_5835 */
488 0x7834, /* PCI_CHIP_RS350_7834 */
489 0x7835, /* PCI_CHIP_RS350_7835 */
490};
491
492const int r300_chip_ids[] = {
493 0x4144, /* PCI_CHIP_R300_AD */
494 0x4145, /* PCI_CHIP_R300_AE */
495 0x4146, /* PCI_CHIP_R300_AF */
496 0x4147, /* PCI_CHIP_R300_AG */
497 0x4E44, /* PCI_CHIP_R300_ND */
498 0x4E45, /* PCI_CHIP_R300_NE */
499 0x4E46, /* PCI_CHIP_R300_NF */
500 0x4E47, /* PCI_CHIP_R300_NG */
501 0x4E48, /* PCI_CHIP_R350_NH */
502 0x4E49, /* PCI_CHIP_R350_NI */
503 0x4E4B, /* PCI_CHIP_R350_NK */
504 0x4148, /* PCI_CHIP_R350_AH */
505 0x4149, /* PCI_CHIP_R350_AI */
506 0x414A, /* PCI_CHIP_R350_AJ */
507 0x414B, /* PCI_CHIP_R350_AK */
508 0x4E4A, /* PCI_CHIP_R360_NJ */
509 0x4150, /* PCI_CHIP_RV350_AP */
510 0x4151, /* PCI_CHIP_RV350_AQ */
511 0x4152, /* PCI_CHIP_RV350_AR */
512 0x4153, /* PCI_CHIP_RV350_AS */
513 0x4154, /* PCI_CHIP_RV350_AT */
514 0x4155, /* PCI_CHIP_RV350_AU */
515 0x4156, /* PCI_CHIP_RV350_AV */
516 0x4E50, /* PCI_CHIP_RV350_NP */
517 0x4E51, /* PCI_CHIP_RV350_NQ */
518 0x4E52, /* PCI_CHIP_RV350_NR */
519 0x4E53, /* PCI_CHIP_RV350_NS */
520 0x4E54, /* PCI_CHIP_RV350_NT */
521 0x4E56, /* PCI_CHIP_RV350_NV */
522 0x5460, /* PCI_CHIP_RV370_5460 */
523 0x5462, /* PCI_CHIP_RV370_5462 */
524 0x5464, /* PCI_CHIP_RV370_5464 */
525 0x5B60, /* PCI_CHIP_RV370_5B60 */
526 0x5B62, /* PCI_CHIP_RV370_5B62 */
527 0x5B63, /* PCI_CHIP_RV370_5B63 */
528 0x5B64, /* PCI_CHIP_RV370_5B64 */
529 0x5B65, /* PCI_CHIP_RV370_5B65 */
530 0x3150, /* PCI_CHIP_RV380_3150 */
531 0x3152, /* PCI_CHIP_RV380_3152 */
532 0x3154, /* PCI_CHIP_RV380_3154 */
533 0x3155, /* PCI_CHIP_RV380_3155 */
534 0x3E50, /* PCI_CHIP_RV380_3E50 */
535 0x3E54, /* PCI_CHIP_RV380_3E54 */
536 0x4A48, /* PCI_CHIP_R420_JH */
537 0x4A49, /* PCI_CHIP_R420_JI */
538 0x4A4A, /* PCI_CHIP_R420_JJ */
539 0x4A4B, /* PCI_CHIP_R420_JK */
540 0x4A4C, /* PCI_CHIP_R420_JL */
541 0x4A4D, /* PCI_CHIP_R420_JM */
542 0x4A4E, /* PCI_CHIP_R420_JN */
543 0x4A4F, /* PCI_CHIP_R420_JO */
544 0x4A50, /* PCI_CHIP_R420_JP */
545 0x4A54, /* PCI_CHIP_R420_JT */
546 0x5548, /* PCI_CHIP_R423_UH */
547 0x5549, /* PCI_CHIP_R423_UI */
548 0x554A, /* PCI_CHIP_R423_UJ */
549 0x554B, /* PCI_CHIP_R423_UK */
550 0x5550, /* PCI_CHIP_R423_5550 */
551 0x5551, /* PCI_CHIP_R423_UQ */
552 0x5552, /* PCI_CHIP_R423_UR */
553 0x5554, /* PCI_CHIP_R423_UT */
554 0x5D57, /* PCI_CHIP_R423_5D57 */
555 0x554C, /* PCI_CHIP_R430_554C */
556 0x554D, /* PCI_CHIP_R430_554D */
557 0x554E, /* PCI_CHIP_R430_554E */
558 0x554F, /* PCI_CHIP_R430_554F */
559 0x5D48, /* PCI_CHIP_R430_5D48 */
560 0x5D49, /* PCI_CHIP_R430_5D49 */
561 0x5D4A, /* PCI_CHIP_R430_5D4A */
562 0x5D4C, /* PCI_CHIP_R480_5D4C */
563 0x5D4D, /* PCI_CHIP_R480_5D4D */
564 0x5D4E, /* PCI_CHIP_R480_5D4E */
565 0x5D4F, /* PCI_CHIP_R480_5D4F */
566 0x5D50, /* PCI_CHIP_R480_5D50 */
567 0x5D52, /* PCI_CHIP_R480_5D52 */
568 0x4B49, /* PCI_CHIP_R481_4B49 */
569 0x4B4A, /* PCI_CHIP_R481_4B4A */
570 0x4B4B, /* PCI_CHIP_R481_4B4B */
571 0x4B4C, /* PCI_CHIP_R481_4B4C */
572 0x564A, /* PCI_CHIP_RV410_564A */
573 0x564B, /* PCI_CHIP_RV410_564B */
574 0x564F, /* PCI_CHIP_RV410_564F */
575 0x5652, /* PCI_CHIP_RV410_5652 */
576 0x5653, /* PCI_CHIP_RV410_5653 */
577 0x5657, /* PCI_CHIP_RV410_5657 */
578 0x5E48, /* PCI_CHIP_RV410_5E48 */
579 0x5E4A, /* PCI_CHIP_RV410_5E4A */
580 0x5E4B, /* PCI_CHIP_RV410_5E4B */
581 0x5E4C, /* PCI_CHIP_RV410_5E4C */
582 0x5E4D, /* PCI_CHIP_RV410_5E4D */
583 0x5E4F, /* PCI_CHIP_RV410_5E4F */
584 0x5A41, /* PCI_CHIP_RS400_5A41 */
585 0x5A42, /* PCI_CHIP_RS400_5A42 */
586 0x5A61, /* PCI_CHIP_RC410_5A61 */
587 0x5A62, /* PCI_CHIP_RC410_5A62 */
588 0x5954, /* PCI_CHIP_RS480_5954 */
589 0x5955, /* PCI_CHIP_RS480_5955 */
590 0x5974, /* PCI_CHIP_RS482_5974 */
591 0x5975, /* PCI_CHIP_RS482_5975 */
592 0x7100, /* PCI_CHIP_R520_7100 */
593 0x7101, /* PCI_CHIP_R520_7101 */
594 0x7102, /* PCI_CHIP_R520_7102 */
595 0x7103, /* PCI_CHIP_R520_7103 */
596 0x7104, /* PCI_CHIP_R520_7104 */
597 0x7105, /* PCI_CHIP_R520_7105 */
598 0x7106, /* PCI_CHIP_R520_7106 */
599 0x7108, /* PCI_CHIP_R520_7108 */
600 0x7109, /* PCI_CHIP_R520_7109 */
601 0x710A, /* PCI_CHIP_R520_710A */
602 0x710B, /* PCI_CHIP_R520_710B */
603 0x710C, /* PCI_CHIP_R520_710C */
604 0x710E, /* PCI_CHIP_R520_710E */
605 0x710F, /* PCI_CHIP_R520_710F */
606 0x7140, /* PCI_CHIP_RV515_7140 */
607 0x7141, /* PCI_CHIP_RV515_7141 */
608 0x7142, /* PCI_CHIP_RV515_7142 */
609 0x7143, /* PCI_CHIP_RV515_7143 */
610 0x7144, /* PCI_CHIP_RV515_7144 */
611 0x7145, /* PCI_CHIP_RV515_7145 */
612 0x7146, /* PCI_CHIP_RV515_7146 */
613 0x7147, /* PCI_CHIP_RV515_7147 */
614 0x7149, /* PCI_CHIP_RV515_7149 */
615 0x714A, /* PCI_CHIP_RV515_714A */
616 0x714B, /* PCI_CHIP_RV515_714B */
617 0x714C, /* PCI_CHIP_RV515_714C */
618 0x714D, /* PCI_CHIP_RV515_714D */
619 0x714E, /* PCI_CHIP_RV515_714E */
620 0x714F, /* PCI_CHIP_RV515_714F */
621 0x7151, /* PCI_CHIP_RV515_7151 */
622 0x7152, /* PCI_CHIP_RV515_7152 */
623 0x7153, /* PCI_CHIP_RV515_7153 */
624 0x715E, /* PCI_CHIP_RV515_715E */
625 0x715F, /* PCI_CHIP_RV515_715F */
626 0x7180, /* PCI_CHIP_RV515_7180 */
627 0x7181, /* PCI_CHIP_RV515_7181 */
628 0x7183, /* PCI_CHIP_RV515_7183 */
629 0x7186, /* PCI_CHIP_RV515_7186 */
630 0x7187, /* PCI_CHIP_RV515_7187 */
631 0x7188, /* PCI_CHIP_RV515_7188 */
632 0x718A, /* PCI_CHIP_RV515_718A */
633 0x718B, /* PCI_CHIP_RV515_718B */
634 0x718C, /* PCI_CHIP_RV515_718C */
635 0x718D, /* PCI_CHIP_RV515_718D */
636 0x718F, /* PCI_CHIP_RV515_718F */
637 0x7193, /* PCI_CHIP_RV515_7193 */
638 0x7196, /* PCI_CHIP_RV515_7196 */
639 0x719B, /* PCI_CHIP_RV515_719B */
640 0x719F, /* PCI_CHIP_RV515_719F */
641 0x7200, /* PCI_CHIP_RV515_7200 */
642 0x7210, /* PCI_CHIP_RV515_7210 */
643 0x7211, /* PCI_CHIP_RV515_7211 */
644 0x71C0, /* PCI_CHIP_RV530_71C0 */
645 0x71C1, /* PCI_CHIP_RV530_71C1 */
646 0x71C2, /* PCI_CHIP_RV530_71C2 */
647 0x71C3, /* PCI_CHIP_RV530_71C3 */
648 0x71C4, /* PCI_CHIP_RV530_71C4 */
649 0x71C5, /* PCI_CHIP_RV530_71C5 */
650 0x71C6, /* PCI_CHIP_RV530_71C6 */
651 0x71C7, /* PCI_CHIP_RV530_71C7 */
652 0x71CD, /* PCI_CHIP_RV530_71CD */
653 0x71CE, /* PCI_CHIP_RV530_71CE */
654 0x71D2, /* PCI_CHIP_RV530_71D2 */
655 0x71D4, /* PCI_CHIP_RV530_71D4 */
656 0x71D5, /* PCI_CHIP_RV530_71D5 */
657 0x71D6, /* PCI_CHIP_RV530_71D6 */
658 0x71DA, /* PCI_CHIP_RV530_71DA */
659 0x71DE, /* PCI_CHIP_RV530_71DE */
660 0x7281, /* PCI_CHIP_RV560_7281 */
661 0x7283, /* PCI_CHIP_RV560_7283 */
662 0x7287, /* PCI_CHIP_RV560_7287 */
663 0x7290, /* PCI_CHIP_RV560_7290 */
664 0x7291, /* PCI_CHIP_RV560_7291 */
665 0x7293, /* PCI_CHIP_RV560_7293 */
666 0x7297, /* PCI_CHIP_RV560_7297 */
667 0x7280, /* PCI_CHIP_RV570_7280 */
668 0x7288, /* PCI_CHIP_RV570_7288 */
669 0x7289, /* PCI_CHIP_RV570_7289 */
670 0x728B, /* PCI_CHIP_RV570_728B */
671 0x728C, /* PCI_CHIP_RV570_728C */
672 0x7240, /* PCI_CHIP_R580_7240 */
673 0x7243, /* PCI_CHIP_R580_7243 */
674 0x7244, /* PCI_CHIP_R580_7244 */
675 0x7245, /* PCI_CHIP_R580_7245 */
676 0x7246, /* PCI_CHIP_R580_7246 */
677 0x7247, /* PCI_CHIP_R580_7247 */
678 0x7248, /* PCI_CHIP_R580_7248 */
679 0x7249, /* PCI_CHIP_R580_7249 */
680 0x724A, /* PCI_CHIP_R580_724A */
681 0x724B, /* PCI_CHIP_R580_724B */
682 0x724C, /* PCI_CHIP_R580_724C */
683 0x724D, /* PCI_CHIP_R580_724D */
684 0x724E, /* PCI_CHIP_R580_724E */
685 0x724F, /* PCI_CHIP_R580_724F */
686 0x7284, /* PCI_CHIP_R580_7284 */
687 0x793F, /* PCI_CHIP_RS600_793F */
688 0x7941, /* PCI_CHIP_RS600_7941 */
689 0x7942, /* PCI_CHIP_RS600_7942 */
690 0x791E, /* PCI_CHIP_RS690_791E */
691 0x791F, /* PCI_CHIP_RS690_791F */
692 0x796C, /* PCI_CHIP_RS740_796C */
693 0x796D, /* PCI_CHIP_RS740_796D */
694 0x796E, /* PCI_CHIP_RS740_796E */
695 0x796F, /* PCI_CHIP_RS740_796F */
696};
697
698const int r600_chip_ids[] = {
699 0x9400, /* PCI_CHIP_R600_9400 */
700 0x9401, /* PCI_CHIP_R600_9401 */
701 0x9402, /* PCI_CHIP_R600_9402 */
702 0x9403, /* PCI_CHIP_R600_9403 */
703 0x9405, /* PCI_CHIP_R600_9405 */
704 0x940A, /* PCI_CHIP_R600_940A */
705 0x940B, /* PCI_CHIP_R600_940B */
706 0x940F, /* PCI_CHIP_R600_940F */
707 0x94C0, /* PCI_CHIP_RV610_94C0 */
708 0x94C1, /* PCI_CHIP_RV610_94C1 */
709 0x94C3, /* PCI_CHIP_RV610_94C3 */
710 0x94C4, /* PCI_CHIP_RV610_94C4 */
711 0x94C5, /* PCI_CHIP_RV610_94C5 */
712 0x94C6, /* PCI_CHIP_RV610_94C6 */
713 0x94C7, /* PCI_CHIP_RV610_94C7 */
714 0x94C8, /* PCI_CHIP_RV610_94C8 */
715 0x94C9, /* PCI_CHIP_RV610_94C9 */
716 0x94CB, /* PCI_CHIP_RV610_94CB */
717 0x94CC, /* PCI_CHIP_RV610_94CC */
718 0x94CD, /* PCI_CHIP_RV610_94CD */
719 0x9580, /* PCI_CHIP_RV630_9580 */
720 0x9581, /* PCI_CHIP_RV630_9581 */
721 0x9583, /* PCI_CHIP_RV630_9583 */
722 0x9586, /* PCI_CHIP_RV630_9586 */
723 0x9587, /* PCI_CHIP_RV630_9587 */
724 0x9588, /* PCI_CHIP_RV630_9588 */
725 0x9589, /* PCI_CHIP_RV630_9589 */
726 0x958A, /* PCI_CHIP_RV630_958A */
727 0x958B, /* PCI_CHIP_RV630_958B */
728 0x958C, /* PCI_CHIP_RV630_958C */
729 0x958D, /* PCI_CHIP_RV630_958D */
730 0x958E, /* PCI_CHIP_RV630_958E */
731 0x958F, /* PCI_CHIP_RV630_958F */
732 0x9500, /* PCI_CHIP_RV670_9500 */
733 0x9501, /* PCI_CHIP_RV670_9501 */
734 0x9504, /* PCI_CHIP_RV670_9504 */
735 0x9505, /* PCI_CHIP_RV670_9505 */
736 0x9506, /* PCI_CHIP_RV670_9506 */
737 0x9507, /* PCI_CHIP_RV670_9507 */
738 0x9508, /* PCI_CHIP_RV670_9508 */
739 0x9509, /* PCI_CHIP_RV670_9509 */
740 0x950F, /* PCI_CHIP_RV670_950F */
741 0x9511, /* PCI_CHIP_RV670_9511 */
742 0x9515, /* PCI_CHIP_RV670_9515 */
743 0x9517, /* PCI_CHIP_RV670_9517 */
744 0x9519, /* PCI_CHIP_RV670_9519 */
745 0x95C0, /* PCI_CHIP_RV620_95C0 */
746 0x95C2, /* PCI_CHIP_RV620_95C2 */
747 0x95C4, /* PCI_CHIP_RV620_95C4 */
748 0x95C5, /* PCI_CHIP_RV620_95C5 */
749 0x95C6, /* PCI_CHIP_RV620_95C6 */
750 0x95C7, /* PCI_CHIP_RV620_95C7 */
751 0x95C9, /* PCI_CHIP_RV620_95C9 */
752 0x95CC, /* PCI_CHIP_RV620_95CC */
753 0x95CD, /* PCI_CHIP_RV620_95CD */
754 0x95CE, /* PCI_CHIP_RV620_95CE */
755 0x95CF, /* PCI_CHIP_RV620_95CF */
756 0x9590, /* PCI_CHIP_RV635_9590 */
757 0x9591, /* PCI_CHIP_RV635_9591 */
758 0x9593, /* PCI_CHIP_RV635_9593 */
759 0x9595, /* PCI_CHIP_RV635_9595 */
760 0x9596, /* PCI_CHIP_RV635_9596 */
761 0x9597, /* PCI_CHIP_RV635_9597 */
762 0x9598, /* PCI_CHIP_RV635_9598 */
763 0x9599, /* PCI_CHIP_RV635_9599 */
764 0x959B, /* PCI_CHIP_RV635_959B */
765 0x9610, /* PCI_CHIP_RS780_9610 */
766 0x9611, /* PCI_CHIP_RS780_9611 */
767 0x9612, /* PCI_CHIP_RS780_9612 */
768 0x9613, /* PCI_CHIP_RS780_9613 */
769 0x9614, /* PCI_CHIP_RS780_9614 */
770 0x9615, /* PCI_CHIP_RS780_9615 */
771 0x9616, /* PCI_CHIP_RS780_9616 */
772 0x9710, /* PCI_CHIP_RS880_9710 */
773 0x9711, /* PCI_CHIP_RS880_9711 */
774 0x9712, /* PCI_CHIP_RS880_9712 */
775 0x9713, /* PCI_CHIP_RS880_9713 */
776 0x9714, /* PCI_CHIP_RS880_9714 */
777 0x9715, /* PCI_CHIP_RS880_9715 */
778 0x9440, /* PCI_CHIP_RV770_9440 */
779 0x9441, /* PCI_CHIP_RV770_9441 */
780 0x9442, /* PCI_CHIP_RV770_9442 */
781 0x9443, /* PCI_CHIP_RV770_9443 */
782 0x9444, /* PCI_CHIP_RV770_9444 */
783 0x9446, /* PCI_CHIP_RV770_9446 */
784 0x944A, /* PCI_CHIP_RV770_944A */
785 0x944B, /* PCI_CHIP_RV770_944B */
786 0x944C, /* PCI_CHIP_RV770_944C */
787 0x944E, /* PCI_CHIP_RV770_944E */
788 0x9450, /* PCI_CHIP_RV770_9450 */
789 0x9452, /* PCI_CHIP_RV770_9452 */
790 0x9456, /* PCI_CHIP_RV770_9456 */
791 0x945A, /* PCI_CHIP_RV770_945A */
792 0x945B, /* PCI_CHIP_RV770_945B */
793 0x945E, /* PCI_CHIP_RV770_945E */
794 0x9460, /* PCI_CHIP_RV790_9460 */
795 0x9462, /* PCI_CHIP_RV790_9462 */
796 0x946A, /* PCI_CHIP_RV770_946A */
797 0x946B, /* PCI_CHIP_RV770_946B */
798 0x947A, /* PCI_CHIP_RV770_947A */
799 0x947B, /* PCI_CHIP_RV770_947B */
800 0x9480, /* PCI_CHIP_RV730_9480 */
801 0x9487, /* PCI_CHIP_RV730_9487 */
802 0x9488, /* PCI_CHIP_RV730_9488 */
803 0x9489, /* PCI_CHIP_RV730_9489 */
804 0x948A, /* PCI_CHIP_RV730_948A */
805 0x948F, /* PCI_CHIP_RV730_948F */
806 0x9490, /* PCI_CHIP_RV730_9490 */
807 0x9491, /* PCI_CHIP_RV730_9491 */
808 0x9495, /* PCI_CHIP_RV730_9495 */
809 0x9498, /* PCI_CHIP_RV730_9498 */
810 0x949C, /* PCI_CHIP_RV730_949C */
811 0x949E, /* PCI_CHIP_RV730_949E */
812 0x949F, /* PCI_CHIP_RV730_949F */
813 0x9540, /* PCI_CHIP_RV710_9540 */
814 0x9541, /* PCI_CHIP_RV710_9541 */
815 0x9542, /* PCI_CHIP_RV710_9542 */
816 0x954E, /* PCI_CHIP_RV710_954E */
817 0x954F, /* PCI_CHIP_RV710_954F */
818 0x9552, /* PCI_CHIP_RV710_9552 */
819 0x9553, /* PCI_CHIP_RV710_9553 */
820 0x9555, /* PCI_CHIP_RV710_9555 */
821 0x9557, /* PCI_CHIP_RV710_9557 */
822 0x955F, /* PCI_CHIP_RV710_955F */
823 0x94A0, /* PCI_CHIP_RV740_94A0 */
824 0x94A1, /* PCI_CHIP_RV740_94A1 */
825 0x94A3, /* PCI_CHIP_RV740_94A3 */
826 0x94B1, /* PCI_CHIP_RV740_94B1 */
827 0x94B3, /* PCI_CHIP_RV740_94B3 */
828 0x94B4, /* PCI_CHIP_RV740_94B4 */
829 0x94B5, /* PCI_CHIP_RV740_94B5 */
830 0x94B9, /* PCI_CHIP_RV740_94B9 */
831 0x68E0, /* PCI_CHIP_CEDAR_68E0 */
832 0x68E1, /* PCI_CHIP_CEDAR_68E1 */
833 0x68E4, /* PCI_CHIP_CEDAR_68E4 */
834 0x68E5, /* PCI_CHIP_CEDAR_68E5 */
835 0x68E8, /* PCI_CHIP_CEDAR_68E8 */
836 0x68E9, /* PCI_CHIP_CEDAR_68E9 */
837 0x68F1, /* PCI_CHIP_CEDAR_68F1 */
838 0x68F8, /* PCI_CHIP_CEDAR_68F8 */
839 0x68F9, /* PCI_CHIP_CEDAR_68F9 */
840 0x68FE, /* PCI_CHIP_CEDAR_68FE */
841 0x68C0, /* PCI_CHIP_REDWOOD_68C0 */
842 0x68C1, /* PCI_CHIP_REDWOOD_68C1 */
843 0x68C8, /* PCI_CHIP_REDWOOD_68C8 */
844 0x68C9, /* PCI_CHIP_REDWOOD_68C9 */
845 0x68D8, /* PCI_CHIP_REDWOOD_68D8 */
846 0x68D9, /* PCI_CHIP_REDWOOD_68D9 */
847 0x68DA, /* PCI_CHIP_REDWOOD_68DA */
848 0x68DE, /* PCI_CHIP_REDWOOD_68DE */
849 0x68A0, /* PCI_CHIP_JUNIPER_68A0 */
850 0x68A1, /* PCI_CHIP_JUNIPER_68A1 */
851 0x68A8, /* PCI_CHIP_JUNIPER_68A8 */
852 0x68A9, /* PCI_CHIP_JUNIPER_68A9 */
853 0x68B0, /* PCI_CHIP_JUNIPER_68B0 */
854 0x68B8, /* PCI_CHIP_JUNIPER_68B8 */
855 0x68B9, /* PCI_CHIP_JUNIPER_68B9 */
856 0x68BE, /* PCI_CHIP_JUNIPER_68BE */
857 0x6880, /* PCI_CHIP_CYPRESS_6880 */
858 0x6888, /* PCI_CHIP_CYPRESS_6888 */
859 0x6889, /* PCI_CHIP_CYPRESS_6889 */
860 0x688A, /* PCI_CHIP_CYPRESS_688A */
861 0x6898, /* PCI_CHIP_CYPRESS_6898 */
862 0x6899, /* PCI_CHIP_CYPRESS_6899 */
863 0x689E, /* PCI_CHIP_CYPRESS_689E */
864 0x689C, /* PCI_CHIP_HEMLOCK_689C */
865 0x689D, /* PCI_CHIP_HEMLOCK_689D */
866};
867
Kristian Høgsberg2168b872010-06-02 22:48:06 -0400868const struct dri2_driver_map driver_map[] = {
869 { 0x8086, "i915", i915_chip_ids, ARRAY_SIZE(i915_chip_ids) },
870 { 0x8086, "i965", i965_chip_ids, ARRAY_SIZE(i965_chip_ids) },
Alex Deucher4990b772010-11-08 14:25:38 -0500871 { 0x1002, "radeon", r100_chip_ids, ARRAY_SIZE(r100_chip_ids) },
872 { 0x1002, "r200", r200_chip_ids, ARRAY_SIZE(r200_chip_ids) },
873 { 0x1002, "r300", r300_chip_ids, ARRAY_SIZE(r300_chip_ids) },
874 { 0x1002, "r600", r600_chip_ids, ARRAY_SIZE(r600_chip_ids) },
Kristian Høgsberg2168b872010-06-02 22:48:06 -0400875};
876
877static char *
878dri2_get_driver_for_fd(int fd)
879{
880 struct udev *udev;
881 struct udev_device *device, *parent;
882 struct stat buf;
883 const char *pci_id;
884 char *driver = NULL;
885 int vendor_id, chip_id, i, j;
886
887 udev = udev_new();
888 if (fstat(fd, &buf) < 0) {
889 _eglLog(_EGL_WARNING, "EGL-DRI2: failed to stat fd %d", fd);
890 goto out;
891 }
892
893 device = udev_device_new_from_devnum(udev, 'c', buf.st_rdev);
894 if (device == NULL) {
895 _eglLog(_EGL_WARNING,
896 "EGL-DRI2: could not create udev device for fd %d", fd);
897 goto out;
898 }
899
900 parent = udev_device_get_parent(device);
901 if (parent == NULL) {
902 _eglLog(_EGL_WARNING, "DRI2: could not get parent device");
903 goto out;
904 }
905
906 pci_id = udev_device_get_property_value(parent, "PCI_ID");
907 if (pci_id == NULL || sscanf(pci_id, "%x:%x", &vendor_id, &chip_id) != 2) {
908 _eglLog(_EGL_WARNING, "EGL-DRI2: malformed or no PCI ID");
909 goto out;
910 }
911
912 for (i = 0; i < ARRAY_SIZE(driver_map); i++) {
913 if (vendor_id != driver_map[i].vendor_id)
914 continue;
915 for (j = 0; j < driver_map[i].num_chips_ids; j++)
916 if (driver_map[i].chip_ids[j] == chip_id) {
917 driver = strdup(driver_map[i].driver);
918 _eglLog(_EGL_DEBUG, "pci id for %d: %04x:%04x, driver %s",
919 fd, vendor_id, chip_id, driver);
920 goto out;
921 }
922 }
923
924 out:
925 udev_device_unref(device);
926 udev_unref(udev);
927
928 return driver;
929}
930
931static EGLBoolean
Chia-I Wua4a38dc2011-01-13 16:53:13 +0800932dri2_initialize_drm(_EGLDriver *drv, _EGLDisplay *disp)
Kristian Høgsberg2168b872010-06-02 22:48:06 -0400933{
934 struct dri2_egl_display *dri2_dpy;
Kristian Høgsbergefd4a8c2010-07-27 18:25:54 -0400935 int i;
Kristian Høgsberg2168b872010-06-02 22:48:06 -0400936
937 dri2_dpy = malloc(sizeof *dri2_dpy);
938 if (!dri2_dpy)
939 return _eglError(EGL_BAD_ALLOC, "eglInitialize");
940
941 disp->DriverData = (void *) dri2_dpy;
942 dri2_dpy->fd = (int) disp->PlatformDisplay;
943
944 dri2_dpy->driver_name = dri2_get_driver_for_fd(dri2_dpy->fd);
945 if (dri2_dpy->driver_name == NULL)
946 return _eglError(EGL_BAD_ALLOC, "DRI2: failed to get driver name");
947
948 if (!dri2_load_driver(disp))
949 goto cleanup_driver_name;
950
951 dri2_dpy->extensions[0] = &image_lookup_extension.base;
952 dri2_dpy->extensions[1] = &use_invalidate.base;
953 dri2_dpy->extensions[2] = NULL;
954
955 if (!dri2_create_screen(disp))
956 goto cleanup_driver;
957
Kristian Høgsbergefd4a8c2010-07-27 18:25:54 -0400958 for (i = 0; dri2_dpy->driver_configs[i]; i++)
959 dri2_add_config(disp, dri2_dpy->driver_configs[i], i + 1, 0, 0);
960
Kristian Høgsberg5aaa53e2010-06-03 21:36:40 -0400961 disp->Extensions.MESA_drm_image = EGL_TRUE;
Kristian Høgsberg2168b872010-06-02 22:48:06 -0400962 disp->Extensions.KHR_image_base = EGL_TRUE;
963 disp->Extensions.KHR_gl_renderbuffer_image = EGL_TRUE;
964 disp->Extensions.KHR_gl_texture_2D_image = EGL_TRUE;
965
Kristian Høgsberge8a72462010-07-29 14:26:34 -0400966 /* we're supporting EGL 1.4 */
Chia-I Wua4a38dc2011-01-13 16:53:13 +0800967 disp->VersionMajor = 1;
968 disp->VersionMinor = 4;
Kristian Høgsberge8a72462010-07-29 14:26:34 -0400969
Kristian Høgsberg2168b872010-06-02 22:48:06 -0400970 return EGL_TRUE;
971
972 cleanup_driver:
973 dlclose(dri2_dpy->driver);
974 cleanup_driver_name:
975 free(dri2_dpy->driver_name);
976
977 return EGL_FALSE;
978}
979
980#endif
981
982/**
983 * Called via eglInitialize(), GLX_drv->API.Initialize().
984 */
985static EGLBoolean
Chia-I Wua4a38dc2011-01-13 16:53:13 +0800986dri2_initialize(_EGLDriver *drv, _EGLDisplay *disp)
Kristian Høgsberg2168b872010-06-02 22:48:06 -0400987{
Chia-I Wua22a3322011-01-13 04:40:38 +0800988 /* not until swrast_dri is supported */
989 if (disp->Options.UseFallback)
990 return EGL_FALSE;
991
Kristian Høgsberg2168b872010-06-02 22:48:06 -0400992 switch (disp->Platform) {
993 case _EGL_PLATFORM_X11:
Chia-I Wu655e4592011-01-13 00:27:45 +0800994 if (disp->Options.TestOnly)
995 return EGL_TRUE;
Chia-I Wua4a38dc2011-01-13 16:53:13 +0800996 return dri2_initialize_x11(drv, disp);
Kristian Høgsberg2168b872010-06-02 22:48:06 -0400997
998#ifdef HAVE_LIBUDEV
999 case _EGL_PLATFORM_DRM:
Chia-I Wu655e4592011-01-13 00:27:45 +08001000 if (disp->Options.TestOnly)
1001 return EGL_TRUE;
Chia-I Wua4a38dc2011-01-13 16:53:13 +08001002 return dri2_initialize_drm(drv, disp);
Kristian Høgsberg2168b872010-06-02 22:48:06 -04001003#endif
1004
1005 default:
1006 return EGL_FALSE;
1007 }
1008}
1009
Kristian Høgsberg42fa0092010-02-03 10:18:28 -05001010/**
1011 * Called via eglTerminate(), drv->API.Terminate().
1012 */
1013static EGLBoolean
1014dri2_terminate(_EGLDriver *drv, _EGLDisplay *disp)
1015{
1016 struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
1017
1018 _eglReleaseDisplayResources(drv, disp);
1019 _eglCleanupDisplay(disp);
1020
Kristian Høgsberg9c94fae2010-02-05 10:49:33 -05001021 dri2_dpy->core->destroyScreen(dri2_dpy->dri_screen);
Kristian Høgsberg42fa0092010-02-03 10:18:28 -05001022 close(dri2_dpy->fd);
1023 dlclose(dri2_dpy->driver);
Chia-I Wuf22665d2010-06-17 17:14:03 +08001024 if (disp->PlatformDisplay == NULL)
Kristian Høgsberg9c94fae2010-02-05 10:49:33 -05001025 xcb_disconnect(dri2_dpy->conn);
Kristian Høgsberg42fa0092010-02-03 10:18:28 -05001026 free(dri2_dpy);
Kristian Høgsberg42fa0092010-02-03 10:18:28 -05001027 disp->DriverData = NULL;
1028
1029 return EGL_TRUE;
1030}
1031
1032
1033/**
1034 * Called via eglCreateContext(), drv->API.CreateContext().
1035 */
1036static _EGLContext *
1037dri2_create_context(_EGLDriver *drv, _EGLDisplay *disp, _EGLConfig *conf,
1038 _EGLContext *share_list, const EGLint *attrib_list)
1039{
1040 struct dri2_egl_context *dri2_ctx;
1041 struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
1042 struct dri2_egl_context *dri2_ctx_shared = dri2_egl_context(share_list);
1043 struct dri2_egl_config *dri2_config = dri2_egl_config(conf);
Kristian Høgsbergefd4a8c2010-07-27 18:25:54 -04001044 const __DRIconfig *dri_config;
Kristian Høgsberge2fd98d2010-04-27 11:38:46 -04001045 int api;
Kristian Høgsberg42fa0092010-02-03 10:18:28 -05001046
Ian Romanickeade9462010-09-23 09:39:42 -07001047 (void) drv;
1048
Kristian Høgsberg42fa0092010-02-03 10:18:28 -05001049 dri2_ctx = malloc(sizeof *dri2_ctx);
1050 if (!dri2_ctx) {
1051 _eglError(EGL_BAD_ALLOC, "eglCreateContext");
1052 return NULL;
1053 }
1054
Kristian Høgsberg9c94fae2010-02-05 10:49:33 -05001055 if (!_eglInitContext(&dri2_ctx->base, disp, conf, attrib_list))
1056 goto cleanup;
Kristian Høgsberg42fa0092010-02-03 10:18:28 -05001057
Kristian Høgsberge2fd98d2010-04-27 11:38:46 -04001058 switch (dri2_ctx->base.ClientAPI) {
1059 case EGL_OPENGL_ES_API:
1060 switch (dri2_ctx->base.ClientVersion) {
1061 case 1:
1062 api = __DRI_API_GLES;
1063 break;
1064 case 2:
1065 api = __DRI_API_GLES2;
1066 break;
1067 default:
1068 _eglError(EGL_BAD_PARAMETER, "eglCreateContext");
1069 return NULL;
1070 }
1071 break;
1072 case EGL_OPENGL_API:
1073 api = __DRI_API_OPENGL;
1074 break;
1075 default:
1076 _eglError(EGL_BAD_PARAMETER, "eglCreateContext");
1077 return NULL;
1078 }
1079
Kristian Høgsbergefd4a8c2010-07-27 18:25:54 -04001080 if (conf != NULL)
1081 dri_config = dri2_config->dri_config;
1082 else
1083 dri_config = NULL;
1084
Kristian Høgsberge2fd98d2010-04-27 11:38:46 -04001085 if (dri2_dpy->dri2->base.version >= 2) {
1086 dri2_ctx->dri_context =
1087 dri2_dpy->dri2->createNewContextForAPI(dri2_dpy->dri_screen,
1088 api,
Kristian Høgsbergefd4a8c2010-07-27 18:25:54 -04001089 dri_config,
Kristian Høgsberge2fd98d2010-04-27 11:38:46 -04001090 dri2_ctx_shared ?
1091 dri2_ctx_shared->dri_context : NULL,
1092 dri2_ctx);
1093 } else if (api == __DRI_API_OPENGL) {
1094 dri2_ctx->dri_context =
1095 dri2_dpy->dri2->createNewContext(dri2_dpy->dri_screen,
1096 dri2_config->dri_config,
1097 dri2_ctx_shared ?
1098 dri2_ctx_shared->dri_context : NULL,
1099 dri2_ctx);
1100 } else {
1101 /* fail */
1102 }
Kristian Høgsberg42fa0092010-02-03 10:18:28 -05001103
Kristian Høgsberg9c94fae2010-02-05 10:49:33 -05001104 if (!dri2_ctx->dri_context)
1105 goto cleanup;
Kristian Høgsberg42fa0092010-02-03 10:18:28 -05001106
1107 return &dri2_ctx->base;
Kristian Høgsberg9c94fae2010-02-05 10:49:33 -05001108
1109 cleanup:
1110 free(dri2_ctx);
1111 return NULL;
Kristian Høgsberg42fa0092010-02-03 10:18:28 -05001112}
1113
Kristian Høgsberg42fa0092010-02-03 10:18:28 -05001114/**
1115 * Called via eglMakeCurrent(), drv->API.MakeCurrent().
1116 */
1117static EGLBoolean
1118dri2_make_current(_EGLDriver *drv, _EGLDisplay *disp, _EGLSurface *dsurf,
1119 _EGLSurface *rsurf, _EGLContext *ctx)
1120{
Chia-I Wud18d0fd2010-04-06 19:52:39 +08001121 struct dri2_egl_driver *dri2_drv = dri2_egl_driver(drv);
Kristian Høgsberg42fa0092010-02-03 10:18:28 -05001122 struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
1123 struct dri2_egl_surface *dri2_dsurf = dri2_egl_surface(dsurf);
1124 struct dri2_egl_surface *dri2_rsurf = dri2_egl_surface(rsurf);
1125 struct dri2_egl_context *dri2_ctx = dri2_egl_context(ctx);
Chia-I Wud19afc52010-10-23 12:52:26 +08001126 _EGLContext *old_ctx;
1127 _EGLSurface *old_dsurf, *old_rsurf;
Kristian Høgsberg42fa0092010-02-03 10:18:28 -05001128 __DRIdrawable *ddraw, *rdraw;
1129 __DRIcontext *cctx;
1130
Chia-I Wud19afc52010-10-23 12:52:26 +08001131 /* make new bindings */
1132 if (!_eglBindContext(ctx, dsurf, rsurf, &old_ctx, &old_dsurf, &old_rsurf))
Kristian Høgsberg42fa0092010-02-03 10:18:28 -05001133 return EGL_FALSE;
1134
Chia-I Wud18d0fd2010-04-06 19:52:39 +08001135 /* flush before context switch */
Chia-I Wu547e7612010-10-26 15:00:56 +08001136 if (old_ctx && dri2_drv->glFlush)
Chia-I Wud18d0fd2010-04-06 19:52:39 +08001137 dri2_drv->glFlush();
1138
Kristian Høgsberg42fa0092010-02-03 10:18:28 -05001139 ddraw = (dri2_dsurf) ? dri2_dsurf->dri_drawable : NULL;
1140 rdraw = (dri2_rsurf) ? dri2_rsurf->dri_drawable : NULL;
1141 cctx = (dri2_ctx) ? dri2_ctx->dri_context : NULL;
1142
1143 if ((cctx == NULL && ddraw == NULL && rdraw == NULL) ||
1144 dri2_dpy->core->bindContext(cctx, ddraw, rdraw)) {
Kristian Høgsberg2889d962011-02-02 22:10:40 -05001145 drv->API.DestroySurface(drv, disp, old_dsurf);
1146 drv->API.DestroySurface(drv, disp, old_rsurf);
Chia-I Wud19afc52010-10-23 12:52:26 +08001147 if (old_ctx) {
Chia-I Wu1f4c5512010-11-24 13:42:06 +08001148 /* unbind the old context only when there is no new context bound */
1149 if (!ctx) {
1150 __DRIcontext *old_cctx = dri2_egl_context(old_ctx)->dri_context;
1151 dri2_dpy->core->unbindContext(old_cctx);
1152 }
Chia-I Wud19afc52010-10-23 12:52:26 +08001153 /* no destroy? */
1154 _eglPutContext(old_ctx);
1155 }
Kristian Høgsberg42fa0092010-02-03 10:18:28 -05001156
1157 return EGL_TRUE;
1158 } else {
Chia-I Wud19afc52010-10-23 12:52:26 +08001159 /* undo the previous _eglBindContext */
1160 _eglBindContext(old_ctx, old_dsurf, old_rsurf, &ctx, &dsurf, &rsurf);
1161 assert(&dri2_ctx->base == ctx &&
1162 &dri2_dsurf->base == dsurf &&
1163 &dri2_rsurf->base == rsurf);
1164
1165 _eglPutSurface(dsurf);
1166 _eglPutSurface(rsurf);
1167 _eglPutContext(ctx);
1168
1169 _eglPutSurface(old_dsurf);
1170 _eglPutSurface(old_rsurf);
1171 _eglPutContext(old_ctx);
Kristian Høgsberg42fa0092010-02-03 10:18:28 -05001172
1173 return EGL_FALSE;
1174 }
1175}
1176
Kristian Høgsberg42fa0092010-02-03 10:18:28 -05001177/*
1178 * Called from eglGetProcAddress() via drv->API.GetProcAddress().
1179 */
1180static _EGLProc
1181dri2_get_proc_address(_EGLDriver *drv, const char *procname)
1182{
Chia-I Wufef5d142011-01-07 15:02:41 +08001183 struct dri2_egl_driver *dri2_drv = dri2_egl_driver(drv);
Ian Romanickeade9462010-09-23 09:39:42 -07001184
Chia-I Wufef5d142011-01-07 15:02:41 +08001185 return dri2_drv->get_proc_address(procname);
Kristian Høgsberg42fa0092010-02-03 10:18:28 -05001186}
1187
1188static EGLBoolean
Kristian Høgsbergc6e830c2010-02-04 21:49:44 -05001189dri2_wait_client(_EGLDriver *drv, _EGLDisplay *disp, _EGLContext *ctx)
Kristian Høgsberg42fa0092010-02-03 10:18:28 -05001190{
Kristian Høgsbergc6e830c2010-02-04 21:49:44 -05001191 struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
1192 struct dri2_egl_surface *dri2_surf = dri2_egl_surface(ctx->DrawSurface);
1193
Ian Romanickeade9462010-09-23 09:39:42 -07001194 (void) drv;
1195
Kristian Høgsbergc6e830c2010-02-04 21:49:44 -05001196 /* FIXME: If EGL allows frontbuffer rendering for window surfaces,
1197 * we need to copy fake to real here.*/
1198
1199 (*dri2_dpy->flush->flush)(dri2_surf->dri_drawable);
Kristian Høgsberg42fa0092010-02-03 10:18:28 -05001200
1201 return EGL_TRUE;
1202}
1203
1204static EGLBoolean
Kristian Høgsbergc6e830c2010-02-04 21:49:44 -05001205dri2_wait_native(_EGLDriver *drv, _EGLDisplay *disp, EGLint engine)
Kristian Høgsberg42fa0092010-02-03 10:18:28 -05001206{
Ian Romanickeade9462010-09-23 09:39:42 -07001207 (void) drv;
1208 (void) disp;
1209
Kristian Høgsberg42fa0092010-02-03 10:18:28 -05001210 if (engine != EGL_CORE_NATIVE_ENGINE)
1211 return _eglError(EGL_BAD_PARAMETER, "eglWaitNative");
1212 /* glXWaitX(); */
1213
1214 return EGL_TRUE;
1215}
1216
Kristian Høgsbergc6e830c2010-02-04 21:49:44 -05001217static EGLBoolean
Kristian Høgsbergbba5a982010-02-09 15:49:28 -05001218dri2_bind_tex_image(_EGLDriver *drv,
1219 _EGLDisplay *disp, _EGLSurface *surf, EGLint buffer)
1220{
1221 struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
1222 struct dri2_egl_surface *dri2_surf = dri2_egl_surface(surf);
1223 struct dri2_egl_context *dri2_ctx;
1224 _EGLContext *ctx;
1225 GLint format, target;
1226
1227 ctx = _eglGetCurrentContext();
1228 dri2_ctx = dri2_egl_context(ctx);
1229
Kristian Høgsberg5dc0f492010-05-06 22:40:25 -04001230 if (!_eglBindTexImage(drv, disp, surf, buffer))
Kristian Høgsbergbba5a982010-02-09 15:49:28 -05001231 return EGL_FALSE;
Kristian Høgsbergbba5a982010-02-09 15:49:28 -05001232
1233 switch (dri2_surf->base.TextureFormat) {
1234 case EGL_TEXTURE_RGB:
1235 format = __DRI_TEXTURE_FORMAT_RGB;
1236 break;
1237 case EGL_TEXTURE_RGBA:
1238 format = __DRI_TEXTURE_FORMAT_RGBA;
1239 break;
1240 default:
Kristian Høgsberg5dc0f492010-05-06 22:40:25 -04001241 assert(0);
Kristian Høgsbergbba5a982010-02-09 15:49:28 -05001242 }
1243
1244 switch (dri2_surf->base.TextureTarget) {
1245 case EGL_TEXTURE_2D:
1246 target = GL_TEXTURE_2D;
1247 break;
1248 default:
Kristian Høgsberg5dc0f492010-05-06 22:40:25 -04001249 assert(0);
Kristian Høgsbergbba5a982010-02-09 15:49:28 -05001250 }
1251
1252 (*dri2_dpy->tex_buffer->setTexBuffer2)(dri2_ctx->dri_context,
1253 target, format,
1254 dri2_surf->dri_drawable);
1255
Kristian Høgsberg5dc0f492010-05-06 22:40:25 -04001256 return EGL_TRUE;
Kristian Høgsbergbba5a982010-02-09 15:49:28 -05001257}
1258
1259static EGLBoolean
1260dri2_release_tex_image(_EGLDriver *drv,
1261 _EGLDisplay *disp, _EGLSurface *surf, EGLint buffer)
1262{
Juan Zhaoe59fa4c2011-01-09 12:03:02 -05001263#if __DRI_TEX_BUFFER_VERSION >= 3
1264 struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
1265 struct dri2_egl_surface *dri2_surf = dri2_egl_surface(surf);
1266 struct dri2_egl_context *dri2_ctx;
1267 _EGLContext *ctx;
1268 GLint target;
1269
1270 ctx = _eglGetCurrentContext();
1271 dri2_ctx = dri2_egl_context(ctx);
1272
1273 if (!_eglReleaseTexImage(drv, disp, surf, buffer))
1274 return EGL_FALSE;
1275
1276 switch (dri2_surf->base.TextureTarget) {
1277 case EGL_TEXTURE_2D:
1278 target = GL_TEXTURE_2D;
1279 break;
1280 default:
1281 assert(0);
1282 }
1283 if (dri2_dpy->tex_buffer->releaseTexBuffer!=NULL)
1284 (*dri2_dpy->tex_buffer->releaseTexBuffer)(dri2_ctx->dri_context,
1285 target,
1286 dri2_surf->dri_drawable);
1287#endif
Ian Romanickeade9462010-09-23 09:39:42 -07001288
Kristian Høgsbergbba5a982010-02-09 15:49:28 -05001289 return EGL_TRUE;
1290}
1291
Kristian Høgsbergf4e7d1b2010-02-11 19:28:26 -05001292static _EGLImage *
Kristian Høgsberg557c20b2010-02-26 14:51:11 -05001293dri2_create_image_khr_renderbuffer(_EGLDisplay *disp, _EGLContext *ctx,
1294 EGLClientBuffer buffer,
1295 const EGLint *attr_list)
1296{
1297 struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
1298 struct dri2_egl_context *dri2_ctx = dri2_egl_context(ctx);
1299 struct dri2_egl_image *dri2_img;
1300 GLuint renderbuffer = (GLuint) buffer;
1301
1302 if (renderbuffer == 0) {
1303 _eglError(EGL_BAD_PARAMETER, "dri2_create_image_khr");
1304 return EGL_NO_IMAGE_KHR;
1305 }
Kristian Høgsbergf4e7d1b2010-02-11 19:28:26 -05001306
1307 dri2_img = malloc(sizeof *dri2_img);
1308 if (!dri2_img) {
1309 _eglError(EGL_BAD_ALLOC, "dri2_create_image_khr");
1310 return EGL_NO_IMAGE_KHR;
1311 }
1312
Chia-I Wu713c8732010-10-22 16:36:47 +08001313 if (!_eglInitImage(&dri2_img->base, disp))
Kristian Høgsbergf4e7d1b2010-02-11 19:28:26 -05001314 return EGL_NO_IMAGE_KHR;
1315
Kristian Høgsberg557c20b2010-02-26 14:51:11 -05001316 dri2_img->dri_image =
1317 dri2_dpy->image->createImageFromRenderbuffer(dri2_ctx->dri_context,
1318 renderbuffer,
1319 dri2_img);
Kristian Høgsbergf4e7d1b2010-02-11 19:28:26 -05001320
1321 return &dri2_img->base;
1322}
1323
Kristian Høgsberg557c20b2010-02-26 14:51:11 -05001324static _EGLImage *
Kristian Høgsberg5aaa53e2010-06-03 21:36:40 -04001325dri2_create_image_mesa_drm_buffer(_EGLDisplay *disp, _EGLContext *ctx,
1326 EGLClientBuffer buffer, const EGLint *attr_list)
1327{
1328 struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
Kristian Høgsberg5aaa53e2010-06-03 21:36:40 -04001329 struct dri2_egl_image *dri2_img;
Chia-I Wu5664a9832010-10-22 17:09:40 +08001330 EGLint format, name, pitch, err;
1331 _EGLImageAttribs attrs;
Kristian Høgsberg5aaa53e2010-06-03 21:36:40 -04001332
Ian Romanickeade9462010-09-23 09:39:42 -07001333 (void) ctx;
1334
Kristian Høgsberg5aaa53e2010-06-03 21:36:40 -04001335 name = (EGLint) buffer;
1336
Chia-I Wu5664a9832010-10-22 17:09:40 +08001337 err = _eglParseImageAttribList(&attrs, disp, attr_list);
1338 if (err != EGL_SUCCESS)
1339 return NULL;
Kristian Høgsberg5aaa53e2010-06-03 21:36:40 -04001340
Chia-I Wu5664a9832010-10-22 17:09:40 +08001341 if (attrs.Width <= 0 || attrs.Height <= 0 ||
1342 attrs.DRMBufferStrideMESA <= 0) {
Kristian Høgsberg5aaa53e2010-06-03 21:36:40 -04001343 _eglError(EGL_BAD_PARAMETER,
1344 "bad width, height or stride");
1345 return NULL;
1346 }
1347
Chia-I Wu5664a9832010-10-22 17:09:40 +08001348 switch (attrs.DRMBufferFormatMESA) {
Kristian Høgsberg5aaa53e2010-06-03 21:36:40 -04001349 case EGL_DRM_BUFFER_FORMAT_ARGB32_MESA:
1350 format = __DRI_IMAGE_FORMAT_ARGB8888;
Chia-I Wu5664a9832010-10-22 17:09:40 +08001351 pitch = attrs.DRMBufferStrideMESA;
Kristian Høgsberg5aaa53e2010-06-03 21:36:40 -04001352 break;
1353 default:
1354 _eglError(EGL_BAD_PARAMETER,
1355 "dri2_create_image_khr: unsupported pixmap depth");
1356 return NULL;
1357 }
1358
1359 dri2_img = malloc(sizeof *dri2_img);
1360 if (!dri2_img) {
1361 _eglError(EGL_BAD_ALLOC, "dri2_create_image_mesa_drm");
1362 return NULL;
1363 }
1364
Chia-I Wu713c8732010-10-22 16:36:47 +08001365 if (!_eglInitImage(&dri2_img->base, disp)) {
Kristian Høgsberg5aaa53e2010-06-03 21:36:40 -04001366 free(dri2_img);
1367 return NULL;
1368 }
1369
1370 dri2_img->dri_image =
Kristian Høgsberg9ec0b2a2010-09-22 15:07:15 -04001371 dri2_dpy->image->createImageFromName(dri2_dpy->dri_screen,
Chia-I Wu5664a9832010-10-22 17:09:40 +08001372 attrs.Width,
1373 attrs.Height,
Kristian Høgsberg5aaa53e2010-06-03 21:36:40 -04001374 format,
1375 name,
1376 pitch,
1377 dri2_img);
1378 if (dri2_img->dri_image == NULL) {
1379 free(dri2_img);
1380 _eglError(EGL_BAD_ALLOC, "dri2_create_image_mesa_drm");
1381 return NULL;
1382 }
1383
1384 return &dri2_img->base;
1385}
1386
Kristian Høgsberg2889d962011-02-02 22:10:40 -05001387_EGLImage *
Kristian Høgsberg557c20b2010-02-26 14:51:11 -05001388dri2_create_image_khr(_EGLDriver *drv, _EGLDisplay *disp,
1389 _EGLContext *ctx, EGLenum target,
1390 EGLClientBuffer buffer, const EGLint *attr_list)
1391{
Ian Romanickeade9462010-09-23 09:39:42 -07001392 (void) drv;
1393
Kristian Høgsberg557c20b2010-02-26 14:51:11 -05001394 switch (target) {
Kristian Høgsberg557c20b2010-02-26 14:51:11 -05001395 case EGL_GL_RENDERBUFFER_KHR:
1396 return dri2_create_image_khr_renderbuffer(disp, ctx, buffer, attr_list);
Kristian Høgsberg5aaa53e2010-06-03 21:36:40 -04001397 case EGL_DRM_BUFFER_MESA:
1398 return dri2_create_image_mesa_drm_buffer(disp, ctx, buffer, attr_list);
Kristian Høgsberg557c20b2010-02-26 14:51:11 -05001399 default:
1400 _eglError(EGL_BAD_PARAMETER, "dri2_create_image_khr");
1401 return EGL_NO_IMAGE_KHR;
1402 }
1403}
1404
Kristian Høgsbergf4e7d1b2010-02-11 19:28:26 -05001405static EGLBoolean
1406dri2_destroy_image_khr(_EGLDriver *drv, _EGLDisplay *disp, _EGLImage *image)
1407{
1408 struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
1409 struct dri2_egl_image *dri2_img = dri2_egl_image(image);
1410
Ian Romanickeade9462010-09-23 09:39:42 -07001411 (void) drv;
1412
Kristian Høgsbergf4e7d1b2010-02-11 19:28:26 -05001413 dri2_dpy->image->destroyImage(dri2_img->dri_image);
1414 free(dri2_img);
1415
1416 return EGL_TRUE;
1417}
Kristian Høgsbergbba5a982010-02-09 15:49:28 -05001418
Kristian Høgsberg5aaa53e2010-06-03 21:36:40 -04001419static _EGLImage *
1420dri2_create_drm_image_mesa(_EGLDriver *drv, _EGLDisplay *disp,
1421 const EGLint *attr_list)
1422{
1423 struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
1424 struct dri2_egl_image *dri2_img;
Chia-I Wu5664a9832010-10-22 17:09:40 +08001425 _EGLImageAttribs attrs;
1426 unsigned int dri_use, valid_mask;
1427 int format;
Kristian Høgsberg5aaa53e2010-06-03 21:36:40 -04001428 EGLint err = EGL_SUCCESS;
1429
Ian Romanickeade9462010-09-23 09:39:42 -07001430 (void) drv;
1431
Kristian Høgsberg5aaa53e2010-06-03 21:36:40 -04001432 dri2_img = malloc(sizeof *dri2_img);
1433 if (!dri2_img) {
1434 _eglError(EGL_BAD_ALLOC, "dri2_create_image_khr");
1435 return EGL_NO_IMAGE_KHR;
1436 }
1437
1438 if (!attr_list) {
1439 err = EGL_BAD_PARAMETER;
1440 goto cleanup_img;
1441 }
1442
Chia-I Wu713c8732010-10-22 16:36:47 +08001443 if (!_eglInitImage(&dri2_img->base, disp)) {
Kristian Høgsberg5aaa53e2010-06-03 21:36:40 -04001444 err = EGL_BAD_PARAMETER;
1445 goto cleanup_img;
1446 }
1447
Chia-I Wu5664a9832010-10-22 17:09:40 +08001448 err = _eglParseImageAttribList(&attrs, disp, attr_list);
1449 if (err != EGL_SUCCESS)
1450 goto cleanup_img;
Kristian Høgsberg5aaa53e2010-06-03 21:36:40 -04001451
Chia-I Wu5664a9832010-10-22 17:09:40 +08001452 if (attrs.Width <= 0 || attrs.Height <= 0) {
1453 _eglLog(_EGL_WARNING, "bad width or height (%dx%d)",
1454 attrs.Width, attrs.Height);
Kristian Høgsberg5aaa53e2010-06-03 21:36:40 -04001455 goto cleanup_img;
1456 }
1457
Chia-I Wu5664a9832010-10-22 17:09:40 +08001458 switch (attrs.DRMBufferFormatMESA) {
Kristian Høgsberg5aaa53e2010-06-03 21:36:40 -04001459 case EGL_DRM_BUFFER_FORMAT_ARGB32_MESA:
1460 format = __DRI_IMAGE_FORMAT_ARGB8888;
1461 break;
1462 default:
Chia-I Wu5664a9832010-10-22 17:09:40 +08001463 _eglLog(_EGL_WARNING, "bad image format value 0x%04x",
1464 attrs.DRMBufferFormatMESA);
Kristian Høgsberg5aaa53e2010-06-03 21:36:40 -04001465 goto cleanup_img;
1466 }
1467
1468 valid_mask =
1469 EGL_DRM_BUFFER_USE_SCANOUT_MESA |
1470 EGL_DRM_BUFFER_USE_SHARE_MESA;
Chia-I Wu5664a9832010-10-22 17:09:40 +08001471 if (attrs.DRMBufferUseMESA & ~valid_mask) {
1472 _eglLog(_EGL_WARNING, "bad image use bit 0x%04x",
1473 attrs.DRMBufferUseMESA & ~valid_mask);
Kristian Høgsberg5aaa53e2010-06-03 21:36:40 -04001474 goto cleanup_img;
1475 }
1476
1477 dri_use = 0;
Chia-I Wu5664a9832010-10-22 17:09:40 +08001478 if (attrs.DRMBufferUseMESA & EGL_DRM_BUFFER_USE_SHARE_MESA)
Kristian Høgsberg5aaa53e2010-06-03 21:36:40 -04001479 dri_use |= __DRI_IMAGE_USE_SHARE;
Chia-I Wu5664a9832010-10-22 17:09:40 +08001480 if (attrs.DRMBufferUseMESA & EGL_DRM_BUFFER_USE_SCANOUT_MESA)
Kristian Høgsberg5aaa53e2010-06-03 21:36:40 -04001481 dri_use |= __DRI_IMAGE_USE_SCANOUT;
1482
1483 dri2_img->dri_image =
1484 dri2_dpy->image->createImage(dri2_dpy->dri_screen,
Chia-I Wu5664a9832010-10-22 17:09:40 +08001485 attrs.Width, attrs.Height,
1486 format, dri_use, dri2_img);
Kristian Høgsberg5aaa53e2010-06-03 21:36:40 -04001487 if (dri2_img->dri_image == NULL) {
1488 err = EGL_BAD_ALLOC;
1489 goto cleanup_img;
1490 }
1491
1492 return &dri2_img->base;
1493
1494 cleanup_img:
1495 free(dri2_img);
1496 _eglError(err, "dri2_create_drm_image_mesa");
1497
1498 return EGL_NO_IMAGE_KHR;
1499}
1500
1501static EGLBoolean
1502dri2_export_drm_image_mesa(_EGLDriver *drv, _EGLDisplay *disp, _EGLImage *img,
1503 EGLint *name, EGLint *handle, EGLint *stride)
1504{
1505 struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
1506 struct dri2_egl_image *dri2_img = dri2_egl_image(img);
1507
Ian Romanickeade9462010-09-23 09:39:42 -07001508 (void) drv;
1509
Kristian Høgsberg5aaa53e2010-06-03 21:36:40 -04001510 if (name && !dri2_dpy->image->queryImage(dri2_img->dri_image,
1511 __DRI_IMAGE_ATTRIB_NAME, name)) {
1512 _eglError(EGL_BAD_ALLOC, "dri2_export_drm_image_mesa");
1513 return EGL_FALSE;
1514 }
1515
1516 if (handle)
1517 dri2_dpy->image->queryImage(dri2_img->dri_image,
1518 __DRI_IMAGE_ATTRIB_HANDLE, handle);
1519
1520 if (stride)
1521 dri2_dpy->image->queryImage(dri2_img->dri_image,
1522 __DRI_IMAGE_ATTRIB_STRIDE, stride);
1523
1524 return EGL_TRUE;
1525}
1526
Chia-I Wufef5d142011-01-07 15:02:41 +08001527static void
1528dri2_unload(_EGLDriver *drv)
1529{
1530 struct dri2_egl_driver *dri2_drv = dri2_egl_driver(drv);
Chia-I Wu218381d2011-01-30 05:09:06 +08001531
1532 if (dri2_drv->handle)
1533 dlclose(dri2_drv->handle);
Chia-I Wufef5d142011-01-07 15:02:41 +08001534 free(dri2_drv);
1535}
1536
1537static EGLBoolean
1538dri2_load(_EGLDriver *drv)
1539{
1540 struct dri2_egl_driver *dri2_drv = dri2_egl_driver(drv);
Chia-I Wu218381d2011-01-30 05:09:06 +08001541#ifdef HAVE_SHARED_GLAPI
1542 const char *libname = "libglapi.so.0";
1543#else
1544 /*
1545 * Both libGL.so and libglapi.so are glapi providers. There is no way to
1546 * tell which one to load.
1547 */
1548 const char *libname = NULL;
1549#endif
Chia-I Wufef5d142011-01-07 15:02:41 +08001550 void *handle;
1551
Chia-I Wu218381d2011-01-30 05:09:06 +08001552 /* RTLD_GLOBAL to make sure glapi symbols are visible to DRI drivers */
1553 handle = dlopen(libname, RTLD_LAZY | RTLD_GLOBAL);
Chia-I Wufef5d142011-01-07 15:02:41 +08001554 if (handle) {
1555 dri2_drv->get_proc_address = (_EGLProc (*)(const char *))
1556 dlsym(handle, "_glapi_get_proc_address");
Chia-I Wu218381d2011-01-30 05:09:06 +08001557 if (!dri2_drv->get_proc_address || !libname) {
1558 /* no need to keep a reference */
1559 dlclose(handle);
1560 handle = NULL;
1561 }
Chia-I Wufef5d142011-01-07 15:02:41 +08001562 }
1563
Chia-I Wu218381d2011-01-30 05:09:06 +08001564 /* if glapi is not available, loading DRI drivers will fail */
Chia-I Wufef5d142011-01-07 15:02:41 +08001565 if (!dri2_drv->get_proc_address) {
1566 _eglLog(_EGL_WARNING, "DRI2: failed to find _glapi_get_proc_address");
1567 return EGL_FALSE;
1568 }
1569
1570 dri2_drv->glFlush = (void (*)(void))
1571 dri2_drv->get_proc_address("glFlush");
1572
Chia-I Wu218381d2011-01-30 05:09:06 +08001573 dri2_drv->handle = handle;
1574
Chia-I Wufef5d142011-01-07 15:02:41 +08001575 return EGL_TRUE;
1576}
1577
Kristian Høgsberg42fa0092010-02-03 10:18:28 -05001578/**
1579 * This is the main entrypoint into the driver, called by libEGL.
1580 * Create a new _EGLDriver object and init its dispatch table.
1581 */
1582_EGLDriver *
Chia-I Wuc98ea262011-01-07 16:30:08 +08001583_EGL_MAIN(const char *args)
Kristian Høgsberg42fa0092010-02-03 10:18:28 -05001584{
1585 struct dri2_egl_driver *dri2_drv;
1586
Ian Romanickeade9462010-09-23 09:39:42 -07001587 (void) args;
1588
Kristian Høgsberg42fa0092010-02-03 10:18:28 -05001589 dri2_drv = malloc(sizeof *dri2_drv);
1590 if (!dri2_drv)
1591 return NULL;
1592
Chia-I Wu39812c42011-01-12 18:06:47 +08001593 memset(dri2_drv, 0, sizeof *dri2_drv);
1594
Chia-I Wufef5d142011-01-07 15:02:41 +08001595 if (!dri2_load(&dri2_drv->base))
1596 return NULL;
1597
Kristian Høgsberg42fa0092010-02-03 10:18:28 -05001598 _eglInitDriverFallbacks(&dri2_drv->base);
1599 dri2_drv->base.API.Initialize = dri2_initialize;
1600 dri2_drv->base.API.Terminate = dri2_terminate;
1601 dri2_drv->base.API.CreateContext = dri2_create_context;
1602 dri2_drv->base.API.MakeCurrent = dri2_make_current;
Kristian Høgsberg42fa0092010-02-03 10:18:28 -05001603 dri2_drv->base.API.GetProcAddress = dri2_get_proc_address;
1604 dri2_drv->base.API.WaitClient = dri2_wait_client;
1605 dri2_drv->base.API.WaitNative = dri2_wait_native;
Kristian Høgsbergbba5a982010-02-09 15:49:28 -05001606 dri2_drv->base.API.BindTexImage = dri2_bind_tex_image;
1607 dri2_drv->base.API.ReleaseTexImage = dri2_release_tex_image;
Kristian Høgsbergf4e7d1b2010-02-11 19:28:26 -05001608 dri2_drv->base.API.CreateImageKHR = dri2_create_image_khr;
1609 dri2_drv->base.API.DestroyImageKHR = dri2_destroy_image_khr;
Kristian Høgsberg5aaa53e2010-06-03 21:36:40 -04001610 dri2_drv->base.API.CreateDRMImageMESA = dri2_create_drm_image_mesa;
1611 dri2_drv->base.API.ExportDRMImageMESA = dri2_export_drm_image_mesa;
Kristian Høgsberg42fa0092010-02-03 10:18:28 -05001612
1613 dri2_drv->base.Name = "DRI2";
1614 dri2_drv->base.Unload = dri2_unload;
1615
Kristian Høgsberg42fa0092010-02-03 10:18:28 -05001616 return &dri2_drv->base;
1617}