Pierre Moreau | dddc564 | 2018-01-28 11:38:46 +0100 | [diff] [blame] | 1 | /******************************************************************************* |
Dave Airlie | 725df7c | 2020-10-07 10:19:09 +1000 | [diff] [blame] | 2 | * Copyright (c) 2008-2020 The Khronos Group Inc. |
Pierre Moreau | dddc564 | 2018-01-28 11:38:46 +0100 | [diff] [blame] | 3 | * |
Dave Airlie | 725df7c | 2020-10-07 10:19:09 +1000 | [diff] [blame] | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | * you may not use this file except in compliance with the License. |
| 6 | * You may obtain a copy of the License at |
Pierre Moreau | dddc564 | 2018-01-28 11:38:46 +0100 | [diff] [blame] | 7 | * |
Dave Airlie | 725df7c | 2020-10-07 10:19:09 +1000 | [diff] [blame] | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
Pierre Moreau | dddc564 | 2018-01-28 11:38:46 +0100 | [diff] [blame] | 9 | * |
Dave Airlie | 725df7c | 2020-10-07 10:19:09 +1000 | [diff] [blame] | 10 | * Unless required by applicable law or agreed to in writing, software |
| 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | * See the License for the specific language governing permissions and |
| 14 | * limitations under the License. |
Pierre Moreau | dddc564 | 2018-01-28 11:38:46 +0100 | [diff] [blame] | 15 | * |
Pierre Moreau | dddc564 | 2018-01-28 11:38:46 +0100 | [diff] [blame] | 16 | ******************************************************************************/ |
| 17 | /*****************************************************************************\ |
| 18 | |
Dave Airlie | 725df7c | 2020-10-07 10:19:09 +1000 | [diff] [blame] | 19 | Copyright (c) 2013-2020 Intel Corporation All Rights Reserved. |
Pierre Moreau | dddc564 | 2018-01-28 11:38:46 +0100 | [diff] [blame] | 20 | |
| 21 | THESE MATERIALS ARE PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| 22 | "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| 23 | LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
| 24 | A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS |
| 25 | CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, |
| 26 | EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, |
| 27 | PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR |
| 28 | PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY |
| 29 | OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING |
| 30 | NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THESE |
| 31 | MATERIALS, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 32 | |
| 33 | File Name: cl_ext_intel.h |
| 34 | |
| 35 | Abstract: |
| 36 | |
| 37 | Notes: |
| 38 | |
| 39 | \*****************************************************************************/ |
| 40 | |
| 41 | #ifndef __CL_EXT_INTEL_H |
| 42 | #define __CL_EXT_INTEL_H |
| 43 | |
| 44 | #include <CL/cl.h> |
| 45 | #include <CL/cl_platform.h> |
| 46 | |
| 47 | #ifdef __cplusplus |
| 48 | extern "C" { |
| 49 | #endif |
| 50 | |
| 51 | /*************************************** |
| 52 | * cl_intel_thread_local_exec extension * |
| 53 | ****************************************/ |
| 54 | |
| 55 | #define cl_intel_thread_local_exec 1 |
| 56 | |
| 57 | #define CL_QUEUE_THREAD_LOCAL_EXEC_ENABLE_INTEL (((cl_bitfield)1) << 31) |
| 58 | |
| 59 | /*********************************************** |
| 60 | * cl_intel_device_partition_by_names extension * |
| 61 | ************************************************/ |
| 62 | |
| 63 | #define cl_intel_device_partition_by_names 1 |
| 64 | |
| 65 | #define CL_DEVICE_PARTITION_BY_NAMES_INTEL 0x4052 |
| 66 | #define CL_PARTITION_BY_NAMES_LIST_END_INTEL -1 |
| 67 | |
| 68 | /************************************************ |
| 69 | * cl_intel_accelerator extension * |
| 70 | * cl_intel_motion_estimation extension * |
| 71 | * cl_intel_advanced_motion_estimation extension * |
| 72 | *************************************************/ |
| 73 | |
| 74 | #define cl_intel_accelerator 1 |
| 75 | #define cl_intel_motion_estimation 1 |
| 76 | #define cl_intel_advanced_motion_estimation 1 |
| 77 | |
| 78 | typedef struct _cl_accelerator_intel* cl_accelerator_intel; |
| 79 | typedef cl_uint cl_accelerator_type_intel; |
| 80 | typedef cl_uint cl_accelerator_info_intel; |
| 81 | |
| 82 | typedef struct _cl_motion_estimation_desc_intel { |
| 83 | cl_uint mb_block_type; |
| 84 | cl_uint subpixel_mode; |
| 85 | cl_uint sad_adjust_mode; |
| 86 | cl_uint search_path_type; |
| 87 | } cl_motion_estimation_desc_intel; |
| 88 | |
| 89 | /* error codes */ |
| 90 | #define CL_INVALID_ACCELERATOR_INTEL -1094 |
| 91 | #define CL_INVALID_ACCELERATOR_TYPE_INTEL -1095 |
| 92 | #define CL_INVALID_ACCELERATOR_DESCRIPTOR_INTEL -1096 |
| 93 | #define CL_ACCELERATOR_TYPE_NOT_SUPPORTED_INTEL -1097 |
| 94 | |
| 95 | /* cl_accelerator_type_intel */ |
| 96 | #define CL_ACCELERATOR_TYPE_MOTION_ESTIMATION_INTEL 0x0 |
| 97 | |
| 98 | /* cl_accelerator_info_intel */ |
| 99 | #define CL_ACCELERATOR_DESCRIPTOR_INTEL 0x4090 |
| 100 | #define CL_ACCELERATOR_REFERENCE_COUNT_INTEL 0x4091 |
| 101 | #define CL_ACCELERATOR_CONTEXT_INTEL 0x4092 |
| 102 | #define CL_ACCELERATOR_TYPE_INTEL 0x4093 |
| 103 | |
| 104 | /* cl_motion_detect_desc_intel flags */ |
| 105 | #define CL_ME_MB_TYPE_16x16_INTEL 0x0 |
| 106 | #define CL_ME_MB_TYPE_8x8_INTEL 0x1 |
| 107 | #define CL_ME_MB_TYPE_4x4_INTEL 0x2 |
| 108 | |
| 109 | #define CL_ME_SUBPIXEL_MODE_INTEGER_INTEL 0x0 |
| 110 | #define CL_ME_SUBPIXEL_MODE_HPEL_INTEL 0x1 |
| 111 | #define CL_ME_SUBPIXEL_MODE_QPEL_INTEL 0x2 |
| 112 | |
| 113 | #define CL_ME_SAD_ADJUST_MODE_NONE_INTEL 0x0 |
| 114 | #define CL_ME_SAD_ADJUST_MODE_HAAR_INTEL 0x1 |
| 115 | |
| 116 | #define CL_ME_SEARCH_PATH_RADIUS_2_2_INTEL 0x0 |
| 117 | #define CL_ME_SEARCH_PATH_RADIUS_4_4_INTEL 0x1 |
| 118 | #define CL_ME_SEARCH_PATH_RADIUS_16_12_INTEL 0x5 |
| 119 | |
| 120 | #define CL_ME_SKIP_BLOCK_TYPE_16x16_INTEL 0x0 |
| 121 | #define CL_ME_CHROMA_INTRA_PREDICT_ENABLED_INTEL 0x1 |
| 122 | #define CL_ME_LUMA_INTRA_PREDICT_ENABLED_INTEL 0x2 |
| 123 | #define CL_ME_SKIP_BLOCK_TYPE_8x8_INTEL 0x4 |
| 124 | |
| 125 | #define CL_ME_FORWARD_INPUT_MODE_INTEL 0x1 |
| 126 | #define CL_ME_BACKWARD_INPUT_MODE_INTEL 0x2 |
| 127 | #define CL_ME_BIDIRECTION_INPUT_MODE_INTEL 0x3 |
| 128 | |
| 129 | #define CL_ME_BIDIR_WEIGHT_QUARTER_INTEL 16 |
| 130 | #define CL_ME_BIDIR_WEIGHT_THIRD_INTEL 21 |
| 131 | #define CL_ME_BIDIR_WEIGHT_HALF_INTEL 32 |
| 132 | #define CL_ME_BIDIR_WEIGHT_TWO_THIRD_INTEL 43 |
| 133 | #define CL_ME_BIDIR_WEIGHT_THREE_QUARTER_INTEL 48 |
| 134 | |
| 135 | #define CL_ME_COST_PENALTY_NONE_INTEL 0x0 |
| 136 | #define CL_ME_COST_PENALTY_LOW_INTEL 0x1 |
| 137 | #define CL_ME_COST_PENALTY_NORMAL_INTEL 0x2 |
| 138 | #define CL_ME_COST_PENALTY_HIGH_INTEL 0x3 |
| 139 | |
| 140 | #define CL_ME_COST_PRECISION_QPEL_INTEL 0x0 |
| 141 | #define CL_ME_COST_PRECISION_HPEL_INTEL 0x1 |
| 142 | #define CL_ME_COST_PRECISION_PEL_INTEL 0x2 |
| 143 | #define CL_ME_COST_PRECISION_DPEL_INTEL 0x3 |
| 144 | |
| 145 | #define CL_ME_LUMA_PREDICTOR_MODE_VERTICAL_INTEL 0x0 |
| 146 | #define CL_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_INTEL 0x1 |
| 147 | #define CL_ME_LUMA_PREDICTOR_MODE_DC_INTEL 0x2 |
| 148 | #define CL_ME_LUMA_PREDICTOR_MODE_DIAGONAL_DOWN_LEFT_INTEL 0x3 |
| 149 | |
| 150 | #define CL_ME_LUMA_PREDICTOR_MODE_DIAGONAL_DOWN_RIGHT_INTEL 0x4 |
| 151 | #define CL_ME_LUMA_PREDICTOR_MODE_PLANE_INTEL 0x4 |
| 152 | #define CL_ME_LUMA_PREDICTOR_MODE_VERTICAL_RIGHT_INTEL 0x5 |
| 153 | #define CL_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_DOWN_INTEL 0x6 |
| 154 | #define CL_ME_LUMA_PREDICTOR_MODE_VERTICAL_LEFT_INTEL 0x7 |
| 155 | #define CL_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_UP_INTEL 0x8 |
| 156 | |
| 157 | #define CL_ME_CHROMA_PREDICTOR_MODE_DC_INTEL 0x0 |
| 158 | #define CL_ME_CHROMA_PREDICTOR_MODE_HORIZONTAL_INTEL 0x1 |
| 159 | #define CL_ME_CHROMA_PREDICTOR_MODE_VERTICAL_INTEL 0x2 |
| 160 | #define CL_ME_CHROMA_PREDICTOR_MODE_PLANE_INTEL 0x3 |
| 161 | |
| 162 | /* cl_device_info */ |
| 163 | #define CL_DEVICE_ME_VERSION_INTEL 0x407E |
| 164 | |
| 165 | #define CL_ME_VERSION_LEGACY_INTEL 0x0 |
| 166 | #define CL_ME_VERSION_ADVANCED_VER_1_INTEL 0x1 |
| 167 | #define CL_ME_VERSION_ADVANCED_VER_2_INTEL 0x2 |
| 168 | |
| 169 | extern CL_API_ENTRY cl_accelerator_intel CL_API_CALL |
| 170 | clCreateAcceleratorINTEL( |
| 171 | cl_context context, |
| 172 | cl_accelerator_type_intel accelerator_type, |
| 173 | size_t descriptor_size, |
| 174 | const void* descriptor, |
| 175 | cl_int* errcode_ret) CL_EXT_SUFFIX__VERSION_1_2; |
| 176 | |
| 177 | typedef CL_API_ENTRY cl_accelerator_intel (CL_API_CALL *clCreateAcceleratorINTEL_fn)( |
| 178 | cl_context context, |
| 179 | cl_accelerator_type_intel accelerator_type, |
| 180 | size_t descriptor_size, |
| 181 | const void* descriptor, |
| 182 | cl_int* errcode_ret) CL_EXT_SUFFIX__VERSION_1_2; |
| 183 | |
| 184 | extern CL_API_ENTRY cl_int CL_API_CALL |
| 185 | clGetAcceleratorInfoINTEL( |
| 186 | cl_accelerator_intel accelerator, |
| 187 | cl_accelerator_info_intel param_name, |
| 188 | size_t param_value_size, |
| 189 | void* param_value, |
| 190 | size_t* param_value_size_ret) CL_EXT_SUFFIX__VERSION_1_2; |
| 191 | |
| 192 | typedef CL_API_ENTRY cl_int (CL_API_CALL *clGetAcceleratorInfoINTEL_fn)( |
| 193 | cl_accelerator_intel accelerator, |
| 194 | cl_accelerator_info_intel param_name, |
| 195 | size_t param_value_size, |
| 196 | void* param_value, |
| 197 | size_t* param_value_size_ret) CL_EXT_SUFFIX__VERSION_1_2; |
| 198 | |
| 199 | extern CL_API_ENTRY cl_int CL_API_CALL |
| 200 | clRetainAcceleratorINTEL( |
| 201 | cl_accelerator_intel accelerator) CL_EXT_SUFFIX__VERSION_1_2; |
| 202 | |
| 203 | typedef CL_API_ENTRY cl_int (CL_API_CALL *clRetainAcceleratorINTEL_fn)( |
| 204 | cl_accelerator_intel accelerator) CL_EXT_SUFFIX__VERSION_1_2; |
| 205 | |
| 206 | extern CL_API_ENTRY cl_int CL_API_CALL |
| 207 | clReleaseAcceleratorINTEL( |
| 208 | cl_accelerator_intel accelerator) CL_EXT_SUFFIX__VERSION_1_2; |
| 209 | |
| 210 | typedef CL_API_ENTRY cl_int (CL_API_CALL *clReleaseAcceleratorINTEL_fn)( |
| 211 | cl_accelerator_intel accelerator) CL_EXT_SUFFIX__VERSION_1_2; |
| 212 | |
| 213 | /****************************************** |
| 214 | * cl_intel_simultaneous_sharing extension * |
| 215 | *******************************************/ |
| 216 | |
| 217 | #define cl_intel_simultaneous_sharing 1 |
| 218 | |
| 219 | #define CL_DEVICE_SIMULTANEOUS_INTEROPS_INTEL 0x4104 |
| 220 | #define CL_DEVICE_NUM_SIMULTANEOUS_INTEROPS_INTEL 0x4105 |
| 221 | |
| 222 | /*********************************** |
| 223 | * cl_intel_egl_image_yuv extension * |
| 224 | ************************************/ |
| 225 | |
| 226 | #define cl_intel_egl_image_yuv 1 |
| 227 | |
| 228 | #define CL_EGL_YUV_PLANE_INTEL 0x4107 |
| 229 | |
| 230 | /******************************** |
| 231 | * cl_intel_packed_yuv extension * |
| 232 | *********************************/ |
| 233 | |
| 234 | #define cl_intel_packed_yuv 1 |
| 235 | |
| 236 | #define CL_YUYV_INTEL 0x4076 |
| 237 | #define CL_UYVY_INTEL 0x4077 |
| 238 | #define CL_YVYU_INTEL 0x4078 |
| 239 | #define CL_VYUY_INTEL 0x4079 |
| 240 | |
| 241 | /******************************************** |
| 242 | * cl_intel_required_subgroup_size extension * |
| 243 | *********************************************/ |
| 244 | |
| 245 | #define cl_intel_required_subgroup_size 1 |
| 246 | |
| 247 | #define CL_DEVICE_SUB_GROUP_SIZES_INTEL 0x4108 |
| 248 | #define CL_KERNEL_SPILL_MEM_SIZE_INTEL 0x4109 |
| 249 | #define CL_KERNEL_COMPILE_SUB_GROUP_SIZE_INTEL 0x410A |
| 250 | |
| 251 | /**************************************** |
| 252 | * cl_intel_driver_diagnostics extension * |
| 253 | *****************************************/ |
| 254 | |
| 255 | #define cl_intel_driver_diagnostics 1 |
| 256 | |
| 257 | typedef cl_uint cl_diagnostics_verbose_level; |
| 258 | |
| 259 | #define CL_CONTEXT_SHOW_DIAGNOSTICS_INTEL 0x4106 |
| 260 | |
| 261 | #define CL_CONTEXT_DIAGNOSTICS_LEVEL_ALL_INTEL ( 0xff ) |
| 262 | #define CL_CONTEXT_DIAGNOSTICS_LEVEL_GOOD_INTEL ( 1 ) |
| 263 | #define CL_CONTEXT_DIAGNOSTICS_LEVEL_BAD_INTEL ( 1 << 1 ) |
| 264 | #define CL_CONTEXT_DIAGNOSTICS_LEVEL_NEUTRAL_INTEL ( 1 << 2 ) |
| 265 | |
| 266 | /******************************** |
| 267 | * cl_intel_planar_yuv extension * |
| 268 | *********************************/ |
| 269 | |
| 270 | #define CL_NV12_INTEL 0x410E |
| 271 | |
| 272 | #define CL_MEM_NO_ACCESS_INTEL ( 1 << 24 ) |
| 273 | #define CL_MEM_ACCESS_FLAGS_UNRESTRICTED_INTEL ( 1 << 25 ) |
| 274 | |
| 275 | #define CL_DEVICE_PLANAR_YUV_MAX_WIDTH_INTEL 0x417E |
| 276 | #define CL_DEVICE_PLANAR_YUV_MAX_HEIGHT_INTEL 0x417F |
| 277 | |
| 278 | /******************************************************* |
| 279 | * cl_intel_device_side_avc_motion_estimation extension * |
| 280 | ********************************************************/ |
| 281 | |
| 282 | #define CL_DEVICE_AVC_ME_VERSION_INTEL 0x410B |
| 283 | #define CL_DEVICE_AVC_ME_SUPPORTS_TEXTURE_SAMPLER_USE_INTEL 0x410C |
| 284 | #define CL_DEVICE_AVC_ME_SUPPORTS_PREEMPTION_INTEL 0x410D |
| 285 | |
Dave Airlie | 725df7c | 2020-10-07 10:19:09 +1000 | [diff] [blame] | 286 | #define CL_AVC_ME_VERSION_0_INTEL 0x0 /* No support. */ |
| 287 | #define CL_AVC_ME_VERSION_1_INTEL 0x1 /* First supported version. */ |
Pierre Moreau | dddc564 | 2018-01-28 11:38:46 +0100 | [diff] [blame] | 288 | |
| 289 | #define CL_AVC_ME_MAJOR_16x16_INTEL 0x0 |
| 290 | #define CL_AVC_ME_MAJOR_16x8_INTEL 0x1 |
| 291 | #define CL_AVC_ME_MAJOR_8x16_INTEL 0x2 |
| 292 | #define CL_AVC_ME_MAJOR_8x8_INTEL 0x3 |
| 293 | |
| 294 | #define CL_AVC_ME_MINOR_8x8_INTEL 0x0 |
| 295 | #define CL_AVC_ME_MINOR_8x4_INTEL 0x1 |
| 296 | #define CL_AVC_ME_MINOR_4x8_INTEL 0x2 |
| 297 | #define CL_AVC_ME_MINOR_4x4_INTEL 0x3 |
| 298 | |
| 299 | #define CL_AVC_ME_MAJOR_FORWARD_INTEL 0x0 |
| 300 | #define CL_AVC_ME_MAJOR_BACKWARD_INTEL 0x1 |
| 301 | #define CL_AVC_ME_MAJOR_BIDIRECTIONAL_INTEL 0x2 |
| 302 | |
| 303 | #define CL_AVC_ME_PARTITION_MASK_ALL_INTEL 0x0 |
| 304 | #define CL_AVC_ME_PARTITION_MASK_16x16_INTEL 0x7E |
| 305 | #define CL_AVC_ME_PARTITION_MASK_16x8_INTEL 0x7D |
| 306 | #define CL_AVC_ME_PARTITION_MASK_8x16_INTEL 0x7B |
| 307 | #define CL_AVC_ME_PARTITION_MASK_8x8_INTEL 0x77 |
| 308 | #define CL_AVC_ME_PARTITION_MASK_8x4_INTEL 0x6F |
| 309 | #define CL_AVC_ME_PARTITION_MASK_4x8_INTEL 0x5F |
| 310 | #define CL_AVC_ME_PARTITION_MASK_4x4_INTEL 0x3F |
| 311 | |
| 312 | #define CL_AVC_ME_SEARCH_WINDOW_EXHAUSTIVE_INTEL 0x0 |
| 313 | #define CL_AVC_ME_SEARCH_WINDOW_SMALL_INTEL 0x1 |
| 314 | #define CL_AVC_ME_SEARCH_WINDOW_TINY_INTEL 0x2 |
| 315 | #define CL_AVC_ME_SEARCH_WINDOW_EXTRA_TINY_INTEL 0x3 |
| 316 | #define CL_AVC_ME_SEARCH_WINDOW_DIAMOND_INTEL 0x4 |
| 317 | #define CL_AVC_ME_SEARCH_WINDOW_LARGE_DIAMOND_INTEL 0x5 |
| 318 | #define CL_AVC_ME_SEARCH_WINDOW_RESERVED0_INTEL 0x6 |
| 319 | #define CL_AVC_ME_SEARCH_WINDOW_RESERVED1_INTEL 0x7 |
| 320 | #define CL_AVC_ME_SEARCH_WINDOW_CUSTOM_INTEL 0x8 |
| 321 | #define CL_AVC_ME_SEARCH_WINDOW_16x12_RADIUS_INTEL 0x9 |
| 322 | #define CL_AVC_ME_SEARCH_WINDOW_4x4_RADIUS_INTEL 0x2 |
| 323 | #define CL_AVC_ME_SEARCH_WINDOW_2x2_RADIUS_INTEL 0xa |
| 324 | |
| 325 | #define CL_AVC_ME_SAD_ADJUST_MODE_NONE_INTEL 0x0 |
| 326 | #define CL_AVC_ME_SAD_ADJUST_MODE_HAAR_INTEL 0x2 |
| 327 | |
| 328 | #define CL_AVC_ME_SUBPIXEL_MODE_INTEGER_INTEL 0x0 |
| 329 | #define CL_AVC_ME_SUBPIXEL_MODE_HPEL_INTEL 0x1 |
| 330 | #define CL_AVC_ME_SUBPIXEL_MODE_QPEL_INTEL 0x3 |
| 331 | |
| 332 | #define CL_AVC_ME_COST_PRECISION_QPEL_INTEL 0x0 |
| 333 | #define CL_AVC_ME_COST_PRECISION_HPEL_INTEL 0x1 |
| 334 | #define CL_AVC_ME_COST_PRECISION_PEL_INTEL 0x2 |
| 335 | #define CL_AVC_ME_COST_PRECISION_DPEL_INTEL 0x3 |
| 336 | |
| 337 | #define CL_AVC_ME_BIDIR_WEIGHT_QUARTER_INTEL 0x10 |
| 338 | #define CL_AVC_ME_BIDIR_WEIGHT_THIRD_INTEL 0x15 |
| 339 | #define CL_AVC_ME_BIDIR_WEIGHT_HALF_INTEL 0x20 |
| 340 | #define CL_AVC_ME_BIDIR_WEIGHT_TWO_THIRD_INTEL 0x2B |
| 341 | #define CL_AVC_ME_BIDIR_WEIGHT_THREE_QUARTER_INTEL 0x30 |
| 342 | |
| 343 | #define CL_AVC_ME_BORDER_REACHED_LEFT_INTEL 0x0 |
| 344 | #define CL_AVC_ME_BORDER_REACHED_RIGHT_INTEL 0x2 |
| 345 | #define CL_AVC_ME_BORDER_REACHED_TOP_INTEL 0x4 |
| 346 | #define CL_AVC_ME_BORDER_REACHED_BOTTOM_INTEL 0x8 |
| 347 | |
| 348 | #define CL_AVC_ME_SKIP_BLOCK_PARTITION_16x16_INTEL 0x0 |
| 349 | #define CL_AVC_ME_SKIP_BLOCK_PARTITION_8x8_INTEL 0x4000 |
| 350 | |
| 351 | #define CL_AVC_ME_SKIP_BLOCK_16x16_FORWARD_ENABLE_INTEL ( 0x1 << 24 ) |
| 352 | #define CL_AVC_ME_SKIP_BLOCK_16x16_BACKWARD_ENABLE_INTEL ( 0x2 << 24 ) |
| 353 | #define CL_AVC_ME_SKIP_BLOCK_16x16_DUAL_ENABLE_INTEL ( 0x3 << 24 ) |
| 354 | #define CL_AVC_ME_SKIP_BLOCK_8x8_FORWARD_ENABLE_INTEL ( 0x55 << 24 ) |
| 355 | #define CL_AVC_ME_SKIP_BLOCK_8x8_BACKWARD_ENABLE_INTEL ( 0xAA << 24 ) |
| 356 | #define CL_AVC_ME_SKIP_BLOCK_8x8_DUAL_ENABLE_INTEL ( 0xFF << 24 ) |
| 357 | #define CL_AVC_ME_SKIP_BLOCK_8x8_0_FORWARD_ENABLE_INTEL ( 0x1 << 24 ) |
| 358 | #define CL_AVC_ME_SKIP_BLOCK_8x8_0_BACKWARD_ENABLE_INTEL ( 0x2 << 24 ) |
| 359 | #define CL_AVC_ME_SKIP_BLOCK_8x8_1_FORWARD_ENABLE_INTEL ( 0x1 << 26 ) |
| 360 | #define CL_AVC_ME_SKIP_BLOCK_8x8_1_BACKWARD_ENABLE_INTEL ( 0x2 << 26 ) |
| 361 | #define CL_AVC_ME_SKIP_BLOCK_8x8_2_FORWARD_ENABLE_INTEL ( 0x1 << 28 ) |
| 362 | #define CL_AVC_ME_SKIP_BLOCK_8x8_2_BACKWARD_ENABLE_INTEL ( 0x2 << 28 ) |
| 363 | #define CL_AVC_ME_SKIP_BLOCK_8x8_3_FORWARD_ENABLE_INTEL ( 0x1 << 30 ) |
| 364 | #define CL_AVC_ME_SKIP_BLOCK_8x8_3_BACKWARD_ENABLE_INTEL ( 0x2 << 30 ) |
| 365 | |
| 366 | #define CL_AVC_ME_BLOCK_BASED_SKIP_4x4_INTEL 0x00 |
| 367 | #define CL_AVC_ME_BLOCK_BASED_SKIP_8x8_INTEL 0x80 |
| 368 | |
| 369 | #define CL_AVC_ME_INTRA_16x16_INTEL 0x0 |
| 370 | #define CL_AVC_ME_INTRA_8x8_INTEL 0x1 |
| 371 | #define CL_AVC_ME_INTRA_4x4_INTEL 0x2 |
| 372 | |
| 373 | #define CL_AVC_ME_INTRA_LUMA_PARTITION_MASK_16x16_INTEL 0x6 |
| 374 | #define CL_AVC_ME_INTRA_LUMA_PARTITION_MASK_8x8_INTEL 0x5 |
| 375 | #define CL_AVC_ME_INTRA_LUMA_PARTITION_MASK_4x4_INTEL 0x3 |
| 376 | |
| 377 | #define CL_AVC_ME_INTRA_NEIGHBOR_LEFT_MASK_ENABLE_INTEL 0x60 |
| 378 | #define CL_AVC_ME_INTRA_NEIGHBOR_UPPER_MASK_ENABLE_INTEL 0x10 |
| 379 | #define CL_AVC_ME_INTRA_NEIGHBOR_UPPER_RIGHT_MASK_ENABLE_INTEL 0x8 |
| 380 | #define CL_AVC_ME_INTRA_NEIGHBOR_UPPER_LEFT_MASK_ENABLE_INTEL 0x4 |
| 381 | |
| 382 | #define CL_AVC_ME_LUMA_PREDICTOR_MODE_VERTICAL_INTEL 0x0 |
| 383 | #define CL_AVC_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_INTEL 0x1 |
| 384 | #define CL_AVC_ME_LUMA_PREDICTOR_MODE_DC_INTEL 0x2 |
| 385 | #define CL_AVC_ME_LUMA_PREDICTOR_MODE_DIAGONAL_DOWN_LEFT_INTEL 0x3 |
| 386 | #define CL_AVC_ME_LUMA_PREDICTOR_MODE_DIAGONAL_DOWN_RIGHT_INTEL 0x4 |
| 387 | #define CL_AVC_ME_LUMA_PREDICTOR_MODE_PLANE_INTEL 0x4 |
| 388 | #define CL_AVC_ME_LUMA_PREDICTOR_MODE_VERTICAL_RIGHT_INTEL 0x5 |
| 389 | #define CL_AVC_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_DOWN_INTEL 0x6 |
| 390 | #define CL_AVC_ME_LUMA_PREDICTOR_MODE_VERTICAL_LEFT_INTEL 0x7 |
| 391 | #define CL_AVC_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_UP_INTEL 0x8 |
| 392 | #define CL_AVC_ME_CHROMA_PREDICTOR_MODE_DC_INTEL 0x0 |
| 393 | #define CL_AVC_ME_CHROMA_PREDICTOR_MODE_HORIZONTAL_INTEL 0x1 |
| 394 | #define CL_AVC_ME_CHROMA_PREDICTOR_MODE_VERTICAL_INTEL 0x2 |
| 395 | #define CL_AVC_ME_CHROMA_PREDICTOR_MODE_PLANE_INTEL 0x3 |
| 396 | |
| 397 | #define CL_AVC_ME_FRAME_FORWARD_INTEL 0x1 |
| 398 | #define CL_AVC_ME_FRAME_BACKWARD_INTEL 0x2 |
| 399 | #define CL_AVC_ME_FRAME_DUAL_INTEL 0x3 |
| 400 | |
| 401 | #define CL_AVC_ME_SLICE_TYPE_PRED_INTEL 0x0 |
| 402 | #define CL_AVC_ME_SLICE_TYPE_BPRED_INTEL 0x1 |
| 403 | #define CL_AVC_ME_SLICE_TYPE_INTRA_INTEL 0x2 |
| 404 | |
| 405 | #define CL_AVC_ME_INTERLACED_SCAN_TOP_FIELD_INTEL 0x0 |
| 406 | #define CL_AVC_ME_INTERLACED_SCAN_BOTTOM_FIELD_INTEL 0x1 |
| 407 | |
Dave Airlie | 725df7c | 2020-10-07 10:19:09 +1000 | [diff] [blame] | 408 | /******************************************* |
| 409 | * cl_intel_unified_shared_memory extension * |
| 410 | ********************************************/ |
| 411 | |
| 412 | /* These APIs are in sync with Revision Q of the cl_intel_unified_shared_memory spec! */ |
| 413 | |
| 414 | #define cl_intel_unified_shared_memory 1 |
| 415 | |
| 416 | /* cl_device_info */ |
| 417 | #define CL_DEVICE_HOST_MEM_CAPABILITIES_INTEL 0x4190 |
| 418 | #define CL_DEVICE_DEVICE_MEM_CAPABILITIES_INTEL 0x4191 |
| 419 | #define CL_DEVICE_SINGLE_DEVICE_SHARED_MEM_CAPABILITIES_INTEL 0x4192 |
| 420 | #define CL_DEVICE_CROSS_DEVICE_SHARED_MEM_CAPABILITIES_INTEL 0x4193 |
| 421 | #define CL_DEVICE_SHARED_SYSTEM_MEM_CAPABILITIES_INTEL 0x4194 |
| 422 | |
| 423 | typedef cl_bitfield cl_device_unified_shared_memory_capabilities_intel; |
| 424 | |
| 425 | /* cl_device_unified_shared_memory_capabilities_intel - bitfield */ |
| 426 | #define CL_UNIFIED_SHARED_MEMORY_ACCESS_INTEL (1 << 0) |
| 427 | #define CL_UNIFIED_SHARED_MEMORY_ATOMIC_ACCESS_INTEL (1 << 1) |
| 428 | #define CL_UNIFIED_SHARED_MEMORY_CONCURRENT_ACCESS_INTEL (1 << 2) |
| 429 | #define CL_UNIFIED_SHARED_MEMORY_CONCURRENT_ATOMIC_ACCESS_INTEL (1 << 3) |
| 430 | |
| 431 | typedef cl_properties cl_mem_properties_intel; |
| 432 | |
| 433 | /* cl_mem_properties_intel */ |
| 434 | #define CL_MEM_ALLOC_FLAGS_INTEL 0x4195 |
| 435 | |
| 436 | typedef cl_bitfield cl_mem_alloc_flags_intel; |
| 437 | |
| 438 | /* cl_mem_alloc_flags_intel - bitfield */ |
| 439 | #define CL_MEM_ALLOC_WRITE_COMBINED_INTEL (1 << 0) |
| 440 | |
| 441 | typedef cl_uint cl_mem_info_intel; |
| 442 | |
| 443 | /* cl_mem_alloc_info_intel */ |
| 444 | #define CL_MEM_ALLOC_TYPE_INTEL 0x419A |
| 445 | #define CL_MEM_ALLOC_BASE_PTR_INTEL 0x419B |
| 446 | #define CL_MEM_ALLOC_SIZE_INTEL 0x419C |
| 447 | #define CL_MEM_ALLOC_DEVICE_INTEL 0x419D |
| 448 | /* Enum values 0x419E-0x419F are reserved for future queries. */ |
| 449 | |
| 450 | typedef cl_uint cl_unified_shared_memory_type_intel; |
| 451 | |
| 452 | /* cl_unified_shared_memory_type_intel */ |
| 453 | #define CL_MEM_TYPE_UNKNOWN_INTEL 0x4196 |
| 454 | #define CL_MEM_TYPE_HOST_INTEL 0x4197 |
| 455 | #define CL_MEM_TYPE_DEVICE_INTEL 0x4198 |
| 456 | #define CL_MEM_TYPE_SHARED_INTEL 0x4199 |
| 457 | |
| 458 | typedef cl_uint cl_mem_advice_intel; |
| 459 | |
| 460 | /* cl_mem_advice_intel */ |
| 461 | /* Enum values 0x4208-0x420F are reserved for future memory advices. */ |
| 462 | |
| 463 | /* cl_kernel_exec_info */ |
| 464 | #define CL_KERNEL_EXEC_INFO_INDIRECT_HOST_ACCESS_INTEL 0x4200 |
| 465 | #define CL_KERNEL_EXEC_INFO_INDIRECT_DEVICE_ACCESS_INTEL 0x4201 |
| 466 | #define CL_KERNEL_EXEC_INFO_INDIRECT_SHARED_ACCESS_INTEL 0x4202 |
| 467 | #define CL_KERNEL_EXEC_INFO_USM_PTRS_INTEL 0x4203 |
| 468 | |
| 469 | /* cl_command_type */ |
| 470 | #define CL_COMMAND_MEMFILL_INTEL 0x4204 |
| 471 | #define CL_COMMAND_MEMCPY_INTEL 0x4205 |
| 472 | #define CL_COMMAND_MIGRATEMEM_INTEL 0x4206 |
| 473 | #define CL_COMMAND_MEMADVISE_INTEL 0x4207 |
| 474 | |
| 475 | extern CL_API_ENTRY void* CL_API_CALL |
| 476 | clHostMemAllocINTEL( |
| 477 | cl_context context, |
| 478 | const cl_mem_properties_intel* properties, |
| 479 | size_t size, |
| 480 | cl_uint alignment, |
| 481 | cl_int* errcode_ret); |
| 482 | |
| 483 | typedef CL_API_ENTRY void* (CL_API_CALL * |
| 484 | clHostMemAllocINTEL_fn)( |
| 485 | cl_context context, |
| 486 | const cl_mem_properties_intel* properties, |
| 487 | size_t size, |
| 488 | cl_uint alignment, |
| 489 | cl_int* errcode_ret); |
| 490 | |
| 491 | extern CL_API_ENTRY void* CL_API_CALL |
| 492 | clDeviceMemAllocINTEL( |
| 493 | cl_context context, |
| 494 | cl_device_id device, |
| 495 | const cl_mem_properties_intel* properties, |
| 496 | size_t size, |
| 497 | cl_uint alignment, |
| 498 | cl_int* errcode_ret); |
| 499 | |
| 500 | typedef CL_API_ENTRY void* (CL_API_CALL * |
| 501 | clDeviceMemAllocINTEL_fn)( |
| 502 | cl_context context, |
| 503 | cl_device_id device, |
| 504 | const cl_mem_properties_intel* properties, |
| 505 | size_t size, |
| 506 | cl_uint alignment, |
| 507 | cl_int* errcode_ret); |
| 508 | |
| 509 | extern CL_API_ENTRY void* CL_API_CALL |
| 510 | clSharedMemAllocINTEL( |
| 511 | cl_context context, |
| 512 | cl_device_id device, |
| 513 | const cl_mem_properties_intel* properties, |
| 514 | size_t size, |
| 515 | cl_uint alignment, |
| 516 | cl_int* errcode_ret); |
| 517 | |
| 518 | typedef CL_API_ENTRY void* (CL_API_CALL * |
| 519 | clSharedMemAllocINTEL_fn)( |
| 520 | cl_context context, |
| 521 | cl_device_id device, |
| 522 | const cl_mem_properties_intel* properties, |
| 523 | size_t size, |
| 524 | cl_uint alignment, |
| 525 | cl_int* errcode_ret); |
| 526 | |
| 527 | extern CL_API_ENTRY cl_int CL_API_CALL |
| 528 | clMemFreeINTEL( |
| 529 | cl_context context, |
| 530 | void* ptr); |
| 531 | |
| 532 | typedef CL_API_ENTRY cl_int (CL_API_CALL * |
| 533 | clMemFreeINTEL_fn)( |
| 534 | cl_context context, |
| 535 | void* ptr); |
| 536 | |
| 537 | extern CL_API_ENTRY cl_int CL_API_CALL |
| 538 | clMemBlockingFreeINTEL( |
| 539 | cl_context context, |
| 540 | void* ptr); |
| 541 | |
| 542 | typedef CL_API_ENTRY cl_int (CL_API_CALL * |
| 543 | clMemBlockingFreeINTEL_fn)( |
| 544 | cl_context context, |
| 545 | void* ptr); |
| 546 | |
| 547 | extern CL_API_ENTRY cl_int CL_API_CALL |
| 548 | clGetMemAllocInfoINTEL( |
| 549 | cl_context context, |
| 550 | const void* ptr, |
| 551 | cl_mem_info_intel param_name, |
| 552 | size_t param_value_size, |
| 553 | void* param_value, |
| 554 | size_t* param_value_size_ret); |
| 555 | |
| 556 | typedef CL_API_ENTRY cl_int (CL_API_CALL * |
| 557 | clGetMemAllocInfoINTEL_fn)( |
| 558 | cl_context context, |
| 559 | const void* ptr, |
| 560 | cl_mem_info_intel param_name, |
| 561 | size_t param_value_size, |
| 562 | void* param_value, |
| 563 | size_t* param_value_size_ret); |
| 564 | |
| 565 | extern CL_API_ENTRY cl_int CL_API_CALL |
| 566 | clSetKernelArgMemPointerINTEL( |
| 567 | cl_kernel kernel, |
| 568 | cl_uint arg_index, |
| 569 | const void* arg_value); |
| 570 | |
| 571 | typedef CL_API_ENTRY cl_int (CL_API_CALL * |
| 572 | clSetKernelArgMemPointerINTEL_fn)( |
| 573 | cl_kernel kernel, |
| 574 | cl_uint arg_index, |
| 575 | const void* arg_value); |
| 576 | |
| 577 | extern CL_API_ENTRY cl_int CL_API_CALL |
| 578 | clEnqueueMemsetINTEL( /* Deprecated */ |
| 579 | cl_command_queue command_queue, |
| 580 | void* dst_ptr, |
| 581 | cl_int value, |
| 582 | size_t size, |
| 583 | cl_uint num_events_in_wait_list, |
| 584 | const cl_event* event_wait_list, |
| 585 | cl_event* event); |
| 586 | |
| 587 | typedef CL_API_ENTRY cl_int (CL_API_CALL * |
| 588 | clEnqueueMemsetINTEL_fn)( /* Deprecated */ |
| 589 | cl_command_queue command_queue, |
| 590 | void* dst_ptr, |
| 591 | cl_int value, |
| 592 | size_t size, |
| 593 | cl_uint num_events_in_wait_list, |
| 594 | const cl_event* event_wait_list, |
| 595 | cl_event* event); |
| 596 | |
| 597 | extern CL_API_ENTRY cl_int CL_API_CALL |
| 598 | clEnqueueMemFillINTEL( |
| 599 | cl_command_queue command_queue, |
| 600 | void* dst_ptr, |
| 601 | const void* pattern, |
| 602 | size_t pattern_size, |
| 603 | size_t size, |
| 604 | cl_uint num_events_in_wait_list, |
| 605 | const cl_event* event_wait_list, |
| 606 | cl_event* event); |
| 607 | |
| 608 | typedef CL_API_ENTRY cl_int (CL_API_CALL * |
| 609 | clEnqueueMemFillINTEL_fn)( |
| 610 | cl_command_queue command_queue, |
| 611 | void* dst_ptr, |
| 612 | const void* pattern, |
| 613 | size_t pattern_size, |
| 614 | size_t size, |
| 615 | cl_uint num_events_in_wait_list, |
| 616 | const cl_event* event_wait_list, |
| 617 | cl_event* event); |
| 618 | |
| 619 | extern CL_API_ENTRY cl_int CL_API_CALL |
| 620 | clEnqueueMemcpyINTEL( |
| 621 | cl_command_queue command_queue, |
| 622 | cl_bool blocking, |
| 623 | void* dst_ptr, |
| 624 | const void* src_ptr, |
| 625 | size_t size, |
| 626 | cl_uint num_events_in_wait_list, |
| 627 | const cl_event* event_wait_list, |
| 628 | cl_event* event); |
| 629 | |
| 630 | typedef CL_API_ENTRY cl_int (CL_API_CALL * |
| 631 | clEnqueueMemcpyINTEL_fn)( |
| 632 | cl_command_queue command_queue, |
| 633 | cl_bool blocking, |
| 634 | void* dst_ptr, |
| 635 | const void* src_ptr, |
| 636 | size_t size, |
| 637 | cl_uint num_events_in_wait_list, |
| 638 | const cl_event* event_wait_list, |
| 639 | cl_event* event); |
| 640 | |
| 641 | #ifdef CL_VERSION_1_2 |
| 642 | |
| 643 | /* Because these APIs use cl_mem_migration_flags, they require |
| 644 | OpenCL 1.2: */ |
| 645 | |
| 646 | extern CL_API_ENTRY cl_int CL_API_CALL |
| 647 | clEnqueueMigrateMemINTEL( |
| 648 | cl_command_queue command_queue, |
| 649 | const void* ptr, |
| 650 | size_t size, |
| 651 | cl_mem_migration_flags flags, |
| 652 | cl_uint num_events_in_wait_list, |
| 653 | const cl_event* event_wait_list, |
| 654 | cl_event* event); |
| 655 | |
| 656 | typedef CL_API_ENTRY cl_int (CL_API_CALL * |
| 657 | clEnqueueMigrateMemINTEL_fn)( |
| 658 | cl_command_queue command_queue, |
| 659 | const void* ptr, |
| 660 | size_t size, |
| 661 | cl_mem_migration_flags flags, |
| 662 | cl_uint num_events_in_wait_list, |
| 663 | const cl_event* event_wait_list, |
| 664 | cl_event* event); |
| 665 | |
| 666 | #endif |
| 667 | |
| 668 | extern CL_API_ENTRY cl_int CL_API_CALL |
| 669 | clEnqueueMemAdviseINTEL( |
| 670 | cl_command_queue command_queue, |
| 671 | const void* ptr, |
| 672 | size_t size, |
| 673 | cl_mem_advice_intel advice, |
| 674 | cl_uint num_events_in_wait_list, |
| 675 | const cl_event* event_wait_list, |
| 676 | cl_event* event); |
| 677 | |
| 678 | typedef CL_API_ENTRY cl_int (CL_API_CALL * |
| 679 | clEnqueueMemAdviseINTEL_fn)( |
| 680 | cl_command_queue command_queue, |
| 681 | const void* ptr, |
| 682 | size_t size, |
| 683 | cl_mem_advice_intel advice, |
| 684 | cl_uint num_events_in_wait_list, |
| 685 | const cl_event* event_wait_list, |
| 686 | cl_event* event); |
| 687 | |
| 688 | /*************************************************** |
| 689 | * cl_intel_create_buffer_with_properties extension * |
| 690 | ****************************************************/ |
| 691 | |
| 692 | #define cl_intel_create_buffer_with_properties 1 |
| 693 | |
| 694 | extern CL_API_ENTRY cl_mem CL_API_CALL |
| 695 | clCreateBufferWithPropertiesINTEL( |
| 696 | cl_context context, |
| 697 | const cl_mem_properties_intel* properties, |
| 698 | cl_mem_flags flags, |
| 699 | size_t size, |
| 700 | void * host_ptr, |
| 701 | cl_int * errcode_ret) CL_EXT_SUFFIX__VERSION_1_0; |
| 702 | |
| 703 | typedef CL_API_ENTRY cl_mem (CL_API_CALL * |
| 704 | clCreateBufferWithPropertiesINTEL_fn)( |
| 705 | cl_context context, |
| 706 | const cl_mem_properties_intel* properties, |
| 707 | cl_mem_flags flags, |
| 708 | size_t size, |
| 709 | void * host_ptr, |
| 710 | cl_int * errcode_ret) CL_EXT_SUFFIX__VERSION_1_0; |
| 711 | |
| 712 | /****************************************** |
| 713 | * cl_intel_mem_channel_property extension * |
| 714 | *******************************************/ |
| 715 | |
| 716 | #define CL_MEM_CHANNEL_INTEL 0x4213 |
| 717 | |
| 718 | /********************************* |
| 719 | * cl_intel_mem_force_host_memory * |
| 720 | **********************************/ |
| 721 | |
| 722 | #define cl_intel_mem_force_host_memory 1 |
| 723 | |
| 724 | /* cl_mem_flags */ |
| 725 | #define CL_MEM_FORCE_HOST_MEMORY_INTEL (1 << 20) |
| 726 | |
Pierre Moreau | dddc564 | 2018-01-28 11:38:46 +0100 | [diff] [blame] | 727 | #ifdef __cplusplus |
| 728 | } |
| 729 | #endif |
| 730 | |
| 731 | #endif /* __CL_EXT_INTEL_H */ |