Ben Skeggs | 857a329 | 2008-07-11 20:44:39 +1000 | [diff] [blame] | 1 | /* |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 2 | * Copyright 2010 Christoph Bumiller |
Ben Skeggs | 857a329 | 2008-07-11 20:44:39 +1000 | [diff] [blame] | 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice shall be included in |
| 12 | * all copies or substantial portions of the Software. |
| 13 | * |
| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 17 | * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, |
| 18 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF |
| 19 | * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 20 | * SOFTWARE. |
| 21 | */ |
| 22 | |
Xavier Chantry | 6ddd640 | 2010-05-05 14:39:59 +0200 | [diff] [blame] | 23 | #include "util/u_format_s3tc.h" |
Ben Skeggs | 84cc07d | 2008-02-29 15:03:57 +1100 | [diff] [blame] | 24 | #include "pipe/p_screen.h" |
Ben Skeggs | 84cc07d | 2008-02-29 15:03:57 +1100 | [diff] [blame] | 25 | |
| 26 | #include "nv50_context.h" |
| 27 | #include "nv50_screen.h" |
| 28 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 29 | #include "nouveau/nv_object.xml.h" |
Christoph Bumiller | 272bbbf | 2010-03-21 13:17:02 +0100 | [diff] [blame] | 30 | |
Christoph Bumiller | 4de293b | 2010-08-15 21:37:50 +0200 | [diff] [blame] | 31 | #ifndef NOUVEAU_GETPARAM_GRAPH_UNITS |
| 32 | # define NOUVEAU_GETPARAM_GRAPH_UNITS 13 |
| 33 | #endif |
| 34 | |
| 35 | extern int nouveau_device_get_param(struct nouveau_device *dev, |
| 36 | uint64_t param, uint64_t *value); |
| 37 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 38 | static boolean |
| 39 | nv50_screen_is_format_supported(struct pipe_screen *pscreen, |
| 40 | enum pipe_format format, |
| 41 | enum pipe_texture_target target, |
| 42 | unsigned sample_count, |
| 43 | unsigned bindings, unsigned geom_flags) |
| 44 | { |
| 45 | if (sample_count > 1) |
| 46 | return FALSE; |
| 47 | |
| 48 | if (!util_format_s3tc_enabled) { |
| 49 | switch (format) { |
| 50 | case PIPE_FORMAT_DXT1_RGB: |
| 51 | case PIPE_FORMAT_DXT1_RGBA: |
| 52 | case PIPE_FORMAT_DXT3_RGBA: |
| 53 | case PIPE_FORMAT_DXT5_RGBA: |
| 54 | return FALSE; |
| 55 | default: |
| 56 | break; |
| 57 | } |
| 58 | } |
| 59 | |
| 60 | switch (format) { |
| 61 | case PIPE_FORMAT_Z16_UNORM: |
| 62 | if ((nouveau_screen(pscreen)->device->chipset & 0xf0) != 0xa0) |
| 63 | return FALSE; |
| 64 | break; |
| 65 | default: |
| 66 | break; |
| 67 | } |
| 68 | |
| 69 | /* transfers & shared are always supported */ |
| 70 | bindings &= ~(PIPE_BIND_TRANSFER_READ | |
| 71 | PIPE_BIND_TRANSFER_WRITE | |
| 72 | PIPE_BIND_SHARED); |
| 73 | |
| 74 | return (nv50_format_table[format].usage & bindings) == bindings; |
| 75 | } |
| 76 | |
| 77 | static int |
| 78 | nv50_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) |
| 79 | { |
| 80 | switch (param) { |
| 81 | case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS: |
| 82 | case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS: |
| 83 | return 32; |
| 84 | case PIPE_CAP_MAX_COMBINED_SAMPLERS: |
| 85 | return 64; |
| 86 | case PIPE_CAP_MAX_TEXTURE_2D_LEVELS: |
| 87 | return 13; |
| 88 | case PIPE_CAP_MAX_TEXTURE_3D_LEVELS: |
| 89 | return 10; |
| 90 | case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS: |
| 91 | return 13; |
| 92 | case PIPE_CAP_ARRAY_TEXTURES: /* shader support missing */ |
| 93 | return 0; |
| 94 | case PIPE_CAP_TEXTURE_MIRROR_CLAMP: |
| 95 | case PIPE_CAP_TEXTURE_MIRROR_REPEAT: |
| 96 | case PIPE_CAP_TEXTURE_SWIZZLE: |
| 97 | case PIPE_CAP_TEXTURE_SHADOW_MAP: |
| 98 | case PIPE_CAP_NPOT_TEXTURES: |
| 99 | case PIPE_CAP_ANISOTROPIC_FILTER: |
| 100 | return 1; |
| 101 | case PIPE_CAP_TWO_SIDED_STENCIL: |
| 102 | case PIPE_CAP_DEPTH_CLAMP: |
| 103 | case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE: |
| 104 | case PIPE_CAP_POINT_SPRITE: |
| 105 | return 1; |
| 106 | case PIPE_CAP_GLSL: |
| 107 | case PIPE_CAP_SM3: |
| 108 | return 1; |
| 109 | case PIPE_CAP_MAX_RENDER_TARGETS: |
| 110 | return 8; |
| 111 | case PIPE_CAP_TIMER_QUERY: |
| 112 | case PIPE_CAP_OCCLUSION_QUERY: |
| 113 | return 1; |
| 114 | case PIPE_CAP_STREAM_OUTPUT: |
| 115 | return 0; |
| 116 | case PIPE_CAP_BLEND_EQUATION_SEPARATE: |
| 117 | case PIPE_CAP_INDEP_BLEND_ENABLE: |
| 118 | case PIPE_CAP_INDEP_BLEND_FUNC: |
| 119 | return 1; |
| 120 | case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT: |
| 121 | case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER: |
| 122 | return 1; |
| 123 | case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT: |
| 124 | case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER: |
| 125 | return 0; |
| 126 | case PIPE_CAP_SHADER_STENCIL_EXPORT: |
| 127 | return 0; |
| 128 | case PIPE_CAP_PRIMITIVE_RESTART: |
| 129 | case PIPE_CAP_INSTANCED_DRAWING: |
| 130 | return 1; |
| 131 | default: |
| 132 | NOUVEAU_ERR("unknown PIPE_CAP %d\n", param); |
| 133 | return 0; |
| 134 | } |
| 135 | } |
| 136 | |
| 137 | static int |
| 138 | nv50_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader, |
| 139 | enum pipe_shader_cap param) |
| 140 | { |
| 141 | switch (shader) { |
| 142 | case PIPE_SHADER_VERTEX: |
| 143 | case PIPE_SHADER_GEOMETRY: |
| 144 | case PIPE_SHADER_FRAGMENT: |
| 145 | break; |
| 146 | default: |
| 147 | return 0; |
| 148 | } |
| 149 | |
| 150 | switch (param) { |
| 151 | case PIPE_SHADER_CAP_MAX_INSTRUCTIONS: |
| 152 | case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS: |
| 153 | case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS: |
| 154 | case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS: |
| 155 | return 16384; |
| 156 | case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH: |
| 157 | return 4; |
| 158 | case PIPE_SHADER_CAP_MAX_INPUTS: |
| 159 | if (shader == PIPE_SHADER_VERTEX) |
| 160 | return 32; |
| 161 | return 0x300 / 16; |
| 162 | case PIPE_SHADER_CAP_MAX_CONSTS: |
| 163 | return 65536 / 16; |
| 164 | case PIPE_SHADER_CAP_MAX_CONST_BUFFERS: |
| 165 | return 14; |
| 166 | case PIPE_SHADER_CAP_MAX_ADDRS: |
| 167 | return 1; |
| 168 | case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR: |
| 169 | case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR: |
| 170 | return shader != PIPE_SHADER_FRAGMENT; |
| 171 | case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR: |
| 172 | case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR: |
| 173 | return 1; |
| 174 | case PIPE_SHADER_CAP_MAX_PREDS: |
| 175 | return 0; |
| 176 | case PIPE_SHADER_CAP_MAX_TEMPS: |
| 177 | return NV50_CAP_MAX_PROGRAM_TEMPS; |
| 178 | case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED: |
| 179 | return 1; |
| 180 | case PIPE_SHADER_CAP_SUBROUTINES: |
| 181 | return 0; /* please inline, or provide function declarations */ |
| 182 | default: |
| 183 | NOUVEAU_ERR("unknown PIPE_SHADER_CAP %d\n", param); |
| 184 | return 0; |
| 185 | } |
| 186 | } |
| 187 | |
| 188 | static float |
| 189 | nv50_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_cap param) |
| 190 | { |
| 191 | switch (param) { |
| 192 | case PIPE_CAP_MAX_LINE_WIDTH: |
| 193 | case PIPE_CAP_MAX_LINE_WIDTH_AA: |
| 194 | return 10.0f; |
| 195 | case PIPE_CAP_MAX_POINT_WIDTH: |
| 196 | case PIPE_CAP_MAX_POINT_WIDTH_AA: |
| 197 | return 64.0f; |
| 198 | case PIPE_CAP_MAX_TEXTURE_ANISOTROPY: |
| 199 | return 16.0f; |
| 200 | case PIPE_CAP_MAX_TEXTURE_LOD_BIAS: |
| 201 | return 4.0f; |
| 202 | default: |
| 203 | NOUVEAU_ERR("unknown PIPE_CAP %d\n", param); |
| 204 | return 0.0f; |
| 205 | } |
| 206 | } |
| 207 | |
| 208 | static void |
| 209 | nv50_screen_destroy(struct pipe_screen *pscreen) |
| 210 | { |
| 211 | struct nv50_screen *screen = nv50_screen(pscreen); |
| 212 | |
Ben Skeggs | 7a8ee05 | 2011-03-01 10:17:28 +1000 | [diff] [blame] | 213 | if (screen->base.fence.current) { |
| 214 | nouveau_fence_wait(screen->base.fence.current); |
| 215 | nouveau_fence_ref (NULL, &screen->base.fence.current); |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 216 | } |
| 217 | |
| 218 | nouveau_bo_ref(NULL, &screen->code); |
| 219 | nouveau_bo_ref(NULL, &screen->tls_bo); |
| 220 | nouveau_bo_ref(NULL, &screen->stack_bo); |
| 221 | nouveau_bo_ref(NULL, &screen->txc); |
| 222 | nouveau_bo_ref(NULL, &screen->uniforms); |
| 223 | nouveau_bo_ref(NULL, &screen->fence.bo); |
| 224 | |
| 225 | nouveau_resource_destroy(&screen->vp_code_heap); |
| 226 | nouveau_resource_destroy(&screen->gp_code_heap); |
| 227 | nouveau_resource_destroy(&screen->fp_code_heap); |
| 228 | |
| 229 | if (screen->tic.entries) |
| 230 | FREE(screen->tic.entries); |
| 231 | |
Ben Skeggs | 2f30a5b | 2011-03-01 10:27:45 +1000 | [diff] [blame^] | 232 | nouveau_mm_destroy(screen->mm_GART); |
| 233 | nouveau_mm_destroy(screen->mm_VRAM); |
| 234 | nouveau_mm_destroy(screen->mm_VRAM_fe0); |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 235 | |
| 236 | nouveau_grobj_free(&screen->tesla); |
| 237 | nouveau_grobj_free(&screen->eng2d); |
| 238 | nouveau_grobj_free(&screen->m2mf); |
| 239 | |
| 240 | nouveau_notifier_free(&screen->sync); |
| 241 | |
| 242 | nouveau_screen_fini(&screen->base); |
| 243 | |
| 244 | FREE(screen); |
| 245 | } |
| 246 | |
| 247 | static void |
Ben Skeggs | 7a8ee05 | 2011-03-01 10:17:28 +1000 | [diff] [blame] | 248 | nv50_screen_fence_emit(struct pipe_screen *pscreen, u32 sequence) |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 249 | { |
Ben Skeggs | 7a8ee05 | 2011-03-01 10:17:28 +1000 | [diff] [blame] | 250 | struct nv50_screen *screen = nv50_screen(pscreen); |
| 251 | struct nouveau_channel *chan = screen->base.channel; |
| 252 | |
| 253 | MARK_RING (chan, 5, 2); |
| 254 | BEGIN_RING(chan, RING_3D(QUERY_ADDRESS_HIGH), 4); |
| 255 | OUT_RELOCh(chan, screen->fence.bo, 0, NOUVEAU_BO_WR); |
| 256 | OUT_RELOCl(chan, screen->fence.bo, 0, NOUVEAU_BO_WR); |
| 257 | OUT_RING (chan, sequence); |
| 258 | OUT_RING (chan, NV50_3D_QUERY_GET_MODE_WRITE_UNK0 | |
| 259 | NV50_3D_QUERY_GET_UNK4 | |
| 260 | NV50_3D_QUERY_GET_UNIT_CROP | |
| 261 | NV50_3D_QUERY_GET_TYPE_QUERY | |
| 262 | NV50_3D_QUERY_GET_QUERY_SELECT_ZERO | |
| 263 | NV50_3D_QUERY_GET_SHORT); |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 264 | } |
| 265 | |
Ben Skeggs | 7a8ee05 | 2011-03-01 10:17:28 +1000 | [diff] [blame] | 266 | static u32 |
| 267 | nv50_screen_fence_update(struct pipe_screen *pscreen) |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 268 | { |
Ben Skeggs | 7a8ee05 | 2011-03-01 10:17:28 +1000 | [diff] [blame] | 269 | struct nv50_screen *screen = nv50_screen(pscreen); |
| 270 | return screen->fence.map[0]; |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 271 | } |
| 272 | |
| 273 | #define FAIL_SCREEN_INIT(str, err) \ |
| 274 | do { \ |
| 275 | NOUVEAU_ERR(str, err); \ |
| 276 | nv50_screen_destroy(pscreen); \ |
| 277 | return NULL; \ |
| 278 | } while(0) |
| 279 | |
Ben Skeggs | 84cc07d | 2008-02-29 15:03:57 +1100 | [diff] [blame] | 280 | struct pipe_screen * |
Ben Skeggs | 80e9e1e | 2009-06-05 10:28:13 +1000 | [diff] [blame] | 281 | nv50_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev) |
Ben Skeggs | 84cc07d | 2008-02-29 15:03:57 +1100 | [diff] [blame] | 282 | { |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 283 | struct nv50_screen *screen; |
| 284 | struct nouveau_channel *chan; |
| 285 | struct pipe_screen *pscreen; |
| 286 | uint64_t value; |
| 287 | uint32_t tesla_class; |
| 288 | unsigned stack_size, max_warps, tls_space; |
| 289 | int ret; |
| 290 | unsigned i; |
Ben Skeggs | 84cc07d | 2008-02-29 15:03:57 +1100 | [diff] [blame] | 291 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 292 | screen = CALLOC_STRUCT(nv50_screen); |
| 293 | if (!screen) |
| 294 | return NULL; |
| 295 | pscreen = &screen->base.base; |
Ben Skeggs | bc466be | 2009-06-04 10:19:04 +1000 | [diff] [blame] | 296 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 297 | ret = nouveau_screen_init(&screen->base, dev); |
| 298 | if (ret) |
| 299 | FAIL_SCREEN_INIT("nouveau_screen_init failed: %d\n", ret); |
Ben Skeggs | 84cc07d | 2008-02-29 15:03:57 +1100 | [diff] [blame] | 300 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 301 | chan = screen->base.channel; |
Ben Skeggs | bc466be | 2009-06-04 10:19:04 +1000 | [diff] [blame] | 302 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 303 | pscreen->winsys = ws; |
| 304 | pscreen->destroy = nv50_screen_destroy; |
| 305 | pscreen->context_create = nv50_create; |
| 306 | pscreen->is_format_supported = nv50_screen_is_format_supported; |
| 307 | pscreen->get_param = nv50_screen_get_param; |
| 308 | pscreen->get_shader_param = nv50_screen_get_shader_param; |
| 309 | pscreen->get_paramf = nv50_screen_get_paramf; |
Ben Skeggs | bc466be | 2009-06-04 10:19:04 +1000 | [diff] [blame] | 310 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 311 | nv50_screen_init_resource_functions(pscreen); |
Ben Skeggs | 63a3a37 | 2009-02-20 09:32:47 +1000 | [diff] [blame] | 312 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 313 | screen->base.vertex_buffer_flags = screen->base.index_buffer_flags = |
| 314 | NOUVEAU_BO_GART; |
Ben Skeggs | 1339373 | 2009-02-05 14:04:45 +1000 | [diff] [blame] | 315 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 316 | ret = nouveau_bo_new(dev, NOUVEAU_BO_GART | NOUVEAU_BO_MAP, 0, 4096, |
| 317 | &screen->fence.bo); |
| 318 | if (ret) |
| 319 | goto fail; |
| 320 | nouveau_bo_map(screen->fence.bo, NOUVEAU_BO_RDWR); |
| 321 | screen->fence.map = screen->fence.bo->map; |
| 322 | nouveau_bo_unmap(screen->fence.bo); |
Ben Skeggs | 7a8ee05 | 2011-03-01 10:17:28 +1000 | [diff] [blame] | 323 | screen->base.fence.emit = nv50_screen_fence_emit; |
| 324 | screen->base.fence.update = nv50_screen_fence_update; |
Ben Skeggs | 1cec61e | 2008-03-13 18:08:22 +1100 | [diff] [blame] | 325 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 326 | ret = nouveau_notifier_alloc(chan, 0xbeef0301, 1, &screen->sync); |
| 327 | if (ret) |
| 328 | FAIL_SCREEN_INIT("Error allocating notifier: %d\n", ret); |
Ben Skeggs | b2e48f8 | 2008-03-12 02:39:13 +1100 | [diff] [blame] | 329 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 330 | ret = nouveau_grobj_alloc(chan, 0xbeef5039, NV50_M2MF, &screen->m2mf); |
| 331 | if (ret) |
| 332 | FAIL_SCREEN_INIT("Error allocating PGRAPH context for M2MF: %d\n", ret); |
Luca Barbieri | e0af5c9 | 2010-02-23 11:06:31 +0100 | [diff] [blame] | 333 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 334 | BIND_RING (chan, screen->m2mf, NV50_SUBCH_MF); |
| 335 | BEGIN_RING(chan, RING_MF_(NV04_M2MF_DMA_NOTIFY), 3); |
| 336 | OUT_RING (chan, screen->sync->handle); |
| 337 | OUT_RING (chan, chan->vram->handle); |
| 338 | OUT_RING (chan, chan->vram->handle); |
Ben Skeggs | b2e48f8 | 2008-03-12 02:39:13 +1100 | [diff] [blame] | 339 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 340 | ret = nouveau_grobj_alloc(chan, 0xbeef502d, NV50_2D, &screen->eng2d); |
| 341 | if (ret) |
| 342 | FAIL_SCREEN_INIT("Error allocating PGRAPH context for 2D: %d\n", ret); |
Ben Skeggs | 63a3a37 | 2009-02-20 09:32:47 +1000 | [diff] [blame] | 343 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 344 | BIND_RING (chan, screen->eng2d, NV50_SUBCH_2D); |
| 345 | BEGIN_RING(chan, RING_2D(DMA_NOTIFY), 4); |
| 346 | OUT_RING (chan, screen->sync->handle); |
| 347 | OUT_RING (chan, chan->vram->handle); |
| 348 | OUT_RING (chan, chan->vram->handle); |
| 349 | OUT_RING (chan, chan->vram->handle); |
| 350 | BEGIN_RING(chan, RING_2D(OPERATION), 1); |
| 351 | OUT_RING (chan, NV50_2D_OPERATION_SRCCOPY); |
| 352 | BEGIN_RING(chan, RING_2D(CLIP_ENABLE), 1); |
| 353 | OUT_RING (chan, 0); |
| 354 | BEGIN_RING(chan, RING_2D(COLOR_KEY_ENABLE), 1); |
| 355 | OUT_RING (chan, 0); |
| 356 | BEGIN_RING(chan, RING_2D_(0x0888), 1); |
| 357 | OUT_RING (chan, 1); |
Ben Skeggs | 1339373 | 2009-02-05 14:04:45 +1000 | [diff] [blame] | 358 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 359 | switch (dev->chipset & 0xf0) { |
| 360 | case 0x50: |
| 361 | tesla_class = NV50_3D; |
| 362 | break; |
| 363 | case 0x80: |
| 364 | case 0x90: |
| 365 | tesla_class = NV84_3D; |
| 366 | break; |
| 367 | case 0xa0: |
| 368 | switch (dev->chipset) { |
| 369 | case 0xa0: |
| 370 | case 0xaa: |
| 371 | case 0xac: |
| 372 | tesla_class = NVA0_3D; |
| 373 | break; |
| 374 | case 0xaf: |
| 375 | tesla_class = NVAF_3D; |
| 376 | break; |
| 377 | default: |
| 378 | tesla_class = NVA3_3D; |
| 379 | break; |
| 380 | } |
| 381 | break; |
| 382 | default: |
| 383 | FAIL_SCREEN_INIT("Not a known NV50 chipset: NV%02x\n", dev->chipset); |
| 384 | break; |
| 385 | } |
Christoph Bumiller | 272bbbf | 2010-03-21 13:17:02 +0100 | [diff] [blame] | 386 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 387 | ret = nouveau_grobj_alloc(chan, 0xbeef5097, tesla_class, &screen->tesla); |
| 388 | if (ret) |
| 389 | FAIL_SCREEN_INIT("Error allocating PGRAPH context for 3D: %d\n", ret); |
Ben Skeggs | f722fd9 | 2008-06-01 22:41:40 +1000 | [diff] [blame] | 390 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 391 | BIND_RING (chan, screen->tesla, NV50_SUBCH_3D); |
Christoph Bumiller | 7d967b9 | 2009-10-28 00:30:45 +0100 | [diff] [blame] | 392 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 393 | BEGIN_RING(chan, RING_3D(COND_MODE), 1); |
| 394 | OUT_RING (chan, NV50_3D_COND_MODE_ALWAYS); |
Christoph Bumiller | 4c223aa | 2010-01-16 13:25:55 +0100 | [diff] [blame] | 395 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 396 | BEGIN_RING(chan, RING_3D(DMA_NOTIFY), 1); |
| 397 | OUT_RING (chan, screen->sync->handle); |
| 398 | BEGIN_RING(chan, RING_3D(DMA_ZETA), 11); |
| 399 | for (i = 0; i < 11; ++i) |
| 400 | OUT_RING(chan, chan->vram->handle); |
| 401 | BEGIN_RING(chan, RING_3D(DMA_COLOR(0)), NV50_3D_DMA_COLOR__LEN); |
| 402 | for (i = 0; i < NV50_3D_DMA_COLOR__LEN; ++i) |
| 403 | OUT_RING(chan, chan->vram->handle); |
Ben Skeggs | f722fd9 | 2008-06-01 22:41:40 +1000 | [diff] [blame] | 404 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 405 | BEGIN_RING(chan, RING_3D(REG_MODE), 1); |
| 406 | OUT_RING (chan, NV50_3D_REG_MODE_STRIPED); |
| 407 | BEGIN_RING(chan, RING_3D(UNK1400_LANES), 1); |
| 408 | OUT_RING (chan, 0xf); |
Christoph Bumiller | 2ef1d75 | 2010-09-24 22:46:51 +0200 | [diff] [blame] | 409 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 410 | BEGIN_RING(chan, RING_3D(RT_CONTROL), 1); |
| 411 | OUT_RING (chan, 1); |
Christoph Bumiller | 94ba165 | 2009-05-23 16:13:24 +0200 | [diff] [blame] | 412 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 413 | BEGIN_RING(chan, RING_3D(CSAA_ENABLE), 1); |
| 414 | OUT_RING (chan, 0); |
| 415 | BEGIN_RING(chan, RING_3D(MULTISAMPLE_ENABLE), 1); |
| 416 | OUT_RING (chan, 0); |
| 417 | BEGIN_RING(chan, RING_3D(MULTISAMPLE_MODE), 1); |
| 418 | OUT_RING (chan, NV50_3D_MULTISAMPLE_MODE_MS1); |
| 419 | BEGIN_RING(chan, RING_3D(MULTISAMPLE_CTRL), 1); |
| 420 | OUT_RING (chan, 0); |
Christoph Bumiller | 94ba165 | 2009-05-23 16:13:24 +0200 | [diff] [blame] | 421 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 422 | BEGIN_RING(chan, RING_3D(SCREEN_Y_CONTROL), 1); |
| 423 | OUT_RING (chan, 0); |
| 424 | BEGIN_RING(chan, RING_3D(WINDOW_OFFSET_X), 2); |
| 425 | OUT_RING (chan, 0); |
| 426 | OUT_RING (chan, 0); |
| 427 | BEGIN_RING(chan, RING_3D(ZCULL_REGION), 1); /* deactivate ZCULL */ |
| 428 | OUT_RING (chan, 0x3f); |
Ben Skeggs | f722fd9 | 2008-06-01 22:41:40 +1000 | [diff] [blame] | 429 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 430 | ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 16, 3 << 16, &screen->code); |
| 431 | if (ret) |
| 432 | goto fail; |
Ben Skeggs | 716c1cd | 2008-06-01 23:10:31 +1000 | [diff] [blame] | 433 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 434 | nouveau_resource_init(&screen->vp_code_heap, 0, 1 << 16); |
| 435 | nouveau_resource_init(&screen->gp_code_heap, 0, 1 << 16); |
| 436 | nouveau_resource_init(&screen->fp_code_heap, 0, 1 << 16); |
Ben Skeggs | 072fdc1 | 2009-06-04 16:13:56 +1000 | [diff] [blame] | 437 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 438 | BEGIN_RING(chan, RING_3D(VP_ADDRESS_HIGH), 2); |
| 439 | OUT_RELOCh(chan, screen->code, 0 << 16, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); |
| 440 | OUT_RELOCl(chan, screen->code, 0 << 16, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); |
Ben Skeggs | 716c1cd | 2008-06-01 23:10:31 +1000 | [diff] [blame] | 441 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 442 | BEGIN_RING(chan, RING_3D(FP_ADDRESS_HIGH), 2); |
| 443 | OUT_RELOCh(chan, screen->code, 1 << 16, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); |
| 444 | OUT_RELOCl(chan, screen->code, 1 << 16, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); |
Christoph Bumiller | 4de293b | 2010-08-15 21:37:50 +0200 | [diff] [blame] | 445 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 446 | BEGIN_RING(chan, RING_3D(GP_ADDRESS_HIGH), 2); |
| 447 | OUT_RELOCh(chan, screen->code, 2 << 16, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); |
| 448 | OUT_RELOCl(chan, screen->code, 2 << 16, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); |
Christoph Bumiller | f30810c | 2010-09-09 19:12:54 +0200 | [diff] [blame] | 449 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 450 | nouveau_device_get_param(dev, NOUVEAU_GETPARAM_GRAPH_UNITS, &value); |
Christoph Bumiller | 4de293b | 2010-08-15 21:37:50 +0200 | [diff] [blame] | 451 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 452 | max_warps = util_bitcount(value & 0xffff); |
| 453 | max_warps *= util_bitcount((value >> 24) & 0xf) * 32; |
Christoph Bumiller | 4de293b | 2010-08-15 21:37:50 +0200 | [diff] [blame] | 454 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 455 | stack_size = max_warps * 64 * 8; |
Christoph Bumiller | f30810c | 2010-09-09 19:12:54 +0200 | [diff] [blame] | 456 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 457 | ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 16, stack_size, |
| 458 | &screen->stack_bo); |
| 459 | if (ret) |
| 460 | FAIL_SCREEN_INIT("Failed to allocate stack bo: %d\n", ret); |
Christoph Bumiller | f30810c | 2010-09-09 19:12:54 +0200 | [diff] [blame] | 461 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 462 | BEGIN_RING(chan, RING_3D(STACK_ADDRESS_HIGH), 3); |
| 463 | OUT_RELOCh(chan, screen->stack_bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR); |
| 464 | OUT_RELOCl(chan, screen->stack_bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR); |
| 465 | OUT_RING (chan, 4); |
Christoph Bumiller | f30810c | 2010-09-09 19:12:54 +0200 | [diff] [blame] | 466 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 467 | tls_space = NV50_CAP_MAX_PROGRAM_TEMPS * 16; |
Christoph Bumiller | f30810c | 2010-09-09 19:12:54 +0200 | [diff] [blame] | 468 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 469 | screen->tls_size = tls_space * max_warps * 32; |
Ben Skeggs | 3250bac | 2008-03-12 02:56:10 +1100 | [diff] [blame] | 470 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 471 | debug_printf("max_warps = %i, tls_size = %lu KiB\n", |
| 472 | max_warps, screen->tls_size >> 10); |
Ben Skeggs | 101305f | 2008-06-13 10:58:27 +1000 | [diff] [blame] | 473 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 474 | ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 16, screen->tls_size, |
| 475 | &screen->tls_bo); |
| 476 | if (ret) |
| 477 | FAIL_SCREEN_INIT("Failed to allocate stack bo: %d\n", ret); |
Christoph Bumiller | 0811b09 | 2010-07-23 12:03:33 +0200 | [diff] [blame] | 478 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 479 | BEGIN_RING(chan, RING_3D(LOCAL_ADDRESS_HIGH), 3); |
| 480 | OUT_RELOCh(chan, screen->tls_bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR); |
| 481 | OUT_RELOCl(chan, screen->tls_bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR); |
| 482 | OUT_RING (chan, util_unsigned_logbase2(tls_space / 8)); |
Ben Skeggs | 431504b | 2008-06-16 18:56:39 +1000 | [diff] [blame] | 483 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 484 | ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 16, 4 << 16, |
| 485 | &screen->uniforms); |
| 486 | if (ret) |
| 487 | goto fail; |
Christoph Bumiller | d29f555 | 2009-12-24 12:39:42 +0100 | [diff] [blame] | 488 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 489 | BEGIN_RING(chan, RING_3D(CB_DEF_ADDRESS_HIGH), 3); |
| 490 | OUT_RELOCh(chan, screen->uniforms, 0 << 16, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); |
| 491 | OUT_RELOCl(chan, screen->uniforms, 0 << 16, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); |
| 492 | OUT_RING (chan, (NV50_CB_PVP << 16) | 0x0000); |
Ben Skeggs | b2e48f8 | 2008-03-12 02:39:13 +1100 | [diff] [blame] | 493 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 494 | BEGIN_RING(chan, RING_3D(CB_DEF_ADDRESS_HIGH), 3); |
| 495 | OUT_RELOCh(chan, screen->uniforms, 1 << 16, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); |
| 496 | OUT_RELOCl(chan, screen->uniforms, 1 << 16, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); |
| 497 | OUT_RING (chan, (NV50_CB_PGP << 16) | 0x0000); |
| 498 | |
| 499 | BEGIN_RING(chan, RING_3D(CB_DEF_ADDRESS_HIGH), 3); |
| 500 | OUT_RELOCh(chan, screen->uniforms, 2 << 16, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); |
| 501 | OUT_RELOCl(chan, screen->uniforms, 2 << 16, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); |
| 502 | OUT_RING (chan, (NV50_CB_PFP << 16) | 0x0000); |
| 503 | |
| 504 | BEGIN_RING(chan, RING_3D(CB_DEF_ADDRESS_HIGH), 3); |
| 505 | OUT_RELOCh(chan, screen->uniforms, 3 << 16, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); |
| 506 | OUT_RELOCl(chan, screen->uniforms, 3 << 16, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); |
| 507 | OUT_RING (chan, (NV50_CB_AUX << 16) | 0x0200); |
| 508 | |
| 509 | BEGIN_RING_NI(chan, RING_3D(SET_PROGRAM_CB), 6); |
| 510 | OUT_RING (chan, (NV50_CB_PVP << 12) | 0x001); |
| 511 | OUT_RING (chan, (NV50_CB_PGP << 12) | 0x021); |
| 512 | OUT_RING (chan, (NV50_CB_PFP << 12) | 0x031); |
| 513 | OUT_RING (chan, (NV50_CB_AUX << 12) | 0xf01); |
| 514 | OUT_RING (chan, (NV50_CB_AUX << 12) | 0xf21); |
| 515 | OUT_RING (chan, (NV50_CB_AUX << 12) | 0xf31); |
| 516 | |
| 517 | ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 16, 3 << 16, |
| 518 | &screen->txc); |
| 519 | if (ret) |
| 520 | FAIL_SCREEN_INIT("Could not allocate TIC/TSC bo: %d\n", ret); |
| 521 | |
| 522 | /* max TIC (bits 4:8) & TSC bindings, per program type */ |
| 523 | for (i = 0; i < 3; ++i) { |
| 524 | BEGIN_RING(chan, RING_3D(TEX_LIMITS(i)), 1); |
| 525 | OUT_RING (chan, 0x54); |
| 526 | } |
| 527 | |
| 528 | BEGIN_RING(chan, RING_3D(TIC_ADDRESS_HIGH), 3); |
| 529 | OUT_RELOCh(chan, screen->txc, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); |
| 530 | OUT_RELOCl(chan, screen->txc, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); |
| 531 | OUT_RING (chan, NV50_TIC_MAX_ENTRIES - 1); |
| 532 | |
| 533 | BEGIN_RING(chan, RING_3D(TSC_ADDRESS_HIGH), 3); |
| 534 | OUT_RELOCh(chan, screen->txc, 65536, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); |
| 535 | OUT_RELOCl(chan, screen->txc, 65536, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); |
| 536 | OUT_RING (chan, NV50_TSC_MAX_ENTRIES - 1); |
| 537 | |
| 538 | BEGIN_RING(chan, RING_3D(LINKED_TSC), 1); |
| 539 | OUT_RING (chan, 0); |
| 540 | |
| 541 | BEGIN_RING(chan, RING_3D(CLIP_RECTS_EN), 1); |
| 542 | OUT_RING (chan, 0); |
| 543 | BEGIN_RING(chan, RING_3D(CLIP_RECTS_MODE), 1); |
| 544 | OUT_RING (chan, NV50_3D_CLIP_RECTS_MODE_INSIDE_ANY); |
| 545 | BEGIN_RING(chan, RING_3D(CLIP_RECT_HORIZ(0)), 8 * 2); |
| 546 | for (i = 0; i < 8 * 2; ++i) |
| 547 | OUT_RING(chan, 0); |
| 548 | BEGIN_RING(chan, RING_3D(CLIPID_ENABLE), 1); |
| 549 | OUT_RING (chan, 0); |
| 550 | |
| 551 | BEGIN_RING(chan, RING_3D(VIEWPORT_TRANSFORM_EN), 1); |
| 552 | OUT_RING (chan, 1); |
| 553 | BEGIN_RING(chan, RING_3D(DEPTH_RANGE_NEAR(0)), 2); |
| 554 | OUT_RINGf (chan, 0.0f); |
| 555 | OUT_RINGf (chan, 1.0f); |
| 556 | |
| 557 | BEGIN_RING(chan, RING_3D(VIEW_VOLUME_CLIP_CTRL), 1); |
| 558 | #ifdef NV50_SCISSORS_CLIPPING |
| 559 | OUT_RING (chan, 0x0000); |
| 560 | #else |
| 561 | OUT_RING (chan, 0x1080); |
| 562 | #endif |
| 563 | |
| 564 | BEGIN_RING(chan, RING_3D(CLEAR_FLAGS), 1); |
| 565 | OUT_RING (chan, NV50_3D_CLEAR_FLAGS_CLEAR_RECT_VIEWPORT); |
| 566 | |
| 567 | /* We use scissors instead of exact view volume clipping, |
| 568 | * so they're always enabled. |
| 569 | */ |
| 570 | BEGIN_RING(chan, RING_3D(SCISSOR_ENABLE(0)), 3); |
| 571 | OUT_RING (chan, 1); |
| 572 | OUT_RING (chan, 8192 << 16); |
| 573 | OUT_RING (chan, 8192 << 16); |
| 574 | |
| 575 | BEGIN_RING(chan, RING_3D(RASTERIZE_ENABLE), 1); |
| 576 | OUT_RING (chan, 1); |
| 577 | BEGIN_RING(chan, RING_3D(POINT_RASTER_RULES), 1); |
| 578 | OUT_RING (chan, NV50_3D_POINT_RASTER_RULES_OGL); |
| 579 | BEGIN_RING(chan, RING_3D(FRAG_COLOR_CLAMP_EN), 1); |
| 580 | OUT_RING (chan, 0x11111111); |
| 581 | BEGIN_RING(chan, RING_3D(EDGEFLAG_ENABLE), 1); |
| 582 | OUT_RING (chan, 1); |
| 583 | |
| 584 | FIRE_RING (chan); |
| 585 | |
| 586 | screen->tic.entries = CALLOC(4096, sizeof(void *)); |
| 587 | screen->tsc.entries = screen->tic.entries + 2048; |
| 588 | |
Ben Skeggs | 2f30a5b | 2011-03-01 10:27:45 +1000 | [diff] [blame^] | 589 | screen->mm_GART = nouveau_mm_create(dev, NOUVEAU_BO_GART | NOUVEAU_BO_MAP, |
| 590 | 0x000); |
| 591 | screen->mm_VRAM = nouveau_mm_create(dev, NOUVEAU_BO_VRAM, 0x000); |
| 592 | screen->mm_VRAM_fe0 = nouveau_mm_create(dev, NOUVEAU_BO_VRAM, 0xfe0); |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 593 | |
Ben Skeggs | 7a8ee05 | 2011-03-01 10:17:28 +1000 | [diff] [blame] | 594 | nouveau_fence_new(&screen->base, &screen->base.fence.current, FALSE); |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 595 | |
| 596 | return pscreen; |
| 597 | |
| 598 | fail: |
| 599 | nv50_screen_destroy(pscreen); |
| 600 | return NULL; |
Ben Skeggs | 84cc07d | 2008-02-29 15:03:57 +1100 | [diff] [blame] | 601 | } |
| 602 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 603 | void |
| 604 | nv50_screen_make_buffers_resident(struct nv50_screen *screen) |
| 605 | { |
| 606 | struct nouveau_channel *chan = screen->base.channel; |
| 607 | |
| 608 | const unsigned flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_RD; |
| 609 | |
| 610 | MARK_RING(chan, 5, 5); |
| 611 | nouveau_bo_validate(chan, screen->code, flags); |
| 612 | nouveau_bo_validate(chan, screen->uniforms, flags); |
| 613 | nouveau_bo_validate(chan, screen->txc, flags); |
| 614 | nouveau_bo_validate(chan, screen->tls_bo, flags); |
| 615 | nouveau_bo_validate(chan, screen->stack_bo, flags); |
| 616 | } |
| 617 | |
| 618 | int |
| 619 | nv50_screen_tic_alloc(struct nv50_screen *screen, void *entry) |
| 620 | { |
| 621 | int i = screen->tic.next; |
| 622 | |
| 623 | while (screen->tic.lock[i / 32] & (1 << (i % 32))) |
| 624 | i = (i + 1) & (NV50_TIC_MAX_ENTRIES - 1); |
| 625 | |
| 626 | screen->tic.next = (i + 1) & (NV50_TIC_MAX_ENTRIES - 1); |
| 627 | |
| 628 | if (screen->tic.entries[i]) |
| 629 | nv50_tic_entry(screen->tic.entries[i])->id = -1; |
| 630 | |
| 631 | screen->tic.entries[i] = entry; |
| 632 | return i; |
| 633 | } |
| 634 | |
| 635 | int |
| 636 | nv50_screen_tsc_alloc(struct nv50_screen *screen, void *entry) |
| 637 | { |
| 638 | int i = screen->tsc.next; |
| 639 | |
| 640 | while (screen->tsc.lock[i / 32] & (1 << (i % 32))) |
| 641 | i = (i + 1) & (NV50_TSC_MAX_ENTRIES - 1); |
| 642 | |
| 643 | screen->tsc.next = (i + 1) & (NV50_TSC_MAX_ENTRIES - 1); |
| 644 | |
| 645 | if (screen->tsc.entries[i]) |
| 646 | nv50_tsc_entry(screen->tsc.entries[i])->id = -1; |
| 647 | |
| 648 | screen->tsc.entries[i] = entry; |
| 649 | return i; |
| 650 | } |