blob: 7c8480772d2578770182e4a67e98360ded59221b [file] [log] [blame]
Jerome Glisse1235bec2010-09-29 15:05:19 -04001/*
2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23#include <stdio.h>
24#include <errno.h>
Kai Wasserbäch8fb7f1a2011-08-27 17:51:51 +020025#include "pipe/p_defines.h"
26#include "pipe/p_state.h"
27#include "pipe/p_context.h"
28#include "tgsi/tgsi_scan.h"
29#include "tgsi/tgsi_parse.h"
30#include "tgsi/tgsi_util.h"
31#include "util/u_blitter.h"
32#include "util/u_double_list.h"
Marcin Slusarzb5dfc382011-04-16 22:15:52 +020033#include "util/u_format.h"
Kai Wasserbäch8fb7f1a2011-08-27 17:51:51 +020034#include "util/u_format_s3tc.h"
35#include "util/u_transfer.h"
36#include "util/u_surface.h"
37#include "util/u_pack_color.h"
38#include "util/u_memory.h"
39#include "util/u_inlines.h"
Marek Olšák02f8f132011-01-28 03:03:38 +010040#include "util/u_upload_mgr.h"
Kai Wasserbäch8fb7f1a2011-08-27 17:51:51 +020041#include "vl/vl_decoder.h"
42#include "vl/vl_video_buffer.h"
Fredrik Höglund948e1eb2011-03-29 19:43:59 +020043#include "os/os_time.h"
Kai Wasserbäch8fb7f1a2011-08-27 17:51:51 +020044#include "pipebuffer/pb_buffer.h"
Jerome Glisse1235bec2010-09-29 15:05:19 -040045#include "r600.h"
46#include "r600d.h"
Jerome Glisse1235bec2010-09-29 15:05:19 -040047#include "r600_resource.h"
48#include "r600_shader.h"
49#include "r600_pipe.h"
Marek Olšákce12f822011-07-22 19:25:07 +020050#include "../../winsys/r600/drm/r600_drm_public.h"
Jerome Glisse1235bec2010-09-29 15:05:19 -040051
52/*
53 * pipe_context
54 */
Fredrik Höglund948e1eb2011-03-29 19:43:59 +020055static struct r600_fence *r600_create_fence(struct r600_pipe_context *ctx)
56{
Marek Olšákab630b52011-08-04 04:27:48 +020057 struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
Fredrik Höglund948e1eb2011-03-29 19:43:59 +020058 struct r600_fence *fence = NULL;
59
60 if (!ctx->fences.bo) {
61 /* Create the shared buffer object */
62 ctx->fences.bo = r600_bo(ctx->radeon, 4096, 0, 0, 0);
63 if (!ctx->fences.bo) {
64 R600_ERR("r600: failed to create bo for fence objects\n");
65 return NULL;
66 }
Marek Olšákab630b52011-08-04 04:27:48 +020067 ctx->fences.data = r600_bo_map(ctx->radeon, ctx->fences.bo, rctx->ctx.cs,
68 PIPE_TRANSFER_UNSYNCHRONIZED | PIPE_TRANSFER_WRITE);
Fredrik Höglund948e1eb2011-03-29 19:43:59 +020069 }
70
71 if (!LIST_IS_EMPTY(&ctx->fences.pool)) {
72 struct r600_fence *entry;
73
74 /* Try to find a freed fence that has been signalled */
75 LIST_FOR_EACH_ENTRY(entry, &ctx->fences.pool, head) {
76 if (ctx->fences.data[entry->index] != 0) {
77 LIST_DELINIT(&entry->head);
78 fence = entry;
79 break;
80 }
81 }
82 }
83
84 if (!fence) {
85 /* Allocate a new fence */
86 struct r600_fence_block *block;
87 unsigned index;
88
89 if ((ctx->fences.next_index + 1) >= 1024) {
90 R600_ERR("r600: too many concurrent fences\n");
91 return NULL;
92 }
93
94 index = ctx->fences.next_index++;
95
96 if (!(index % FENCE_BLOCK_SIZE)) {
97 /* Allocate a new block */
98 block = CALLOC_STRUCT(r600_fence_block);
99 if (block == NULL)
100 return NULL;
101
102 LIST_ADD(&block->head, &ctx->fences.blocks);
103 } else {
104 block = LIST_ENTRY(struct r600_fence_block, ctx->fences.blocks.next, head);
105 }
106
107 fence = &block->fences[index % FENCE_BLOCK_SIZE];
108 fence->ctx = ctx;
109 fence->index = index;
110 }
111
112 pipe_reference_init(&fence->reference, 1);
113
114 ctx->fences.data[fence->index] = 0;
115 r600_context_emit_fence(&ctx->ctx, ctx->fences.bo, fence->index, 1);
116 return fence;
117}
118
Marek Olšáke2e1dc92011-08-04 03:38:20 +0200119
Marek Olšákc79e9f02011-08-04 07:05:07 +0200120void r600_flush(struct pipe_context *ctx, struct pipe_fence_handle **fence,
121 unsigned flags)
Jerome Glisse1235bec2010-09-29 15:05:19 -0400122{
123 struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
Fredrik Höglund948e1eb2011-03-29 19:43:59 +0200124 struct r600_fence **rfence = (struct r600_fence**)fence;
125
Fredrik Höglund948e1eb2011-03-29 19:43:59 +0200126 if (rfence)
127 *rfence = r600_create_fence(rctx);
128
Marek Olšáke2e1dc92011-08-04 03:38:20 +0200129 r600_context_flush(&rctx->ctx, flags);
130}
131
132static void r600_flush_from_st(struct pipe_context *ctx,
133 struct pipe_fence_handle **fence)
134{
135 r600_flush(ctx, fence, 0);
136}
137
138static void r600_flush_from_winsys(void *ctx, unsigned flags)
139{
140 r600_flush((struct pipe_context*)ctx, NULL, flags);
Jerome Glisse1235bec2010-09-29 15:05:19 -0400141}
142
Jerome Glissec33e0912011-02-28 13:33:13 -0500143static void r600_update_num_contexts(struct r600_screen *rscreen, int diff)
Marek Olšákf0b202e2011-02-08 17:30:39 +0100144{
145 pipe_mutex_lock(rscreen->mutex_num_contexts);
146 if (diff > 0) {
147 rscreen->num_contexts++;
148
149 if (rscreen->num_contexts > 1)
150 util_slab_set_thread_safety(&rscreen->pool_buffers,
151 UTIL_SLAB_MULTITHREADED);
152 } else {
153 rscreen->num_contexts--;
154
155 if (rscreen->num_contexts <= 1)
156 util_slab_set_thread_safety(&rscreen->pool_buffers,
157 UTIL_SLAB_SINGLETHREADED);
158 }
159 pipe_mutex_unlock(rscreen->mutex_num_contexts);
Jerome Glisse1235bec2010-09-29 15:05:19 -0400160}
161
162static void r600_destroy_context(struct pipe_context *context)
163{
164 struct r600_pipe_context *rctx = (struct r600_pipe_context *)context;
165
Tilman Sauerbeckecb1b8b2010-10-31 12:16:03 +0100166 rctx->context.delete_depth_stencil_alpha_state(&rctx->context, rctx->custom_dsa_flush);
Henri Verbeet09eff392011-04-07 22:21:20 +0200167 util_unreference_framebuffer_state(&rctx->framebuffer);
Tilman Sauerbeckecb1b8b2010-10-31 12:16:03 +0100168
Jerome Glisse1235bec2010-09-29 15:05:19 -0400169 r600_context_fini(&rctx->ctx);
José Fonseca01b39b02010-11-03 20:22:28 +0000170
171 util_blitter_destroy(rctx->blitter);
172
Jerome Glisse1235bec2010-09-29 15:05:19 -0400173 for (int i = 0; i < R600_PIPE_NSTATES; i++) {
174 free(rctx->states[i]);
175 }
176
Marek Olšákaa8a2222011-02-07 02:00:56 +0100177 u_vbuf_mgr_destroy(rctx->vbuf_mgr);
Marek Olšákf0b202e2011-02-08 17:30:39 +0100178 util_slab_destroy(&rctx->pool_transfers);
Jerome Glisse1235bec2010-09-29 15:05:19 -0400179
Fredrik Höglund948e1eb2011-03-29 19:43:59 +0200180 if (rctx->fences.bo) {
181 struct r600_fence_block *entry, *tmp;
182
183 LIST_FOR_EACH_ENTRY_SAFE(entry, tmp, &rctx->fences.blocks, head) {
184 LIST_DEL(&entry->head);
185 FREE(entry);
186 }
187
188 r600_bo_unmap(rctx->radeon, rctx->fences.bo);
Marek Olšák041ed552011-08-04 06:17:39 +0200189 r600_bo_reference(&rctx->fences.bo, NULL);
Fredrik Höglund948e1eb2011-03-29 19:43:59 +0200190 }
191
Marek Olšákf0b202e2011-02-08 17:30:39 +0100192 r600_update_num_contexts(rctx->screen, -1);
Dave Airliee68c83a2010-10-21 17:34:25 +1000193
Jerome Glisse1235bec2010-09-29 15:05:19 -0400194 FREE(rctx);
195}
196
Dave Airliedbcd6522010-09-30 09:07:07 +1000197static struct pipe_context *r600_create_context(struct pipe_screen *screen, void *priv)
Jerome Glisse1235bec2010-09-29 15:05:19 -0400198{
199 struct r600_pipe_context *rctx = CALLOC_STRUCT(r600_pipe_context);
200 struct r600_screen* rscreen = (struct r600_screen *)screen;
201
202 if (rctx == NULL)
203 return NULL;
Marek Olšákf0b202e2011-02-08 17:30:39 +0100204
205 r600_update_num_contexts(rscreen, 1);
206
Jerome Glisse1235bec2010-09-29 15:05:19 -0400207 rctx->context.winsys = rscreen->screen.winsys;
208 rctx->context.screen = screen;
209 rctx->context.priv = priv;
210 rctx->context.destroy = r600_destroy_context;
Marek Olšáke2e1dc92011-08-04 03:38:20 +0200211 rctx->context.flush = r600_flush_from_st;
Jerome Glisse1235bec2010-09-29 15:05:19 -0400212
213 /* Easy accessing of screen/winsys. */
214 rctx->screen = rscreen;
215 rctx->radeon = rscreen->radeon;
216 rctx->family = r600_get_family(rctx->radeon);
Henri Verbeetb3b946b2011-07-09 17:18:59 +0200217 rctx->chip_class = r600_get_family_class(rctx->radeon);
Jerome Glisse1235bec2010-09-29 15:05:19 -0400218
Fredrik Höglund948e1eb2011-03-29 19:43:59 +0200219 rctx->fences.bo = NULL;
220 rctx->fences.data = NULL;
221 rctx->fences.next_index = 0;
222 LIST_INITHEAD(&rctx->fences.pool);
223 LIST_INITHEAD(&rctx->fences.blocks);
224
Dave Airliedbcd6522010-09-30 09:07:07 +1000225 r600_init_blit_functions(rctx);
Jerome Glisse6abd7772010-09-29 15:39:40 -0400226 r600_init_query_functions(rctx);
Dave Airliedbcd6522010-09-30 09:07:07 +1000227 r600_init_context_resource_functions(rctx);
Roland Scheidegger4c700142010-12-02 04:33:43 +0100228 r600_init_surface_functions(rctx);
Marek Olšák2d7738e2011-01-28 22:17:41 +0100229 rctx->context.draw_vbo = r600_draw_vbo;
Christian Königea784802011-07-08 19:22:43 +0200230
231 rctx->context.create_video_decoder = vl_create_decoder;
Christian König4e837f52011-07-08 16:56:11 +0200232 rctx->context.create_video_buffer = vl_video_buffer_create;
Jerome Glisse1235bec2010-09-29 15:05:19 -0400233
Henri Verbeetb3b946b2011-07-09 17:18:59 +0200234 switch (rctx->chip_class) {
235 case R600:
236 case R700:
Dave Airliedbcd6522010-09-30 09:07:07 +1000237 r600_init_state_functions(rctx);
Jerome Glisse1235bec2010-09-29 15:05:19 -0400238 if (r600_context_init(&rctx->ctx, rctx->radeon)) {
239 r600_destroy_context(&rctx->context);
240 return NULL;
241 }
Dave Airliedbcd6522010-09-30 09:07:07 +1000242 r600_init_config(rctx);
Henri Verbeetb3b946b2011-07-09 17:18:59 +0200243 rctx->custom_dsa_flush = r600_create_db_flush_dsa(rctx);
Jerome Glisse1235bec2010-09-29 15:05:19 -0400244 break;
Henri Verbeetb3b946b2011-07-09 17:18:59 +0200245 case EVERGREEN:
246 case CAYMAN:
Dave Airliedbcd6522010-09-30 09:07:07 +1000247 evergreen_init_state_functions(rctx);
Jerome Glisse1235bec2010-09-29 15:05:19 -0400248 if (evergreen_context_init(&rctx->ctx, rctx->radeon)) {
249 r600_destroy_context(&rctx->context);
250 return NULL;
251 }
Dave Airliedbcd6522010-09-30 09:07:07 +1000252 evergreen_init_config(rctx);
Henri Verbeetb3b946b2011-07-09 17:18:59 +0200253 rctx->custom_dsa_flush = evergreen_create_db_flush_dsa(rctx);
Jerome Glisse1235bec2010-09-29 15:05:19 -0400254 break;
255 default:
Henri Verbeetb3b946b2011-07-09 17:18:59 +0200256 R600_ERR("Unsupported chip class %d.\n", rctx->chip_class);
Jerome Glisse1235bec2010-09-29 15:05:19 -0400257 r600_destroy_context(&rctx->context);
258 return NULL;
259 }
260
Marek Olšáke2e1dc92011-08-04 03:38:20 +0200261 rctx->screen->ws->cs_set_flush_callback(rctx->ctx.cs, r600_flush_from_winsys, rctx);
262
Marek Olšákf0b202e2011-02-08 17:30:39 +0100263 util_slab_create(&rctx->pool_transfers,
264 sizeof(struct pipe_transfer), 64,
265 UTIL_SLAB_SINGLETHREADED);
Jerome Glisse1235bec2010-09-29 15:05:19 -0400266
Marek Olšák467023e2011-02-08 15:21:35 +0100267 rctx->vbuf_mgr = u_vbuf_mgr_create(&rctx->context, 1024 * 1024, 256,
268 PIPE_BIND_VERTEX_BUFFER |
269 PIPE_BIND_INDEX_BUFFER |
270 PIPE_BIND_CONSTANT_BUFFER,
Fabian Bieler0ed5bf62011-02-14 22:44:42 +0100271 U_VERTEX_FETCH_DWORD_ALIGNED);
Marek Olšákaa8a2222011-02-07 02:00:56 +0100272 if (!rctx->vbuf_mgr) {
Dave Airlie6d9ca782011-01-07 10:35:41 +1000273 r600_destroy_context(&rctx->context);
274 return NULL;
275 }
Marek Olšáke3be5132011-08-15 23:37:44 +0200276 rctx->vbuf_mgr->caps.format_fixed32 = 0;
Dave Airlie6d9ca782011-01-07 10:35:41 +1000277
Jerome Glisse1235bec2010-09-29 15:05:19 -0400278 rctx->blitter = util_blitter_create(&rctx->context);
279 if (rctx->blitter == NULL) {
Marek Olšákf0b202e2011-02-08 17:30:39 +0100280 r600_destroy_context(&rctx->context);
Dave Airlied59498b2010-10-13 15:22:04 +1000281 return NULL;
282 }
283
Jerome Glisse1235bec2010-09-29 15:05:19 -0400284 return &rctx->context;
285}
286
287/*
288 * pipe_screen
289 */
290static const char* r600_get_vendor(struct pipe_screen* pscreen)
291{
292 return "X.Org";
293}
294
Dave Airlie4378c172010-09-30 09:17:20 +1000295static const char *r600_get_family_name(enum radeon_family family)
296{
297 switch(family) {
Henri Verbeet9f064112010-11-07 18:40:12 +0100298 case CHIP_R600: return "AMD R600";
299 case CHIP_RV610: return "AMD RV610";
300 case CHIP_RV630: return "AMD RV630";
301 case CHIP_RV670: return "AMD RV670";
302 case CHIP_RV620: return "AMD RV620";
303 case CHIP_RV635: return "AMD RV635";
304 case CHIP_RS780: return "AMD RS780";
305 case CHIP_RS880: return "AMD RS880";
306 case CHIP_RV770: return "AMD RV770";
307 case CHIP_RV730: return "AMD RV730";
308 case CHIP_RV710: return "AMD RV710";
309 case CHIP_RV740: return "AMD RV740";
310 case CHIP_CEDAR: return "AMD CEDAR";
311 case CHIP_REDWOOD: return "AMD REDWOOD";
312 case CHIP_JUNIPER: return "AMD JUNIPER";
313 case CHIP_CYPRESS: return "AMD CYPRESS";
314 case CHIP_HEMLOCK: return "AMD HEMLOCK";
Alex Deucher0e4c5f62010-11-22 17:47:24 -0500315 case CHIP_PALM: return "AMD PALM";
Alex Deucher414cd5d2011-04-04 12:06:11 -0400316 case CHIP_SUMO: return "AMD SUMO";
317 case CHIP_SUMO2: return "AMD SUMO2";
Alex Deucherf54366b2011-01-06 18:05:16 -0500318 case CHIP_BARTS: return "AMD BARTS";
319 case CHIP_TURKS: return "AMD TURKS";
320 case CHIP_CAICOS: return "AMD CAICOS";
Dave Airlie7779f6d2011-03-10 12:54:13 +1000321 case CHIP_CAYMAN: return "AMD CAYMAN";
Henri Verbeet9f064112010-11-07 18:40:12 +0100322 default: return "AMD unknown";
Dave Airlie4378c172010-09-30 09:17:20 +1000323 }
324}
325
Jerome Glisse1235bec2010-09-29 15:05:19 -0400326static const char* r600_get_name(struct pipe_screen* pscreen)
327{
328 struct r600_screen *rscreen = (struct r600_screen *)pscreen;
329 enum radeon_family family = r600_get_family(rscreen->radeon);
330
Dave Airlie4378c172010-09-30 09:17:20 +1000331 return r600_get_family_name(family);
Jerome Glisse1235bec2010-09-29 15:05:19 -0400332}
333
334static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
335{
Alex Deucherfae7cb82010-12-02 16:09:22 -0500336 struct r600_screen *rscreen = (struct r600_screen *)pscreen;
337 enum radeon_family family = r600_get_family(rscreen->radeon);
338
Jerome Glisse1235bec2010-09-29 15:05:19 -0400339 switch (param) {
340 /* Supported features (boolean caps). */
341 case PIPE_CAP_NPOT_TEXTURES:
342 case PIPE_CAP_TWO_SIDED_STENCIL:
343 case PIPE_CAP_GLSL:
344 case PIPE_CAP_DUAL_SOURCE_BLEND:
345 case PIPE_CAP_ANISOTROPIC_FILTER:
346 case PIPE_CAP_POINT_SPRITE:
347 case PIPE_CAP_OCCLUSION_QUERY:
348 case PIPE_CAP_TEXTURE_SHADOW_MAP:
349 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
350 case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
351 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
Jerome Glisse1235bec2010-09-29 15:05:19 -0400352 case PIPE_CAP_TEXTURE_SWIZZLE:
Jerome Glisse1235bec2010-09-29 15:05:19 -0400353 case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
354 case PIPE_CAP_DEPTH_CLAMP:
Dave Airlie39d1feb2010-10-06 10:14:33 +1000355 case PIPE_CAP_SHADER_STENCIL_EXPORT:
Marek Olšák95c78812011-03-05 16:06:10 +0100356 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
Marek Olšák4a7f0132011-03-29 18:18:05 +0200357 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
Marek Olšák93754d82011-05-03 11:54:40 +0200358 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
359 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
Dave Airlie13c9a852011-06-15 15:15:41 +1000360 case PIPE_CAP_SM3:
Marek Olšákbadf0332011-06-19 23:41:02 +0200361 case PIPE_CAP_SEAMLESS_CUBE_MAP:
Vadim Girlineafd3312011-06-24 20:29:13 +0400362 case PIPE_CAP_FRAGMENT_COLOR_CLAMP_CONTROL:
Marek Olšák01680ce2011-08-16 09:47:16 +0200363 case PIPE_CAP_PRIMITIVE_RESTART:
Jerome Glisse1235bec2010-09-29 15:05:19 -0400364 return 1;
Marek Olšák93754d82011-05-03 11:54:40 +0200365
366 /* Supported except the original R600. */
Alex Deucherd6fea4a2011-03-14 17:47:21 -0400367 case PIPE_CAP_INDEP_BLEND_ENABLE:
Dave Airliede481992011-04-25 06:55:09 +1000368 case PIPE_CAP_INDEP_BLEND_FUNC:
Alex Deucherd6fea4a2011-03-14 17:47:21 -0400369 /* R600 doesn't support per-MRT blends */
Marek Olšák93754d82011-05-03 11:54:40 +0200370 return family == CHIP_R600 ? 0 : 1;
Jerome Glisse1235bec2010-09-29 15:05:19 -0400371
Marek Olšákd931b0d2011-05-02 02:38:20 +0200372 /* Supported on Evergreen. */
Marek Olšákd931b0d2011-05-02 02:38:20 +0200373 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
374 return family >= CHIP_CEDAR ? 1 : 0;
Marek Olšákfc8e30e2011-04-17 01:57:13 +0200375
Marek Olšák93754d82011-05-03 11:54:40 +0200376 /* Unsupported features. */
Jerome Glisse1235bec2010-09-29 15:05:19 -0400377 case PIPE_CAP_STREAM_OUTPUT:
Marek Olšák93754d82011-05-03 11:54:40 +0200378 case PIPE_CAP_TGSI_INSTANCEID:
379 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
380 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
381 return 0;
Jerome Glisse1235bec2010-09-29 15:05:19 -0400382
383 /* Texturing. */
384 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
385 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
386 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
Alex Deucherfae7cb82010-12-02 16:09:22 -0500387 if (family >= CHIP_CEDAR)
388 return 15;
389 else
390 return 14;
Marek Olšákb37931f2011-09-04 04:41:52 +0200391 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
392 return r600_get_minor_version(rscreen->radeon) >= 9 ?
393 (family >= CHIP_CEDAR ? 16384 : 8192) : 0;
Jerome Glisse1235bec2010-09-29 15:05:19 -0400394 case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
Jerome Glisse1235bec2010-09-29 15:05:19 -0400395 case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
Jerome Glisse1235bec2010-09-29 15:05:19 -0400396 return 16;
Marek Olšák320adb92011-05-03 11:54:07 +0200397 case PIPE_CAP_MAX_COMBINED_SAMPLERS:
398 return 32;
Jerome Glisse1235bec2010-09-29 15:05:19 -0400399
400 /* Render targets. */
401 case PIPE_CAP_MAX_RENDER_TARGETS:
402 /* FIXME some r6xx are buggy and can only do 4 */
403 return 8;
404
Mathias Fröhlich90c2fd82011-01-23 22:35:13 +0100405 /* Timer queries, present when the clock frequency is non zero. */
406 case PIPE_CAP_TIMER_QUERY:
407 return r600_get_clock_crystal_freq(rscreen->radeon) != 0;
408
Dave Airlie0b666102011-08-29 14:35:16 +0100409 case PIPE_CAP_MIN_TEXEL_OFFSET:
410 return -8;
411
412 case PIPE_CAP_MAX_TEXEL_OFFSET:
413 return 7;
414
Jerome Glisse1235bec2010-09-29 15:05:19 -0400415 default:
416 R600_ERR("r600: unknown param %d\n", param);
417 return 0;
418 }
419}
420
421static float r600_get_paramf(struct pipe_screen* pscreen, enum pipe_cap param)
422{
Alex Deucherfae7cb82010-12-02 16:09:22 -0500423 struct r600_screen *rscreen = (struct r600_screen *)pscreen;
424 enum radeon_family family = r600_get_family(rscreen->radeon);
425
Jerome Glisse1235bec2010-09-29 15:05:19 -0400426 switch (param) {
427 case PIPE_CAP_MAX_LINE_WIDTH:
428 case PIPE_CAP_MAX_LINE_WIDTH_AA:
429 case PIPE_CAP_MAX_POINT_WIDTH:
430 case PIPE_CAP_MAX_POINT_WIDTH_AA:
Alex Deucherfae7cb82010-12-02 16:09:22 -0500431 if (family >= CHIP_CEDAR)
432 return 16384.0f;
433 else
434 return 8192.0f;
Jerome Glisse1235bec2010-09-29 15:05:19 -0400435 case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
436 return 16.0f;
437 case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
438 return 16.0f;
439 default:
440 R600_ERR("r600: unsupported paramf %d\n", param);
441 return 0.0f;
442 }
443}
444
445static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enum pipe_shader_cap param)
446{
447 switch(shader)
448 {
449 case PIPE_SHADER_FRAGMENT:
450 case PIPE_SHADER_VERTEX:
451 break;
452 case PIPE_SHADER_GEOMETRY:
453 /* TODO: support and enable geometry programs */
454 return 0;
455 default:
456 /* TODO: support tessellation on Evergreen */
457 return 0;
458 }
459
460 /* TODO: all these should be fixed, since r600 surely supports much more! */
461 switch (param) {
462 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
463 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
464 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
465 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
466 return 16384;
467 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
468 return 8; /* FIXME */
469 case PIPE_SHADER_CAP_MAX_INPUTS:
470 if(shader == PIPE_SHADER_FRAGMENT)
Marek Olšák1e5cef92011-06-23 15:55:41 +0200471 return 34;
Jerome Glisse1235bec2010-09-29 15:05:19 -0400472 else
Marek Olšák1e5cef92011-06-23 15:55:41 +0200473 return 32;
Jerome Glisse1235bec2010-09-29 15:05:19 -0400474 case PIPE_SHADER_CAP_MAX_TEMPS:
Henri Verbeetb2a98c32011-04-25 13:28:55 +0200475 return 256; /* Max native temporaries. */
Jerome Glisse1235bec2010-09-29 15:05:19 -0400476 case PIPE_SHADER_CAP_MAX_ADDRS:
Henri Verbeetb2a98c32011-04-25 13:28:55 +0200477 /* FIXME Isn't this equal to TEMPS? */
478 return 1; /* Max native address registers */
Jerome Glisse1235bec2010-09-29 15:05:19 -0400479 case PIPE_SHADER_CAP_MAX_CONSTS:
Henri Verbeeteac50292011-03-07 21:15:03 +0100480 return R600_MAX_CONST_BUFFER_SIZE;
Jerome Glisse1235bec2010-09-29 15:05:19 -0400481 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
Henri Verbeet077c4482011-02-07 15:22:08 +0100482 return R600_MAX_CONST_BUFFERS;
Jerome Glisse1235bec2010-09-29 15:05:19 -0400483 case PIPE_SHADER_CAP_MAX_PREDS:
484 return 0; /* FIXME */
485 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
486 return 1;
Marek Olšák5c7127c2010-11-12 03:07:05 +0100487 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
488 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
489 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
490 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
491 return 1;
Marek Olšák9aa089e2010-11-14 15:34:59 +0100492 case PIPE_SHADER_CAP_SUBROUTINES:
493 return 0;
Bryan Cain17b695e2011-05-05 21:10:28 -0500494 case PIPE_SHADER_CAP_INTEGERS:
495 return 0;
Jerome Glisse1235bec2010-09-29 15:05:19 -0400496 default:
497 return 0;
498 }
499}
500
Christian Königf265a192011-07-07 22:51:45 +0200501static int r600_get_video_param(struct pipe_screen *screen,
502 enum pipe_video_profile profile,
503 enum pipe_video_cap param)
504{
505 switch (param) {
Christian Königefc7fda2011-07-12 00:12:12 +0200506 case PIPE_VIDEO_CAP_SUPPORTED:
507 return vl_profile_supported(screen, profile);
Christian Königf265a192011-07-07 22:51:45 +0200508 case PIPE_VIDEO_CAP_NPOT_TEXTURES:
509 return 1;
Christian Königefc7fda2011-07-12 00:12:12 +0200510 case PIPE_VIDEO_CAP_MAX_WIDTH:
511 case PIPE_VIDEO_CAP_MAX_HEIGHT:
512 return vl_video_buffer_max_size(screen);
Christian König231fce72011-08-09 19:27:57 +0200513 case PIPE_VIDEO_CAP_NUM_BUFFERS_DESIRED:
514 return vl_num_buffers_desired(screen, profile);
Christian Königf265a192011-07-07 22:51:45 +0200515 default:
516 return 0;
517 }
518}
519
Jerome Glisse1235bec2010-09-29 15:05:19 -0400520static void r600_destroy_screen(struct pipe_screen* pscreen)
521{
522 struct r600_screen *rscreen = (struct r600_screen *)pscreen;
523
524 if (rscreen == NULL)
525 return;
Tilman Sauerbeck52ba68d2010-10-31 15:51:55 +0100526
Marek Olšák2ce783d2011-08-02 20:25:13 +0200527 radeon_destroy(rscreen->radeon);
528 rscreen->ws->destroy(rscreen->ws);
Tilman Sauerbeck52ba68d2010-10-31 15:51:55 +0100529
Marek Olšákf0b202e2011-02-08 17:30:39 +0100530 util_slab_destroy(&rscreen->pool_buffers);
531 pipe_mutex_destroy(rscreen->mutex_num_contexts);
Jerome Glisse1235bec2010-09-29 15:05:19 -0400532 FREE(rscreen);
533}
534
Fredrik Höglund948e1eb2011-03-29 19:43:59 +0200535static void r600_fence_reference(struct pipe_screen *pscreen,
536 struct pipe_fence_handle **ptr,
537 struct pipe_fence_handle *fence)
538{
539 struct r600_fence **oldf = (struct r600_fence**)ptr;
540 struct r600_fence *newf = (struct r600_fence*)fence;
541
542 if (pipe_reference(&(*oldf)->reference, &newf->reference)) {
543 struct r600_pipe_context *ctx = (*oldf)->ctx;
544 LIST_ADDTAIL(&(*oldf)->head, &ctx->fences.pool);
545 }
546
547 *ptr = fence;
548}
549
550static boolean r600_fence_signalled(struct pipe_screen *pscreen,
551 struct pipe_fence_handle *fence)
552{
553 struct r600_fence *rfence = (struct r600_fence*)fence;
554 struct r600_pipe_context *ctx = rfence->ctx;
555
556 return ctx->fences.data[rfence->index];
557}
558
559static boolean r600_fence_finish(struct pipe_screen *pscreen,
560 struct pipe_fence_handle *fence,
561 uint64_t timeout)
562{
563 struct r600_fence *rfence = (struct r600_fence*)fence;
564 struct r600_pipe_context *ctx = rfence->ctx;
565 int64_t start_time = 0;
566 unsigned spins = 0;
567
568 if (timeout != PIPE_TIMEOUT_INFINITE) {
569 start_time = os_time_get();
570
571 /* Convert to microseconds. */
572 timeout /= 1000;
573 }
574
575 while (ctx->fences.data[rfence->index] == 0) {
576 if (++spins % 256)
577 continue;
578#ifdef PIPE_OS_UNIX
579 sched_yield();
580#else
581 os_time_sleep(10);
582#endif
583 if (timeout != PIPE_TIMEOUT_INFINITE &&
584 os_time_get() - start_time >= timeout) {
585 return FALSE;
586 }
587 }
588
589 return TRUE;
590}
Jerome Glisse1235bec2010-09-29 15:05:19 -0400591
Marek Olšák3603d152011-09-11 14:53:07 +0200592static int r600_interpret_tiling(struct r600_screen *rscreen, uint32_t tiling_config)
593{
594 switch ((tiling_config & 0xe) >> 1) {
595 case 0:
596 rscreen->tiling_info.num_channels = 1;
597 break;
598 case 1:
599 rscreen->tiling_info.num_channels = 2;
600 break;
601 case 2:
602 rscreen->tiling_info.num_channels = 4;
603 break;
604 case 3:
605 rscreen->tiling_info.num_channels = 8;
606 break;
607 default:
608 return -EINVAL;
609 }
610
611 switch ((tiling_config & 0x30) >> 4) {
612 case 0:
613 rscreen->tiling_info.num_banks = 4;
614 break;
615 case 1:
616 rscreen->tiling_info.num_banks = 8;
617 break;
618 default:
619 return -EINVAL;
620
621 }
622 switch ((tiling_config & 0xc0) >> 6) {
623 case 0:
624 rscreen->tiling_info.group_bytes = 256;
625 break;
626 case 1:
627 rscreen->tiling_info.group_bytes = 512;
628 break;
629 default:
630 return -EINVAL;
631 }
632 return 0;
633}
634
635static int evergreen_interpret_tiling(struct r600_screen *rscreen, uint32_t tiling_config)
636{
637 switch (tiling_config & 0xf) {
638 case 0:
639 rscreen->tiling_info.num_channels = 1;
640 break;
641 case 1:
642 rscreen->tiling_info.num_channels = 2;
643 break;
644 case 2:
645 rscreen->tiling_info.num_channels = 4;
646 break;
647 case 3:
648 rscreen->tiling_info.num_channels = 8;
649 break;
650 default:
651 return -EINVAL;
652 }
653
654 switch ((tiling_config & 0xf0) >> 4) {
655 case 0:
656 rscreen->tiling_info.num_banks = 4;
657 break;
658 case 1:
659 rscreen->tiling_info.num_banks = 8;
660 break;
661 case 2:
662 rscreen->tiling_info.num_banks = 16;
663 break;
664 default:
665 return -EINVAL;
666 }
667
668 switch ((tiling_config & 0xf00) >> 8) {
669 case 0:
670 rscreen->tiling_info.group_bytes = 256;
671 break;
672 case 1:
673 rscreen->tiling_info.group_bytes = 512;
674 break;
675 default:
676 return -EINVAL;
677 }
678 return 0;
679}
680
681static int r600_init_tiling(struct r600_screen *rscreen)
682{
683 uint32_t tiling_config = rscreen->info.r600_tiling_config;
684
685 /* set default group bytes, overridden by tiling info ioctl */
686 if (r600_get_family_class(rscreen->radeon) <= R700) {
687 rscreen->tiling_info.group_bytes = 256;
688 } else {
689 rscreen->tiling_info.group_bytes = 512;
690 }
691
692 if (!tiling_config)
693 return 0;
694
695 if (r600_get_family_class(rscreen->radeon) <= R700) {
696 return r600_interpret_tiling(rscreen, tiling_config);
697 } else {
698 return evergreen_interpret_tiling(rscreen, tiling_config);
699 }
700}
701
Marek Olšák2ce783d2011-08-02 20:25:13 +0200702struct pipe_screen *r600_screen_create(struct radeon_winsys *ws)
Jerome Glisse1235bec2010-09-29 15:05:19 -0400703{
704 struct r600_screen *rscreen;
Marek Olšák2ce783d2011-08-02 20:25:13 +0200705 struct radeon *radeon = radeon_create(ws);
Marek Olšák3603d152011-09-11 14:53:07 +0200706 if (!radeon) {
707 return NULL;
708 }
Jerome Glisse1235bec2010-09-29 15:05:19 -0400709
710 rscreen = CALLOC_STRUCT(r600_screen);
711 if (rscreen == NULL) {
Marek Olšák3603d152011-09-11 14:53:07 +0200712 radeon_destroy(radeon);
Jerome Glisse1235bec2010-09-29 15:05:19 -0400713 return NULL;
714 }
715
Marek Olšák2ce783d2011-08-02 20:25:13 +0200716 rscreen->ws = ws;
Jerome Glisse1235bec2010-09-29 15:05:19 -0400717 rscreen->radeon = radeon;
Marek Olšák3603d152011-09-11 14:53:07 +0200718 ws->query_info(ws, &rscreen->info);
719
720 if (r600_init_tiling(rscreen)) {
721 radeon_destroy(radeon);
722 FREE(rscreen);
723 return NULL;
724 }
725
Marek Olšák2ce783d2011-08-02 20:25:13 +0200726 rscreen->screen.winsys = (struct pipe_winsys*)ws;
Jerome Glisse1235bec2010-09-29 15:05:19 -0400727 rscreen->screen.destroy = r600_destroy_screen;
728 rscreen->screen.get_name = r600_get_name;
729 rscreen->screen.get_vendor = r600_get_vendor;
730 rscreen->screen.get_param = r600_get_param;
731 rscreen->screen.get_shader_param = r600_get_shader_param;
732 rscreen->screen.get_paramf = r600_get_paramf;
Christian Königf265a192011-07-07 22:51:45 +0200733 rscreen->screen.get_video_param = r600_get_video_param;
Henri Verbeet18cdb9c2011-07-05 01:58:46 +0200734 if (r600_get_family_class(radeon) >= EVERGREEN) {
735 rscreen->screen.is_format_supported = evergreen_is_format_supported;
736 } else {
737 rscreen->screen.is_format_supported = r600_is_format_supported;
738 }
Christian König7eca7692011-07-08 11:20:39 +0200739 rscreen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
Dave Airliedbcd6522010-09-30 09:07:07 +1000740 rscreen->screen.context_create = r600_create_context;
Fredrik Höglund948e1eb2011-03-29 19:43:59 +0200741 rscreen->screen.fence_reference = r600_fence_reference;
742 rscreen->screen.fence_signalled = r600_fence_signalled;
743 rscreen->screen.fence_finish = r600_fence_finish;
Jerome Glisse1235bec2010-09-29 15:05:19 -0400744 r600_init_screen_resource_functions(&rscreen->screen);
745
Dave Airlie8e043792011-02-11 13:42:52 +1000746 util_format_s3tc_init();
Dave Airlie7b3fa032010-10-08 11:56:43 +1000747
Marek Olšákf0b202e2011-02-08 17:30:39 +0100748 util_slab_create(&rscreen->pool_buffers,
749 sizeof(struct r600_resource_buffer), 64,
750 UTIL_SLAB_SINGLETHREADED);
751
752 pipe_mutex_init(rscreen->mutex_num_contexts);
Jerome Glisse1235bec2010-09-29 15:05:19 -0400753
Jerome Glisse1235bec2010-09-29 15:05:19 -0400754 return &rscreen->screen;
755}