Ben Skeggs | 857a329 | 2008-07-11 20:44:39 +1000 | [diff] [blame] | 1 | /* |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 2 | * Copyright 2010 Christoph Bumiller |
Ben Skeggs | 857a329 | 2008-07-11 20:44:39 +1000 | [diff] [blame] | 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice shall be included in |
| 12 | * all copies or substantial portions of the Software. |
| 13 | * |
| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
Kenneth Graunke | 3d8d5b2 | 2013-04-21 13:46:48 -0700 | [diff] [blame] | 17 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR |
| 18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 20 | * OTHER DEALINGS IN THE SOFTWARE. |
Ben Skeggs | 857a329 | 2008-07-11 20:44:39 +1000 | [diff] [blame] | 21 | */ |
| 22 | |
Emil Velikov | 2b5f395 | 2014-08-14 21:05:35 +0100 | [diff] [blame] | 23 | #include <errno.h> |
| 24 | #include <xf86drm.h> |
| 25 | #include <nouveau_drm.h> |
Marcin Slusarz | b5dfc38 | 2011-04-16 22:15:52 +0200 | [diff] [blame] | 26 | #include "util/u_format.h" |
Xavier Chantry | 6ddd640 | 2010-05-05 14:39:59 +0200 | [diff] [blame] | 27 | #include "util/u_format_s3tc.h" |
Ben Skeggs | 84cc07d | 2008-02-29 15:03:57 +1100 | [diff] [blame] | 28 | #include "pipe/p_screen.h" |
Ben Skeggs | 84cc07d | 2008-02-29 15:03:57 +1100 | [diff] [blame] | 29 | |
Johannes Obermayr | 5eb7ff1 | 2013-08-20 20:14:00 +0200 | [diff] [blame] | 30 | #include "nv50/nv50_context.h" |
| 31 | #include "nv50/nv50_screen.h" |
Ben Skeggs | 84cc07d | 2008-02-29 15:03:57 +1100 | [diff] [blame] | 32 | |
Johannes Obermayr | 5eb7ff1 | 2013-08-20 20:14:00 +0200 | [diff] [blame] | 33 | #include "nouveau_vp3_video.h" |
Ilia Mirkin | a2061ee | 2013-08-10 20:19:24 -0400 | [diff] [blame] | 34 | |
Johannes Obermayr | 5eb7ff1 | 2013-08-20 20:14:00 +0200 | [diff] [blame] | 35 | #include "nv_object.xml.h" |
Christoph Bumiller | 4de293b | 2010-08-15 21:37:50 +0200 | [diff] [blame] | 36 | |
Marcin Slusarz | 1906d2b | 2012-06-27 14:45:17 +0200 | [diff] [blame] | 37 | /* affected by LOCAL_WARPS_LOG_ALLOC / LOCAL_WARPS_NO_CLAMP */ |
| 38 | #define LOCAL_WARPS_ALLOC 32 |
| 39 | /* affected by STACK_WARPS_LOG_ALLOC / STACK_WARPS_NO_CLAMP */ |
| 40 | #define STACK_WARPS_ALLOC 32 |
| 41 | |
| 42 | #define THREADS_IN_WARP 32 |
| 43 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 44 | static boolean |
| 45 | nv50_screen_is_format_supported(struct pipe_screen *pscreen, |
| 46 | enum pipe_format format, |
| 47 | enum pipe_texture_target target, |
| 48 | unsigned sample_count, |
Marek Olšák | e968975 | 2011-03-08 00:01:58 +0100 | [diff] [blame] | 49 | unsigned bindings) |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 50 | { |
Christoph Bumiller | 7d2d450 | 2013-01-19 20:53:22 +0100 | [diff] [blame] | 51 | if (sample_count > 8) |
Samuel Pitoiset | cd0dec0 | 2015-07-20 21:32:43 +0200 | [diff] [blame] | 52 | return false; |
Christoph Bumiller | 9f49986 | 2011-08-27 17:31:04 +0200 | [diff] [blame] | 53 | if (!(0x117 & (1 << sample_count))) /* 0, 1, 2, 4 or 8 */ |
Samuel Pitoiset | cd0dec0 | 2015-07-20 21:32:43 +0200 | [diff] [blame] | 54 | return false; |
Christoph Bumiller | b2dcf88 | 2011-07-11 18:02:27 +0200 | [diff] [blame] | 55 | if (sample_count == 8 && util_format_get_blocksizebits(format) >= 128) |
Samuel Pitoiset | cd0dec0 | 2015-07-20 21:32:43 +0200 | [diff] [blame] | 56 | return false; |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 57 | |
Marek Olšák | 75fa5c9 | 2011-04-11 06:23:00 +0200 | [diff] [blame] | 58 | if (!util_format_is_supported(format, bindings)) |
Samuel Pitoiset | cd0dec0 | 2015-07-20 21:32:43 +0200 | [diff] [blame] | 59 | return false; |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 60 | |
| 61 | switch (format) { |
| 62 | case PIPE_FORMAT_Z16_UNORM: |
Christoph Bumiller | 6d1cdec | 2012-04-06 15:41:55 +0200 | [diff] [blame] | 63 | if (nv50_screen(pscreen)->tesla->oclass < NVA0_3D_CLASS) |
Samuel Pitoiset | cd0dec0 | 2015-07-20 21:32:43 +0200 | [diff] [blame] | 64 | return false; |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 65 | break; |
| 66 | default: |
| 67 | break; |
| 68 | } |
| 69 | |
Ilia Mirkin | df03be1 | 2016-03-31 21:52:13 -0400 | [diff] [blame] | 70 | if (bindings & PIPE_BIND_LINEAR) |
| 71 | if (util_format_is_depth_or_stencil(format) || |
| 72 | (target != PIPE_TEXTURE_1D && |
| 73 | target != PIPE_TEXTURE_2D && |
| 74 | target != PIPE_TEXTURE_RECT) || |
| 75 | sample_count > 1) |
| 76 | return false; |
| 77 | |
Marek Olšák | 5981ab5 | 2016-09-07 21:24:08 +0200 | [diff] [blame] | 78 | /* shared is always supported */ |
| 79 | bindings &= ~(PIPE_BIND_LINEAR | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 80 | PIPE_BIND_SHARED); |
| 81 | |
Ben Skeggs | 346d7a2 | 2016-02-15 15:37:29 +1000 | [diff] [blame] | 82 | return (( nv50_format_table[format].usage | |
| 83 | nv50_vertex_format[format].usage) & bindings) == bindings; |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 84 | } |
| 85 | |
| 86 | static int |
| 87 | nv50_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) |
| 88 | { |
Christoph Bumiller | 02fac29 | 2012-05-03 12:50:08 +0200 | [diff] [blame] | 89 | const uint16_t class_3d = nouveau_screen(pscreen)->class_3d; |
Emil Velikov | 2b5f395 | 2014-08-14 21:05:35 +0100 | [diff] [blame] | 90 | struct nouveau_device *dev = nouveau_screen(pscreen)->device; |
Christoph Bumiller | 02fac29 | 2012-05-03 12:50:08 +0200 | [diff] [blame] | 91 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 92 | switch (param) { |
Ilia Mirkin | 22e9551 | 2014-06-16 03:25:44 -0400 | [diff] [blame] | 93 | /* non-boolean caps */ |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 94 | case PIPE_CAP_MAX_TEXTURE_2D_LEVELS: |
Adel Gadllah | fc8196f | 2011-10-24 19:41:03 +0200 | [diff] [blame] | 95 | return 14; |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 96 | case PIPE_CAP_MAX_TEXTURE_3D_LEVELS: |
Adel Gadllah | fc8196f | 2011-10-24 19:41:03 +0200 | [diff] [blame] | 97 | return 12; |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 98 | case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS: |
Adel Gadllah | fc8196f | 2011-10-24 19:41:03 +0200 | [diff] [blame] | 99 | return 14; |
Christoph Bumiller | 8a44ecd | 2012-04-24 23:21:41 +0200 | [diff] [blame] | 100 | case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS: |
| 101 | return 512; |
Ilia Mirkin | c2f9ad5 | 2014-04-09 14:58:53 -0400 | [diff] [blame] | 102 | case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET: |
Christoph Bumiller | d53c49b | 2011-09-05 15:31:28 +0200 | [diff] [blame] | 103 | case PIPE_CAP_MIN_TEXEL_OFFSET: |
Christoph Bumiller | 0bbf165 | 2012-04-14 21:42:52 +0200 | [diff] [blame] | 104 | return -8; |
Ilia Mirkin | c2f9ad5 | 2014-04-09 14:58:53 -0400 | [diff] [blame] | 105 | case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET: |
Christoph Bumiller | d53c49b | 2011-09-05 15:31:28 +0200 | [diff] [blame] | 106 | case PIPE_CAP_MAX_TEXEL_OFFSET: |
Christoph Bumiller | 0bbf165 | 2012-04-14 21:42:52 +0200 | [diff] [blame] | 107 | return 7; |
Marek Olšák | 52cb395 | 2013-05-02 03:24:33 +0200 | [diff] [blame] | 108 | case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE: |
Ilia Mirkin | 7a275fc | 2015-09-15 19:39:25 -0400 | [diff] [blame] | 109 | return 128 * 1024 * 1024; |
Christoph Bumiller | 672ad90 | 2012-01-29 13:24:11 +0100 | [diff] [blame] | 110 | case PIPE_CAP_GLSL_FEATURE_LEVEL: |
Ilia Mirkin | 839bd3c | 2014-01-15 05:48:51 -0500 | [diff] [blame] | 111 | return 330; |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 112 | case PIPE_CAP_MAX_RENDER_TARGETS: |
| 113 | return 8; |
Christoph Bumiller | 802d02c | 2012-04-14 02:39:16 +0200 | [diff] [blame] | 114 | case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS: |
| 115 | return 1; |
Marek Olšák | 861a029 | 2011-12-15 18:42:21 +0100 | [diff] [blame] | 116 | case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS: |
Christoph Bumiller | 02fac29 | 2012-05-03 12:50:08 +0200 | [diff] [blame] | 117 | return 4; |
Christoph Bumiller | f37c3a3 | 2012-01-07 00:39:54 +0100 | [diff] [blame] | 118 | case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS: |
Christoph Bumiller | f37c3a3 | 2012-01-07 00:39:54 +0100 | [diff] [blame] | 119 | case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS: |
Christoph Bumiller | 02fac29 | 2012-05-03 12:50:08 +0200 | [diff] [blame] | 120 | return 64; |
Grigori Goronzy | d34d5fd | 2014-02-09 22:56:20 +0100 | [diff] [blame] | 121 | case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES: |
| 122 | case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS: |
| 123 | return 1024; |
Ilia Mirkin | 746e526 | 2014-06-26 20:01:50 -0400 | [diff] [blame] | 124 | case PIPE_CAP_MAX_VERTEX_STREAMS: |
| 125 | return 1; |
Timothy Arceri | 89e6806 | 2014-08-19 21:09:58 -1000 | [diff] [blame] | 126 | case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE: |
| 127 | return 2048; |
Ilia Mirkin | 22e9551 | 2014-06-16 03:25:44 -0400 | [diff] [blame] | 128 | case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT: |
| 129 | return 256; |
| 130 | case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT: |
Ilia Mirkin | aa3b85f | 2016-02-27 15:30:34 -0500 | [diff] [blame] | 131 | return 16; /* 256 for binding as RT, but that's not possible in GL */ |
Ilia Mirkin | 22e9551 | 2014-06-16 03:25:44 -0400 | [diff] [blame] | 132 | case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT: |
| 133 | return NOUVEAU_MIN_BUFFER_MAP_ALIGN; |
| 134 | case PIPE_CAP_MAX_VIEWPORTS: |
| 135 | return NV50_MAX_VIEWPORTS; |
| 136 | case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK: |
| 137 | return PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_NV50; |
| 138 | case PIPE_CAP_ENDIANNESS: |
| 139 | return PIPE_ENDIAN_LITTLE; |
| 140 | case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS: |
| 141 | return (class_3d >= NVA3_3D_CLASS) ? 4 : 0; |
Ilia Mirkin | 194bcb4 | 2016-06-12 16:05:31 -0400 | [diff] [blame] | 142 | case PIPE_CAP_MAX_WINDOW_RECTANGLES: |
| 143 | return NV50_MAX_WINDOW_RECTANGLES; |
Ilia Mirkin | 22e9551 | 2014-06-16 03:25:44 -0400 | [diff] [blame] | 144 | |
| 145 | /* supported caps */ |
| 146 | case PIPE_CAP_TEXTURE_MIRROR_CLAMP: |
| 147 | case PIPE_CAP_TEXTURE_SWIZZLE: |
| 148 | case PIPE_CAP_TEXTURE_SHADOW_MAP: |
| 149 | case PIPE_CAP_NPOT_TEXTURES: |
| 150 | case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES: |
Ilia Mirkin | 9515d65 | 2016-08-20 22:40:33 -0400 | [diff] [blame] | 151 | case PIPE_CAP_MIXED_COLOR_DEPTH_BITS: |
Ilia Mirkin | 22e9551 | 2014-06-16 03:25:44 -0400 | [diff] [blame] | 152 | case PIPE_CAP_ANISOTROPIC_FILTER: |
| 153 | case PIPE_CAP_TEXTURE_BUFFER_OBJECTS: |
| 154 | case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT: |
| 155 | case PIPE_CAP_TWO_SIDED_STENCIL: |
| 156 | case PIPE_CAP_DEPTH_CLIP_DISABLE: |
| 157 | case PIPE_CAP_POINT_SPRITE: |
| 158 | case PIPE_CAP_SM3: |
| 159 | case PIPE_CAP_FRAGMENT_COLOR_CLAMPED: |
| 160 | case PIPE_CAP_VERTEX_COLOR_UNCLAMPED: |
| 161 | case PIPE_CAP_VERTEX_COLOR_CLAMPED: |
| 162 | case PIPE_CAP_QUERY_TIMESTAMP: |
| 163 | case PIPE_CAP_QUERY_TIME_ELAPSED: |
| 164 | case PIPE_CAP_OCCLUSION_QUERY: |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 165 | case PIPE_CAP_BLEND_EQUATION_SEPARATE: |
| 166 | case PIPE_CAP_INDEP_BLEND_ENABLE: |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 167 | case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT: |
| 168 | case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER: |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 169 | case PIPE_CAP_PRIMITIVE_RESTART: |
Marek Olšák | 95c7881 | 2011-03-05 16:06:10 +0100 | [diff] [blame] | 170 | case PIPE_CAP_TGSI_INSTANCEID: |
| 171 | case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR: |
Marek Olšák | 4a7f013 | 2011-03-29 18:18:05 +0200 | [diff] [blame] | 172 | case PIPE_CAP_MIXED_COLORBUFFER_FORMATS: |
Marek Olšák | 3d13b08 | 2011-09-27 23:08:04 +0200 | [diff] [blame] | 173 | case PIPE_CAP_CONDITIONAL_RENDER: |
Marek Olšák | ba89086 | 2011-09-27 23:18:17 +0200 | [diff] [blame] | 174 | case PIPE_CAP_TEXTURE_BARRIER: |
Christoph Bumiller | 8b4f7b0 | 2012-02-06 16:29:03 +0100 | [diff] [blame] | 175 | case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION: |
Fredrik Höglund | af37212 | 2012-06-18 22:50:02 +0200 | [diff] [blame] | 176 | case PIPE_CAP_START_INSTANCE: |
Marek Olšák | 437ab1d | 2012-04-24 15:19:31 +0200 | [diff] [blame] | 177 | case PIPE_CAP_USER_CONSTANT_BUFFERS: |
Christoph Bumiller | e6caafd | 2012-05-16 21:08:37 +0200 | [diff] [blame] | 178 | case PIPE_CAP_USER_VERTEX_BUFFERS: |
Ilia Mirkin | 22e9551 | 2014-06-16 03:25:44 -0400 | [diff] [blame] | 179 | case PIPE_CAP_TEXTURE_MULTISAMPLE: |
| 180 | case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER: |
Ilia Mirkin | f08d7b8 | 2014-08-14 00:17:17 -0400 | [diff] [blame] | 181 | case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE: |
Ilia Mirkin | 95058bd | 2014-08-20 20:19:38 -0400 | [diff] [blame] | 182 | case PIPE_CAP_SAMPLER_VIEW_TARGET: |
Tobias Klausmann | 1a17098 | 2014-09-22 04:40:58 +0200 | [diff] [blame] | 183 | case PIPE_CAP_CONDITIONAL_RENDER_INVERTED: |
Ilia Mirkin | 3bc42a0 | 2014-10-23 00:43:45 -0400 | [diff] [blame] | 184 | case PIPE_CAP_CLIP_HALFZ: |
Ilia Mirkin | 7c211a1 | 2015-02-01 09:01:50 -0500 | [diff] [blame] | 185 | case PIPE_CAP_POLYGON_OFFSET_CLAMP: |
Ilia Mirkin | 5000a5f | 2015-02-18 03:35:23 -0500 | [diff] [blame] | 186 | case PIPE_CAP_QUERY_PIPELINE_STATISTICS: |
Marek Olšák | 44dc1d3 | 2015-08-10 19:37:01 +0200 | [diff] [blame] | 187 | case PIPE_CAP_TEXTURE_FLOAT_LINEAR: |
| 188 | case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR: |
Ilia Mirkin | a6bf20d | 2015-08-11 11:59:56 -0400 | [diff] [blame] | 189 | case PIPE_CAP_DEPTH_BOUNDS_TEST: |
Ilia Mirkin | 4294db9 | 2015-09-10 22:07:27 -0400 | [diff] [blame] | 190 | case PIPE_CAP_TGSI_TXQS: |
Ilia Mirkin | d0693d7 | 2015-10-28 20:52:50 -0400 | [diff] [blame] | 191 | case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS: |
Ilia Mirkin | 06fa2e8 | 2015-10-29 23:25:08 -0400 | [diff] [blame] | 192 | case PIPE_CAP_SHAREABLE_SHADERS: |
Ilia Mirkin | c4182bb | 2015-11-09 12:39:05 -0500 | [diff] [blame] | 193 | case PIPE_CAP_CLEAR_TEXTURE: |
Samuel Pitoiset | ff72440 | 2015-10-14 21:42:41 +0200 | [diff] [blame] | 194 | case PIPE_CAP_COMPUTE: |
Ilia Mirkin | e3706a7 | 2016-01-08 17:32:56 -0500 | [diff] [blame] | 195 | case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL: |
Ilia Mirkin | f9480d7 | 2016-04-03 15:11:39 -0400 | [diff] [blame] | 196 | case PIPE_CAP_INVALIDATE_BUFFER: |
Ilia Mirkin | 59ca921 | 2016-04-03 16:02:59 -0400 | [diff] [blame] | 197 | case PIPE_CAP_STRING_MARKER: |
Tobias Klausmann | 8c02939 | 2016-05-08 22:44:11 +0200 | [diff] [blame] | 198 | case PIPE_CAP_CULL_DISTANCE: |
Ilia Mirkin | afb6dc5 | 2016-10-13 21:39:42 -0400 | [diff] [blame] | 199 | case PIPE_CAP_TGSI_ARRAY_COMPONENTS: |
Ilia Mirkin | b755f2f | 2017-01-14 18:55:25 -0500 | [diff] [blame] | 200 | case PIPE_CAP_TGSI_MUL_ZERO_WINS: |
Ilia Mirkin | 0e9232d | 2017-03-15 23:29:47 -0400 | [diff] [blame] | 201 | case PIPE_CAP_TGSI_TEX_TXF_LZ: |
Boyan Ding | b1b189a | 2017-04-04 22:44:47 +0800 | [diff] [blame] | 202 | case PIPE_CAP_TGSI_CLOCK: |
Marek Olšák | 70dcb73 | 2017-04-30 01:18:43 +0200 | [diff] [blame] | 203 | case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX: |
Marek Olšák | 5018937 | 2017-05-15 16:30:30 +0200 | [diff] [blame] | 204 | case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION: |
Marek Olšák | 978c1aa1 | 2012-04-11 15:40:00 +0200 | [diff] [blame] | 205 | return 1; |
Ilia Mirkin | 22e9551 | 2014-06-16 03:25:44 -0400 | [diff] [blame] | 206 | case PIPE_CAP_SEAMLESS_CUBE_MAP: |
| 207 | return 1; /* class_3d >= NVA0_3D_CLASS; */ |
| 208 | /* supported on nva0+ */ |
| 209 | case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME: |
| 210 | return class_3d >= NVA0_3D_CLASS; |
| 211 | /* supported on nva3+ */ |
| 212 | case PIPE_CAP_CUBE_MAP_ARRAY: |
| 213 | case PIPE_CAP_INDEP_BLEND_FUNC: |
| 214 | case PIPE_CAP_TEXTURE_QUERY_LOD: |
| 215 | case PIPE_CAP_SAMPLE_SHADING: |
Ilia Mirkin | f768eaa | 2015-10-29 22:18:25 -0400 | [diff] [blame] | 216 | case PIPE_CAP_FORCE_PERSAMPLE_INTERP: |
Ilia Mirkin | 22e9551 | 2014-06-16 03:25:44 -0400 | [diff] [blame] | 217 | return class_3d >= NVA3_3D_CLASS; |
| 218 | |
| 219 | /* unsupported caps */ |
| 220 | case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE: |
| 221 | case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT: |
| 222 | case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER: |
| 223 | case PIPE_CAP_SHADER_STENCIL_EXPORT: |
| 224 | case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS: |
Christoph Bumiller | 587c221 | 2012-04-24 13:34:36 +0200 | [diff] [blame] | 225 | case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY: |
| 226 | case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY: |
| 227 | case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY: |
Christoph Bumiller | 8acaf86 | 2013-03-15 22:11:31 +0100 | [diff] [blame] | 228 | case PIPE_CAP_TGSI_TEXCOORD: |
Ilia Mirkin | 32b7124 | 2014-07-03 11:15:18 -0400 | [diff] [blame] | 229 | case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT: |
Dave Airlie | 2fcbec4 | 2013-09-21 18:45:43 +1000 | [diff] [blame] | 230 | case PIPE_CAP_TEXTURE_GATHER_SM5: |
Dave Airlie | 76ba50a | 2013-11-27 19:47:51 +1000 | [diff] [blame] | 231 | case PIPE_CAP_FAKE_SW_MSAA: |
Ilia Mirkin | d95df4f | 2014-04-26 23:44:57 -0400 | [diff] [blame] | 232 | case PIPE_CAP_TEXTURE_GATHER_OFFSETS: |
Christoph Bumiller | 4b586a2 | 2014-05-17 01:20:19 +0200 | [diff] [blame] | 233 | case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION: |
Christoph Bumiller | bc198f8 | 2013-04-05 14:29:36 +0200 | [diff] [blame] | 234 | case PIPE_CAP_DRAW_INDIRECT: |
Ilia Mirkin | d67b9ba | 2015-12-31 13:30:13 -0500 | [diff] [blame] | 235 | case PIPE_CAP_MULTI_DRAW_INDIRECT: |
| 236 | case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS: |
Roland Scheidegger | ade8b26 | 2014-12-12 04:13:43 +0100 | [diff] [blame] | 237 | case PIPE_CAP_VERTEXID_NOBASE: |
Axel Davy | eb1c12d | 2015-01-17 14:30:17 +0100 | [diff] [blame] | 238 | case PIPE_CAP_MULTISAMPLE_Z_RESOLVE: /* potentially supported on some hw */ |
Marek Olšák | 8b587ee | 2015-02-10 14:00:57 +0100 | [diff] [blame] | 239 | case PIPE_CAP_RESOURCE_FROM_USER_MEMORY: |
Marek Olšák | 79ffc08a | 2015-04-29 15:44:55 +0200 | [diff] [blame] | 240 | case PIPE_CAP_DEVICE_RESET_STATUS_QUERY: |
Marek Olšák | 2622293 | 2015-06-12 14:24:17 +0200 | [diff] [blame] | 241 | case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS: |
Ilia Mirkin | 87b4e4e | 2015-12-29 16:49:32 -0500 | [diff] [blame] | 242 | case PIPE_CAP_DRAW_PARAMETERS: |
Ilia Mirkin | e9f43d6 | 2016-01-02 18:55:48 -0500 | [diff] [blame] | 243 | case PIPE_CAP_TGSI_PACK_HALF_FLOAT: |
Marek Olšák | 34738a9 | 2016-01-02 20:45:00 +0100 | [diff] [blame] | 244 | case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL: |
Ilia Mirkin | ebfb544 | 2016-01-02 21:56:45 -0500 | [diff] [blame] | 245 | case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT: |
Charmaine Lee | 3038e89 | 2016-01-14 10:22:17 -0700 | [diff] [blame] | 246 | case PIPE_CAP_GENERATE_MIPMAP: |
Nicolai Hähnle | 3abb548 | 2016-01-26 10:26:30 -0500 | [diff] [blame] | 247 | case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY: |
Nicolai Hähnle | 6af6d7b | 2016-01-26 10:27:58 -0500 | [diff] [blame] | 248 | case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS: |
Ilia Mirkin | f9e6f46 | 2016-01-09 23:30:16 -0500 | [diff] [blame] | 249 | case PIPE_CAP_QUERY_BUFFER_OBJECT: |
Marek Olšák | d2e4c9e | 2016-02-01 21:56:50 +0100 | [diff] [blame] | 250 | case PIPE_CAP_QUERY_MEMORY_INFO: |
Marek Olšák | dcb2b77 | 2016-02-29 20:22:37 +0100 | [diff] [blame] | 251 | case PIPE_CAP_PCI_GROUP: |
| 252 | case PIPE_CAP_PCI_BUS: |
| 253 | case PIPE_CAP_PCI_DEVICE: |
| 254 | case PIPE_CAP_PCI_FUNCTION: |
Edward O'Callaghan | 4bc9130 | 2016-02-17 20:59:52 +1100 | [diff] [blame] | 255 | case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT: |
Bas Nieuwenhuizen | 70dcd84 | 2016-04-12 15:00:31 +0200 | [diff] [blame] | 256 | case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR: |
Kenneth Graunke | 70048eb | 2016-05-20 21:05:34 -0700 | [diff] [blame] | 257 | case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES: |
Ilia Mirkin | edfa7a4 | 2016-05-29 11:39:52 -0400 | [diff] [blame] | 258 | case PIPE_CAP_TGSI_VOTE: |
Axel Davy | 59a6929 | 2016-06-13 22:28:32 +0200 | [diff] [blame] | 259 | case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED: |
Józef Kucia | 3cd28fe | 2016-07-19 13:07:24 +0200 | [diff] [blame] | 260 | case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS: |
Ilia Mirkin | 3fdeb7c | 2016-10-14 00:03:12 -0400 | [diff] [blame] | 261 | case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS: |
Nicolai Hähnle | 611166b | 2016-11-18 20:49:54 +0100 | [diff] [blame] | 262 | case PIPE_CAP_TGSI_CAN_READ_OUTPUTS: |
Rob Clark | 026a722 | 2016-04-01 16:10:42 -0400 | [diff] [blame] | 263 | case PIPE_CAP_NATIVE_FENCE_FD: |
Marek Olšák | e51baeb | 2016-12-31 13:34:11 +0100 | [diff] [blame] | 264 | case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY: |
Ilia Mirkin | ee3ebe6 | 2017-01-01 23:10:00 -0500 | [diff] [blame] | 265 | case PIPE_CAP_TGSI_FS_FBFETCH: |
Nicolai Hähnle | a020cb3 | 2017-01-27 10:35:13 +0100 | [diff] [blame] | 266 | case PIPE_CAP_DOUBLES: |
Dave Airlie | f804506 | 2016-06-09 10:13:03 +1000 | [diff] [blame] | 267 | case PIPE_CAP_INT64: |
Ilia Mirkin | b090033 | 2017-02-04 22:31:29 -0500 | [diff] [blame] | 268 | case PIPE_CAP_INT64_DIVMOD: |
Lyude | ffe2bd6 | 2017-03-16 18:00:05 -0400 | [diff] [blame] | 269 | case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE: |
Nicolai Hähnle | d6e6fa0 | 2017-02-02 21:10:44 +0100 | [diff] [blame] | 270 | case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE: |
Nicolai Hähnle | d3e6f6d | 2017-03-30 11:16:09 +0200 | [diff] [blame] | 271 | case PIPE_CAP_TGSI_BALLOT: |
Nicolai Hähnle | 17f24a9 | 2017-04-13 21:54:54 +0200 | [diff] [blame] | 272 | case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT: |
Lyude | 467af44 | 2017-05-24 15:42:39 -0400 | [diff] [blame] | 273 | case PIPE_CAP_POST_DEPTH_COVERAGE: |
Samuel Pitoiset | 973822b | 2017-02-16 13:43:16 +0100 | [diff] [blame] | 274 | case PIPE_CAP_BINDLESS_TEXTURE: |
Nicolai Hähnle | 01f1598 | 2017-06-25 18:31:11 +0200 | [diff] [blame] | 275 | case PIPE_CAP_NIR_SAMPLERS_AS_DEREF: |
Nicolai Hähnle | a677799 | 2017-07-26 19:16:14 +0200 | [diff] [blame] | 276 | case PIPE_CAP_QUERY_SO_OVERFLOW: |
Timothy Arceri | 4e4042d | 2017-08-03 13:54:45 +1000 | [diff] [blame^] | 277 | case PIPE_CAP_MEMOBJ: |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 278 | return 0; |
Emil Velikov | 2b5f395 | 2014-08-14 21:05:35 +0100 | [diff] [blame] | 279 | |
| 280 | case PIPE_CAP_VENDOR_ID: |
| 281 | return 0x10de; |
| 282 | case PIPE_CAP_DEVICE_ID: { |
| 283 | uint64_t device_id; |
| 284 | if (nouveau_getparam(dev, NOUVEAU_GETPARAM_PCI_DEVICE, &device_id)) { |
| 285 | NOUVEAU_ERR("NOUVEAU_GETPARAM_PCI_DEVICE failed.\n"); |
| 286 | return -1; |
| 287 | } |
| 288 | return device_id; |
| 289 | } |
| 290 | case PIPE_CAP_ACCELERATED: |
| 291 | return 1; |
| 292 | case PIPE_CAP_VIDEO_MEMORY: |
| 293 | return dev->vram_size >> 20; |
| 294 | case PIPE_CAP_UMA: |
| 295 | return 0; |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 296 | } |
Ilia Mirkin | 22e9551 | 2014-06-16 03:25:44 -0400 | [diff] [blame] | 297 | |
| 298 | NOUVEAU_ERR("unknown PIPE_CAP %d\n", param); |
| 299 | return 0; |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 300 | } |
| 301 | |
| 302 | static int |
Brian Paul | 637e571 | 2017-03-05 12:13:02 -0700 | [diff] [blame] | 303 | nv50_screen_get_shader_param(struct pipe_screen *pscreen, |
| 304 | enum pipe_shader_type shader, |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 305 | enum pipe_shader_cap param) |
| 306 | { |
| 307 | switch (shader) { |
| 308 | case PIPE_SHADER_VERTEX: |
| 309 | case PIPE_SHADER_GEOMETRY: |
| 310 | case PIPE_SHADER_FRAGMENT: |
| 311 | break; |
Samuel Pitoiset | 89d25a8 | 2016-02-19 20:25:10 +0100 | [diff] [blame] | 312 | case PIPE_SHADER_COMPUTE: |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 313 | default: |
| 314 | return 0; |
| 315 | } |
Johannes Obermayr | 5eb7ff1 | 2013-08-20 20:14:00 +0200 | [diff] [blame] | 316 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 317 | switch (param) { |
| 318 | case PIPE_SHADER_CAP_MAX_INSTRUCTIONS: |
| 319 | case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS: |
| 320 | case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS: |
| 321 | case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS: |
| 322 | return 16384; |
| 323 | case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH: |
| 324 | return 4; |
| 325 | case PIPE_SHADER_CAP_MAX_INPUTS: |
| 326 | if (shader == PIPE_SHADER_VERTEX) |
| 327 | return 32; |
Ilia Mirkin | bad8871 | 2013-12-01 03:44:42 -0500 | [diff] [blame] | 328 | return 15; |
Marek Olšák | 5f5b83c | 2014-10-01 20:28:17 +0200 | [diff] [blame] | 329 | case PIPE_SHADER_CAP_MAX_OUTPUTS: |
| 330 | return 16; |
Marek Olšák | 04f2c88 | 2014-07-24 20:32:08 +0200 | [diff] [blame] | 331 | case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE: |
| 332 | return 65536; |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 333 | case PIPE_SHADER_CAP_MAX_CONST_BUFFERS: |
Christoph Bumiller | fcb2868 | 2012-05-16 20:52:41 +0200 | [diff] [blame] | 334 | return NV50_MAX_PIPE_CONSTBUFS; |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 335 | case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR: |
| 336 | return shader != PIPE_SHADER_FRAGMENT; |
Ilia Mirkin | f478455 | 2016-06-11 11:50:15 -0400 | [diff] [blame] | 337 | case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR: |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 338 | case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR: |
| 339 | case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR: |
| 340 | return 1; |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 341 | case PIPE_SHADER_CAP_MAX_TEMPS: |
Marcin Slusarz | 1906d2b | 2012-06-27 14:45:17 +0200 | [diff] [blame] | 342 | return nv50_screen(pscreen)->max_tls_space / ONE_TEMP_SIZE; |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 343 | case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED: |
| 344 | return 1; |
Brian Paul | 13f3ae5 | 2013-02-01 11:16:54 -0700 | [diff] [blame] | 345 | case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED: |
Ilia Mirkin | c1e4a6b | 2016-03-12 21:26:21 -0500 | [diff] [blame] | 346 | return 1; |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 347 | case PIPE_SHADER_CAP_SUBROUTINES: |
| 348 | return 0; /* please inline, or provide function declarations */ |
Bryan Cain | 17b695e | 2011-05-05 21:10:28 -0500 | [diff] [blame] | 349 | case PIPE_SHADER_CAP_INTEGERS: |
Christoph Bumiller | 0bbf165 | 2012-04-14 21:42:52 +0200 | [diff] [blame] | 350 | return 1; |
Samuel Pitoiset | 00b5044 | 2017-04-25 00:31:49 +0200 | [diff] [blame] | 351 | case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS: |
| 352 | return 1; |
Marek Olšák | f5bfe54 | 2011-09-27 22:22:06 +0200 | [diff] [blame] | 353 | case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS: |
Roland Scheidegger | 2983c03 | 2013-11-26 02:30:41 +0100 | [diff] [blame] | 354 | /* The chip could handle more sampler views than samplers */ |
| 355 | case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS: |
Samuel Pitoiset | 19a6214 | 2015-07-13 13:34:31 +0200 | [diff] [blame] | 356 | return MIN2(16, PIPE_MAX_SAMPLERS); |
Ilia Mirkin | f57a844 | 2016-05-22 14:05:36 -0400 | [diff] [blame] | 357 | case PIPE_SHADER_CAP_PREFERRED_IR: |
| 358 | return PIPE_SHADER_IR_TGSI; |
| 359 | case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: |
| 360 | return 32; |
Ilia Mirkin | c85a686 | 2015-02-19 23:30:36 -0500 | [diff] [blame] | 361 | case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED: |
| 362 | case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED: |
Marek Olšák | 216543e | 2015-02-28 00:26:31 +0100 | [diff] [blame] | 363 | case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED: |
Marek Olšák | b6ebe7e | 2015-05-25 19:30:44 +0200 | [diff] [blame] | 364 | case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: |
Ilia Mirkin | 266d001 | 2015-09-26 20:27:42 -0400 | [diff] [blame] | 365 | case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: |
Samuel Pitoiset | cbf24a0 | 2016-02-14 22:51:34 +0100 | [diff] [blame] | 366 | case PIPE_SHADER_CAP_SUPPORTED_IRS: |
Ilia Mirkin | 9fbfa1a | 2016-01-08 22:56:23 -0500 | [diff] [blame] | 367 | case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: |
Marek Olšák | 72217d4 | 2016-10-28 22:34:20 +0200 | [diff] [blame] | 368 | case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD: |
Ilia Mirkin | c85a686 | 2015-02-19 23:30:36 -0500 | [diff] [blame] | 369 | return 0; |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 370 | default: |
| 371 | NOUVEAU_ERR("unknown PIPE_SHADER_CAP %d\n", param); |
| 372 | return 0; |
| 373 | } |
| 374 | } |
| 375 | |
| 376 | static float |
Marek Olšák | bb71f92 | 2011-11-19 22:38:22 +0100 | [diff] [blame] | 377 | nv50_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param) |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 378 | { |
| 379 | switch (param) { |
Marek Olšák | bb71f92 | 2011-11-19 22:38:22 +0100 | [diff] [blame] | 380 | case PIPE_CAPF_MAX_LINE_WIDTH: |
| 381 | case PIPE_CAPF_MAX_LINE_WIDTH_AA: |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 382 | return 10.0f; |
Marek Olšák | bb71f92 | 2011-11-19 22:38:22 +0100 | [diff] [blame] | 383 | case PIPE_CAPF_MAX_POINT_WIDTH: |
| 384 | case PIPE_CAPF_MAX_POINT_WIDTH_AA: |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 385 | return 64.0f; |
Marek Olšák | bb71f92 | 2011-11-19 22:38:22 +0100 | [diff] [blame] | 386 | case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY: |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 387 | return 16.0f; |
Marek Olšák | bb71f92 | 2011-11-19 22:38:22 +0100 | [diff] [blame] | 388 | case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS: |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 389 | return 4.0f; |
Christoph Bumiller | b9142c2 | 2013-05-25 02:04:25 +0200 | [diff] [blame] | 390 | case PIPE_CAPF_GUARD_BAND_LEFT: |
| 391 | case PIPE_CAPF_GUARD_BAND_TOP: |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 392 | return 0.0f; |
Christoph Bumiller | b9142c2 | 2013-05-25 02:04:25 +0200 | [diff] [blame] | 393 | case PIPE_CAPF_GUARD_BAND_RIGHT: |
| 394 | case PIPE_CAPF_GUARD_BAND_BOTTOM: |
| 395 | return 0.0f; /* that or infinity */ |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 396 | } |
Christoph Bumiller | b9142c2 | 2013-05-25 02:04:25 +0200 | [diff] [blame] | 397 | |
| 398 | NOUVEAU_ERR("unknown PIPE_CAPF %d\n", param); |
| 399 | return 0.0f; |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 400 | } |
| 401 | |
Samuel Pitoiset | ff72440 | 2015-10-14 21:42:41 +0200 | [diff] [blame] | 402 | static int |
| 403 | nv50_screen_get_compute_param(struct pipe_screen *pscreen, |
Bas Nieuwenhuizen | 1a5c8c2 | 2016-03-25 02:06:50 +0100 | [diff] [blame] | 404 | enum pipe_shader_ir ir_type, |
Samuel Pitoiset | ff72440 | 2015-10-14 21:42:41 +0200 | [diff] [blame] | 405 | enum pipe_compute_cap param, void *data) |
| 406 | { |
| 407 | struct nv50_screen *screen = nv50_screen(pscreen); |
| 408 | |
| 409 | #define RET(x) do { \ |
| 410 | if (data) \ |
| 411 | memcpy(data, x, sizeof(x)); \ |
| 412 | return sizeof(x); \ |
| 413 | } while (0) |
| 414 | |
| 415 | switch (param) { |
| 416 | case PIPE_COMPUTE_CAP_GRID_DIMENSION: |
| 417 | RET((uint64_t []) { 2 }); |
| 418 | case PIPE_COMPUTE_CAP_MAX_GRID_SIZE: |
| 419 | RET(((uint64_t []) { 65535, 65535 })); |
| 420 | case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE: |
| 421 | RET(((uint64_t []) { 512, 512, 64 })); |
| 422 | case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK: |
| 423 | RET((uint64_t []) { 512 }); |
| 424 | case PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE: /* g0-15[] */ |
| 425 | RET((uint64_t []) { 1ULL << 32 }); |
| 426 | case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE: /* s[] */ |
| 427 | RET((uint64_t []) { 16 << 10 }); |
| 428 | case PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE: /* l[] */ |
| 429 | RET((uint64_t []) { 16 << 10 }); |
| 430 | case PIPE_COMPUTE_CAP_MAX_INPUT_SIZE: /* c[], arbitrary limit */ |
| 431 | RET((uint64_t []) { 4096 }); |
| 432 | case PIPE_COMPUTE_CAP_SUBGROUP_SIZE: |
| 433 | RET((uint32_t []) { 32 }); |
| 434 | case PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE: |
| 435 | RET((uint64_t []) { 1ULL << 40 }); |
| 436 | case PIPE_COMPUTE_CAP_IMAGES_SUPPORTED: |
| 437 | RET((uint32_t []) { 0 }); |
| 438 | case PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS: |
| 439 | RET((uint32_t []) { screen->mp_count }); |
| 440 | case PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY: |
| 441 | RET((uint32_t []) { 512 }); /* FIXME: arbitrary limit */ |
Jan Vesely | c7af849 | 2016-08-28 04:06:28 -0400 | [diff] [blame] | 442 | case PIPE_COMPUTE_CAP_ADDRESS_BITS: |
| 443 | RET((uint32_t []) { 32 }); |
Samuel Pitoiset | 07bb451 | 2016-09-10 16:31:27 +0200 | [diff] [blame] | 444 | case PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK: |
| 445 | RET((uint64_t []) { 0 }); |
Samuel Pitoiset | ff72440 | 2015-10-14 21:42:41 +0200 | [diff] [blame] | 446 | default: |
| 447 | return 0; |
| 448 | } |
| 449 | |
| 450 | #undef RET |
| 451 | } |
| 452 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 453 | static void |
| 454 | nv50_screen_destroy(struct pipe_screen *pscreen) |
| 455 | { |
| 456 | struct nv50_screen *screen = nv50_screen(pscreen); |
| 457 | |
Maarten Lankhorst | fee0686 | 2014-02-12 14:56:53 +0100 | [diff] [blame] | 458 | if (!nouveau_drm_screen_unref(&screen->base)) |
| 459 | return; |
| 460 | |
Ben Skeggs | 7a8ee05 | 2011-03-01 10:17:28 +1000 | [diff] [blame] | 461 | if (screen->base.fence.current) { |
Ilia Mirkin | 507f023 | 2014-03-05 22:25:55 -0500 | [diff] [blame] | 462 | struct nouveau_fence *current = NULL; |
| 463 | |
| 464 | /* nouveau_fence_wait will create a new current fence, so wait on the |
| 465 | * _current_ one, and remove both. |
| 466 | */ |
| 467 | nouveau_fence_ref(screen->base.fence.current, ¤t); |
Ilia Mirkin | ba093a0 | 2015-10-30 20:44:57 -0400 | [diff] [blame] | 468 | nouveau_fence_wait(current, NULL); |
Ilia Mirkin | 507f023 | 2014-03-05 22:25:55 -0500 | [diff] [blame] | 469 | nouveau_fence_ref(NULL, ¤t); |
| 470 | nouveau_fence_ref(NULL, &screen->base.fence.current); |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 471 | } |
Christoph Bumiller | 6d1cdec | 2012-04-06 15:41:55 +0200 | [diff] [blame] | 472 | if (screen->base.pushbuf) |
| 473 | screen->base.pushbuf->user_priv = NULL; |
| 474 | |
Christoph Bumiller | 36ea744 | 2012-09-26 23:06:40 +0200 | [diff] [blame] | 475 | if (screen->blitter) |
| 476 | nv50_blitter_destroy(screen); |
Samuel Pitoiset | 695ae81 | 2015-12-16 22:54:30 +0100 | [diff] [blame] | 477 | if (screen->pm.prog) { |
| 478 | screen->pm.prog->code = NULL; /* hardcoded, don't FREE */ |
| 479 | nv50_program_destroy(NULL, screen->pm.prog); |
| 480 | FREE(screen->pm.prog); |
| 481 | } |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 482 | |
| 483 | nouveau_bo_ref(NULL, &screen->code); |
| 484 | nouveau_bo_ref(NULL, &screen->tls_bo); |
| 485 | nouveau_bo_ref(NULL, &screen->stack_bo); |
| 486 | nouveau_bo_ref(NULL, &screen->txc); |
| 487 | nouveau_bo_ref(NULL, &screen->uniforms); |
| 488 | nouveau_bo_ref(NULL, &screen->fence.bo); |
| 489 | |
Christoph Bumiller | 6d1cdec | 2012-04-06 15:41:55 +0200 | [diff] [blame] | 490 | nouveau_heap_destroy(&screen->vp_code_heap); |
| 491 | nouveau_heap_destroy(&screen->gp_code_heap); |
| 492 | nouveau_heap_destroy(&screen->fp_code_heap); |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 493 | |
Matt Turner | b6109de | 2012-09-04 23:33:28 -0700 | [diff] [blame] | 494 | FREE(screen->tic.entries); |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 495 | |
Christoph Bumiller | 6d1cdec | 2012-04-06 15:41:55 +0200 | [diff] [blame] | 496 | nouveau_object_del(&screen->tesla); |
| 497 | nouveau_object_del(&screen->eng2d); |
| 498 | nouveau_object_del(&screen->m2mf); |
Samuel Pitoiset | ff72440 | 2015-10-14 21:42:41 +0200 | [diff] [blame] | 499 | nouveau_object_del(&screen->compute); |
Christoph Bumiller | 6d1cdec | 2012-04-06 15:41:55 +0200 | [diff] [blame] | 500 | nouveau_object_del(&screen->sync); |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 501 | |
| 502 | nouveau_screen_fini(&screen->base); |
| 503 | |
| 504 | FREE(screen); |
| 505 | } |
| 506 | |
| 507 | static void |
Marcin Slusarz | 9849f36 | 2011-10-08 23:05:25 +0200 | [diff] [blame] | 508 | nv50_screen_fence_emit(struct pipe_screen *pscreen, u32 *sequence) |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 509 | { |
Ben Skeggs | 7a8ee05 | 2011-03-01 10:17:28 +1000 | [diff] [blame] | 510 | struct nv50_screen *screen = nv50_screen(pscreen); |
Christoph Bumiller | 6d1cdec | 2012-04-06 15:41:55 +0200 | [diff] [blame] | 511 | struct nouveau_pushbuf *push = screen->base.pushbuf; |
Marcin Slusarz | 9849f36 | 2011-10-08 23:05:25 +0200 | [diff] [blame] | 512 | |
| 513 | /* we need to do it after possible flush in MARK_RING */ |
| 514 | *sequence = ++screen->base.fence.sequence; |
| 515 | |
Ilia Mirkin | bb73fc4 | 2015-11-04 22:42:41 -0500 | [diff] [blame] | 516 | assert(PUSH_AVAIL(push) + push->rsvd_kick >= 5); |
Christoph Bumiller | 6d1cdec | 2012-04-06 15:41:55 +0200 | [diff] [blame] | 517 | PUSH_DATA (push, NV50_FIFO_PKHDR(NV50_3D(QUERY_ADDRESS_HIGH), 4)); |
| 518 | PUSH_DATAh(push, screen->fence.bo->offset); |
| 519 | PUSH_DATA (push, screen->fence.bo->offset); |
| 520 | PUSH_DATA (push, *sequence); |
| 521 | PUSH_DATA (push, NV50_3D_QUERY_GET_MODE_WRITE_UNK0 | |
Ben Skeggs | 7a8ee05 | 2011-03-01 10:17:28 +1000 | [diff] [blame] | 522 | NV50_3D_QUERY_GET_UNK4 | |
| 523 | NV50_3D_QUERY_GET_UNIT_CROP | |
| 524 | NV50_3D_QUERY_GET_TYPE_QUERY | |
| 525 | NV50_3D_QUERY_GET_QUERY_SELECT_ZERO | |
| 526 | NV50_3D_QUERY_GET_SHORT); |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 527 | } |
| 528 | |
Ben Skeggs | 7a8ee05 | 2011-03-01 10:17:28 +1000 | [diff] [blame] | 529 | static u32 |
| 530 | nv50_screen_fence_update(struct pipe_screen *pscreen) |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 531 | { |
Christoph Bumiller | 6d1cdec | 2012-04-06 15:41:55 +0200 | [diff] [blame] | 532 | return nv50_screen(pscreen)->fence.map[0]; |
| 533 | } |
| 534 | |
Marcin Slusarz | 0fceaee | 2012-06-26 16:22:43 +0200 | [diff] [blame] | 535 | static void |
Marcin Slusarz | 1906d2b | 2012-06-27 14:45:17 +0200 | [diff] [blame] | 536 | nv50_screen_init_hwctx(struct nv50_screen *screen) |
Christoph Bumiller | 6d1cdec | 2012-04-06 15:41:55 +0200 | [diff] [blame] | 537 | { |
| 538 | struct nouveau_pushbuf *push = screen->base.pushbuf; |
| 539 | struct nv04_fifo *fifo; |
| 540 | unsigned i; |
| 541 | |
| 542 | fifo = (struct nv04_fifo *)screen->base.channel->data; |
| 543 | |
| 544 | BEGIN_NV04(push, SUBC_M2MF(NV01_SUBCHAN_OBJECT), 1); |
| 545 | PUSH_DATA (push, screen->m2mf->handle); |
| 546 | BEGIN_NV04(push, SUBC_M2MF(NV03_M2MF_DMA_NOTIFY), 3); |
| 547 | PUSH_DATA (push, screen->sync->handle); |
| 548 | PUSH_DATA (push, fifo->vram); |
| 549 | PUSH_DATA (push, fifo->vram); |
| 550 | |
| 551 | BEGIN_NV04(push, SUBC_2D(NV01_SUBCHAN_OBJECT), 1); |
| 552 | PUSH_DATA (push, screen->eng2d->handle); |
| 553 | BEGIN_NV04(push, NV50_2D(DMA_NOTIFY), 4); |
| 554 | PUSH_DATA (push, screen->sync->handle); |
| 555 | PUSH_DATA (push, fifo->vram); |
| 556 | PUSH_DATA (push, fifo->vram); |
| 557 | PUSH_DATA (push, fifo->vram); |
| 558 | BEGIN_NV04(push, NV50_2D(OPERATION), 1); |
| 559 | PUSH_DATA (push, NV50_2D_OPERATION_SRCCOPY); |
| 560 | BEGIN_NV04(push, NV50_2D(CLIP_ENABLE), 1); |
| 561 | PUSH_DATA (push, 0); |
| 562 | BEGIN_NV04(push, NV50_2D(COLOR_KEY_ENABLE), 1); |
| 563 | PUSH_DATA (push, 0); |
| 564 | BEGIN_NV04(push, SUBC_2D(0x0888), 1); |
| 565 | PUSH_DATA (push, 1); |
Ilia Mirkin | 4467c0c | 2014-05-03 03:00:07 -0400 | [diff] [blame] | 566 | BEGIN_NV04(push, NV50_2D(COND_MODE), 1); |
| 567 | PUSH_DATA (push, NV50_2D_COND_MODE_ALWAYS); |
Christoph Bumiller | 6d1cdec | 2012-04-06 15:41:55 +0200 | [diff] [blame] | 568 | |
| 569 | BEGIN_NV04(push, SUBC_3D(NV01_SUBCHAN_OBJECT), 1); |
| 570 | PUSH_DATA (push, screen->tesla->handle); |
| 571 | |
| 572 | BEGIN_NV04(push, NV50_3D(COND_MODE), 1); |
| 573 | PUSH_DATA (push, NV50_3D_COND_MODE_ALWAYS); |
| 574 | |
| 575 | BEGIN_NV04(push, NV50_3D(DMA_NOTIFY), 1); |
| 576 | PUSH_DATA (push, screen->sync->handle); |
| 577 | BEGIN_NV04(push, NV50_3D(DMA_ZETA), 11); |
| 578 | for (i = 0; i < 11; ++i) |
| 579 | PUSH_DATA(push, fifo->vram); |
| 580 | BEGIN_NV04(push, NV50_3D(DMA_COLOR(0)), NV50_3D_DMA_COLOR__LEN); |
| 581 | for (i = 0; i < NV50_3D_DMA_COLOR__LEN; ++i) |
| 582 | PUSH_DATA(push, fifo->vram); |
| 583 | |
| 584 | BEGIN_NV04(push, NV50_3D(REG_MODE), 1); |
| 585 | PUSH_DATA (push, NV50_3D_REG_MODE_STRIPED); |
| 586 | BEGIN_NV04(push, NV50_3D(UNK1400_LANES), 1); |
| 587 | PUSH_DATA (push, 0xf); |
| 588 | |
Samuel Pitoiset | cd0dec0 | 2015-07-20 21:32:43 +0200 | [diff] [blame] | 589 | if (debug_get_bool_option("NOUVEAU_SHADER_WATCHDOG", true)) { |
Christoph Bumiller | 2170fed | 2012-04-23 20:08:54 +0200 | [diff] [blame] | 590 | BEGIN_NV04(push, NV50_3D(WATCHDOG_TIMER), 1); |
| 591 | PUSH_DATA (push, 0x18); |
| 592 | } |
| 593 | |
Tobias Klausmann | 1f8c0be | 2015-01-03 01:00:08 +0100 | [diff] [blame] | 594 | BEGIN_NV04(push, NV50_3D(ZETA_COMP_ENABLE), 1); |
Ben Skeggs | 1a9ec8e | 2015-11-26 09:57:30 +1000 | [diff] [blame] | 595 | PUSH_DATA(push, screen->base.drm->version >= 0x01000101); |
Tobias Klausmann | 1f8c0be | 2015-01-03 01:00:08 +0100 | [diff] [blame] | 596 | |
| 597 | BEGIN_NV04(push, NV50_3D(RT_COMP_ENABLE(0)), 8); |
| 598 | for (i = 0; i < 8; ++i) |
Ben Skeggs | 1a9ec8e | 2015-11-26 09:57:30 +1000 | [diff] [blame] | 599 | PUSH_DATA(push, screen->base.drm->version >= 0x01000101); |
Tobias Klausmann | 1f8c0be | 2015-01-03 01:00:08 +0100 | [diff] [blame] | 600 | |
Christoph Bumiller | 6d1cdec | 2012-04-06 15:41:55 +0200 | [diff] [blame] | 601 | BEGIN_NV04(push, NV50_3D(RT_CONTROL), 1); |
| 602 | PUSH_DATA (push, 1); |
| 603 | |
| 604 | BEGIN_NV04(push, NV50_3D(CSAA_ENABLE), 1); |
| 605 | PUSH_DATA (push, 0); |
| 606 | BEGIN_NV04(push, NV50_3D(MULTISAMPLE_ENABLE), 1); |
| 607 | PUSH_DATA (push, 0); |
| 608 | BEGIN_NV04(push, NV50_3D(MULTISAMPLE_MODE), 1); |
| 609 | PUSH_DATA (push, NV50_3D_MULTISAMPLE_MODE_MS1); |
| 610 | BEGIN_NV04(push, NV50_3D(MULTISAMPLE_CTRL), 1); |
| 611 | PUSH_DATA (push, 0); |
Christoph Bumiller | a284a0a | 2013-04-04 15:28:13 +0200 | [diff] [blame] | 612 | BEGIN_NV04(push, NV50_3D(PRIM_RESTART_WITH_DRAW_ARRAYS), 1); |
| 613 | PUSH_DATA (push, 1); |
Christoph Bumiller | 6d1cdec | 2012-04-06 15:41:55 +0200 | [diff] [blame] | 614 | BEGIN_NV04(push, NV50_3D(BLEND_SEPARATE_ALPHA), 1); |
| 615 | PUSH_DATA (push, 1); |
| 616 | |
| 617 | if (screen->tesla->oclass >= NVA0_3D_CLASS) { |
| 618 | BEGIN_NV04(push, SUBC_3D(NVA0_3D_TEX_MISC), 1); |
Ilia Mirkin | 1d1ddfe | 2016-02-13 22:14:02 -0500 | [diff] [blame] | 619 | PUSH_DATA (push, 0); |
Christoph Bumiller | 6d1cdec | 2012-04-06 15:41:55 +0200 | [diff] [blame] | 620 | } |
| 621 | |
| 622 | BEGIN_NV04(push, NV50_3D(SCREEN_Y_CONTROL), 1); |
| 623 | PUSH_DATA (push, 0); |
| 624 | BEGIN_NV04(push, NV50_3D(WINDOW_OFFSET_X), 2); |
| 625 | PUSH_DATA (push, 0); |
| 626 | PUSH_DATA (push, 0); |
| 627 | BEGIN_NV04(push, NV50_3D(ZCULL_REGION), 1); |
| 628 | PUSH_DATA (push, 0x3f); |
| 629 | |
| 630 | BEGIN_NV04(push, NV50_3D(VP_ADDRESS_HIGH), 2); |
| 631 | PUSH_DATAh(push, screen->code->offset + (0 << NV50_CODE_BO_SIZE_LOG2)); |
| 632 | PUSH_DATA (push, screen->code->offset + (0 << NV50_CODE_BO_SIZE_LOG2)); |
| 633 | |
| 634 | BEGIN_NV04(push, NV50_3D(FP_ADDRESS_HIGH), 2); |
| 635 | PUSH_DATAh(push, screen->code->offset + (1 << NV50_CODE_BO_SIZE_LOG2)); |
| 636 | PUSH_DATA (push, screen->code->offset + (1 << NV50_CODE_BO_SIZE_LOG2)); |
| 637 | |
| 638 | BEGIN_NV04(push, NV50_3D(GP_ADDRESS_HIGH), 2); |
| 639 | PUSH_DATAh(push, screen->code->offset + (2 << NV50_CODE_BO_SIZE_LOG2)); |
| 640 | PUSH_DATA (push, screen->code->offset + (2 << NV50_CODE_BO_SIZE_LOG2)); |
| 641 | |
| 642 | BEGIN_NV04(push, NV50_3D(LOCAL_ADDRESS_HIGH), 3); |
| 643 | PUSH_DATAh(push, screen->tls_bo->offset); |
| 644 | PUSH_DATA (push, screen->tls_bo->offset); |
Marcin Slusarz | 1906d2b | 2012-06-27 14:45:17 +0200 | [diff] [blame] | 645 | PUSH_DATA (push, util_logbase2(screen->cur_tls_space / 8)); |
Christoph Bumiller | 6d1cdec | 2012-04-06 15:41:55 +0200 | [diff] [blame] | 646 | |
| 647 | BEGIN_NV04(push, NV50_3D(STACK_ADDRESS_HIGH), 3); |
| 648 | PUSH_DATAh(push, screen->stack_bo->offset); |
| 649 | PUSH_DATA (push, screen->stack_bo->offset); |
| 650 | PUSH_DATA (push, 4); |
| 651 | |
| 652 | BEGIN_NV04(push, NV50_3D(CB_DEF_ADDRESS_HIGH), 3); |
| 653 | PUSH_DATAh(push, screen->uniforms->offset + (0 << 16)); |
| 654 | PUSH_DATA (push, screen->uniforms->offset + (0 << 16)); |
| 655 | PUSH_DATA (push, (NV50_CB_PVP << 16) | 0x0000); |
| 656 | |
| 657 | BEGIN_NV04(push, NV50_3D(CB_DEF_ADDRESS_HIGH), 3); |
| 658 | PUSH_DATAh(push, screen->uniforms->offset + (1 << 16)); |
| 659 | PUSH_DATA (push, screen->uniforms->offset + (1 << 16)); |
| 660 | PUSH_DATA (push, (NV50_CB_PGP << 16) | 0x0000); |
| 661 | |
| 662 | BEGIN_NV04(push, NV50_3D(CB_DEF_ADDRESS_HIGH), 3); |
| 663 | PUSH_DATAh(push, screen->uniforms->offset + (2 << 16)); |
| 664 | PUSH_DATA (push, screen->uniforms->offset + (2 << 16)); |
| 665 | PUSH_DATA (push, (NV50_CB_PFP << 16) | 0x0000); |
| 666 | |
| 667 | BEGIN_NV04(push, NV50_3D(CB_DEF_ADDRESS_HIGH), 3); |
| 668 | PUSH_DATAh(push, screen->uniforms->offset + (3 << 16)); |
| 669 | PUSH_DATA (push, screen->uniforms->offset + (3 << 16)); |
Ilia Mirkin | b87f5ab | 2014-01-12 23:23:44 -0500 | [diff] [blame] | 670 | PUSH_DATA (push, (NV50_CB_AUX << 16) | (NV50_CB_AUX_SIZE & 0xffff)); |
Christoph Bumiller | 6d1cdec | 2012-04-06 15:41:55 +0200 | [diff] [blame] | 671 | |
Christoph Bumiller | fcb2868 | 2012-05-16 20:52:41 +0200 | [diff] [blame] | 672 | BEGIN_NI04(push, NV50_3D(SET_PROGRAM_CB), 3); |
Christoph Bumiller | 6d1cdec | 2012-04-06 15:41:55 +0200 | [diff] [blame] | 673 | PUSH_DATA (push, (NV50_CB_AUX << 12) | 0xf01); |
| 674 | PUSH_DATA (push, (NV50_CB_AUX << 12) | 0xf21); |
| 675 | PUSH_DATA (push, (NV50_CB_AUX << 12) | 0xf31); |
| 676 | |
Ben Skeggs | 63c3a79 | 2012-10-08 10:25:39 +1000 | [diff] [blame] | 677 | /* return { 0.0, 0.0, 0.0, 0.0 } on out-of-bounds vtxbuf access */ |
| 678 | BEGIN_NV04(push, NV50_3D(CB_ADDR), 1); |
Ilia Mirkin | 3bd4007 | 2014-01-12 03:32:30 -0500 | [diff] [blame] | 679 | PUSH_DATA (push, (NV50_CB_AUX_RUNOUT_OFFSET << (8 - 2)) | NV50_CB_AUX); |
Ben Skeggs | 63c3a79 | 2012-10-08 10:25:39 +1000 | [diff] [blame] | 680 | BEGIN_NI04(push, NV50_3D(CB_DATA(0)), 4); |
| 681 | PUSH_DATAf(push, 0.0f); |
| 682 | PUSH_DATAf(push, 0.0f); |
| 683 | PUSH_DATAf(push, 0.0f); |
| 684 | PUSH_DATAf(push, 0.0f); |
| 685 | BEGIN_NV04(push, NV50_3D(VERTEX_RUNOUT_ADDRESS_HIGH), 2); |
Ilia Mirkin | b87f5ab | 2014-01-12 23:23:44 -0500 | [diff] [blame] | 686 | PUSH_DATAh(push, screen->uniforms->offset + (3 << 16) + NV50_CB_AUX_RUNOUT_OFFSET); |
| 687 | PUSH_DATA (push, screen->uniforms->offset + (3 << 16) + NV50_CB_AUX_RUNOUT_OFFSET); |
Ben Skeggs | 63c3a79 | 2012-10-08 10:25:39 +1000 | [diff] [blame] | 688 | |
Ilia Mirkin | 3bd4007 | 2014-01-12 03:32:30 -0500 | [diff] [blame] | 689 | nv50_upload_ms_info(push); |
| 690 | |
Christoph Bumiller | 6d1cdec | 2012-04-06 15:41:55 +0200 | [diff] [blame] | 691 | /* max TIC (bits 4:8) & TSC bindings, per program type */ |
| 692 | for (i = 0; i < 3; ++i) { |
| 693 | BEGIN_NV04(push, NV50_3D(TEX_LIMITS(i)), 1); |
| 694 | PUSH_DATA (push, 0x54); |
| 695 | } |
| 696 | |
| 697 | BEGIN_NV04(push, NV50_3D(TIC_ADDRESS_HIGH), 3); |
| 698 | PUSH_DATAh(push, screen->txc->offset); |
| 699 | PUSH_DATA (push, screen->txc->offset); |
| 700 | PUSH_DATA (push, NV50_TIC_MAX_ENTRIES - 1); |
| 701 | |
| 702 | BEGIN_NV04(push, NV50_3D(TSC_ADDRESS_HIGH), 3); |
| 703 | PUSH_DATAh(push, screen->txc->offset + 65536); |
| 704 | PUSH_DATA (push, screen->txc->offset + 65536); |
| 705 | PUSH_DATA (push, NV50_TSC_MAX_ENTRIES - 1); |
| 706 | |
| 707 | BEGIN_NV04(push, NV50_3D(LINKED_TSC), 1); |
| 708 | PUSH_DATA (push, 0); |
| 709 | |
| 710 | BEGIN_NV04(push, NV50_3D(CLIP_RECTS_EN), 1); |
| 711 | PUSH_DATA (push, 0); |
| 712 | BEGIN_NV04(push, NV50_3D(CLIP_RECTS_MODE), 1); |
| 713 | PUSH_DATA (push, NV50_3D_CLIP_RECTS_MODE_INSIDE_ANY); |
| 714 | BEGIN_NV04(push, NV50_3D(CLIP_RECT_HORIZ(0)), 8 * 2); |
| 715 | for (i = 0; i < 8 * 2; ++i) |
| 716 | PUSH_DATA(push, 0); |
| 717 | BEGIN_NV04(push, NV50_3D(CLIPID_ENABLE), 1); |
| 718 | PUSH_DATA (push, 0); |
| 719 | |
| 720 | BEGIN_NV04(push, NV50_3D(VIEWPORT_TRANSFORM_EN), 1); |
| 721 | PUSH_DATA (push, 1); |
Ilia Mirkin | 246ca4b | 2014-01-21 02:56:01 -0500 | [diff] [blame] | 722 | for (i = 0; i < NV50_MAX_VIEWPORTS; i++) { |
| 723 | BEGIN_NV04(push, NV50_3D(DEPTH_RANGE_NEAR(i)), 2); |
| 724 | PUSH_DATAf(push, 0.0f); |
| 725 | PUSH_DATAf(push, 1.0f); |
| 726 | BEGIN_NV04(push, NV50_3D(VIEWPORT_HORIZ(i)), 2); |
| 727 | PUSH_DATA (push, 8192 << 16); |
| 728 | PUSH_DATA (push, 8192 << 16); |
| 729 | } |
Christoph Bumiller | 6d1cdec | 2012-04-06 15:41:55 +0200 | [diff] [blame] | 730 | |
| 731 | BEGIN_NV04(push, NV50_3D(VIEW_VOLUME_CLIP_CTRL), 1); |
| 732 | #ifdef NV50_SCISSORS_CLIPPING |
| 733 | PUSH_DATA (push, 0x0000); |
| 734 | #else |
| 735 | PUSH_DATA (push, 0x1080); |
| 736 | #endif |
| 737 | |
| 738 | BEGIN_NV04(push, NV50_3D(CLEAR_FLAGS), 1); |
| 739 | PUSH_DATA (push, NV50_3D_CLEAR_FLAGS_CLEAR_RECT_VIEWPORT); |
| 740 | |
| 741 | /* We use scissors instead of exact view volume clipping, |
| 742 | * so they're always enabled. |
| 743 | */ |
Ilia Mirkin | 246ca4b | 2014-01-21 02:56:01 -0500 | [diff] [blame] | 744 | for (i = 0; i < NV50_MAX_VIEWPORTS; i++) { |
| 745 | BEGIN_NV04(push, NV50_3D(SCISSOR_ENABLE(i)), 3); |
| 746 | PUSH_DATA (push, 1); |
| 747 | PUSH_DATA (push, 8192 << 16); |
| 748 | PUSH_DATA (push, 8192 << 16); |
| 749 | } |
Christoph Bumiller | 6d1cdec | 2012-04-06 15:41:55 +0200 | [diff] [blame] | 750 | |
| 751 | BEGIN_NV04(push, NV50_3D(RASTERIZE_ENABLE), 1); |
| 752 | PUSH_DATA (push, 1); |
| 753 | BEGIN_NV04(push, NV50_3D(POINT_RASTER_RULES), 1); |
| 754 | PUSH_DATA (push, NV50_3D_POINT_RASTER_RULES_OGL); |
| 755 | BEGIN_NV04(push, NV50_3D(FRAG_COLOR_CLAMP_EN), 1); |
| 756 | PUSH_DATA (push, 0x11111111); |
| 757 | BEGIN_NV04(push, NV50_3D(EDGEFLAG), 1); |
| 758 | PUSH_DATA (push, 1); |
| 759 | |
Ilia Mirkin | be0311c | 2014-12-30 23:19:47 -0500 | [diff] [blame] | 760 | BEGIN_NV04(push, NV50_3D(VB_ELEMENT_BASE), 1); |
| 761 | PUSH_DATA (push, 0); |
| 762 | if (screen->base.class_3d >= NV84_3D_CLASS) { |
Samuel Pitoiset | 9e40a62 | 2015-11-19 09:51:02 +0100 | [diff] [blame] | 763 | BEGIN_NV04(push, NV84_3D(VERTEX_ID_BASE), 1); |
Ilia Mirkin | be0311c | 2014-12-30 23:19:47 -0500 | [diff] [blame] | 764 | PUSH_DATA (push, 0); |
| 765 | } |
| 766 | |
Christoph Bumiller | 6d1cdec | 2012-04-06 15:41:55 +0200 | [diff] [blame] | 767 | PUSH_KICK (push); |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 768 | } |
| 769 | |
Marcin Slusarz | 1906d2b | 2012-06-27 14:45:17 +0200 | [diff] [blame] | 770 | static int nv50_tls_alloc(struct nv50_screen *screen, unsigned tls_space, |
| 771 | uint64_t *tls_size) |
| 772 | { |
| 773 | struct nouveau_device *dev = screen->base.device; |
| 774 | int ret; |
| 775 | |
| 776 | screen->cur_tls_space = util_next_power_of_two(tls_space / ONE_TEMP_SIZE) * |
| 777 | ONE_TEMP_SIZE; |
| 778 | if (nouveau_mesa_debug) |
| 779 | debug_printf("allocating space for %u temps\n", |
| 780 | util_next_power_of_two(tls_space / ONE_TEMP_SIZE)); |
| 781 | *tls_size = screen->cur_tls_space * util_next_power_of_two(screen->TPs) * |
| 782 | screen->MPsInTP * LOCAL_WARPS_ALLOC * THREADS_IN_WARP; |
| 783 | |
| 784 | ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 16, |
| 785 | *tls_size, NULL, &screen->tls_bo); |
| 786 | if (ret) { |
| 787 | NOUVEAU_ERR("Failed to allocate local bo: %d\n", ret); |
| 788 | return ret; |
| 789 | } |
| 790 | |
| 791 | return 0; |
| 792 | } |
| 793 | |
| 794 | int nv50_tls_realloc(struct nv50_screen *screen, unsigned tls_space) |
| 795 | { |
| 796 | struct nouveau_pushbuf *push = screen->base.pushbuf; |
| 797 | int ret; |
| 798 | uint64_t tls_size; |
| 799 | |
| 800 | if (tls_space < screen->cur_tls_space) |
| 801 | return 0; |
| 802 | if (tls_space > screen->max_tls_space) { |
| 803 | /* fixable by limiting number of warps (LOCAL_WARPS_LOG_ALLOC / |
| 804 | * LOCAL_WARPS_NO_CLAMP) */ |
| 805 | NOUVEAU_ERR("Unsupported number of temporaries (%u > %u). Fixable if someone cares.\n", |
| 806 | (unsigned)(tls_space / ONE_TEMP_SIZE), |
| 807 | (unsigned)(screen->max_tls_space / ONE_TEMP_SIZE)); |
| 808 | return -ENOMEM; |
| 809 | } |
| 810 | |
| 811 | nouveau_bo_ref(NULL, &screen->tls_bo); |
| 812 | ret = nv50_tls_alloc(screen, tls_space, &tls_size); |
| 813 | if (ret) |
| 814 | return ret; |
| 815 | |
| 816 | BEGIN_NV04(push, NV50_3D(LOCAL_ADDRESS_HIGH), 3); |
| 817 | PUSH_DATAh(push, screen->tls_bo->offset); |
| 818 | PUSH_DATA (push, screen->tls_bo->offset); |
| 819 | PUSH_DATA (push, util_logbase2(screen->cur_tls_space / 8)); |
| 820 | |
| 821 | return 1; |
| 822 | } |
| 823 | |
Ben Skeggs | 6c1bfff | 2015-11-26 14:24:42 +1000 | [diff] [blame] | 824 | struct nouveau_screen * |
Marcin Slusarz | 10e9312 | 2011-12-02 22:02:51 +0100 | [diff] [blame] | 825 | nv50_screen_create(struct nouveau_device *dev) |
Ben Skeggs | 84cc07d | 2008-02-29 15:03:57 +1100 | [diff] [blame] | 826 | { |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 827 | struct nv50_screen *screen; |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 828 | struct pipe_screen *pscreen; |
Christoph Bumiller | 6d1cdec | 2012-04-06 15:41:55 +0200 | [diff] [blame] | 829 | struct nouveau_object *chan; |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 830 | uint64_t value; |
| 831 | uint32_t tesla_class; |
Marcin Slusarz | 1906d2b | 2012-06-27 14:45:17 +0200 | [diff] [blame] | 832 | unsigned stack_size; |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 833 | int ret; |
Ben Skeggs | 84cc07d | 2008-02-29 15:03:57 +1100 | [diff] [blame] | 834 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 835 | screen = CALLOC_STRUCT(nv50_screen); |
| 836 | if (!screen) |
| 837 | return NULL; |
| 838 | pscreen = &screen->base.base; |
Ben Skeggs | 323d4da | 2015-11-26 14:34:43 +1000 | [diff] [blame] | 839 | pscreen->destroy = nv50_screen_destroy; |
Ben Skeggs | bc466be | 2009-06-04 10:19:04 +1000 | [diff] [blame] | 840 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 841 | ret = nouveau_screen_init(&screen->base, dev); |
Marcin Slusarz | 0fceaee | 2012-06-26 16:22:43 +0200 | [diff] [blame] | 842 | if (ret) { |
| 843 | NOUVEAU_ERR("nouveau_screen_init failed: %d\n", ret); |
| 844 | goto fail; |
| 845 | } |
Ben Skeggs | 84cc07d | 2008-02-29 15:03:57 +1100 | [diff] [blame] | 846 | |
Christoph Bumiller | 1befacc | 2012-05-17 14:43:47 +0200 | [diff] [blame] | 847 | /* TODO: Prevent FIFO prefetch before transfer of index buffers and |
| 848 | * admit them to VRAM. |
| 849 | */ |
| 850 | screen->base.vidmem_bindings |= PIPE_BIND_CONSTANT_BUFFER | |
| 851 | PIPE_BIND_VERTEX_BUFFER; |
| 852 | screen->base.sysmem_bindings |= |
| 853 | PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_INDEX_BUFFER; |
| 854 | |
Christoph Bumiller | 6d1cdec | 2012-04-06 15:41:55 +0200 | [diff] [blame] | 855 | screen->base.pushbuf->user_priv = screen; |
| 856 | screen->base.pushbuf->rsvd_kick = 5; |
| 857 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 858 | chan = screen->base.channel; |
Ben Skeggs | bc466be | 2009-06-04 10:19:04 +1000 | [diff] [blame] | 859 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 860 | pscreen->context_create = nv50_create; |
| 861 | pscreen->is_format_supported = nv50_screen_is_format_supported; |
| 862 | pscreen->get_param = nv50_screen_get_param; |
| 863 | pscreen->get_shader_param = nv50_screen_get_shader_param; |
| 864 | pscreen->get_paramf = nv50_screen_get_paramf; |
Samuel Pitoiset | ff72440 | 2015-10-14 21:42:41 +0200 | [diff] [blame] | 865 | pscreen->get_compute_param = nv50_screen_get_compute_param; |
Samuel Pitoiset | 6a9c151 | 2015-11-10 01:27:15 +0100 | [diff] [blame] | 866 | pscreen->get_driver_query_info = nv50_screen_get_driver_query_info; |
Samuel Pitoiset | aede8ca | 2015-11-10 01:40:00 +0100 | [diff] [blame] | 867 | pscreen->get_driver_query_group_info = nv50_screen_get_driver_query_group_info; |
Ben Skeggs | bc466be | 2009-06-04 10:19:04 +1000 | [diff] [blame] | 868 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 869 | nv50_screen_init_resource_functions(pscreen); |
Ben Skeggs | 63a3a37 | 2009-02-20 09:32:47 +1000 | [diff] [blame] | 870 | |
Ilia Mirkin | 940f7ce | 2013-07-29 19:28:45 -0400 | [diff] [blame] | 871 | if (screen->base.device->chipset < 0x84 || |
Samuel Pitoiset | cd0dec0 | 2015-07-20 21:32:43 +0200 | [diff] [blame] | 872 | debug_get_bool_option("NOUVEAU_PMPEG", false)) { |
Ilia Mirkin | fbdae1c | 2013-07-16 17:50:43 -0400 | [diff] [blame] | 873 | /* PMPEG */ |
| 874 | nouveau_screen_init_vdec(&screen->base); |
| 875 | } else if (screen->base.device->chipset < 0x98 || |
| 876 | screen->base.device->chipset == 0xa0) { |
| 877 | /* VP2 */ |
| 878 | screen->base.base.get_video_param = nv84_screen_get_video_param; |
| 879 | screen->base.base.is_video_format_supported = nv84_screen_video_supported; |
| 880 | } else { |
Ilia Mirkin | a2061ee | 2013-08-10 20:19:24 -0400 | [diff] [blame] | 881 | /* VP3/4 */ |
| 882 | screen->base.base.get_video_param = nouveau_vp3_screen_get_video_param; |
| 883 | screen->base.base.is_video_format_supported = nouveau_vp3_screen_video_supported; |
Ilia Mirkin | fbdae1c | 2013-07-16 17:50:43 -0400 | [diff] [blame] | 884 | } |
Christoph Bumiller | ea316c5 | 2011-07-21 10:39:41 +0200 | [diff] [blame] | 885 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 886 | ret = nouveau_bo_new(dev, NOUVEAU_BO_GART | NOUVEAU_BO_MAP, 0, 4096, |
Christoph Bumiller | 6d1cdec | 2012-04-06 15:41:55 +0200 | [diff] [blame] | 887 | NULL, &screen->fence.bo); |
Marcin Slusarz | 0fceaee | 2012-06-26 16:22:43 +0200 | [diff] [blame] | 888 | if (ret) { |
| 889 | NOUVEAU_ERR("Failed to allocate fence bo: %d\n", ret); |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 890 | goto fail; |
Marcin Slusarz | 0fceaee | 2012-06-26 16:22:43 +0200 | [diff] [blame] | 891 | } |
| 892 | |
Christoph Bumiller | 6d1cdec | 2012-04-06 15:41:55 +0200 | [diff] [blame] | 893 | nouveau_bo_map(screen->fence.bo, 0, NULL); |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 894 | screen->fence.map = screen->fence.bo->map; |
Ben Skeggs | 7a8ee05 | 2011-03-01 10:17:28 +1000 | [diff] [blame] | 895 | screen->base.fence.emit = nv50_screen_fence_emit; |
| 896 | screen->base.fence.update = nv50_screen_fence_update; |
Ben Skeggs | 1cec61e | 2008-03-13 18:08:22 +1100 | [diff] [blame] | 897 | |
Christoph Bumiller | 6d1cdec | 2012-04-06 15:41:55 +0200 | [diff] [blame] | 898 | ret = nouveau_object_new(chan, 0xbeef0301, NOUVEAU_NOTIFIER_CLASS, |
| 899 | &(struct nv04_notify){ .length = 32 }, |
| 900 | sizeof(struct nv04_notify), &screen->sync); |
Marcin Slusarz | 0fceaee | 2012-06-26 16:22:43 +0200 | [diff] [blame] | 901 | if (ret) { |
| 902 | NOUVEAU_ERR("Failed to allocate notifier: %d\n", ret); |
| 903 | goto fail; |
| 904 | } |
Christoph Bumiller | 6d1cdec | 2012-04-06 15:41:55 +0200 | [diff] [blame] | 905 | |
| 906 | ret = nouveau_object_new(chan, 0xbeef5039, NV50_M2MF_CLASS, |
| 907 | NULL, 0, &screen->m2mf); |
Marcin Slusarz | 0fceaee | 2012-06-26 16:22:43 +0200 | [diff] [blame] | 908 | if (ret) { |
| 909 | NOUVEAU_ERR("Failed to allocate PGRAPH context for M2MF: %d\n", ret); |
| 910 | goto fail; |
| 911 | } |
Ben Skeggs | b2e48f8 | 2008-03-12 02:39:13 +1100 | [diff] [blame] | 912 | |
Christoph Bumiller | 6d1cdec | 2012-04-06 15:41:55 +0200 | [diff] [blame] | 913 | ret = nouveau_object_new(chan, 0xbeef502d, NV50_2D_CLASS, |
| 914 | NULL, 0, &screen->eng2d); |
Marcin Slusarz | 0fceaee | 2012-06-26 16:22:43 +0200 | [diff] [blame] | 915 | if (ret) { |
| 916 | NOUVEAU_ERR("Failed to allocate PGRAPH context for 2D: %d\n", ret); |
| 917 | goto fail; |
| 918 | } |
Ben Skeggs | 63a3a37 | 2009-02-20 09:32:47 +1000 | [diff] [blame] | 919 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 920 | switch (dev->chipset & 0xf0) { |
| 921 | case 0x50: |
Christoph Bumiller | 6d1cdec | 2012-04-06 15:41:55 +0200 | [diff] [blame] | 922 | tesla_class = NV50_3D_CLASS; |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 923 | break; |
| 924 | case 0x80: |
| 925 | case 0x90: |
Christoph Bumiller | 6d1cdec | 2012-04-06 15:41:55 +0200 | [diff] [blame] | 926 | tesla_class = NV84_3D_CLASS; |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 927 | break; |
| 928 | case 0xa0: |
| 929 | switch (dev->chipset) { |
| 930 | case 0xa0: |
| 931 | case 0xaa: |
| 932 | case 0xac: |
Christoph Bumiller | 6d1cdec | 2012-04-06 15:41:55 +0200 | [diff] [blame] | 933 | tesla_class = NVA0_3D_CLASS; |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 934 | break; |
| 935 | case 0xaf: |
Christoph Bumiller | 6d1cdec | 2012-04-06 15:41:55 +0200 | [diff] [blame] | 936 | tesla_class = NVAF_3D_CLASS; |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 937 | break; |
| 938 | default: |
Christoph Bumiller | 6d1cdec | 2012-04-06 15:41:55 +0200 | [diff] [blame] | 939 | tesla_class = NVA3_3D_CLASS; |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 940 | break; |
| 941 | } |
| 942 | break; |
| 943 | default: |
Marcin Slusarz | 0fceaee | 2012-06-26 16:22:43 +0200 | [diff] [blame] | 944 | NOUVEAU_ERR("Not a known NV50 chipset: NV%02x\n", dev->chipset); |
| 945 | goto fail; |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 946 | } |
Christoph Bumiller | e44089b | 2012-04-14 23:56:56 +0200 | [diff] [blame] | 947 | screen->base.class_3d = tesla_class; |
Christoph Bumiller | 272bbbf | 2010-03-21 13:17:02 +0100 | [diff] [blame] | 948 | |
Christoph Bumiller | 6d1cdec | 2012-04-06 15:41:55 +0200 | [diff] [blame] | 949 | ret = nouveau_object_new(chan, 0xbeef5097, tesla_class, |
| 950 | NULL, 0, &screen->tesla); |
Marcin Slusarz | 0fceaee | 2012-06-26 16:22:43 +0200 | [diff] [blame] | 951 | if (ret) { |
| 952 | NOUVEAU_ERR("Failed to allocate PGRAPH context for 3D: %d\n", ret); |
| 953 | goto fail; |
| 954 | } |
Ben Skeggs | f722fd9 | 2008-06-01 22:41:40 +1000 | [diff] [blame] | 955 | |
Ilia Mirkin | f76c7ad | 2014-02-04 02:30:18 -0500 | [diff] [blame] | 956 | /* This over-allocates by a page. The GP, which would execute at the end of |
| 957 | * the last page, would trigger faults. The going theory is that it |
| 958 | * prefetches up to a certain amount. |
Ilia Mirkin | d98b85b | 2014-01-13 13:36:28 -0500 | [diff] [blame] | 959 | */ |
Christoph Bumiller | 7048ad6 | 2011-03-03 12:25:12 +0100 | [diff] [blame] | 960 | ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 16, |
Ilia Mirkin | f76c7ad | 2014-02-04 02:30:18 -0500 | [diff] [blame] | 961 | (3 << NV50_CODE_BO_SIZE_LOG2) + 0x1000, |
| 962 | NULL, &screen->code); |
Marcin Slusarz | 0fceaee | 2012-06-26 16:22:43 +0200 | [diff] [blame] | 963 | if (ret) { |
| 964 | NOUVEAU_ERR("Failed to allocate code bo: %d\n", ret); |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 965 | goto fail; |
Marcin Slusarz | 0fceaee | 2012-06-26 16:22:43 +0200 | [diff] [blame] | 966 | } |
Ben Skeggs | 716c1cd | 2008-06-01 23:10:31 +1000 | [diff] [blame] | 967 | |
Christoph Bumiller | 6d1cdec | 2012-04-06 15:41:55 +0200 | [diff] [blame] | 968 | nouveau_heap_init(&screen->vp_code_heap, 0, 1 << NV50_CODE_BO_SIZE_LOG2); |
| 969 | nouveau_heap_init(&screen->gp_code_heap, 0, 1 << NV50_CODE_BO_SIZE_LOG2); |
| 970 | nouveau_heap_init(&screen->fp_code_heap, 0, 1 << NV50_CODE_BO_SIZE_LOG2); |
Christoph Bumiller | 7048ad6 | 2011-03-03 12:25:12 +0100 | [diff] [blame] | 971 | |
Christoph Bumiller | 6d1cdec | 2012-04-06 15:41:55 +0200 | [diff] [blame] | 972 | nouveau_getparam(dev, NOUVEAU_GETPARAM_GRAPH_UNITS, &value); |
Christoph Bumiller | 4de293b | 2010-08-15 21:37:50 +0200 | [diff] [blame] | 973 | |
Marcin Slusarz | 1906d2b | 2012-06-27 14:45:17 +0200 | [diff] [blame] | 974 | screen->TPs = util_bitcount(value & 0xffff); |
| 975 | screen->MPsInTP = util_bitcount((value >> 24) & 0xf); |
Christoph Bumiller | 4de293b | 2010-08-15 21:37:50 +0200 | [diff] [blame] | 976 | |
Samuel Pitoiset | ff72440 | 2015-10-14 21:42:41 +0200 | [diff] [blame] | 977 | screen->mp_count = screen->TPs * screen->MPsInTP; |
| 978 | |
Marcin Slusarz | 1906d2b | 2012-06-27 14:45:17 +0200 | [diff] [blame] | 979 | stack_size = util_next_power_of_two(screen->TPs) * screen->MPsInTP * |
| 980 | STACK_WARPS_ALLOC * 64 * 8; |
Christoph Bumiller | f30810c | 2010-09-09 19:12:54 +0200 | [diff] [blame] | 981 | |
Christoph Bumiller | 6d1cdec | 2012-04-06 15:41:55 +0200 | [diff] [blame] | 982 | ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 16, stack_size, NULL, |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 983 | &screen->stack_bo); |
Marcin Slusarz | 0fceaee | 2012-06-26 16:22:43 +0200 | [diff] [blame] | 984 | if (ret) { |
| 985 | NOUVEAU_ERR("Failed to allocate stack bo: %d\n", ret); |
| 986 | goto fail; |
| 987 | } |
Christoph Bumiller | f30810c | 2010-09-09 19:12:54 +0200 | [diff] [blame] | 988 | |
Marcin Slusarz | 1906d2b | 2012-06-27 14:45:17 +0200 | [diff] [blame] | 989 | uint64_t size_of_one_temp = util_next_power_of_two(screen->TPs) * |
| 990 | screen->MPsInTP * LOCAL_WARPS_ALLOC * THREADS_IN_WARP * |
| 991 | ONE_TEMP_SIZE; |
| 992 | screen->max_tls_space = dev->vram_size / size_of_one_temp * ONE_TEMP_SIZE; |
| 993 | screen->max_tls_space /= 2; /* half of vram */ |
Christoph Bumiller | f30810c | 2010-09-09 19:12:54 +0200 | [diff] [blame] | 994 | |
Marcin Slusarz | 1906d2b | 2012-06-27 14:45:17 +0200 | [diff] [blame] | 995 | /* hw can address max 64 KiB */ |
| 996 | screen->max_tls_space = MIN2(screen->max_tls_space, 64 << 10); |
| 997 | |
| 998 | uint64_t tls_size; |
| 999 | unsigned tls_space = 4/*temps*/ * ONE_TEMP_SIZE; |
| 1000 | ret = nv50_tls_alloc(screen, tls_space, &tls_size); |
| 1001 | if (ret) |
| 1002 | goto fail; |
Ben Skeggs | 3250bac | 2008-03-12 02:56:10 +1100 | [diff] [blame] | 1003 | |
Marcin Slusarz | 90dcd6c | 2011-10-08 23:58:32 +0200 | [diff] [blame] | 1004 | if (nouveau_mesa_debug) |
Marcin Slusarz | 1906d2b | 2012-06-27 14:45:17 +0200 | [diff] [blame] | 1005 | debug_printf("TPs = %u, MPsInTP = %u, VRAM = %"PRIu64" MiB, tls_size = %"PRIu64" KiB\n", |
| 1006 | screen->TPs, screen->MPsInTP, dev->vram_size >> 20, tls_size >> 10); |
Ben Skeggs | 431504b | 2008-06-16 18:56:39 +1000 | [diff] [blame] | 1007 | |
Christoph Bumiller | 6d1cdec | 2012-04-06 15:41:55 +0200 | [diff] [blame] | 1008 | ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 16, 4 << 16, NULL, |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 1009 | &screen->uniforms); |
Marcin Slusarz | 0fceaee | 2012-06-26 16:22:43 +0200 | [diff] [blame] | 1010 | if (ret) { |
| 1011 | NOUVEAU_ERR("Failed to allocate uniforms bo: %d\n", ret); |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 1012 | goto fail; |
Marcin Slusarz | 0fceaee | 2012-06-26 16:22:43 +0200 | [diff] [blame] | 1013 | } |
Christoph Bumiller | d29f555 | 2009-12-24 12:39:42 +0100 | [diff] [blame] | 1014 | |
Christoph Bumiller | 6d1cdec | 2012-04-06 15:41:55 +0200 | [diff] [blame] | 1015 | ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 16, 3 << 16, NULL, |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 1016 | &screen->txc); |
Marcin Slusarz | 0fceaee | 2012-06-26 16:22:43 +0200 | [diff] [blame] | 1017 | if (ret) { |
| 1018 | NOUVEAU_ERR("Failed to allocate TIC/TSC bo: %d\n", ret); |
| 1019 | goto fail; |
| 1020 | } |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 1021 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 1022 | screen->tic.entries = CALLOC(4096, sizeof(void *)); |
| 1023 | screen->tsc.entries = screen->tic.entries + 2048; |
| 1024 | |
Christoph Bumiller | 36ea744 | 2012-09-26 23:06:40 +0200 | [diff] [blame] | 1025 | if (!nv50_blitter_create(screen)) |
Christoph Bumiller | e9d84da | 2011-07-28 15:54:53 +0200 | [diff] [blame] | 1026 | goto fail; |
| 1027 | |
Marcin Slusarz | 1906d2b | 2012-06-27 14:45:17 +0200 | [diff] [blame] | 1028 | nv50_screen_init_hwctx(screen); |
Christoph Bumiller | 6d1cdec | 2012-04-06 15:41:55 +0200 | [diff] [blame] | 1029 | |
Samuel Pitoiset | ff72440 | 2015-10-14 21:42:41 +0200 | [diff] [blame] | 1030 | ret = nv50_screen_compute_setup(screen, screen->base.pushbuf); |
| 1031 | if (ret) { |
| 1032 | NOUVEAU_ERR("Failed to init compute context: %d\n", ret); |
| 1033 | goto fail; |
| 1034 | } |
| 1035 | |
Emil Velikov | 9c50039 | 2017-01-16 16:25:19 +0000 | [diff] [blame] | 1036 | nouveau_fence_new(&screen->base, &screen->base.fence.current); |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 1037 | |
Ben Skeggs | 6c1bfff | 2015-11-26 14:24:42 +1000 | [diff] [blame] | 1038 | return &screen->base; |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 1039 | |
| 1040 | fail: |
Ben Skeggs | 323d4da | 2015-11-26 14:34:43 +1000 | [diff] [blame] | 1041 | screen->base.base.context_create = NULL; |
| 1042 | return &screen->base; |
Ben Skeggs | 84cc07d | 2008-02-29 15:03:57 +1100 | [diff] [blame] | 1043 | } |
| 1044 | |
Christoph Bumiller | f80c03e | 2011-02-28 12:41:09 +0100 | [diff] [blame] | 1045 | int |
| 1046 | nv50_screen_tic_alloc(struct nv50_screen *screen, void *entry) |
| 1047 | { |
| 1048 | int i = screen->tic.next; |
| 1049 | |
| 1050 | while (screen->tic.lock[i / 32] & (1 << (i % 32))) |
| 1051 | i = (i + 1) & (NV50_TIC_MAX_ENTRIES - 1); |
| 1052 | |
| 1053 | screen->tic.next = (i + 1) & (NV50_TIC_MAX_ENTRIES - 1); |
| 1054 | |
| 1055 | if (screen->tic.entries[i]) |
| 1056 | nv50_tic_entry(screen->tic.entries[i])->id = -1; |
| 1057 | |
| 1058 | screen->tic.entries[i] = entry; |
| 1059 | return i; |
| 1060 | } |
| 1061 | |
| 1062 | int |
| 1063 | nv50_screen_tsc_alloc(struct nv50_screen *screen, void *entry) |
| 1064 | { |
| 1065 | int i = screen->tsc.next; |
| 1066 | |
| 1067 | while (screen->tsc.lock[i / 32] & (1 << (i % 32))) |
| 1068 | i = (i + 1) & (NV50_TSC_MAX_ENTRIES - 1); |
| 1069 | |
| 1070 | screen->tsc.next = (i + 1) & (NV50_TSC_MAX_ENTRIES - 1); |
| 1071 | |
| 1072 | if (screen->tsc.entries[i]) |
| 1073 | nv50_tsc_entry(screen->tsc.entries[i])->id = -1; |
| 1074 | |
| 1075 | screen->tsc.entries[i] = entry; |
| 1076 | return i; |
| 1077 | } |