blob: c845bfa68cac6dce20f87d2e88268192149511f5 [file] [log] [blame]
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001/*
2 * © Copyright 2018 Alyssa Rosenzweig
Alyssa Rosenzweig5ff79732019-08-06 16:43:28 -07003 * Copyright © 2014-2017 Broadcom
Alyssa Rosenzweigf714eab2019-08-07 10:11:28 -07004 * Copyright (C) 2017 Intel Corporation
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00005 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
24 *
25 */
26
27#include <sys/poll.h>
28#include <errno.h>
29
Boris Brezillon154cb722019-09-14 09:58:55 +020030#include "pan_bo.h"
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +000031#include "pan_context.h"
Vasily Khoruzhick53d6bb92020-03-03 21:31:51 -080032#include "pan_minmax_cache.h"
Tomeu Vizoso6887ff42019-11-28 10:21:06 +010033#include "panfrost-quirks.h"
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +000034
35#include "util/macros.h"
Eric Anholt882ca6d2019-06-27 15:05:31 -070036#include "util/format/u_format.h"
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +000037#include "util/u_inlines.h"
38#include "util/u_upload_mgr.h"
39#include "util/u_memory.h"
Alyssa Rosenzweig89b02bf2019-04-13 00:10:20 +000040#include "util/u_vbuf.h"
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +000041#include "util/half_float.h"
Alyssa Rosenzweige008d4f2019-04-14 22:42:44 +000042#include "util/u_helpers.h"
Eric Anholt882ca6d2019-06-27 15:05:31 -070043#include "util/format/u_format.h"
Alyssa Rosenzweig72fc06d2019-08-08 07:10:24 -070044#include "util/u_prim.h"
Alyssa Rosenzweig7f548122019-06-26 15:59:29 -070045#include "util/u_prim_restart.h"
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +000046#include "indices/u_primconvert.h"
47#include "tgsi/tgsi_parse.h"
Alyssa Rosenzweig46479992019-07-31 15:49:13 -070048#include "tgsi/tgsi_from_mesa.h"
Alyssa Rosenzweig31f5a432019-05-02 02:27:04 +000049#include "util/u_math.h"
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +000050
51#include "pan_screen.h"
52#include "pan_blending.h"
53#include "pan_blend_shaders.h"
Boris Brezillona72bab12020-03-05 09:30:58 +010054#include "pan_cmdstream.h"
Tomeu Vizoso97f2d042019-03-08 15:24:57 +010055#include "pan_util.h"
Alyssa Rosenzweig1c62b552020-08-05 16:16:00 -040056#include "decode.h"
Icecream95d16d1362020-07-07 15:06:08 +120057#include "util/pan_lower_framebuffer.h"
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +000058
Alyssa Rosenzweigb0e915b2019-12-09 11:00:42 -050059struct midgard_tiler_descriptor
Boris Brezillonaa851a62019-09-01 10:30:39 +020060panfrost_emit_midg_tiler(struct panfrost_batch *batch, unsigned vertex_count)
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +000061{
Alyssa Rosenzweigca8c6252020-03-23 18:44:21 -040062 struct panfrost_device *device = pan_device(batch->ctx->base.screen);
63 bool hierarchy = !(device->quirks & MIDGARD_NO_HIER_TILING);
Vinson Leede2e5f62019-11-27 23:37:00 -080064 struct midgard_tiler_descriptor t = {0};
Boris Brezillonaa851a62019-09-01 10:30:39 +020065 unsigned height = batch->key.height;
66 unsigned width = batch->key.width;
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +000067
Alyssa Rosenzweig31fc52a2019-07-10 07:22:19 -070068 t.hierarchy_mask =
Alyssa Rosenzweig9fb09042019-11-27 08:31:16 -050069 panfrost_choose_hierarchy_mask(width, height, vertex_count, hierarchy);
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +000070
Alyssa Rosenzweig31fc52a2019-07-10 07:22:19 -070071 /* Compute the polygon header size and use that to offset the body */
72
73 unsigned header_size = panfrost_tiler_header_size(
Alyssa Rosenzweig9fb09042019-11-27 08:31:16 -050074 width, height, t.hierarchy_mask, hierarchy);
Alyssa Rosenzweig31fc52a2019-07-10 07:22:19 -070075
Alyssa Rosenzweigf5c29342019-08-19 14:30:53 -070076 t.polygon_list_size = panfrost_tiler_full_size(
Alyssa Rosenzweig9fb09042019-11-27 08:31:16 -050077 width, height, t.hierarchy_mask, hierarchy);
Alyssa Rosenzweig31fc52a2019-07-10 07:22:19 -070078
Alyssa Rosenzweig9fb09042019-11-27 08:31:16 -050079 if (vertex_count) {
Boris Brezillon2c526992019-09-05 21:41:26 +020080 t.polygon_list = panfrost_batch_get_polygon_list(batch,
81 header_size +
82 t.polygon_list_size);
Alyssa Rosenzweigf5c29342019-08-19 14:30:53 -070083
Alyssa Rosenzweig31fc52a2019-07-10 07:22:19 -070084
Alyssa Rosenzweigd8deb1e2020-08-17 13:14:54 -040085 t.heap_start = device->tiler_heap->gpu;
86 t.heap_end = device->tiler_heap->gpu + device->tiler_heap->size;
Alyssa Rosenzweig31fc52a2019-07-10 07:22:19 -070087 } else {
Boris Brezillon1e483a82019-09-14 19:18:51 +020088 struct panfrost_bo *tiler_dummy;
89
90 tiler_dummy = panfrost_batch_get_tiler_dummy(batch);
Alyssa Rosenzweig9fb09042019-11-27 08:31:16 -050091 header_size = MALI_TILER_MINIMUM_HEADER_SIZE;
Boris Brezillon1e483a82019-09-14 19:18:51 +020092
Alyssa Rosenzweig31fc52a2019-07-10 07:22:19 -070093 /* The tiler is disabled, so don't allow the tiler heap */
Boris Brezillon1e483a82019-09-14 19:18:51 +020094 t.heap_start = tiler_dummy->gpu;
Alyssa Rosenzweig31fc52a2019-07-10 07:22:19 -070095 t.heap_end = t.heap_start;
96
97 /* Use a dummy polygon list */
Boris Brezillon1e483a82019-09-14 19:18:51 +020098 t.polygon_list = tiler_dummy->gpu;
Alyssa Rosenzweig31fc52a2019-07-10 07:22:19 -070099
Alyssa Rosenzweig897110a2019-08-19 14:47:50 -0700100 /* Disable the tiler */
Alyssa Rosenzweig9fb09042019-11-27 08:31:16 -0500101 if (hierarchy)
102 t.hierarchy_mask |= MALI_TILER_DISABLED;
103 else {
104 t.hierarchy_mask = MALI_TILER_USER;
105 t.polygon_list_size = MALI_TILER_MINIMUM_HEADER_SIZE + 4;
Tomeu Vizoso6469c1a2019-10-29 15:42:03 +0100106
Alyssa Rosenzweigadf716d2019-12-05 09:06:53 -0500107 /* We don't have a WRITE_VALUE job, so write the polygon list manually */
Tomeu Vizoso6469c1a2019-10-29 15:42:03 +0100108 uint32_t *polygon_list_body = (uint32_t *) (tiler_dummy->cpu + header_size);
109 polygon_list_body[0] = 0xa0000000; /* TODO: Just that? */
110 }
Alyssa Rosenzweig31fc52a2019-07-10 07:22:19 -0700111 }
112
113 t.polygon_list_body =
114 t.polygon_list + header_size;
115
Alyssa Rosenzweig31fc52a2019-07-10 07:22:19 -0700116 return t;
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000117}
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000118
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000119static void
120panfrost_clear(
121 struct pipe_context *pipe,
122 unsigned buffers,
Mike Blumenkrantz1c8bcad2020-03-24 12:02:51 -0400123 const struct pipe_scissor_state *scissor_state,
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000124 const union pipe_color_union *color,
125 double depth, unsigned stencil)
126{
127 struct panfrost_context *ctx = pan_context(pipe);
Boris Brezillonc138ca82019-09-19 15:52:02 +0200128
129 /* TODO: panfrost_get_fresh_batch_for_fbo() instantiates a new batch if
130 * the existing batch targeting this FBO has draws. We could probably
131 * avoid that by replacing plain clears by quad-draws with a specific
132 * color/depth/stencil value, thus avoiding the generation of extra
Alyssa Rosenzweigadf716d2019-12-05 09:06:53 -0500133 * fragment jobs.
Boris Brezillonc138ca82019-09-19 15:52:02 +0200134 */
135 struct panfrost_batch *batch = panfrost_get_fresh_batch_for_fbo(ctx);
Boris Brezillon12d8a172019-09-05 21:41:28 +0200136 panfrost_batch_clear(batch, buffers, color, depth, stencil);
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000137}
138
Boris Brezillona0402f72020-03-05 17:24:39 +0100139bool
Alyssa Rosenzweig89b02bf2019-04-13 00:10:20 +0000140panfrost_writes_point_size(struct panfrost_context *ctx)
141{
Alyssa Rosenzweigac6aa932019-07-31 14:13:30 -0700142 assert(ctx->shader[PIPE_SHADER_VERTEX]);
Boris Brezillonb28f4bb2020-03-05 10:46:39 +0100143 struct panfrost_shader_state *vs = panfrost_get_shader_state(ctx, PIPE_SHADER_VERTEX);
Alyssa Rosenzweig89b02bf2019-04-13 00:10:20 +0000144
Boris Brezillon093da772020-03-06 11:43:38 +0100145 return vs->writes_point_size && ctx->active_prim == PIPE_PRIM_POINTS;
Alyssa Rosenzweig89b02bf2019-04-13 00:10:20 +0000146}
147
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000148/* The entire frame is in memory -- send it off to the kernel! */
149
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000150void
151panfrost_flush(
152 struct pipe_context *pipe,
153 struct pipe_fence_handle **fence,
154 unsigned flags)
155{
156 struct panfrost_context *ctx = pan_context(pipe);
Alyssa Rosenzweiged1910d2020-07-07 16:15:45 -0400157 struct panfrost_device *dev = pan_device(pipe->screen);
Alyssa Rosenzweig64d6f562020-07-20 13:34:42 -0400158 uint32_t syncobj = 0;
Boris Brezillonb5d8f9b2019-09-15 18:23:10 +0200159
Alyssa Rosenzweig64d6f562020-07-20 13:34:42 -0400160 if (fence)
161 drmSyncobjCreate(dev->fd, 0, &syncobj);
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000162
Boris Brezillona45984b2019-09-15 19:15:16 +0200163 /* Submit all pending jobs */
Alyssa Rosenzweig64d6f562020-07-20 13:34:42 -0400164 panfrost_flush_all_batches(ctx, syncobj);
Boris Brezillon2fc91a12019-09-05 19:14:25 +0200165
166 if (fence) {
Alyssa Rosenzweig64d6f562020-07-20 13:34:42 -0400167 struct panfrost_fence *f = panfrost_fence_create(ctx, syncobj);
Boris Brezillon2fc91a12019-09-05 19:14:25 +0200168 pipe->screen->fence_reference(pipe->screen, fence, NULL);
169 *fence = (struct pipe_fence_handle *)f;
170 }
Icecream95cf2c5a52020-01-23 10:32:18 +1300171
Alyssa Rosenzweiged1910d2020-07-07 16:15:45 -0400172 if (dev->debug & PAN_DBG_TRACE)
Icecream95cf2c5a52020-01-23 10:32:18 +1300173 pandecode_next_frame();
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000174}
175
Icecream95391ad722020-07-10 11:19:07 +1200176static void
177panfrost_texture_barrier(struct pipe_context *pipe, unsigned flags)
178{
179 struct panfrost_context *ctx = pan_context(pipe);
Alyssa Rosenzweig64d6f562020-07-20 13:34:42 -0400180 panfrost_flush_all_batches(ctx, 0);
Icecream95391ad722020-07-10 11:19:07 +1200181}
182
Alyssa Rosenzweig32dbc802020-08-05 18:44:36 -0400183#define DEFINE_CASE(c) case PIPE_PRIM_##c: return MALI_DRAW_MODE_##c;
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000184
185static int
Alyssa Rosenzweig3a4d9302020-08-25 13:25:29 -0400186pan_draw_mode(enum pipe_prim_type mode)
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000187{
188 switch (mode) {
189 DEFINE_CASE(POINTS);
190 DEFINE_CASE(LINES);
191 DEFINE_CASE(LINE_LOOP);
192 DEFINE_CASE(LINE_STRIP);
193 DEFINE_CASE(TRIANGLES);
194 DEFINE_CASE(TRIANGLE_STRIP);
195 DEFINE_CASE(TRIANGLE_FAN);
196 DEFINE_CASE(QUADS);
197 DEFINE_CASE(QUAD_STRIP);
198 DEFINE_CASE(POLYGON);
199
200 default:
Alyssa Rosenzweigc65271c2019-05-16 23:42:33 +0000201 unreachable("Invalid draw mode");
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000202 }
203}
204
205#undef DEFINE_CASE
206
Alyssa Rosenzweig9865b792019-06-17 09:26:34 -0700207static bool
208panfrost_scissor_culls_everything(struct panfrost_context *ctx)
209{
210 const struct pipe_scissor_state *ss = &ctx->scissor;
211
212 /* Check if we're scissoring at all */
213
Alyssa Rosenzweigec351592020-08-14 17:50:44 -0400214 if (!ctx->rasterizer->base.scissor)
Alyssa Rosenzweig9865b792019-06-17 09:26:34 -0700215 return false;
216
Alyssa Rosenzweig124f6b52019-06-24 14:13:20 -0700217 return (ss->minx == ss->maxx) || (ss->miny == ss->maxy);
Alyssa Rosenzweig9865b792019-06-17 09:26:34 -0700218}
219
Alyssa Rosenzweig72fc06d2019-08-08 07:10:24 -0700220/* Count generated primitives (when there is no geom/tess shaders) for
221 * transform feedback */
222
223static void
224panfrost_statistics_record(
225 struct panfrost_context *ctx,
226 const struct pipe_draw_info *info)
227{
228 if (!ctx->active_queries)
229 return;
230
231 uint32_t prims = u_prims_for_vertices(info->mode, info->count);
232 ctx->prims_generated += prims;
233
Alyssa Rosenzweig42f0aae2019-08-30 17:37:22 -0700234 if (!ctx->streamout.num_targets)
Alyssa Rosenzweig72fc06d2019-08-08 07:10:24 -0700235 return;
236
237 ctx->tf_prims_generated += prims;
238}
239
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000240static void
Boris Brezillon13881a42020-03-05 21:55:01 +0100241panfrost_update_streamout_offsets(struct panfrost_context *ctx)
242{
243 for (unsigned i = 0; i < ctx->streamout.num_targets; ++i) {
244 unsigned count;
245
246 count = u_stream_outputs_for_vertices(ctx->active_prim,
247 ctx->vertex_count);
248 ctx->streamout.offsets[i] += count;
249 }
250}
251
Alyssa Rosenzweig90cc8152020-08-25 14:59:30 -0400252static inline void
253pan_emit_draw_descs(struct panfrost_batch *batch,
254 struct MALI_DRAW *d, enum pipe_shader_type st)
255{
256 d->offset_start = batch->ctx->offset_start;
257 d->instances = batch->ctx->instance_count > 1 ?
258 batch->ctx->padded_count : 1;
259
260 d->uniform_buffers = panfrost_emit_const_buf(batch, st, &d->push_uniforms);
261 d->textures = panfrost_emit_texture_descriptors(batch, st);
262 d->samplers = panfrost_emit_sampler_descriptors(batch, st);
263}
264
Boris Brezillon13881a42020-03-05 21:55:01 +0100265static void
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000266panfrost_draw_vbo(
267 struct pipe_context *pipe,
268 const struct pipe_draw_info *info)
269{
270 struct panfrost_context *ctx = pan_context(pipe);
Alyssa Rosenzweig3f61da72020-08-25 13:03:59 -0400271 struct panfrost_device *device = pan_device(ctx->base.screen);
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000272
Alyssa Rosenzweig9865b792019-06-17 09:26:34 -0700273 /* First of all, check the scissor to see if anything is drawn at all.
274 * If it's not, we drop the draw (mostly a conformance issue;
275 * well-behaved apps shouldn't hit this) */
276
277 if (panfrost_scissor_culls_everything(ctx))
278 return;
279
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000280 int mode = info->mode;
281
Alyssa Rosenzweig7f548122019-06-26 15:59:29 -0700282 /* Fallback unsupported restart index */
283 unsigned primitive_index = (1 << (info->index_size * 8)) - 1;
284
285 if (info->primitive_restart && info->index_size
Alyssa Rosenzweiga2d0ea92019-07-10 10:10:31 -0700286 && info->restart_index != primitive_index) {
Alyssa Rosenzweig7f548122019-06-26 15:59:29 -0700287 util_draw_vbo_without_prim_restart(pipe, info);
288 return;
289 }
290
Alyssa Rosenzweig85e2bb52019-02-08 02:28:12 +0000291 /* Fallback for unsupported modes */
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000292
Alyssa Rosenzweig27b62642019-08-21 09:40:11 -0700293 assert(ctx->rasterizer != NULL);
294
Alyssa Rosenzweig7c02c4f2019-03-15 02:13:34 +0000295 if (!(ctx->draw_modes & (1 << mode))) {
Alyssa Rosenzweig433fa392020-08-14 18:27:32 -0400296 if (info->count < 4) {
297 /* Degenerate case? */
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000298 return;
299 }
Alyssa Rosenzweig433fa392020-08-14 18:27:32 -0400300
301 util_primconvert_save_rasterizer_state(ctx->primconvert, &ctx->rasterizer->base);
302 util_primconvert_draw_vbo(ctx->primconvert, info);
303 return;
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000304 }
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000305
Alyssa Rosenzweiga2e41592020-08-14 18:31:05 -0400306 /* Now that we have a guaranteed terminating path, find the job. */
Alyssa Rosenzweig59c96232019-02-25 05:32:16 +0000307
Boris Brezillon251e6852020-03-06 08:57:31 +0100308 struct panfrost_batch *batch = panfrost_get_batch_for_fbo(ctx);
Boris Brezillon251e6852020-03-06 08:57:31 +0100309 panfrost_batch_set_requirements(batch);
Alyssa Rosenzweig59c96232019-02-25 05:32:16 +0000310
Rohan Garg16edd562019-07-17 18:50:13 +0200311 /* Take into account a negative bias */
312 ctx->vertex_count = info->count + abs(info->index_bias);
Alyssa Rosenzweig8d747492019-06-27 14:13:10 -0700313 ctx->instance_count = info->instance_count;
Alyssa Rosenzweig7c295882019-08-08 08:16:09 -0700314 ctx->active_prim = info->mode;
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000315
Alyssa Rosenzweig3f61da72020-08-25 13:03:59 -0400316 struct mali_vertex_tiler_prefix vertex_prefix = { 0 }, tiler_prefix = { 0 };
Alyssa Rosenzweig90cc8152020-08-25 14:59:30 -0400317 struct mali_draw_packed vertex_postfix, tiler_postfix;
Tomeu Vizoso7b10d4e2020-04-08 10:55:28 +0200318 union midgard_primitive_size primitive_size;
Boris Brezillon5d9995e2020-03-06 08:02:14 +0100319 unsigned vertex_count;
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000320
Alyssa Rosenzweig90cc8152020-08-25 14:59:30 -0400321 mali_ptr shared_mem = (device->quirks & IS_BIFROST) ?
322 panfrost_vt_emit_shared_memory(batch) :
323 panfrost_batch_reserve_framebuffer(batch);
Alyssa Rosenzweig3f61da72020-08-25 13:03:59 -0400324
325 struct pipe_rasterizer_state *rast = &ctx->rasterizer->base;
Alyssa Rosenzweig3f61da72020-08-25 13:03:59 -0400326 SET_BIT(tiler_prefix.unknown_draw, MALI_DRAW_FLATSHADE_FIRST,
327 rast->flatshade_first);
Boris Brezillond66ef692020-03-06 11:31:06 +0100328
Alyssa Rosenzweig3a4d9302020-08-25 13:25:29 -0400329 tiler_prefix.draw_mode = pan_draw_mode(mode);
330
331 unsigned draw_flags = 0x3000;
332
333 if (panfrost_writes_point_size(ctx))
334 draw_flags |= MALI_DRAW_VARYING_SIZE;
335
336 if (info->primitive_restart)
337 draw_flags |= MALI_DRAW_PRIMITIVE_RESTART_FIXED_INDEX;
338
339 if (info->index_size) {
340 unsigned min_index = 0, max_index = 0;
341
342 tiler_prefix.indices = panfrost_get_index_buffer_bounded(ctx,
343 info,
344 &min_index,
345 &max_index);
346
347 /* Use the corresponding values */
348 vertex_count = max_index - min_index + 1;
Alyssa Rosenzweig90cc8152020-08-25 14:59:30 -0400349 ctx->offset_start = min_index + info->index_bias;
Alyssa Rosenzweig3a4d9302020-08-25 13:25:29 -0400350 tiler_prefix.offset_bias_correction = -min_index;
351 tiler_prefix.index_count = MALI_POSITIVE(info->count);
352 draw_flags |= panfrost_translate_index_size(info->index_size);
353 } else {
354 vertex_count = ctx->vertex_count;
Alyssa Rosenzweig90cc8152020-08-25 14:59:30 -0400355 ctx->offset_start = info->start;
Alyssa Rosenzweig3a4d9302020-08-25 13:25:29 -0400356 tiler_prefix.index_count = MALI_POSITIVE(ctx->vertex_count);
357 }
358
359 tiler_prefix.unknown_draw = draw_flags;
Alyssa Rosenzweig3a4d9302020-08-25 13:25:29 -0400360
361 /* Encode the padded vertex count */
362
Alyssa Rosenzweig90cc8152020-08-25 14:59:30 -0400363 if (info->instance_count > 1)
Alyssa Rosenzweig3a4d9302020-08-25 13:25:29 -0400364 ctx->padded_count = panfrost_padded_vertex_count(vertex_count);
Alyssa Rosenzweig90cc8152020-08-25 14:59:30 -0400365 else
Alyssa Rosenzweig3a4d9302020-08-25 13:25:29 -0400366 ctx->padded_count = vertex_count;
Alyssa Rosenzweig0e4c3212019-03-31 04:26:48 +0000367
Alyssa Rosenzweig72fc06d2019-08-08 07:10:24 -0700368 panfrost_statistics_record(ctx, info);
369
Tomeu Vizoso7b10d4e2020-04-08 10:55:28 +0200370 panfrost_pack_work_groups_fused(&vertex_prefix, &tiler_prefix,
Boris Brezillonb1a6a152020-03-06 11:46:39 +0100371 1, vertex_count, info->instance_count,
372 1, 1, 1);
Alyssa Rosenzweigc9b164f2019-06-27 08:29:06 -0700373
Boris Brezillon251e6852020-03-06 08:57:31 +0100374 /* Emit all sort of descriptors. */
Alyssa Rosenzweige5c77cb2020-08-25 13:37:22 -0400375 mali_ptr varyings = 0, vs_vary = 0, fs_vary = 0, pos = 0, psiz = 0;
Alyssa Rosenzweig8b5f9fc2020-08-25 12:03:17 -0400376
Boris Brezillon836686d2020-03-06 09:45:31 +0100377 panfrost_emit_varying_descriptor(batch,
Boris Brezillon251e6852020-03-06 08:57:31 +0100378 ctx->padded_count *
Boris Brezillon836686d2020-03-06 09:45:31 +0100379 ctx->instance_count,
Alyssa Rosenzweige5c77cb2020-08-25 13:37:22 -0400380 &vs_vary, &fs_vary, &varyings,
381 &pos, &psiz);
Tomeu Vizoso7b10d4e2020-04-08 10:55:28 +0200382
Alyssa Rosenzweig90cc8152020-08-25 14:59:30 -0400383 pan_pack(&vertex_postfix, DRAW, cfg) {
384 cfg.unknown_1 = (device->quirks & IS_BIFROST) ? 0x2 : 0x6;
385 cfg.state = panfrost_emit_compute_shader_meta(batch, PIPE_SHADER_VERTEX);
386 cfg.attributes = panfrost_emit_vertex_data(batch, &cfg.attribute_buffers);
387 cfg.varyings = vs_vary;
388 cfg.varying_buffers = varyings;
389 cfg.shared = shared_mem;
390 pan_emit_draw_descs(batch, &cfg, PIPE_SHADER_VERTEX);
391 }
392
393 pan_pack(&tiler_postfix, DRAW, cfg) {
394 cfg.unknown_1 = (device->quirks & IS_BIFROST) ? 0x3 : 0x7;
395 cfg.front_face_ccw = rast->front_ccw;
396 cfg.cull_front_face = rast->cull_face & PIPE_FACE_FRONT;
397 cfg.cull_back_face = rast->cull_face & PIPE_FACE_BACK;
398 cfg.position = pos;
399 cfg.state = panfrost_emit_frag_shader_meta(batch);
400 cfg.viewport = panfrost_emit_viewport(batch);
401 cfg.varyings = fs_vary;
402 cfg.varying_buffers = varyings;
403 cfg.shared = shared_mem;
404
405 pan_emit_draw_descs(batch, &cfg, PIPE_SHADER_FRAGMENT);
406
407 if (ctx->occlusion_query) {
408 cfg.occlusion_query = MALI_OCCLUSION_MODE_PREDICATE;
409 cfg.occlusion = ctx->occlusion_query->bo->gpu;
410 panfrost_batch_add_bo(ctx->batch, ctx->occlusion_query->bo,
411 PAN_BO_ACCESS_SHARED |
412 PAN_BO_ACCESS_RW |
413 PAN_BO_ACCESS_FRAGMENT);
414 }
415 }
Alyssa Rosenzweig80f1d612020-08-21 14:35:35 -0400416
Alyssa Rosenzweige5c77cb2020-08-25 13:37:22 -0400417 primitive_size.pointer = psiz;
Tomeu Vizoso7b10d4e2020-04-08 10:55:28 +0200418 panfrost_vt_update_primitive_size(ctx, &tiler_prefix, &primitive_size);
Boris Brezillon251e6852020-03-06 08:57:31 +0100419
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000420 /* Fire off the draw itself */
Tomeu Vizoso7b10d4e2020-04-08 10:55:28 +0200421 panfrost_emit_vertex_tiler_jobs(batch, &vertex_prefix, &vertex_postfix,
422 &tiler_prefix, &tiler_postfix,
423 &primitive_size);
Boris Brezillon251e6852020-03-06 08:57:31 +0100424
425 /* Adjust the batch stack size based on the new shader stack sizes. */
426 panfrost_batch_adjust_stack_size(batch);
Alyssa Rosenzweig7c295882019-08-08 08:16:09 -0700427
428 /* Increment transform feedback offsets */
Boris Brezillon13881a42020-03-05 21:55:01 +0100429 panfrost_update_streamout_offsets(ctx);
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000430}
431
432/* CSO state */
433
434static void
435panfrost_generic_cso_delete(struct pipe_context *pctx, void *hwcso)
436{
437 free(hwcso);
438}
439
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000440static void *
441panfrost_create_rasterizer_state(
442 struct pipe_context *pctx,
443 const struct pipe_rasterizer_state *cso)
444{
445 struct panfrost_rasterizer *so = CALLOC_STRUCT(panfrost_rasterizer);
446
447 so->base = *cso;
448
Alyssa Rosenzweig1cf7a392020-08-14 18:34:56 -0400449 /* Gauranteed with the core GL call, so don't expose ARB_polygon_offset */
450 assert(cso->offset_clamp == 0.0);
451
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000452 return so;
453}
454
455static void
456panfrost_bind_rasterizer_state(
457 struct pipe_context *pctx,
458 void *hwcso)
459{
460 struct panfrost_context *ctx = pan_context(pctx);
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000461
Alyssa Rosenzweigd3160a62020-02-18 10:08:51 -0500462 ctx->rasterizer = hwcso;
463
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000464 if (!hwcso)
465 return;
466
Alyssa Rosenzweigbe030602019-06-24 11:01:05 -0700467 /* Point sprites are emulated */
468
Boris Brezillonb28f4bb2020-03-05 10:46:39 +0100469 struct panfrost_shader_state *variant = panfrost_get_shader_state(ctx, PIPE_SHADER_FRAGMENT);
Alyssa Rosenzweigf35f3732019-06-24 11:53:58 -0700470
471 if (ctx->rasterizer->base.sprite_coord_enable || (variant && variant->point_sprite_mask))
Alyssa Rosenzweigac6aa932019-07-31 14:13:30 -0700472 ctx->base.bind_fs_state(&ctx->base, ctx->shader[PIPE_SHADER_FRAGMENT]);
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000473}
474
475static void *
476panfrost_create_vertex_elements_state(
477 struct pipe_context *pctx,
478 unsigned num_elements,
479 const struct pipe_vertex_element *elements)
480{
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000481 struct panfrost_vertex_state *so = CALLOC_STRUCT(panfrost_vertex_state);
Tomeu Vizosoc4400b02020-05-01 07:36:31 +0200482 struct panfrost_device *dev = pan_device(pctx->screen);
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000483
484 so->num_elements = num_elements;
485 memcpy(so->pipe, elements, sizeof(*elements) * num_elements);
486
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000487 for (int i = 0; i < num_elements; ++i) {
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000488 enum pipe_format fmt = elements[i].src_format;
489 const struct util_format_description *desc = util_format_description(fmt);
Alyssa Rosenzweig668ec242020-08-11 22:26:03 -0400490 unsigned swizzle = 0;
Tomeu Vizosoc4400b02020-05-01 07:36:31 +0200491 if (dev->quirks & HAS_SWIZZLES)
Alyssa Rosenzweig668ec242020-08-11 22:26:03 -0400492 swizzle = panfrost_translate_swizzle_4(desc->swizzle);
Tomeu Vizosoc4400b02020-05-01 07:36:31 +0200493 else
Alyssa Rosenzweig668ec242020-08-11 22:26:03 -0400494 swizzle = panfrost_bifrost_swizzle(desc->nr_channels);
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000495
Alyssa Rosenzweig861e7dc2020-05-15 18:43:41 -0400496 enum mali_format hw_format = panfrost_pipe_format_table[desc->format].hw;
Alyssa Rosenzweig6caf7892020-08-14 12:14:20 -0400497 so->formats[i] = (hw_format << 12) | swizzle;
Alyssa Rosenzweig861e7dc2020-05-15 18:43:41 -0400498 assert(hw_format);
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000499 }
500
Boris Brezillon4a2ee612020-03-05 19:40:15 +0100501 /* Let's also prepare vertex builtins */
Tomeu Vizosoc4400b02020-05-01 07:36:31 +0200502 if (dev->quirks & HAS_SWIZZLES)
Alyssa Rosenzweig6caf7892020-08-14 12:14:20 -0400503 so->formats[PAN_VERTEX_ID] = (MALI_R32UI << 12) | panfrost_get_default_swizzle(1);
Tomeu Vizosoc4400b02020-05-01 07:36:31 +0200504 else
Alyssa Rosenzweig6caf7892020-08-14 12:14:20 -0400505 so->formats[PAN_VERTEX_ID] = (MALI_R32UI << 12) | panfrost_bifrost_swizzle(1);
Tomeu Vizosoc4400b02020-05-01 07:36:31 +0200506
Tomeu Vizosoc4400b02020-05-01 07:36:31 +0200507 if (dev->quirks & HAS_SWIZZLES)
Alyssa Rosenzweig6caf7892020-08-14 12:14:20 -0400508 so->formats[PAN_INSTANCE_ID] = (MALI_R32UI << 12) | panfrost_get_default_swizzle(1);
Tomeu Vizosoc4400b02020-05-01 07:36:31 +0200509 else
Alyssa Rosenzweig6caf7892020-08-14 12:14:20 -0400510 so->formats[PAN_INSTANCE_ID] = (MALI_R32UI << 12) | panfrost_bifrost_swizzle(1);
Boris Brezillon4a2ee612020-03-05 19:40:15 +0100511
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000512 return so;
513}
514
515static void
516panfrost_bind_vertex_elements_state(
517 struct pipe_context *pctx,
518 void *hwcso)
519{
520 struct panfrost_context *ctx = pan_context(pctx);
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000521 ctx->vertex = hwcso;
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000522}
523
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000524static void *
525panfrost_create_shader_state(
526 struct pipe_context *pctx,
Alyssa Rosenzweig271726e2019-12-13 15:13:02 -0500527 const struct pipe_shader_state *cso,
528 enum pipe_shader_type stage)
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000529{
530 struct panfrost_shader_variants *so = CALLOC_STRUCT(panfrost_shader_variants);
Alyssa Rosenzweiged1910d2020-07-07 16:15:45 -0400531 struct panfrost_device *dev = pan_device(pctx->screen);
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000532 so->base = *cso;
533
534 /* Token deep copy to prevent memory corruption */
535
536 if (cso->type == PIPE_SHADER_IR_TGSI)
537 so->base.tokens = tgsi_dup_tokens(so->base.tokens);
538
Alyssa Rosenzweig271726e2019-12-13 15:13:02 -0500539 /* Precompile for shader-db if we need to */
Alyssa Rosenzweiged1910d2020-07-07 16:15:45 -0400540 if (unlikely((dev->debug & PAN_DBG_PRECOMPILE) && cso->type == PIPE_SHADER_IR_NIR)) {
Alyssa Rosenzweig271726e2019-12-13 15:13:02 -0500541 struct panfrost_context *ctx = pan_context(pctx);
542
Alyssa Rosenzweigda677a42020-08-24 16:51:12 -0400543 struct panfrost_shader_state state = { 0 };
Alyssa Rosenzweig271726e2019-12-13 15:13:02 -0500544 uint64_t outputs_written;
545
Boris Brezillonb02f97c2020-03-05 16:20:18 +0100546 panfrost_shader_compile(ctx, PIPE_SHADER_IR_NIR,
547 so->base.ir.nir,
548 tgsi_processor_to_shader_stage(stage),
549 &state, &outputs_written);
Alyssa Rosenzweig271726e2019-12-13 15:13:02 -0500550 }
551
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000552 return so;
553}
554
555static void
556panfrost_delete_shader_state(
557 struct pipe_context *pctx,
558 void *so)
559{
Alyssa Rosenzweigacc52ff2019-02-14 04:00:19 +0000560 struct panfrost_shader_variants *cso = (struct panfrost_shader_variants *) so;
561
562 if (cso->base.type == PIPE_SHADER_IR_TGSI) {
Alyssa Rosenzweiged1910d2020-07-07 16:15:45 -0400563 /* TODO: leaks TGSI tokens! */
Alyssa Rosenzweigacc52ff2019-02-14 04:00:19 +0000564 }
565
Tomeu Vizoso950b5fc52019-08-01 16:45:50 +0200566 for (unsigned i = 0; i < cso->variant_count; ++i) {
567 struct panfrost_shader_state *shader_state = &cso->variants[i];
Boris Brezillone15ab932019-09-14 10:35:47 +0200568 panfrost_bo_unreference(shader_state->bo);
Alyssa Rosenzweig1e4c49e2020-08-21 14:16:18 -0400569
570 if (shader_state->upload.rsrc)
571 pipe_resource_reference(&shader_state->upload.rsrc, NULL);
572
Tomeu Vizoso950b5fc52019-08-01 16:45:50 +0200573 shader_state->bo = NULL;
574 }
Icecream95d8a35012020-01-12 14:19:25 +1300575 free(cso->variants);
Tomeu Vizoso950b5fc52019-08-01 16:45:50 +0200576
Alyssa Rosenzweig1e4c49e2020-08-21 14:16:18 -0400577
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000578 free(so);
579}
580
581static void *
582panfrost_create_sampler_state(
583 struct pipe_context *pctx,
584 const struct pipe_sampler_state *cso)
585{
586 struct panfrost_sampler_state *so = CALLOC_STRUCT(panfrost_sampler_state);
Tomeu Vizosod3eb23a2020-04-17 14:23:39 +0200587 struct panfrost_device *device = pan_device(pctx->screen);
588
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000589 so->base = *cso;
590
Tomeu Vizosod3eb23a2020-04-17 14:23:39 +0200591 if (device->quirks & IS_BIFROST)
Alyssa Rosenzweigb10c3c82020-08-11 18:25:03 -0400592 panfrost_sampler_desc_init_bifrost(cso, (struct mali_bifrost_sampler_packed *) &so->hw);
Tomeu Vizosod3eb23a2020-04-17 14:23:39 +0200593 else
Alyssa Rosenzweigf74186b2020-08-11 18:23:12 -0400594 panfrost_sampler_desc_init(cso, &so->hw);
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000595
596 return so;
597}
598
599static void
600panfrost_bind_sampler_states(
601 struct pipe_context *pctx,
602 enum pipe_shader_type shader,
603 unsigned start_slot, unsigned num_sampler,
604 void **sampler)
605{
606 assert(start_slot == 0);
607
608 struct panfrost_context *ctx = pan_context(pctx);
609
610 /* XXX: Should upload, not just copy? */
611 ctx->sampler_count[shader] = num_sampler;
612 memcpy(ctx->samplers[shader], sampler, num_sampler * sizeof (void *));
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000613}
614
615static bool
Alyssa Rosenzweig9ab8d312019-06-14 10:12:38 -0700616panfrost_variant_matches(
Alyssa Rosenzweiga2d0ea92019-07-10 10:10:31 -0700617 struct panfrost_context *ctx,
618 struct panfrost_shader_state *variant,
619 enum pipe_shader_type type)
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000620{
Alyssa Rosenzweigb73b3392020-06-01 20:52:59 -0400621 struct panfrost_device *dev = pan_device(ctx->base.screen);
Alyssa Rosenzweigbe030602019-06-24 11:01:05 -0700622 struct pipe_rasterizer_state *rasterizer = &ctx->rasterizer->base;
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000623
Alyssa Rosenzweig9ab8d312019-06-14 10:12:38 -0700624 bool is_fragment = (type == PIPE_SHADER_FRAGMENT);
625
Icecream95e6032482020-07-06 19:41:28 +1200626 if (variant->outputs_read) {
627 struct pipe_framebuffer_state *fb = &ctx->pipe_framebuffer;
628
629 unsigned i;
630 BITSET_FOREACH_SET(i, &variant->outputs_read, 8) {
631 enum pipe_format fmt = PIPE_FORMAT_R8G8B8A8_UNORM;
632
633 if ((fb->nr_cbufs > i) && fb->cbufs[i])
634 fmt = fb->cbufs[i]->format;
635
Icecream95d16d1362020-07-07 15:06:08 +1200636 const struct util_format_description *desc =
637 util_format_description(fmt);
638
639 if (pan_format_class_load(desc, dev->quirks) == PAN_FORMAT_NATIVE)
640 fmt = PIPE_FORMAT_NONE;
641
Icecream95e6032482020-07-06 19:41:28 +1200642 if (variant->rt_formats[i] != fmt)
643 return false;
644 }
645 }
646
Alyssa Rosenzweigb73b3392020-06-01 20:52:59 -0400647 /* Point sprites TODO on bifrost, always pass */
Alyssa Rosenzweigbe030602019-06-24 11:01:05 -0700648 if (is_fragment && rasterizer && (rasterizer->sprite_coord_enable |
Alyssa Rosenzweigb73b3392020-06-01 20:52:59 -0400649 variant->point_sprite_mask)
650 && !(dev->quirks & IS_BIFROST)) {
Alyssa Rosenzweigbe030602019-06-24 11:01:05 -0700651 /* Ensure the same varyings are turned to point sprites */
652 if (rasterizer->sprite_coord_enable != variant->point_sprite_mask)
653 return false;
654
655 /* Ensure the orientation is correct */
656 bool upper_left =
657 rasterizer->sprite_coord_mode ==
658 PIPE_SPRITE_COORD_UPPER_LEFT;
659
660 if (variant->point_sprite_upper_left != upper_left)
661 return false;
662 }
663
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000664 /* Otherwise, we're good to go */
665 return true;
666}
667
Alyssa Rosenzweigf714eab2019-08-07 10:11:28 -0700668/**
669 * Fix an uncompiled shader's stream output info, and produce a bitmask
670 * of which VARYING_SLOT_* are captured for stream output.
671 *
672 * Core Gallium stores output->register_index as a "slot" number, where
673 * slots are assigned consecutively to all outputs in info->outputs_written.
674 * This naive packing of outputs doesn't work for us - we too have slots,
675 * but the layout is defined by the VUE map, which we won't have until we
676 * compile a specific shader variant. So, we remap these and simply store
677 * VARYING_SLOT_* in our copy's output->register_index fields.
678 *
679 * We then produce a bitmask of outputs which are used for SO.
680 *
681 * Implementation from iris.
682 */
683
684static uint64_t
685update_so_info(struct pipe_stream_output_info *so_info,
686 uint64_t outputs_written)
687{
688 uint64_t so_outputs = 0;
Vinson Leede2e5f62019-11-27 23:37:00 -0800689 uint8_t reverse_map[64] = {0};
Alyssa Rosenzweigf714eab2019-08-07 10:11:28 -0700690 unsigned slot = 0;
691
692 while (outputs_written)
693 reverse_map[slot++] = u_bit_scan64(&outputs_written);
694
695 for (unsigned i = 0; i < so_info->num_outputs; i++) {
696 struct pipe_stream_output *output = &so_info->output[i];
697
698 /* Map Gallium's condensed "slots" back to real VARYING_SLOT_* enums */
699 output->register_index = reverse_map[output->register_index];
700
701 so_outputs |= 1ull << output->register_index;
702 }
703
704 return so_outputs;
705}
706
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000707static void
Alyssa Rosenzweig1acffb52019-06-04 23:48:17 +0000708panfrost_bind_shader_state(
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000709 struct pipe_context *pctx,
Alyssa Rosenzweig1acffb52019-06-04 23:48:17 +0000710 void *hwcso,
711 enum pipe_shader_type type)
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000712{
713 struct panfrost_context *ctx = pan_context(pctx);
Alyssa Rosenzweigb73b3392020-06-01 20:52:59 -0400714 struct panfrost_device *dev = pan_device(ctx->base.screen);
Alyssa Rosenzweig3113be32019-07-31 14:15:19 -0700715 ctx->shader[type] = hwcso;
716
Alyssa Rosenzweig1acffb52019-06-04 23:48:17 +0000717 if (!hwcso) return;
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000718
Alyssa Rosenzweig1acffb52019-06-04 23:48:17 +0000719 /* Match the appropriate variant */
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000720
Alyssa Rosenzweig1acffb52019-06-04 23:48:17 +0000721 signed variant = -1;
722 struct panfrost_shader_variants *variants = (struct panfrost_shader_variants *) hwcso;
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000723
Alyssa Rosenzweig1acffb52019-06-04 23:48:17 +0000724 for (unsigned i = 0; i < variants->variant_count; ++i) {
Alyssa Rosenzweig9ab8d312019-06-14 10:12:38 -0700725 if (panfrost_variant_matches(ctx, &variants->variants[i], type)) {
Alyssa Rosenzweig1acffb52019-06-04 23:48:17 +0000726 variant = i;
727 break;
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000728 }
729 }
730
Alyssa Rosenzweig1acffb52019-06-04 23:48:17 +0000731 if (variant == -1) {
732 /* No variant matched, so create a new one */
733 variant = variants->variant_count++;
Icecream95d8a35012020-01-12 14:19:25 +1300734
735 if (variants->variant_count > variants->variant_space) {
736 unsigned old_space = variants->variant_space;
737
738 variants->variant_space *= 2;
739 if (variants->variant_space == 0)
740 variants->variant_space = 1;
741
742 /* Arbitrary limit to stop runaway programs from
743 * creating an unbounded number of shader variants. */
744 assert(variants->variant_space < 1024);
745
746 unsigned msize = sizeof(struct panfrost_shader_state);
747 variants->variants = realloc(variants->variants,
748 variants->variant_space * msize);
749
750 memset(&variants->variants[old_space], 0,
751 (variants->variant_space - old_space) * msize);
752 }
Alyssa Rosenzweig1acffb52019-06-04 23:48:17 +0000753
Alyssa Rosenzweigbe030602019-06-24 11:01:05 -0700754 struct panfrost_shader_state *v =
Alyssa Rosenzweiga2d0ea92019-07-10 10:10:31 -0700755 &variants->variants[variant];
Alyssa Rosenzweig1acffb52019-06-04 23:48:17 +0000756
Alyssa Rosenzweigbe030602019-06-24 11:01:05 -0700757 if (type == PIPE_SHADER_FRAGMENT) {
Icecream9575018f62020-07-06 19:40:05 +1200758 struct pipe_framebuffer_state *fb = &ctx->pipe_framebuffer;
759 for (unsigned i = 0; i < fb->nr_cbufs; ++i) {
760 enum pipe_format fmt = PIPE_FORMAT_R8G8B8A8_UNORM;
761
762 if ((fb->nr_cbufs > i) && fb->cbufs[i])
763 fmt = fb->cbufs[i]->format;
764
Icecream95d16d1362020-07-07 15:06:08 +1200765 const struct util_format_description *desc =
766 util_format_description(fmt);
767
768 if (pan_format_class_load(desc, dev->quirks) == PAN_FORMAT_NATIVE)
769 fmt = PIPE_FORMAT_NONE;
770
Icecream9575018f62020-07-06 19:40:05 +1200771 v->rt_formats[i] = fmt;
772 }
773
Alyssa Rosenzweigb73b3392020-06-01 20:52:59 -0400774 /* Point sprites are TODO on Bifrost */
775 if (ctx->rasterizer && !(dev->quirks & IS_BIFROST)) {
Alyssa Rosenzweigbe030602019-06-24 11:01:05 -0700776 v->point_sprite_mask = ctx->rasterizer->base.sprite_coord_enable;
777 v->point_sprite_upper_left =
778 ctx->rasterizer->base.sprite_coord_mode ==
779 PIPE_SPRITE_COORD_UPPER_LEFT;
780 }
781 }
Alyssa Rosenzweig1acffb52019-06-04 23:48:17 +0000782 }
783
784 /* Select this variant */
785 variants->active_variant = variant;
786
787 struct panfrost_shader_state *shader_state = &variants->variants[variant];
Alyssa Rosenzweig9ab8d312019-06-14 10:12:38 -0700788 assert(panfrost_variant_matches(ctx, shader_state, type));
Alyssa Rosenzweig1acffb52019-06-04 23:48:17 +0000789
790 /* We finally have a variant, so compile it */
791
792 if (!shader_state->compiled) {
Alyssa Rosenzweig5b0a1a42019-08-07 10:26:12 -0700793 uint64_t outputs_written = 0;
794
Boris Brezillonb02f97c2020-03-05 16:20:18 +0100795 panfrost_shader_compile(ctx, variants->base.type,
796 variants->base.type == PIPE_SHADER_IR_NIR ?
797 variants->base.ir.nir :
798 variants->base.tokens,
799 tgsi_processor_to_shader_stage(type),
800 shader_state,
Alyssa Rosenzweig5b0a1a42019-08-07 10:26:12 -0700801 &outputs_written);
Alyssa Rosenzweig1acffb52019-06-04 23:48:17 +0000802
803 shader_state->compiled = true;
Alyssa Rosenzweige7a05a62019-08-07 10:33:15 -0700804
805 /* Fixup the stream out information, since what Gallium returns
806 * normally is mildly insane */
807
808 shader_state->stream_output = variants->base.stream_output;
809 shader_state->so_mask =
810 update_so_info(&shader_state->stream_output, outputs_written);
Alyssa Rosenzweig1acffb52019-06-04 23:48:17 +0000811 }
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000812}
813
Alyssa Rosenzweig271726e2019-12-13 15:13:02 -0500814static void *
815panfrost_create_vs_state(struct pipe_context *pctx, const struct pipe_shader_state *hwcso)
816{
817 return panfrost_create_shader_state(pctx, hwcso, PIPE_SHADER_VERTEX);
818}
819
820static void *
821panfrost_create_fs_state(struct pipe_context *pctx, const struct pipe_shader_state *hwcso)
822{
823 return panfrost_create_shader_state(pctx, hwcso, PIPE_SHADER_FRAGMENT);
824}
825
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000826static void
Alyssa Rosenzweig1acffb52019-06-04 23:48:17 +0000827panfrost_bind_vs_state(struct pipe_context *pctx, void *hwcso)
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000828{
Alyssa Rosenzweig1acffb52019-06-04 23:48:17 +0000829 panfrost_bind_shader_state(pctx, hwcso, PIPE_SHADER_VERTEX);
830}
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000831
Alyssa Rosenzweig1acffb52019-06-04 23:48:17 +0000832static void
833panfrost_bind_fs_state(struct pipe_context *pctx, void *hwcso)
834{
835 panfrost_bind_shader_state(pctx, hwcso, PIPE_SHADER_FRAGMENT);
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000836}
837
838static void
839panfrost_set_vertex_buffers(
840 struct pipe_context *pctx,
841 unsigned start_slot,
842 unsigned num_buffers,
843 const struct pipe_vertex_buffer *buffers)
844{
845 struct panfrost_context *ctx = pan_context(pctx);
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000846
Alyssa Rosenzweige008d4f2019-04-14 22:42:44 +0000847 util_set_vertex_buffers_mask(ctx->vertex_buffers, &ctx->vb_mask, buffers, start_slot, num_buffers);
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000848}
849
850static void
851panfrost_set_constant_buffer(
852 struct pipe_context *pctx,
853 enum pipe_shader_type shader, uint index,
854 const struct pipe_constant_buffer *buf)
855{
856 struct panfrost_context *ctx = pan_context(pctx);
857 struct panfrost_constant_buffer *pbuf = &ctx->constant_buffer[shader];
858
Alyssa Rosenzweigca2caf02019-06-20 16:07:57 -0700859 util_copy_constant_buffer(&pbuf->cb[index], buf);
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000860
Alyssa Rosenzweigca2caf02019-06-20 16:07:57 -0700861 unsigned mask = (1 << index);
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000862
Alyssa Rosenzweigca2caf02019-06-20 16:07:57 -0700863 if (unlikely(!buf)) {
864 pbuf->enabled_mask &= ~mask;
865 pbuf->dirty_mask &= ~mask;
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000866 return;
867 }
868
Alyssa Rosenzweigca2caf02019-06-20 16:07:57 -0700869 pbuf->enabled_mask |= mask;
870 pbuf->dirty_mask |= mask;
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000871}
872
873static void
874panfrost_set_stencil_ref(
875 struct pipe_context *pctx,
876 const struct pipe_stencil_ref *ref)
877{
878 struct panfrost_context *ctx = pan_context(pctx);
879 ctx->stencil_ref = *ref;
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000880}
881
Icecream953baf10a2020-04-30 15:21:17 +1200882void
883panfrost_create_sampler_view_bo(struct panfrost_sampler_view *so,
884 struct pipe_context *pctx,
885 struct pipe_resource *texture)
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000886{
Alyssa Rosenzweigca8c6252020-03-23 18:44:21 -0400887 struct panfrost_device *device = pan_device(pctx->screen);
Icecream953baf10a2020-04-30 15:21:17 +1200888 struct panfrost_resource *prsrc = (struct panfrost_resource *)texture;
Alyssa Rosenzweigcce3d922020-07-09 16:34:00 -0400889 enum pipe_format format = so->base.format;
Alyssa Rosenzweig81b10532019-05-14 23:18:18 +0000890 assert(prsrc->bo);
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000891
Alyssa Rosenzweigcce3d922020-07-09 16:34:00 -0400892 /* Format to access the stencil portion of a Z32_S8 texture */
Icecream95c1d3d392020-07-13 22:45:51 +1200893 if (format == PIPE_FORMAT_X32_S8X24_UINT) {
Alyssa Rosenzweigcce3d922020-07-09 16:34:00 -0400894 assert(prsrc->separate_stencil);
895 texture = &prsrc->separate_stencil->base;
896 prsrc = (struct panfrost_resource *)texture;
897 format = texture->format;
898 }
899
Icecream95c1d3d392020-07-13 22:45:51 +1200900 const struct util_format_description *desc = util_format_description(format);
901
902 bool fake_rgtc = !panfrost_supports_compressed_format(device, MALI_BC4_UNORM);
903
904 if (desc->layout == UTIL_FORMAT_LAYOUT_RGTC && fake_rgtc) {
905 if (desc->is_snorm)
906 format = PIPE_FORMAT_R8G8B8A8_SNORM;
907 else
908 format = PIPE_FORMAT_R8G8B8A8_UNORM;
909 desc = util_format_description(format);
910 }
911
Icecream9565b3b082020-06-20 19:09:03 +1200912 so->texture_bo = prsrc->bo->gpu;
Alyssa Rosenzweig965537df2020-07-22 10:23:50 -0400913 so->modifier = prsrc->modifier;
Icecream95fafc3052020-06-12 20:14:02 +1200914
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000915 unsigned char user_swizzle[4] = {
Icecream953baf10a2020-04-30 15:21:17 +1200916 so->base.swizzle_r,
917 so->base.swizzle_g,
918 so->base.swizzle_b,
919 so->base.swizzle_a
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000920 };
921
Alyssa Rosenzweig67a34ac2019-06-14 16:26:49 -0700922 /* In the hardware, array_size refers specifically to array textures,
923 * whereas in Gallium, it also covers cubemaps */
924
925 unsigned array_size = texture->array_size;
Alyssa Rosenzweig0b5bc6e2020-06-30 15:41:24 -0400926 unsigned depth = texture->depth0;
Alyssa Rosenzweig67a34ac2019-06-14 16:26:49 -0700927
Icecream953baf10a2020-04-30 15:21:17 +1200928 if (so->base.target == PIPE_TEXTURE_CUBE) {
Alyssa Rosenzweig67a34ac2019-06-14 16:26:49 -0700929 /* TODO: Cubemap arrays */
930 assert(array_size == 6);
Alyssa Rosenzweigeb3c0972019-06-21 17:27:05 -0700931 array_size /= 6;
Alyssa Rosenzweig67a34ac2019-06-14 16:26:49 -0700932 }
933
Alyssa Rosenzweig0b5bc6e2020-06-30 15:41:24 -0400934 /* MSAA only supported for 2D textures (and 2D texture arrays via an
935 * extension currently unimplemented */
936
937 if (so->base.target == PIPE_TEXTURE_2D) {
938 assert(depth == 1);
939 depth = texture->nr_samples;
940 } else {
941 /* MSAA only supported for 2D textures */
942 assert(texture->nr_samples <= 1);
943 }
944
Alyssa Rosenzweigf008a632020-08-11 17:27:36 -0400945 enum mali_texture_dimension type =
946 panfrost_translate_texture_dimension(so->base.target);
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000947
Tomeu Vizosoe41894b2020-04-17 14:23:49 +0200948 if (device->quirks & IS_BIFROST) {
Alyssa Rosenzweiga3d29362020-04-21 16:08:07 -0400949 unsigned char composed_swizzle[4];
950 util_format_compose_swizzles(desc->swizzle, user_swizzle, composed_swizzle);
951
952 unsigned size = panfrost_estimate_texture_payload_size(
Icecream953baf10a2020-04-30 15:21:17 +1200953 so->base.u.tex.first_level,
954 so->base.u.tex.last_level,
955 so->base.u.tex.first_layer,
956 so->base.u.tex.last_layer,
Alyssa Rosenzweig60888912020-07-15 11:39:08 -0400957 texture->nr_samples,
Alyssa Rosenzweig965537df2020-07-22 10:23:50 -0400958 type, prsrc->modifier);
Alyssa Rosenzweiga3d29362020-04-21 16:08:07 -0400959
Alyssa Rosenzweig1d88f072020-07-07 16:19:39 -0400960 so->bo = panfrost_bo_create(device, size, 0);
Alyssa Rosenzweiga3d29362020-04-21 16:08:07 -0400961
Tomeu Vizosoe41894b2020-04-17 14:23:49 +0200962 panfrost_new_texture_bifrost(
Alyssa Rosenzweigad0b32c2020-08-06 18:12:28 -0400963 &so->bifrost_descriptor,
Tomeu Vizosoe41894b2020-04-17 14:23:49 +0200964 texture->width0, texture->height0,
Alyssa Rosenzweig0b5bc6e2020-06-30 15:41:24 -0400965 depth, array_size,
Alyssa Rosenzweigcce3d922020-07-09 16:34:00 -0400966 format,
Alyssa Rosenzweig965537df2020-07-22 10:23:50 -0400967 type, prsrc->modifier,
Icecream953baf10a2020-04-30 15:21:17 +1200968 so->base.u.tex.first_level,
969 so->base.u.tex.last_level,
970 so->base.u.tex.first_layer,
971 so->base.u.tex.last_layer,
Alyssa Rosenzweig41c06de2020-06-30 16:43:32 -0400972 texture->nr_samples,
Tomeu Vizosoe41894b2020-04-17 14:23:49 +0200973 prsrc->cubemap_stride,
Alyssa Rosenzweiga3d29362020-04-21 16:08:07 -0400974 panfrost_translate_swizzle_4(composed_swizzle),
Tomeu Vizosoe41894b2020-04-17 14:23:49 +0200975 prsrc->bo->gpu,
Alyssa Rosenzweiga3d29362020-04-21 16:08:07 -0400976 prsrc->slices,
Alyssa Rosenzweig32b171d2020-06-15 09:20:39 -0400977 so->bo);
Tomeu Vizosoe41894b2020-04-17 14:23:49 +0200978 } else {
Alyssa Rosenzweiga3d29362020-04-21 16:08:07 -0400979 unsigned size = panfrost_estimate_texture_payload_size(
Icecream953baf10a2020-04-30 15:21:17 +1200980 so->base.u.tex.first_level,
981 so->base.u.tex.last_level,
982 so->base.u.tex.first_layer,
983 so->base.u.tex.last_layer,
Alyssa Rosenzweig60888912020-07-15 11:39:08 -0400984 texture->nr_samples,
Alyssa Rosenzweig965537df2020-07-22 10:23:50 -0400985 type, prsrc->modifier);
Alyssa Rosenzweigf008a632020-08-11 17:27:36 -0400986 size += MALI_MIDGARD_TEXTURE_LENGTH;
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000987
Alyssa Rosenzweig1d88f072020-07-07 16:19:39 -0400988 so->bo = panfrost_bo_create(device, size, 0);
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +0000989
Tomeu Vizosoe41894b2020-04-17 14:23:49 +0200990 panfrost_new_texture(
Alyssa Rosenzweig32b171d2020-06-15 09:20:39 -0400991 so->bo->cpu,
Tomeu Vizosoe41894b2020-04-17 14:23:49 +0200992 texture->width0, texture->height0,
Alyssa Rosenzweig0b5bc6e2020-06-30 15:41:24 -0400993 depth, array_size,
Alyssa Rosenzweigcce3d922020-07-09 16:34:00 -0400994 format,
Alyssa Rosenzweig965537df2020-07-22 10:23:50 -0400995 type, prsrc->modifier,
Icecream953baf10a2020-04-30 15:21:17 +1200996 so->base.u.tex.first_level,
997 so->base.u.tex.last_level,
998 so->base.u.tex.first_layer,
999 so->base.u.tex.last_layer,
Alyssa Rosenzweig41c06de2020-06-30 16:43:32 -04001000 texture->nr_samples,
Tomeu Vizosoe41894b2020-04-17 14:23:49 +02001001 prsrc->cubemap_stride,
1002 panfrost_translate_swizzle_4(user_swizzle),
1003 prsrc->bo->gpu,
1004 prsrc->slices);
1005 }
Icecream953baf10a2020-04-30 15:21:17 +12001006}
1007
1008static struct pipe_sampler_view *
1009panfrost_create_sampler_view(
1010 struct pipe_context *pctx,
1011 struct pipe_resource *texture,
1012 const struct pipe_sampler_view *template)
1013{
1014 struct panfrost_sampler_view *so = rzalloc(pctx, struct panfrost_sampler_view);
1015
1016 pipe_reference(NULL, &texture->reference);
1017
1018 so->base = *template;
1019 so->base.texture = texture;
1020 so->base.reference.count = 1;
1021 so->base.context = pctx;
1022
1023 panfrost_create_sampler_view_bo(so, pctx, texture);
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001024
1025 return (struct pipe_sampler_view *) so;
1026}
1027
1028static void
1029panfrost_set_sampler_views(
1030 struct pipe_context *pctx,
1031 enum pipe_shader_type shader,
1032 unsigned start_slot, unsigned num_views,
1033 struct pipe_sampler_view **views)
1034{
1035 struct panfrost_context *ctx = pan_context(pctx);
Tomeu Vizoso5dfe4122019-12-12 08:43:12 +01001036 unsigned new_nr = 0;
1037 unsigned i;
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001038
1039 assert(start_slot == 0);
1040
Tomeu Vizoso5dfe4122019-12-12 08:43:12 +01001041 for (i = 0; i < num_views; ++i) {
Alyssa Rosenzweig0219b992019-06-11 14:21:14 -07001042 if (views[i])
1043 new_nr = i + 1;
Tomeu Vizoso5dfe4122019-12-12 08:43:12 +01001044 pipe_sampler_view_reference((struct pipe_sampler_view **)&ctx->sampler_views[shader][i],
1045 views[i]);
Alyssa Rosenzweig0219b992019-06-11 14:21:14 -07001046 }
1047
Tomeu Vizoso5dfe4122019-12-12 08:43:12 +01001048 for (; i < ctx->sampler_view_count[shader]; i++) {
1049 pipe_sampler_view_reference((struct pipe_sampler_view **)&ctx->sampler_views[shader][i],
1050 NULL);
1051 }
Alyssa Rosenzweig0219b992019-06-11 14:21:14 -07001052 ctx->sampler_view_count[shader] = new_nr;
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001053}
1054
1055static void
1056panfrost_sampler_view_destroy(
1057 struct pipe_context *pctx,
Alyssa Rosenzweigb9295652020-02-18 14:20:16 -05001058 struct pipe_sampler_view *pview)
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001059{
Alyssa Rosenzweigb9295652020-02-18 14:20:16 -05001060 struct panfrost_sampler_view *view = (struct panfrost_sampler_view *) pview;
1061
1062 pipe_resource_reference(&pview->texture, NULL);
Alyssa Rosenzweig32b171d2020-06-15 09:20:39 -04001063 panfrost_bo_unreference(view->bo);
Tomeu Vizoso0fcf73b2019-06-18 14:24:57 +02001064 ralloc_free(view);
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001065}
1066
Alyssa Rosenzweig4e736b82019-08-01 10:31:35 -07001067static void
1068panfrost_set_shader_buffers(
1069 struct pipe_context *pctx,
1070 enum pipe_shader_type shader,
1071 unsigned start, unsigned count,
1072 const struct pipe_shader_buffer *buffers,
1073 unsigned writable_bitmask)
1074{
1075 struct panfrost_context *ctx = pan_context(pctx);
1076
1077 util_set_shader_buffers_mask(ctx->ssbo[shader], &ctx->ssbo_mask[shader],
1078 buffers, start, count);
1079}
1080
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001081static void
1082panfrost_set_framebuffer_state(struct pipe_context *pctx,
1083 const struct pipe_framebuffer_state *fb)
1084{
1085 struct panfrost_context *ctx = pan_context(pctx);
1086
Alyssa Rosenzweig629c7362019-07-18 11:05:01 -07001087 util_copy_framebuffer_state(&ctx->pipe_framebuffer, fb);
Boris Brezillon1ac33aa2019-09-15 20:33:13 +02001088 ctx->batch = NULL;
Alyssa Rosenzweigb9869e02020-07-10 12:12:14 -04001089
1090 /* We may need to generate a new variant if the fragment shader is
1091 * keyed to the framebuffer format (due to EXT_framebuffer_fetch) */
1092 struct panfrost_shader_variants *fs = ctx->shader[PIPE_SHADER_FRAGMENT];
1093
1094 if (fs && fs->variant_count && fs->variants[fs->active_variant].outputs_read)
1095 ctx->base.bind_fs_state(&ctx->base, fs);
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001096}
1097
Alyssa Rosenzweig6afd4ad2020-08-12 11:42:11 -04001098static inline unsigned
1099pan_pipe_to_stencil_op(enum pipe_stencil_op in)
1100{
1101 switch (in) {
1102 case PIPE_STENCIL_OP_KEEP: return MALI_STENCIL_OP_KEEP;
1103 case PIPE_STENCIL_OP_ZERO: return MALI_STENCIL_OP_ZERO;
1104 case PIPE_STENCIL_OP_REPLACE: return MALI_STENCIL_OP_REPLACE;
1105 case PIPE_STENCIL_OP_INCR: return MALI_STENCIL_OP_INCR_SAT;
1106 case PIPE_STENCIL_OP_DECR: return MALI_STENCIL_OP_DECR_SAT;
1107 case PIPE_STENCIL_OP_INCR_WRAP: return MALI_STENCIL_OP_INCR_WRAP;
1108 case PIPE_STENCIL_OP_DECR_WRAP: return MALI_STENCIL_OP_DECR_WRAP;
1109 case PIPE_STENCIL_OP_INVERT: return MALI_STENCIL_OP_INVERT;
1110 default: unreachable("Invalid stencil op");
1111 }
1112}
1113
1114static inline void
1115pan_pipe_to_stencil(const struct pipe_stencil_state *in, void *out)
1116{
1117 pan_pack(out, STENCIL, cfg) {
1118 cfg.mask = in->valuemask;
1119 cfg.compare_function = panfrost_translate_compare_func(in->func);
1120 cfg.stencil_fail = pan_pipe_to_stencil_op(in->fail_op);
1121 cfg.depth_fail = pan_pipe_to_stencil_op(in->zfail_op);
1122 cfg.depth_pass = pan_pipe_to_stencil_op(in->zpass_op);
1123 }
1124}
1125
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001126static void *
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001127panfrost_create_depth_stencil_state(struct pipe_context *pipe,
Alyssa Rosenzweig6afd4ad2020-08-12 11:42:11 -04001128 const struct pipe_depth_stencil_alpha_state *zsa)
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001129{
Alyssa Rosenzweig6afd4ad2020-08-12 11:42:11 -04001130 struct panfrost_zsa_state *so = CALLOC_STRUCT(panfrost_zsa_state);
1131 so->base = *zsa;
1132
1133 pan_pipe_to_stencil(&zsa->stencil[0], &so->stencil_front);
Alyssa Rosenzweig6afd4ad2020-08-12 11:42:11 -04001134 so->stencil_mask_front = zsa->stencil[0].writemask;
1135
Alyssa Rosenzweig1b377c22020-08-21 19:27:40 -04001136 if (zsa->stencil[1].enabled) {
1137 pan_pipe_to_stencil(&zsa->stencil[1], &so->stencil_back);
Alyssa Rosenzweig6afd4ad2020-08-12 11:42:11 -04001138 so->stencil_mask_back = zsa->stencil[1].writemask;
Alyssa Rosenzweig1b377c22020-08-21 19:27:40 -04001139 } else {
1140 so->stencil_back = so->stencil_front;
Alyssa Rosenzweig6afd4ad2020-08-12 11:42:11 -04001141 so->stencil_mask_back = so->stencil_mask_front;
Alyssa Rosenzweig1b377c22020-08-21 19:27:40 -04001142 }
Alyssa Rosenzweig6afd4ad2020-08-12 11:42:11 -04001143
1144 /* Alpha lowered by frontend */
1145 assert(!zsa->alpha.enabled);
1146
1147 /* TODO: Bounds test should be easy */
1148 assert(!zsa->depth.bounds_test);
1149
1150 return so;
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001151}
1152
1153static void
1154panfrost_bind_depth_stencil_state(struct pipe_context *pipe,
1155 void *cso)
1156{
1157 struct panfrost_context *ctx = pan_context(pipe);
Alyssa Rosenzweig7d328e72020-08-26 10:50:18 -04001158 ctx->depth_stencil = cso;
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001159}
1160
1161static void
1162panfrost_delete_depth_stencil_state(struct pipe_context *pipe, void *depth)
1163{
1164 free( depth );
1165}
1166
1167static void
1168panfrost_set_sample_mask(struct pipe_context *pipe,
1169 unsigned sample_mask)
1170{
Alyssa Rosenzweigf23cdd42020-07-02 10:07:08 -04001171 struct panfrost_context *ctx = pan_context(pipe);
1172 ctx->sample_mask = sample_mask;
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001173}
1174
1175static void
Alyssa Rosenzweig82256042020-07-15 11:38:39 -04001176panfrost_set_min_samples(struct pipe_context *pipe,
1177 unsigned min_samples)
1178{
1179 struct panfrost_context *ctx = pan_context(pipe);
1180 ctx->min_samples = min_samples;
1181}
1182
1183
1184static void
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001185panfrost_set_clip_state(struct pipe_context *pipe,
1186 const struct pipe_clip_state *clip)
1187{
1188 //struct panfrost_context *panfrost = pan_context(pipe);
1189}
1190
1191static void
1192panfrost_set_viewport_states(struct pipe_context *pipe,
1193 unsigned start_slot,
1194 unsigned num_viewports,
1195 const struct pipe_viewport_state *viewports)
1196{
1197 struct panfrost_context *ctx = pan_context(pipe);
1198
1199 assert(start_slot == 0);
1200 assert(num_viewports == 1);
1201
1202 ctx->pipe_viewport = *viewports;
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001203}
1204
1205static void
1206panfrost_set_scissor_states(struct pipe_context *pipe,
1207 unsigned start_slot,
1208 unsigned num_scissors,
1209 const struct pipe_scissor_state *scissors)
1210{
1211 struct panfrost_context *ctx = pan_context(pipe);
1212
1213 assert(start_slot == 0);
1214 assert(num_scissors == 1);
1215
1216 ctx->scissor = *scissors;
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001217}
1218
1219static void
1220panfrost_set_polygon_stipple(struct pipe_context *pipe,
1221 const struct pipe_poly_stipple *stipple)
1222{
1223 //struct panfrost_context *panfrost = pan_context(pipe);
1224}
1225
1226static void
1227panfrost_set_active_query_state(struct pipe_context *pipe,
Ilia Mirkin0e30c6b2019-07-04 11:41:41 -04001228 bool enable)
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001229{
Alyssa Rosenzweig7c224c12019-08-08 07:01:12 -07001230 struct panfrost_context *ctx = pan_context(pipe);
1231 ctx->active_queries = enable;
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001232}
1233
1234static void
1235panfrost_destroy(struct pipe_context *pipe)
1236{
1237 struct panfrost_context *panfrost = pan_context(pipe);
1238
1239 if (panfrost->blitter)
1240 util_blitter_destroy(panfrost->blitter);
Tomeu Vizoso756f7b92019-03-08 10:27:07 +01001241
Alyssa Rosenzweig7005c0d2019-06-23 11:05:10 -07001242 if (panfrost->blitter_wallpaper)
1243 util_blitter_destroy(panfrost->blitter_wallpaper);
1244
Boris Brezillonb60ed3c2019-11-06 15:52:45 +01001245 util_unreference_framebuffer_state(&panfrost->pipe_framebuffer);
Boris Brezillon8c8e4fd2019-11-06 15:49:43 +01001246 u_upload_destroy(pipe->stream_uploader);
Alyssa Rosenzweig8c144822020-08-21 13:42:55 -04001247 u_upload_destroy(panfrost->state_uploader);
Boris Brezillon8c8e4fd2019-11-06 15:49:43 +01001248
Tomeu Vizoso0fcf73b2019-06-18 14:24:57 +02001249 ralloc_free(pipe);
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001250}
1251
1252static struct pipe_query *
Alyssa Rosenzweiga2d0ea92019-07-10 10:10:31 -07001253panfrost_create_query(struct pipe_context *pipe,
1254 unsigned type,
1255 unsigned index)
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001256{
Tomeu Vizoso0fcf73b2019-06-18 14:24:57 +02001257 struct panfrost_query *q = rzalloc(pipe, struct panfrost_query);
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001258
1259 q->type = type;
1260 q->index = index;
1261
1262 return (struct pipe_query *) q;
1263}
1264
1265static void
1266panfrost_destroy_query(struct pipe_context *pipe, struct pipe_query *q)
1267{
Urja Rannikkodff99ce2019-10-22 12:05:07 +00001268 struct panfrost_query *query = (struct panfrost_query *) q;
1269
1270 if (query->bo) {
1271 panfrost_bo_unreference(query->bo);
1272 query->bo = NULL;
1273 }
1274
Tomeu Vizoso0fcf73b2019-06-18 14:24:57 +02001275 ralloc_free(q);
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001276}
1277
Ilia Mirkin0e30c6b2019-07-04 11:41:41 -04001278static bool
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001279panfrost_begin_query(struct pipe_context *pipe, struct pipe_query *q)
1280{
1281 struct panfrost_context *ctx = pan_context(pipe);
1282 struct panfrost_query *query = (struct panfrost_query *) q;
1283
1284 switch (query->type) {
Alyssa Rosenzweiga2d0ea92019-07-10 10:10:31 -07001285 case PIPE_QUERY_OCCLUSION_COUNTER:
1286 case PIPE_QUERY_OCCLUSION_PREDICATE:
Alyssa Rosenzweig7c224c12019-08-08 07:01:12 -07001287 case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE:
Urja Rannikkodff99ce2019-10-22 12:05:07 +00001288 /* Allocate a bo for the query results to be stored */
1289 if (!query->bo) {
Alyssa Rosenzweig1d88f072020-07-07 16:19:39 -04001290 query->bo = panfrost_bo_create(
Alyssa Rosenzweigca8c6252020-03-23 18:44:21 -04001291 pan_device(ctx->base.screen),
Urja Rannikkodff99ce2019-10-22 12:05:07 +00001292 sizeof(unsigned), 0);
1293 }
1294
1295 unsigned *result = (unsigned *)query->bo->cpu;
1296 *result = 0; /* Default to 0 if nothing at all drawn. */
Alyssa Rosenzweiga2d0ea92019-07-10 10:10:31 -07001297 ctx->occlusion_query = query;
Alyssa Rosenzweiga2d0ea92019-07-10 10:10:31 -07001298 break;
Alyssa Rosenzweig7c224c12019-08-08 07:01:12 -07001299
1300 /* Geometry statistics are computed in the driver. XXX: geom/tess
1301 * shaders.. */
1302
1303 case PIPE_QUERY_PRIMITIVES_GENERATED:
1304 query->start = ctx->prims_generated;
1305 break;
1306 case PIPE_QUERY_PRIMITIVES_EMITTED:
1307 query->start = ctx->tf_prims_generated;
1308 break;
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001309
Alyssa Rosenzweiga2d0ea92019-07-10 10:10:31 -07001310 default:
Alyssa Rosenzweiged1910d2020-07-07 16:15:45 -04001311 /* TODO: timestamp queries, etc? */
Alyssa Rosenzweiga2d0ea92019-07-10 10:10:31 -07001312 break;
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001313 }
1314
1315 return true;
1316}
1317
1318static bool
1319panfrost_end_query(struct pipe_context *pipe, struct pipe_query *q)
1320{
1321 struct panfrost_context *ctx = pan_context(pipe);
Alyssa Rosenzweig7c224c12019-08-08 07:01:12 -07001322 struct panfrost_query *query = (struct panfrost_query *) q;
1323
1324 switch (query->type) {
1325 case PIPE_QUERY_OCCLUSION_COUNTER:
1326 case PIPE_QUERY_OCCLUSION_PREDICATE:
1327 case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE:
1328 ctx->occlusion_query = NULL;
1329 break;
1330 case PIPE_QUERY_PRIMITIVES_GENERATED:
1331 query->end = ctx->prims_generated;
1332 break;
1333 case PIPE_QUERY_PRIMITIVES_EMITTED:
1334 query->end = ctx->tf_prims_generated;
1335 break;
1336 }
1337
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001338 return true;
1339}
1340
Ilia Mirkin0e30c6b2019-07-04 11:41:41 -04001341static bool
Alyssa Rosenzweiga2d0ea92019-07-10 10:10:31 -07001342panfrost_get_query_result(struct pipe_context *pipe,
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001343 struct pipe_query *q,
Ilia Mirkin0e30c6b2019-07-04 11:41:41 -04001344 bool wait,
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001345 union pipe_query_result *vresult)
1346{
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001347 struct panfrost_query *query = (struct panfrost_query *) q;
Boris Brezillona45984b2019-09-15 19:15:16 +02001348 struct panfrost_context *ctx = pan_context(pipe);
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001349
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001350
1351 switch (query->type) {
Alyssa Rosenzweiga2d0ea92019-07-10 10:10:31 -07001352 case PIPE_QUERY_OCCLUSION_COUNTER:
1353 case PIPE_QUERY_OCCLUSION_PREDICATE:
Alyssa Rosenzweig7c224c12019-08-08 07:01:12 -07001354 case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE:
Icecream950ef168d2020-07-18 11:39:45 +12001355 panfrost_flush_batches_accessing_bo(ctx, query->bo, false);
Icecream95858cc132020-07-18 11:36:36 +12001356 panfrost_bo_wait(query->bo, INT64_MAX, false);
Alyssa Rosenzweig7c224c12019-08-08 07:01:12 -07001357
Alyssa Rosenzweiga2d0ea92019-07-10 10:10:31 -07001358 /* Read back the query results */
Urja Rannikkodff99ce2019-10-22 12:05:07 +00001359 unsigned *result = (unsigned *) query->bo->cpu;
Alyssa Rosenzweiga2d0ea92019-07-10 10:10:31 -07001360 unsigned passed = *result;
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001361
Alyssa Rosenzweiga2d0ea92019-07-10 10:10:31 -07001362 if (query->type == PIPE_QUERY_OCCLUSION_COUNTER) {
1363 vresult->u64 = passed;
1364 } else {
1365 vresult->b = !!passed;
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001366 }
Alyssa Rosenzweiga2d0ea92019-07-10 10:10:31 -07001367
1368 break;
Alyssa Rosenzweig7c224c12019-08-08 07:01:12 -07001369
1370 case PIPE_QUERY_PRIMITIVES_GENERATED:
1371 case PIPE_QUERY_PRIMITIVES_EMITTED:
Alyssa Rosenzweig64d6f562020-07-20 13:34:42 -04001372 panfrost_flush_all_batches(ctx, 0);
Alyssa Rosenzweig7c224c12019-08-08 07:01:12 -07001373 vresult->u64 = query->end - query->start;
1374 break;
1375
Alyssa Rosenzweiga2d0ea92019-07-10 10:10:31 -07001376 default:
Alyssa Rosenzweiged1910d2020-07-07 16:15:45 -04001377 /* TODO: more queries */
Alyssa Rosenzweiga2d0ea92019-07-10 10:10:31 -07001378 break;
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001379 }
1380
1381 return true;
1382}
1383
Alyssa Rosenzweigf277bd32019-03-25 04:57:27 +00001384static struct pipe_stream_output_target *
1385panfrost_create_stream_output_target(struct pipe_context *pctx,
Alyssa Rosenzweiga2d0ea92019-07-10 10:10:31 -07001386 struct pipe_resource *prsc,
1387 unsigned buffer_offset,
1388 unsigned buffer_size)
Alyssa Rosenzweigf277bd32019-03-25 04:57:27 +00001389{
1390 struct pipe_stream_output_target *target;
1391
Tomeu Vizoso0fcf73b2019-06-18 14:24:57 +02001392 target = rzalloc(pctx, struct pipe_stream_output_target);
Alyssa Rosenzweigf277bd32019-03-25 04:57:27 +00001393
1394 if (!target)
1395 return NULL;
1396
1397 pipe_reference_init(&target->reference, 1);
1398 pipe_resource_reference(&target->buffer, prsc);
1399
1400 target->context = pctx;
1401 target->buffer_offset = buffer_offset;
1402 target->buffer_size = buffer_size;
1403
1404 return target;
1405}
1406
1407static void
1408panfrost_stream_output_target_destroy(struct pipe_context *pctx,
Alyssa Rosenzweiga2d0ea92019-07-10 10:10:31 -07001409 struct pipe_stream_output_target *target)
Alyssa Rosenzweigf277bd32019-03-25 04:57:27 +00001410{
1411 pipe_resource_reference(&target->buffer, NULL);
Tomeu Vizoso0fcf73b2019-06-18 14:24:57 +02001412 ralloc_free(target);
Alyssa Rosenzweigf277bd32019-03-25 04:57:27 +00001413}
1414
1415static void
1416panfrost_set_stream_output_targets(struct pipe_context *pctx,
Alyssa Rosenzweiga2d0ea92019-07-10 10:10:31 -07001417 unsigned num_targets,
1418 struct pipe_stream_output_target **targets,
1419 const unsigned *offsets)
Alyssa Rosenzweigf277bd32019-03-25 04:57:27 +00001420{
Alyssa Rosenzweig5ff79732019-08-06 16:43:28 -07001421 struct panfrost_context *ctx = pan_context(pctx);
1422 struct panfrost_streamout *so = &ctx->streamout;
1423
1424 assert(num_targets <= ARRAY_SIZE(so->targets));
1425
1426 for (unsigned i = 0; i < num_targets; i++) {
1427 if (offsets[i] != -1)
1428 so->offsets[i] = offsets[i];
1429
1430 pipe_so_target_reference(&so->targets[i], targets[i]);
1431 }
1432
1433 for (unsigned i = 0; i < so->num_targets; i++)
1434 pipe_so_target_reference(&so->targets[i], NULL);
1435
1436 so->num_targets = num_targets;
Alyssa Rosenzweigf277bd32019-03-25 04:57:27 +00001437}
1438
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001439struct pipe_context *
1440panfrost_create_context(struct pipe_screen *screen, void *priv, unsigned flags)
1441{
Tomeu Vizoso0fcf73b2019-06-18 14:24:57 +02001442 struct panfrost_context *ctx = rzalloc(screen, struct panfrost_context);
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001443 struct pipe_context *gallium = (struct pipe_context *) ctx;
Alyssa Rosenzweig229084f2020-05-29 14:02:43 -04001444 struct panfrost_device *dev = pan_device(screen);
Tomeu Vizoso756f7b92019-03-08 10:27:07 +01001445
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001446 gallium->screen = screen;
1447
1448 gallium->destroy = panfrost_destroy;
1449
1450 gallium->set_framebuffer_state = panfrost_set_framebuffer_state;
1451
1452 gallium->flush = panfrost_flush;
1453 gallium->clear = panfrost_clear;
1454 gallium->draw_vbo = panfrost_draw_vbo;
Icecream95391ad722020-07-10 11:19:07 +12001455 gallium->texture_barrier = panfrost_texture_barrier;
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001456
1457 gallium->set_vertex_buffers = panfrost_set_vertex_buffers;
1458 gallium->set_constant_buffer = panfrost_set_constant_buffer;
Alyssa Rosenzweig4e736b82019-08-01 10:31:35 -07001459 gallium->set_shader_buffers = panfrost_set_shader_buffers;
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001460
1461 gallium->set_stencil_ref = panfrost_set_stencil_ref;
1462
1463 gallium->create_sampler_view = panfrost_create_sampler_view;
1464 gallium->set_sampler_views = panfrost_set_sampler_views;
1465 gallium->sampler_view_destroy = panfrost_sampler_view_destroy;
1466
1467 gallium->create_rasterizer_state = panfrost_create_rasterizer_state;
1468 gallium->bind_rasterizer_state = panfrost_bind_rasterizer_state;
1469 gallium->delete_rasterizer_state = panfrost_generic_cso_delete;
1470
1471 gallium->create_vertex_elements_state = panfrost_create_vertex_elements_state;
1472 gallium->bind_vertex_elements_state = panfrost_bind_vertex_elements_state;
Alyssa Rosenzweig81d32622019-05-17 00:14:49 +00001473 gallium->delete_vertex_elements_state = panfrost_generic_cso_delete;
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001474
Alyssa Rosenzweig271726e2019-12-13 15:13:02 -05001475 gallium->create_fs_state = panfrost_create_fs_state;
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001476 gallium->delete_fs_state = panfrost_delete_shader_state;
1477 gallium->bind_fs_state = panfrost_bind_fs_state;
1478
Alyssa Rosenzweig271726e2019-12-13 15:13:02 -05001479 gallium->create_vs_state = panfrost_create_vs_state;
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001480 gallium->delete_vs_state = panfrost_delete_shader_state;
1481 gallium->bind_vs_state = panfrost_bind_vs_state;
1482
1483 gallium->create_sampler_state = panfrost_create_sampler_state;
1484 gallium->delete_sampler_state = panfrost_generic_cso_delete;
1485 gallium->bind_sampler_states = panfrost_bind_sampler_states;
1486
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001487 gallium->create_depth_stencil_alpha_state = panfrost_create_depth_stencil_state;
1488 gallium->bind_depth_stencil_alpha_state = panfrost_bind_depth_stencil_state;
1489 gallium->delete_depth_stencil_alpha_state = panfrost_delete_depth_stencil_state;
1490
1491 gallium->set_sample_mask = panfrost_set_sample_mask;
Alyssa Rosenzweig82256042020-07-15 11:38:39 -04001492 gallium->set_min_samples = panfrost_set_min_samples;
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001493
1494 gallium->set_clip_state = panfrost_set_clip_state;
1495 gallium->set_viewport_states = panfrost_set_viewport_states;
1496 gallium->set_scissor_states = panfrost_set_scissor_states;
1497 gallium->set_polygon_stipple = panfrost_set_polygon_stipple;
1498 gallium->set_active_query_state = panfrost_set_active_query_state;
1499
1500 gallium->create_query = panfrost_create_query;
1501 gallium->destroy_query = panfrost_destroy_query;
1502 gallium->begin_query = panfrost_begin_query;
1503 gallium->end_query = panfrost_end_query;
1504 gallium->get_query_result = panfrost_get_query_result;
1505
Alyssa Rosenzweigf277bd32019-03-25 04:57:27 +00001506 gallium->create_stream_output_target = panfrost_create_stream_output_target;
1507 gallium->stream_output_target_destroy = panfrost_stream_output_target_destroy;
1508 gallium->set_stream_output_targets = panfrost_set_stream_output_targets;
1509
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001510 panfrost_resource_context_init(gallium);
Alyssa Rosenzweig46396af2019-07-05 15:40:08 -07001511 panfrost_blend_context_init(gallium);
Alyssa Rosenzweiga8fc40a2019-07-23 08:28:23 -07001512 panfrost_compute_context_init(gallium);
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001513
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001514 gallium->stream_uploader = u_upload_create_default(gallium);
1515 gallium->const_uploader = gallium->stream_uploader;
Alyssa Rosenzweig8c144822020-08-21 13:42:55 -04001516
1517 ctx->state_uploader = u_upload_create(gallium, 4096,
1518 PIPE_BIND_CONSTANT_BUFFER, PIPE_USAGE_DYNAMIC, 0);
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001519
Alyssa Rosenzweig229084f2020-05-29 14:02:43 -04001520 /* All of our GPUs support ES mode. Midgard supports additionally
1521 * QUADS/QUAD_STRIPS/POLYGON. Bifrost supports just QUADS. */
1522
1523 ctx->draw_modes = (1 << (PIPE_PRIM_QUADS + 1)) - 1;
1524
1525 if (!(dev->quirks & IS_BIFROST)) {
1526 ctx->draw_modes |= (1 << PIPE_PRIM_QUAD_STRIP);
1527 ctx->draw_modes |= (1 << PIPE_PRIM_POLYGON);
1528 }
Alyssa Rosenzweig85e2bb52019-02-08 02:28:12 +00001529
1530 ctx->primconvert = util_primconvert_create(gallium, ctx->draw_modes);
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001531
1532 ctx->blitter = util_blitter_create(gallium);
Alyssa Rosenzweig7005c0d2019-06-23 11:05:10 -07001533 ctx->blitter_wallpaper = util_blitter_create(gallium);
1534
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001535 assert(ctx->blitter);
Alyssa Rosenzweig7005c0d2019-06-23 11:05:10 -07001536 assert(ctx->blitter_wallpaper);
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001537
1538 /* Prepare for render! */
1539
Boris Brezillon2c526992019-09-05 21:41:26 +02001540 panfrost_batch_init(ctx);
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001541
Alyssa Rosenzweig293f2512020-07-09 13:42:25 -04001542 if (!(dev->quirks & IS_BIFROST)) {
1543 for (unsigned c = 0; c < PIPE_MAX_COLOR_BUFS; ++c)
1544 ctx->blit_blend.rt[c].shaders = _mesa_hash_table_u64_create(ctx);
1545 }
1546
Alyssa Rosenzweigf23cdd42020-07-02 10:07:08 -04001547 /* By default mask everything on */
1548 ctx->sample_mask = ~0;
Alyssa Rosenzweig4b21c8b2020-08-14 18:22:36 -04001549 ctx->active_queries = true;
Alyssa Rosenzweigf23cdd42020-07-02 10:07:08 -04001550
Alyssa Rosenzweig7da251f2019-02-05 04:32:27 +00001551 return gallium;
1552}