Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1 | /* |
| 2 | * © Copyright 2018 Alyssa Rosenzweig |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice (including the next |
| 12 | * paragraph) shall be included in all copies or substantial portions of the |
| 13 | * Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 20 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 21 | * SOFTWARE. |
| 22 | * |
| 23 | */ |
| 24 | |
| 25 | #include <sys/poll.h> |
| 26 | #include <errno.h> |
| 27 | |
| 28 | #include "pan_context.h" |
| 29 | #include "pan_swizzle.h" |
| 30 | #include "pan_format.h" |
| 31 | |
| 32 | #include "util/macros.h" |
| 33 | #include "util/u_format.h" |
| 34 | #include "util/u_inlines.h" |
| 35 | #include "util/u_upload_mgr.h" |
| 36 | #include "util/u_memory.h" |
Alyssa Rosenzweig | 89b02bf | 2019-04-13 00:10:20 +0000 | [diff] [blame] | 37 | #include "util/u_vbuf.h" |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 38 | #include "util/half_float.h" |
Alyssa Rosenzweig | e008d4f | 2019-04-14 22:42:44 +0000 | [diff] [blame] | 39 | #include "util/u_helpers.h" |
| 40 | #include "util/u_format.h" |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 41 | #include "indices/u_primconvert.h" |
| 42 | #include "tgsi/tgsi_parse.h" |
Alyssa Rosenzweig | 31f5a43 | 2019-05-02 02:27:04 +0000 | [diff] [blame] | 43 | #include "util/u_math.h" |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 44 | |
| 45 | #include "pan_screen.h" |
| 46 | #include "pan_blending.h" |
| 47 | #include "pan_blend_shaders.h" |
Tomeu Vizoso | 97f2d04 | 2019-03-08 15:24:57 +0100 | [diff] [blame] | 48 | #include "pan_util.h" |
Alyssa Rosenzweig | b660953 | 2019-06-13 15:15:53 -0700 | [diff] [blame] | 49 | #include "pan_tiler.h" |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 50 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 51 | static int performance_counter_number = 0; |
Alyssa Rosenzweig | 4c82abb | 2019-02-25 03:31:29 +0000 | [diff] [blame] | 52 | extern const char *pan_counters_base; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 53 | |
| 54 | /* Do not actually send anything to the GPU; merely generate the cmdstream as fast as possible. Disables framebuffer writes */ |
| 55 | //#define DRY_RUN |
| 56 | |
Alyssa Rosenzweig | f8a4090 | 2019-06-04 23:47:35 +0000 | [diff] [blame] | 57 | static enum mali_job_type |
| 58 | panfrost_job_type_for_pipe(enum pipe_shader_type type) |
| 59 | { |
| 60 | switch (type) { |
| 61 | case PIPE_SHADER_VERTEX: |
| 62 | return JOB_TYPE_VERTEX; |
| 63 | |
| 64 | case PIPE_SHADER_FRAGMENT: |
| 65 | /* Note: JOB_TYPE_FRAGMENT is different. |
| 66 | * JOB_TYPE_FRAGMENT actually executes the |
| 67 | * fragment shader, but JOB_TYPE_TILER is how you |
| 68 | * specify it*/ |
| 69 | return JOB_TYPE_TILER; |
| 70 | |
| 71 | case PIPE_SHADER_GEOMETRY: |
| 72 | return JOB_TYPE_GEOMETRY; |
| 73 | |
| 74 | case PIPE_SHADER_COMPUTE: |
| 75 | return JOB_TYPE_COMPUTE; |
| 76 | |
| 77 | default: |
| 78 | unreachable("Unsupported shader stage"); |
| 79 | } |
| 80 | } |
| 81 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 82 | static void |
| 83 | panfrost_enable_checksum(struct panfrost_context *ctx, struct panfrost_resource *rsrc) |
| 84 | { |
| 85 | struct pipe_context *gallium = (struct pipe_context *) ctx; |
| 86 | struct panfrost_screen *screen = pan_screen(gallium->screen); |
| 87 | int tile_w = (rsrc->base.width0 + (MALI_TILE_LENGTH - 1)) >> MALI_TILE_SHIFT; |
| 88 | int tile_h = (rsrc->base.height0 + (MALI_TILE_LENGTH - 1)) >> MALI_TILE_SHIFT; |
| 89 | |
| 90 | /* 8 byte checksum per tile */ |
| 91 | rsrc->bo->checksum_stride = tile_w * 8; |
| 92 | int pages = (((rsrc->bo->checksum_stride * tile_h) + 4095) / 4096); |
| 93 | screen->driver->allocate_slab(screen, &rsrc->bo->checksum_slab, pages, false, 0, 0, 0); |
| 94 | |
| 95 | rsrc->bo->has_checksum = true; |
| 96 | } |
| 97 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 98 | /* Framebuffer descriptor */ |
| 99 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 100 | static void |
| 101 | panfrost_set_framebuffer_resolution(struct mali_single_framebuffer *fb, int w, int h) |
| 102 | { |
| 103 | fb->width = MALI_POSITIVE(w); |
| 104 | fb->height = MALI_POSITIVE(h); |
| 105 | |
| 106 | /* No idea why this is needed, but it's how resolution_check is |
| 107 | * calculated. It's not clear to us yet why the hardware wants this. |
| 108 | * The formula itself was discovered mostly by manual bruteforce and |
| 109 | * aggressive algebraic simplification. */ |
| 110 | |
Alyssa Rosenzweig | 85e745f | 2019-06-12 09:33:06 -0700 | [diff] [blame] | 111 | fb->tiler_resolution_check = ((w + h) / 3) << 4; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 112 | } |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 113 | |
Alyssa Rosenzweig | 9dd84db | 2019-03-12 03:32:17 +0000 | [diff] [blame] | 114 | struct mali_single_framebuffer |
Alyssa Rosenzweig | f9ecca2 | 2019-06-14 11:23:24 -0700 | [diff] [blame] | 115 | panfrost_emit_sfbd(struct panfrost_context *ctx, unsigned vertex_count) |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 116 | { |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 117 | struct mali_single_framebuffer framebuffer = { |
| 118 | .unknown2 = 0x1f, |
| 119 | .format = 0x30000000, |
| 120 | .clear_flags = 0x1000, |
| 121 | .unknown_address_0 = ctx->scratchpad.gpu, |
Alyssa Rosenzweig | 6434f5c | 2019-06-14 07:24:26 -0700 | [diff] [blame] | 122 | .tiler_polygon_list = ctx->tiler_polygon_list.gpu, |
| 123 | .tiler_polygon_list_body = ctx->tiler_polygon_list.gpu + 40960, |
Alyssa Rosenzweig | 7f26bb3 | 2019-06-13 10:25:32 -0700 | [diff] [blame] | 124 | .tiler_hierarchy_mask = 0xF0, |
| 125 | .tiler_flags = 0x0, |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 126 | .tiler_heap_free = ctx->tiler_heap.gpu, |
| 127 | .tiler_heap_end = ctx->tiler_heap.gpu + ctx->tiler_heap.size, |
| 128 | }; |
| 129 | |
| 130 | panfrost_set_framebuffer_resolution(&framebuffer, ctx->pipe_framebuffer.width, ctx->pipe_framebuffer.height); |
Alyssa Rosenzweig | 97aa054 | 2019-02-10 20:06:21 +0000 | [diff] [blame] | 131 | |
| 132 | return framebuffer; |
| 133 | } |
| 134 | |
Alyssa Rosenzweig | 9dd84db | 2019-03-12 03:32:17 +0000 | [diff] [blame] | 135 | struct bifrost_framebuffer |
Alyssa Rosenzweig | f9ecca2 | 2019-06-14 11:23:24 -0700 | [diff] [blame] | 136 | panfrost_emit_mfbd(struct panfrost_context *ctx, unsigned vertex_count) |
Alyssa Rosenzweig | 97aa054 | 2019-02-10 20:06:21 +0000 | [diff] [blame] | 137 | { |
Alyssa Rosenzweig | b660953 | 2019-06-13 15:15:53 -0700 | [diff] [blame] | 138 | unsigned width = ctx->pipe_framebuffer.width; |
| 139 | unsigned height = ctx->pipe_framebuffer.height; |
| 140 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 141 | struct bifrost_framebuffer framebuffer = { |
Alyssa Rosenzweig | b660953 | 2019-06-13 15:15:53 -0700 | [diff] [blame] | 142 | .width1 = MALI_POSITIVE(width), |
| 143 | .height1 = MALI_POSITIVE(height), |
| 144 | .width2 = MALI_POSITIVE(width), |
| 145 | .height2 = MALI_POSITIVE(height), |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 146 | |
| 147 | .unk1 = 0x1080, |
| 148 | |
| 149 | /* TODO: MRT */ |
| 150 | .rt_count_1 = MALI_POSITIVE(1), |
| 151 | .rt_count_2 = 4, |
| 152 | |
| 153 | .unknown2 = 0x1f, |
| 154 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 155 | .scratchpad = ctx->scratchpad.gpu, |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 156 | }; |
| 157 | |
Alyssa Rosenzweig | f9ecca2 | 2019-06-14 11:23:24 -0700 | [diff] [blame] | 158 | framebuffer.tiler_hierarchy_mask = |
| 159 | panfrost_choose_hierarchy_mask(width, height, vertex_count); |
| 160 | |
Alyssa Rosenzweig | b660953 | 2019-06-13 15:15:53 -0700 | [diff] [blame] | 161 | /* Compute the polygon header size and use that to offset the body */ |
| 162 | |
| 163 | unsigned header_size = panfrost_tiler_header_size( |
| 164 | width, height, framebuffer.tiler_hierarchy_mask); |
| 165 | |
Alyssa Rosenzweig | 953cc4b | 2019-06-14 07:08:51 -0700 | [diff] [blame] | 166 | unsigned body_size = panfrost_tiler_body_size( |
| 167 | width, height, framebuffer.tiler_hierarchy_mask); |
| 168 | |
Alyssa Rosenzweig | e2c2ccd | 2019-06-14 07:21:05 -0700 | [diff] [blame] | 169 | /* Sanity check */ |
| 170 | |
| 171 | unsigned total_size = header_size + body_size; |
Alyssa Rosenzweig | f9ecca2 | 2019-06-14 11:23:24 -0700 | [diff] [blame] | 172 | |
| 173 | if (framebuffer.tiler_hierarchy_mask) { |
| 174 | assert(ctx->tiler_polygon_list.size >= total_size); |
| 175 | |
| 176 | /* Specify allocated tiler structures */ |
| 177 | framebuffer.tiler_polygon_list = ctx->tiler_polygon_list.gpu; |
| 178 | |
| 179 | /* Allow the entire tiler heap */ |
| 180 | framebuffer.tiler_heap_start = ctx->tiler_heap.gpu; |
| 181 | framebuffer.tiler_heap_end = |
| 182 | ctx->tiler_heap.gpu + ctx->tiler_heap.size; |
| 183 | } else { |
| 184 | /* The tiler is disabled, so don't allow the tiler heap */ |
| 185 | framebuffer.tiler_heap_start = ctx->tiler_heap.gpu; |
| 186 | framebuffer.tiler_heap_end = framebuffer.tiler_heap_start; |
| 187 | |
| 188 | /* Use a dummy polygon list */ |
| 189 | framebuffer.tiler_polygon_list = ctx->tiler_dummy.gpu; |
| 190 | |
| 191 | /* Also, set a "tiler disabled?" flag? */ |
| 192 | framebuffer.tiler_hierarchy_mask |= 0x1000; |
| 193 | } |
Alyssa Rosenzweig | e2c2ccd | 2019-06-14 07:21:05 -0700 | [diff] [blame] | 194 | |
Alyssa Rosenzweig | b660953 | 2019-06-13 15:15:53 -0700 | [diff] [blame] | 195 | framebuffer.tiler_polygon_list_body = |
| 196 | framebuffer.tiler_polygon_list + header_size; |
| 197 | |
Alyssa Rosenzweig | 953cc4b | 2019-06-14 07:08:51 -0700 | [diff] [blame] | 198 | framebuffer.tiler_polygon_list_size = |
| 199 | header_size + body_size; |
| 200 | |
Alyssa Rosenzweig | f9ecca2 | 2019-06-14 11:23:24 -0700 | [diff] [blame] | 201 | |
| 202 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 203 | return framebuffer; |
| 204 | } |
| 205 | |
| 206 | /* Are we currently rendering to the screen (rather than an FBO)? */ |
| 207 | |
Alyssa Rosenzweig | 9dd84db | 2019-03-12 03:32:17 +0000 | [diff] [blame] | 208 | bool |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 209 | panfrost_is_scanout(struct panfrost_context *ctx) |
| 210 | { |
| 211 | /* If there is no color buffer, it's an FBO */ |
| 212 | if (!ctx->pipe_framebuffer.nr_cbufs) |
| 213 | return false; |
| 214 | |
| 215 | /* If we're too early that no framebuffer was sent, it's scanout */ |
| 216 | if (!ctx->pipe_framebuffer.cbufs[0]) |
| 217 | return true; |
| 218 | |
| 219 | return ctx->pipe_framebuffer.cbufs[0]->texture->bind & PIPE_BIND_DISPLAY_TARGET || |
| 220 | ctx->pipe_framebuffer.cbufs[0]->texture->bind & PIPE_BIND_SCANOUT || |
| 221 | ctx->pipe_framebuffer.cbufs[0]->texture->bind & PIPE_BIND_SHARED; |
| 222 | } |
| 223 | |
Alyssa Rosenzweig | 31f5a43 | 2019-05-02 02:27:04 +0000 | [diff] [blame] | 224 | static uint32_t |
| 225 | pan_pack_color(const union pipe_color_union *color, enum pipe_format format) |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 226 | { |
Alyssa Rosenzweig | 31f5a43 | 2019-05-02 02:27:04 +0000 | [diff] [blame] | 227 | /* Alpha magicked to 1.0 if there is no alpha */ |
| 228 | |
| 229 | bool has_alpha = util_format_has_alpha(format); |
| 230 | float clear_alpha = has_alpha ? color->f[3] : 1.0f; |
| 231 | |
| 232 | /* Packed color depends on the framebuffer format */ |
| 233 | |
| 234 | const struct util_format_description *desc = |
| 235 | util_format_description(format); |
| 236 | |
| 237 | if (util_format_is_rgba8_variant(desc)) { |
| 238 | return (float_to_ubyte(clear_alpha) << 24) | |
| 239 | (float_to_ubyte(color->f[2]) << 16) | |
| 240 | (float_to_ubyte(color->f[1]) << 8) | |
| 241 | (float_to_ubyte(color->f[0]) << 0); |
| 242 | } else if (format == PIPE_FORMAT_B5G6R5_UNORM) { |
| 243 | /* First, we convert the components to R5, G6, B5 separately */ |
| 244 | unsigned r5 = CLAMP(color->f[0], 0.0, 1.0) * 31.0; |
| 245 | unsigned g6 = CLAMP(color->f[1], 0.0, 1.0) * 63.0; |
| 246 | unsigned b5 = CLAMP(color->f[2], 0.0, 1.0) * 31.0; |
| 247 | |
| 248 | /* Then we pack into a sparse u32. TODO: Why these shifts? */ |
| 249 | return (b5 << 25) | (g6 << 14) | (r5 << 5); |
| 250 | } else { |
| 251 | /* Unknown format */ |
| 252 | assert(0); |
| 253 | } |
| 254 | |
| 255 | return 0; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 256 | } |
| 257 | |
| 258 | static void |
| 259 | panfrost_clear( |
| 260 | struct pipe_context *pipe, |
| 261 | unsigned buffers, |
| 262 | const union pipe_color_union *color, |
| 263 | double depth, unsigned stencil) |
| 264 | { |
| 265 | struct panfrost_context *ctx = pan_context(pipe); |
Alyssa Rosenzweig | 40ffee4 | 2019-02-26 23:51:34 +0000 | [diff] [blame] | 266 | struct panfrost_job *job = panfrost_get_job_for_fbo(ctx); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 267 | |
Alyssa Rosenzweig | 40ffee4 | 2019-02-26 23:51:34 +0000 | [diff] [blame] | 268 | if (buffers & PIPE_CLEAR_COLOR) { |
Alyssa Rosenzweig | 31f5a43 | 2019-05-02 02:27:04 +0000 | [diff] [blame] | 269 | enum pipe_format format = ctx->pipe_framebuffer.cbufs[0]->format; |
| 270 | job->clear_color = pan_pack_color(color, format); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 271 | } |
| 272 | |
Alyssa Rosenzweig | 40ffee4 | 2019-02-26 23:51:34 +0000 | [diff] [blame] | 273 | if (buffers & PIPE_CLEAR_DEPTH) { |
| 274 | job->clear_depth = depth; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 275 | } |
Alyssa Rosenzweig | 40ffee4 | 2019-02-26 23:51:34 +0000 | [diff] [blame] | 276 | |
| 277 | if (buffers & PIPE_CLEAR_STENCIL) { |
| 278 | job->clear_stencil = stencil; |
| 279 | } |
| 280 | |
| 281 | job->clear |= buffers; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 282 | } |
| 283 | |
Alyssa Rosenzweig | 97aa054 | 2019-02-10 20:06:21 +0000 | [diff] [blame] | 284 | static mali_ptr |
| 285 | panfrost_attach_vt_mfbd(struct panfrost_context *ctx) |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 286 | { |
Alyssa Rosenzweig | 8c88bd0 | 2019-06-11 14:56:30 -0700 | [diff] [blame] | 287 | return panfrost_upload_transient(ctx, &ctx->vt_framebuffer_mfbd, sizeof(ctx->vt_framebuffer_mfbd)) | MALI_MFBD; |
Alyssa Rosenzweig | 97aa054 | 2019-02-10 20:06:21 +0000 | [diff] [blame] | 288 | } |
| 289 | |
| 290 | static mali_ptr |
| 291 | panfrost_attach_vt_sfbd(struct panfrost_context *ctx) |
| 292 | { |
| 293 | return panfrost_upload_transient(ctx, &ctx->vt_framebuffer_sfbd, sizeof(ctx->vt_framebuffer_sfbd)) | MALI_SFBD; |
| 294 | } |
| 295 | |
| 296 | static void |
| 297 | panfrost_attach_vt_framebuffer(struct panfrost_context *ctx) |
| 298 | { |
Tomeu Vizoso | 756f7b9 | 2019-03-08 10:27:07 +0100 | [diff] [blame] | 299 | mali_ptr framebuffer = ctx->require_sfbd ? |
Alyssa Rosenzweig | 97aa054 | 2019-02-10 20:06:21 +0000 | [diff] [blame] | 300 | panfrost_attach_vt_sfbd(ctx) : |
| 301 | panfrost_attach_vt_mfbd(ctx); |
| 302 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 303 | ctx->payload_vertex.postfix.framebuffer = framebuffer; |
| 304 | ctx->payload_tiler.postfix.framebuffer = framebuffer; |
| 305 | } |
| 306 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 307 | /* Reset per-frame context, called on context initialisation as well as after |
| 308 | * flushing a frame */ |
| 309 | |
| 310 | static void |
| 311 | panfrost_invalidate_frame(struct panfrost_context *ctx) |
| 312 | { |
| 313 | unsigned transient_count = ctx->transient_pools[ctx->cmdstream_i].entry_index*ctx->transient_pools[0].entry_size + ctx->transient_pools[ctx->cmdstream_i].entry_offset; |
Tomeu Vizoso | 97f2d04 | 2019-03-08 15:24:57 +0100 | [diff] [blame] | 314 | DBG("Uploaded transient %d bytes\n", transient_count); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 315 | |
| 316 | /* Rotate cmdstream */ |
| 317 | if ((++ctx->cmdstream_i) == (sizeof(ctx->transient_pools) / sizeof(ctx->transient_pools[0]))) |
| 318 | ctx->cmdstream_i = 0; |
| 319 | |
Tomeu Vizoso | 756f7b9 | 2019-03-08 10:27:07 +0100 | [diff] [blame] | 320 | if (ctx->require_sfbd) |
Alyssa Rosenzweig | f9ecca2 | 2019-06-14 11:23:24 -0700 | [diff] [blame] | 321 | ctx->vt_framebuffer_sfbd = panfrost_emit_sfbd(ctx, ~0); |
Alyssa Rosenzweig | 97aa054 | 2019-02-10 20:06:21 +0000 | [diff] [blame] | 322 | else |
Alyssa Rosenzweig | f9ecca2 | 2019-06-14 11:23:24 -0700 | [diff] [blame] | 323 | ctx->vt_framebuffer_mfbd = panfrost_emit_mfbd(ctx, ~0); |
Alyssa Rosenzweig | 97aa054 | 2019-02-10 20:06:21 +0000 | [diff] [blame] | 324 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 325 | /* Reset varyings allocated */ |
| 326 | ctx->varying_height = 0; |
| 327 | |
| 328 | /* The transient cmdstream is dirty every frame; the only bits worth preserving |
| 329 | * (textures, shaders, etc) are in other buffers anyways */ |
| 330 | |
| 331 | ctx->transient_pools[ctx->cmdstream_i].entry_index = 0; |
| 332 | ctx->transient_pools[ctx->cmdstream_i].entry_offset = 0; |
| 333 | |
| 334 | /* Regenerate payloads */ |
| 335 | panfrost_attach_vt_framebuffer(ctx); |
| 336 | |
| 337 | if (ctx->rasterizer) |
| 338 | ctx->dirty |= PAN_DIRTY_RASTERIZER; |
| 339 | |
| 340 | /* XXX */ |
| 341 | ctx->dirty |= PAN_DIRTY_SAMPLERS | PAN_DIRTY_TEXTURES; |
Tomeu Vizoso | 0e1c5cc | 2019-05-29 11:25:20 +0200 | [diff] [blame] | 342 | |
| 343 | /* Reset job counters */ |
| 344 | ctx->draw_count = 0; |
| 345 | ctx->vertex_job_count = 0; |
| 346 | ctx->tiler_job_count = 0; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 347 | } |
| 348 | |
| 349 | /* In practice, every field of these payloads should be configurable |
| 350 | * arbitrarily, which means these functions are basically catch-all's for |
| 351 | * as-of-yet unwavering unknowns */ |
| 352 | |
| 353 | static void |
| 354 | panfrost_emit_vertex_payload(struct panfrost_context *ctx) |
| 355 | { |
| 356 | struct midgard_payload_vertex_tiler payload = { |
| 357 | .prefix = { |
| 358 | .workgroups_z_shift = 32, |
| 359 | .workgroups_x_shift_2 = 0x2, |
| 360 | .workgroups_x_shift_3 = 0x5, |
| 361 | }, |
Tomeu Vizoso | 756f7b9 | 2019-03-08 10:27:07 +0100 | [diff] [blame] | 362 | .gl_enables = 0x4 | (ctx->is_t6xx ? 0 : 0x2), |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 363 | }; |
| 364 | |
| 365 | memcpy(&ctx->payload_vertex, &payload, sizeof(payload)); |
| 366 | } |
| 367 | |
| 368 | static void |
| 369 | panfrost_emit_tiler_payload(struct panfrost_context *ctx) |
| 370 | { |
| 371 | struct midgard_payload_vertex_tiler payload = { |
| 372 | .prefix = { |
| 373 | .workgroups_z_shift = 32, |
| 374 | .workgroups_x_shift_2 = 0x2, |
| 375 | .workgroups_x_shift_3 = 0x6, |
| 376 | |
| 377 | .zero1 = 0xffff, /* Why is this only seen on test-quad-textured? */ |
| 378 | }, |
| 379 | }; |
| 380 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 381 | memcpy(&ctx->payload_tiler, &payload, sizeof(payload)); |
| 382 | } |
| 383 | |
| 384 | static unsigned |
| 385 | translate_tex_wrap(enum pipe_tex_wrap w) |
| 386 | { |
| 387 | switch (w) { |
| 388 | case PIPE_TEX_WRAP_REPEAT: |
| 389 | return MALI_WRAP_REPEAT; |
| 390 | |
| 391 | case PIPE_TEX_WRAP_CLAMP_TO_EDGE: |
| 392 | return MALI_WRAP_CLAMP_TO_EDGE; |
| 393 | |
| 394 | case PIPE_TEX_WRAP_CLAMP_TO_BORDER: |
| 395 | return MALI_WRAP_CLAMP_TO_BORDER; |
| 396 | |
| 397 | case PIPE_TEX_WRAP_MIRROR_REPEAT: |
| 398 | return MALI_WRAP_MIRRORED_REPEAT; |
| 399 | |
| 400 | default: |
Alyssa Rosenzweig | c65271c | 2019-05-16 23:42:33 +0000 | [diff] [blame] | 401 | unreachable("Invalid wrap"); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 402 | } |
| 403 | } |
| 404 | |
| 405 | static unsigned |
| 406 | translate_tex_filter(enum pipe_tex_filter f) |
| 407 | { |
| 408 | switch (f) { |
| 409 | case PIPE_TEX_FILTER_NEAREST: |
| 410 | return MALI_NEAREST; |
| 411 | |
| 412 | case PIPE_TEX_FILTER_LINEAR: |
| 413 | return MALI_LINEAR; |
| 414 | |
| 415 | default: |
Alyssa Rosenzweig | c65271c | 2019-05-16 23:42:33 +0000 | [diff] [blame] | 416 | unreachable("Invalid filter"); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 417 | } |
| 418 | } |
| 419 | |
| 420 | static unsigned |
| 421 | translate_mip_filter(enum pipe_tex_mipfilter f) |
| 422 | { |
| 423 | return (f == PIPE_TEX_MIPFILTER_LINEAR) ? MALI_MIP_LINEAR : 0; |
| 424 | } |
| 425 | |
| 426 | static unsigned |
| 427 | panfrost_translate_compare_func(enum pipe_compare_func in) |
| 428 | { |
| 429 | switch (in) { |
| 430 | case PIPE_FUNC_NEVER: |
| 431 | return MALI_FUNC_NEVER; |
| 432 | |
| 433 | case PIPE_FUNC_LESS: |
| 434 | return MALI_FUNC_LESS; |
| 435 | |
| 436 | case PIPE_FUNC_EQUAL: |
| 437 | return MALI_FUNC_EQUAL; |
| 438 | |
| 439 | case PIPE_FUNC_LEQUAL: |
| 440 | return MALI_FUNC_LEQUAL; |
| 441 | |
| 442 | case PIPE_FUNC_GREATER: |
| 443 | return MALI_FUNC_GREATER; |
| 444 | |
| 445 | case PIPE_FUNC_NOTEQUAL: |
| 446 | return MALI_FUNC_NOTEQUAL; |
| 447 | |
| 448 | case PIPE_FUNC_GEQUAL: |
| 449 | return MALI_FUNC_GEQUAL; |
| 450 | |
| 451 | case PIPE_FUNC_ALWAYS: |
| 452 | return MALI_FUNC_ALWAYS; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 453 | |
Alyssa Rosenzweig | c65271c | 2019-05-16 23:42:33 +0000 | [diff] [blame] | 454 | default: |
| 455 | unreachable("Invalid func"); |
| 456 | } |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 457 | } |
| 458 | |
| 459 | static unsigned |
| 460 | panfrost_translate_alt_compare_func(enum pipe_compare_func in) |
| 461 | { |
| 462 | switch (in) { |
| 463 | case PIPE_FUNC_NEVER: |
| 464 | return MALI_ALT_FUNC_NEVER; |
| 465 | |
| 466 | case PIPE_FUNC_LESS: |
| 467 | return MALI_ALT_FUNC_LESS; |
| 468 | |
| 469 | case PIPE_FUNC_EQUAL: |
| 470 | return MALI_ALT_FUNC_EQUAL; |
| 471 | |
| 472 | case PIPE_FUNC_LEQUAL: |
| 473 | return MALI_ALT_FUNC_LEQUAL; |
| 474 | |
| 475 | case PIPE_FUNC_GREATER: |
| 476 | return MALI_ALT_FUNC_GREATER; |
| 477 | |
| 478 | case PIPE_FUNC_NOTEQUAL: |
| 479 | return MALI_ALT_FUNC_NOTEQUAL; |
| 480 | |
| 481 | case PIPE_FUNC_GEQUAL: |
| 482 | return MALI_ALT_FUNC_GEQUAL; |
| 483 | |
| 484 | case PIPE_FUNC_ALWAYS: |
| 485 | return MALI_ALT_FUNC_ALWAYS; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 486 | |
Alyssa Rosenzweig | c65271c | 2019-05-16 23:42:33 +0000 | [diff] [blame] | 487 | default: |
| 488 | unreachable("Invalid alt func"); |
| 489 | } |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 490 | } |
| 491 | |
| 492 | static unsigned |
| 493 | panfrost_translate_stencil_op(enum pipe_stencil_op in) |
| 494 | { |
| 495 | switch (in) { |
| 496 | case PIPE_STENCIL_OP_KEEP: |
| 497 | return MALI_STENCIL_KEEP; |
| 498 | |
| 499 | case PIPE_STENCIL_OP_ZERO: |
| 500 | return MALI_STENCIL_ZERO; |
| 501 | |
| 502 | case PIPE_STENCIL_OP_REPLACE: |
| 503 | return MALI_STENCIL_REPLACE; |
| 504 | |
| 505 | case PIPE_STENCIL_OP_INCR: |
| 506 | return MALI_STENCIL_INCR; |
| 507 | |
| 508 | case PIPE_STENCIL_OP_DECR: |
| 509 | return MALI_STENCIL_DECR; |
| 510 | |
| 511 | case PIPE_STENCIL_OP_INCR_WRAP: |
| 512 | return MALI_STENCIL_INCR_WRAP; |
| 513 | |
| 514 | case PIPE_STENCIL_OP_DECR_WRAP: |
| 515 | return MALI_STENCIL_DECR_WRAP; |
| 516 | |
| 517 | case PIPE_STENCIL_OP_INVERT: |
| 518 | return MALI_STENCIL_INVERT; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 519 | |
Alyssa Rosenzweig | c65271c | 2019-05-16 23:42:33 +0000 | [diff] [blame] | 520 | default: |
| 521 | unreachable("Invalid stencil op"); |
| 522 | } |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 523 | } |
| 524 | |
| 525 | static void |
| 526 | panfrost_make_stencil_state(const struct pipe_stencil_state *in, struct mali_stencil_test *out) |
| 527 | { |
| 528 | out->ref = 0; /* Gallium gets it from elsewhere */ |
| 529 | |
| 530 | out->mask = in->valuemask; |
| 531 | out->func = panfrost_translate_compare_func(in->func); |
| 532 | out->sfail = panfrost_translate_stencil_op(in->fail_op); |
| 533 | out->dpfail = panfrost_translate_stencil_op(in->zfail_op); |
| 534 | out->dppass = panfrost_translate_stencil_op(in->zpass_op); |
| 535 | } |
| 536 | |
| 537 | static void |
| 538 | panfrost_default_shader_backend(struct panfrost_context *ctx) |
| 539 | { |
| 540 | struct mali_shader_meta shader = { |
| 541 | .alpha_coverage = ~MALI_ALPHA_COVERAGE(0.000000), |
| 542 | |
Alyssa Rosenzweig | 97aa054 | 2019-02-10 20:06:21 +0000 | [diff] [blame] | 543 | .unknown2_3 = MALI_DEPTH_FUNC(MALI_FUNC_ALWAYS) | 0x3010, |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 544 | .unknown2_4 = MALI_NO_MSAA | 0x4e0, |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 545 | }; |
| 546 | |
Tomeu Vizoso | 756f7b9 | 2019-03-08 10:27:07 +0100 | [diff] [blame] | 547 | if (ctx->is_t6xx) { |
Alyssa Rosenzweig | 97aa054 | 2019-02-10 20:06:21 +0000 | [diff] [blame] | 548 | shader.unknown2_4 |= 0x10; |
| 549 | } |
| 550 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 551 | struct pipe_stencil_state default_stencil = { |
| 552 | .enabled = 0, |
| 553 | .func = PIPE_FUNC_ALWAYS, |
| 554 | .fail_op = MALI_STENCIL_KEEP, |
| 555 | .zfail_op = MALI_STENCIL_KEEP, |
| 556 | .zpass_op = MALI_STENCIL_KEEP, |
| 557 | .writemask = 0xFF, |
| 558 | .valuemask = 0xFF |
| 559 | }; |
| 560 | |
| 561 | panfrost_make_stencil_state(&default_stencil, &shader.stencil_front); |
| 562 | shader.stencil_mask_front = default_stencil.writemask; |
| 563 | |
| 564 | panfrost_make_stencil_state(&default_stencil, &shader.stencil_back); |
| 565 | shader.stencil_mask_back = default_stencil.writemask; |
| 566 | |
| 567 | if (default_stencil.enabled) |
| 568 | shader.unknown2_4 |= MALI_STENCIL_TEST; |
| 569 | |
| 570 | memcpy(&ctx->fragment_shader_core, &shader, sizeof(shader)); |
| 571 | } |
| 572 | |
Tomeu Vizoso | 0e1c5cc | 2019-05-29 11:25:20 +0200 | [diff] [blame] | 573 | static void |
| 574 | panfrost_link_job_pair(struct mali_job_descriptor_header *first, mali_ptr next) |
| 575 | { |
| 576 | if (first->job_descriptor_size) |
| 577 | first->next_job_64 = (u64) (uintptr_t) next; |
| 578 | else |
| 579 | first->next_job_32 = (u32) (uintptr_t) next; |
| 580 | } |
| 581 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 582 | /* Generates a vertex/tiler job. This is, in some sense, the heart of the |
| 583 | * graphics command stream. It should be called once per draw, accordding to |
| 584 | * presentations. Set is_tiler for "tiler" jobs (fragment shader jobs, but in |
| 585 | * Mali parlance, "fragment" refers to framebuffer writeout). Clear it for |
| 586 | * vertex jobs. */ |
| 587 | |
| 588 | struct panfrost_transfer |
Tomeu Vizoso | 0e1c5cc | 2019-05-29 11:25:20 +0200 | [diff] [blame] | 589 | panfrost_vertex_tiler_job(struct panfrost_context *ctx, bool is_tiler) |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 590 | { |
Tomeu Vizoso | 0e1c5cc | 2019-05-29 11:25:20 +0200 | [diff] [blame] | 591 | /* Each draw call corresponds to two jobs, and the set-value job is first */ |
| 592 | int draw_job_index = 1 + (2 * ctx->draw_count) + 1; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 593 | |
| 594 | struct mali_job_descriptor_header job = { |
| 595 | .job_type = is_tiler ? JOB_TYPE_TILER : JOB_TYPE_VERTEX, |
| 596 | .job_index = draw_job_index + (is_tiler ? 1 : 0), |
| 597 | #ifdef __LP64__ |
| 598 | .job_descriptor_size = 1, |
| 599 | #endif |
| 600 | }; |
| 601 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 602 | struct midgard_payload_vertex_tiler *payload = is_tiler ? &ctx->payload_tiler : &ctx->payload_vertex; |
| 603 | |
| 604 | /* There's some padding hacks on 32-bit */ |
| 605 | |
| 606 | #ifdef __LP64__ |
| 607 | int offset = 0; |
| 608 | #else |
| 609 | int offset = 4; |
| 610 | #endif |
| 611 | struct panfrost_transfer transfer = panfrost_allocate_transient(ctx, sizeof(job) + sizeof(*payload)); |
Tomeu Vizoso | 0e1c5cc | 2019-05-29 11:25:20 +0200 | [diff] [blame] | 612 | |
| 613 | if (is_tiler) { |
| 614 | /* Tiler jobs depend on vertex jobs */ |
| 615 | |
| 616 | job.job_dependency_index_1 = draw_job_index; |
| 617 | |
| 618 | /* Tiler jobs also depend on the previous tiler job */ |
| 619 | |
| 620 | if (ctx->draw_count) { |
| 621 | job.job_dependency_index_2 = draw_job_index - 1; |
| 622 | /* Previous tiler job points to this tiler job */ |
| 623 | panfrost_link_job_pair(ctx->u_tiler_jobs[ctx->draw_count - 1], transfer.gpu); |
| 624 | } else { |
| 625 | /* The only vertex job so far points to first tiler job */ |
| 626 | panfrost_link_job_pair(ctx->u_vertex_jobs[0], transfer.gpu); |
| 627 | } |
| 628 | } else { |
| 629 | if (ctx->draw_count) { |
| 630 | /* Previous vertex job points to this vertex job */ |
| 631 | panfrost_link_job_pair(ctx->u_vertex_jobs[ctx->draw_count - 1], transfer.gpu); |
| 632 | |
| 633 | /* Last vertex job points to first tiler job */ |
| 634 | panfrost_link_job_pair(&job, ctx->tiler_jobs[0]); |
| 635 | } else { |
| 636 | /* Have the first vertex job depend on the set value job */ |
| 637 | job.job_dependency_index_1 = ctx->u_set_value_job->job_index; |
| 638 | panfrost_link_job_pair(ctx->u_set_value_job, transfer.gpu); |
| 639 | } |
| 640 | } |
| 641 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 642 | memcpy(transfer.cpu, &job, sizeof(job)); |
| 643 | memcpy(transfer.cpu + sizeof(job) - offset, payload, sizeof(*payload)); |
| 644 | return transfer; |
| 645 | } |
| 646 | |
| 647 | /* Generates a set value job. It's unclear what exactly this does, why it's |
| 648 | * necessary, and when to call it. */ |
| 649 | |
| 650 | static void |
| 651 | panfrost_set_value_job(struct panfrost_context *ctx) |
| 652 | { |
| 653 | struct mali_job_descriptor_header job = { |
| 654 | .job_type = JOB_TYPE_SET_VALUE, |
| 655 | .job_descriptor_size = 1, |
Tomeu Vizoso | 0e1c5cc | 2019-05-29 11:25:20 +0200 | [diff] [blame] | 656 | .job_index = 1, |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 657 | }; |
| 658 | |
| 659 | struct mali_payload_set_value payload = { |
Alyssa Rosenzweig | 6434f5c | 2019-06-14 07:24:26 -0700 | [diff] [blame] | 660 | .out = ctx->tiler_polygon_list.gpu, |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 661 | .unknown = 0x3, |
| 662 | }; |
| 663 | |
| 664 | struct panfrost_transfer transfer = panfrost_allocate_transient(ctx, sizeof(job) + sizeof(payload)); |
| 665 | memcpy(transfer.cpu, &job, sizeof(job)); |
| 666 | memcpy(transfer.cpu + sizeof(job), &payload, sizeof(payload)); |
| 667 | |
| 668 | ctx->u_set_value_job = (struct mali_job_descriptor_header *) transfer.cpu; |
| 669 | ctx->set_value_job = transfer.gpu; |
| 670 | } |
| 671 | |
Alyssa Rosenzweig | b98955e | 2019-03-15 23:25:55 +0000 | [diff] [blame] | 672 | static mali_ptr |
| 673 | panfrost_emit_varyings( |
| 674 | struct panfrost_context *ctx, |
| 675 | union mali_attr *slot, |
| 676 | unsigned stride, |
| 677 | unsigned count) |
| 678 | { |
| 679 | mali_ptr varying_address = ctx->varying_mem.gpu + ctx->varying_height; |
| 680 | |
| 681 | /* Fill out the descriptor */ |
| 682 | slot->elements = varying_address | MALI_ATTR_LINEAR; |
| 683 | slot->stride = stride; |
| 684 | slot->size = stride * count; |
| 685 | |
| 686 | ctx->varying_height += ALIGN(slot->size, 64); |
| 687 | assert(ctx->varying_height < ctx->varying_mem.size); |
| 688 | |
| 689 | return varying_address; |
| 690 | } |
| 691 | |
| 692 | static void |
| 693 | panfrost_emit_point_coord(union mali_attr *slot) |
| 694 | { |
| 695 | slot->elements = MALI_VARYING_POINT_COORD | MALI_ATTR_LINEAR; |
| 696 | slot->stride = slot->size = 0; |
| 697 | } |
| 698 | |
| 699 | static void |
| 700 | panfrost_emit_varying_descriptor( |
| 701 | struct panfrost_context *ctx, |
| 702 | unsigned invocation_count) |
| 703 | { |
| 704 | /* Load the shaders */ |
| 705 | |
| 706 | struct panfrost_shader_state *vs = &ctx->vs->variants[ctx->vs->active_variant]; |
| 707 | struct panfrost_shader_state *fs = &ctx->fs->variants[ctx->fs->active_variant]; |
Boris Brezillon | 749c544 | 2019-06-13 14:56:02 +0200 | [diff] [blame] | 708 | unsigned int num_gen_varyings = 0; |
Alyssa Rosenzweig | b98955e | 2019-03-15 23:25:55 +0000 | [diff] [blame] | 709 | |
| 710 | /* Allocate the varying descriptor */ |
| 711 | |
| 712 | size_t vs_size = sizeof(struct mali_attr_meta) * vs->tripipe->varying_count; |
| 713 | size_t fs_size = sizeof(struct mali_attr_meta) * fs->tripipe->varying_count; |
| 714 | |
| 715 | struct panfrost_transfer trans = panfrost_allocate_transient(ctx, |
| 716 | vs_size + fs_size); |
| 717 | |
Boris Brezillon | 749c544 | 2019-06-13 14:56:02 +0200 | [diff] [blame] | 718 | /* |
| 719 | * Assign ->src_offset now that we know about all the general purpose |
| 720 | * varyings that will be used by the fragment and vertex shaders. |
| 721 | */ |
| 722 | for (unsigned i = 0; i < vs->tripipe->varying_count; i++) { |
| 723 | /* |
| 724 | * General purpose varyings have ->index set to 0, skip other |
| 725 | * entries. |
| 726 | */ |
| 727 | if (vs->varyings[i].index) |
| 728 | continue; |
| 729 | |
| 730 | vs->varyings[i].src_offset = 16 * (num_gen_varyings++); |
| 731 | } |
| 732 | |
| 733 | for (unsigned i = 0; i < fs->tripipe->varying_count; i++) { |
| 734 | unsigned j; |
| 735 | |
| 736 | if (fs->varyings[i].index) |
| 737 | continue; |
| 738 | |
| 739 | /* |
| 740 | * Re-use the VS general purpose varying pos if it exists, |
| 741 | * create a new one otherwise. |
| 742 | */ |
| 743 | for (j = 0; j < vs->tripipe->varying_count; j++) { |
| 744 | if (fs->varyings_loc[i] == vs->varyings_loc[j]) |
| 745 | break; |
| 746 | } |
| 747 | |
| 748 | if (j < vs->tripipe->varying_count) |
| 749 | fs->varyings[i].src_offset = vs->varyings[j].src_offset; |
| 750 | else |
| 751 | fs->varyings[i].src_offset = 16 * (num_gen_varyings++); |
| 752 | } |
| 753 | |
Alyssa Rosenzweig | b98955e | 2019-03-15 23:25:55 +0000 | [diff] [blame] | 754 | memcpy(trans.cpu, vs->varyings, vs_size); |
| 755 | memcpy(trans.cpu + vs_size, fs->varyings, fs_size); |
| 756 | |
| 757 | ctx->payload_vertex.postfix.varying_meta = trans.gpu; |
| 758 | ctx->payload_tiler.postfix.varying_meta = trans.gpu + vs_size; |
| 759 | |
| 760 | /* Buffer indices must be in this order per our convention */ |
| 761 | union mali_attr varyings[PIPE_MAX_ATTRIBS]; |
| 762 | unsigned idx = 0; |
| 763 | |
Boris Brezillon | 749c544 | 2019-06-13 14:56:02 +0200 | [diff] [blame] | 764 | panfrost_emit_varyings(ctx, &varyings[idx++], num_gen_varyings * 16, |
| 765 | invocation_count); |
Alyssa Rosenzweig | b98955e | 2019-03-15 23:25:55 +0000 | [diff] [blame] | 766 | |
| 767 | /* fp32 vec4 gl_Position */ |
| 768 | ctx->payload_tiler.postfix.position_varying = |
| 769 | panfrost_emit_varyings(ctx, &varyings[idx++], |
| 770 | sizeof(float) * 4, invocation_count); |
| 771 | |
| 772 | |
| 773 | if (vs->writes_point_size || fs->reads_point_coord) { |
| 774 | /* fp16 vec1 gl_PointSize */ |
| 775 | ctx->payload_tiler.primitive_size.pointer = |
| 776 | panfrost_emit_varyings(ctx, &varyings[idx++], |
| 777 | 2, invocation_count); |
| 778 | } |
| 779 | |
| 780 | if (fs->reads_point_coord) { |
| 781 | /* Special descriptor */ |
| 782 | panfrost_emit_point_coord(&varyings[idx++]); |
| 783 | } |
| 784 | |
| 785 | mali_ptr varyings_p = panfrost_upload_transient(ctx, &varyings, idx * sizeof(union mali_attr)); |
| 786 | ctx->payload_vertex.postfix.varyings = varyings_p; |
| 787 | ctx->payload_tiler.postfix.varyings = varyings_p; |
| 788 | } |
| 789 | |
Alyssa Rosenzweig | 31d9caa | 2019-04-15 04:08:46 +0000 | [diff] [blame] | 790 | static mali_ptr |
| 791 | panfrost_vertex_buffer_address(struct panfrost_context *ctx, unsigned i) |
| 792 | { |
| 793 | struct pipe_vertex_buffer *buf = &ctx->vertex_buffers[i]; |
| 794 | struct panfrost_resource *rsrc = (struct panfrost_resource *) (buf->buffer.resource); |
| 795 | |
| 796 | return rsrc->bo->gpu + buf->buffer_offset; |
| 797 | } |
| 798 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 799 | /* Emits attributes and varying descriptors, which should be called every draw, |
| 800 | * excepting some obscure circumstances */ |
| 801 | |
| 802 | static void |
Alyssa Rosenzweig | e008d4f | 2019-04-14 22:42:44 +0000 | [diff] [blame] | 803 | panfrost_emit_vertex_data(struct panfrost_context *ctx, struct panfrost_job *job) |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 804 | { |
Alyssa Rosenzweig | e008d4f | 2019-04-14 22:42:44 +0000 | [diff] [blame] | 805 | /* Staged mali_attr, and index into them. i =/= k, depending on the |
| 806 | * vertex buffer mask */ |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 807 | union mali_attr attrs[PIPE_MAX_ATTRIBS]; |
Alyssa Rosenzweig | e008d4f | 2019-04-14 22:42:44 +0000 | [diff] [blame] | 808 | unsigned k = 0; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 809 | |
| 810 | unsigned invocation_count = MALI_NEGATIVE(ctx->payload_tiler.prefix.invocation_count); |
| 811 | |
Alyssa Rosenzweig | e008d4f | 2019-04-14 22:42:44 +0000 | [diff] [blame] | 812 | for (int i = 0; i < ARRAY_SIZE(ctx->vertex_buffers); ++i) { |
| 813 | if (!(ctx->vb_mask & (1 << i))) continue; |
| 814 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 815 | struct pipe_vertex_buffer *buf = &ctx->vertex_buffers[i]; |
| 816 | struct panfrost_resource *rsrc = (struct panfrost_resource *) (buf->buffer.resource); |
| 817 | |
Alyssa Rosenzweig | 31d9caa | 2019-04-15 04:08:46 +0000 | [diff] [blame] | 818 | if (!rsrc) continue; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 819 | |
Alyssa Rosenzweig | 31d9caa | 2019-04-15 04:08:46 +0000 | [diff] [blame] | 820 | /* Align to 64 bytes by masking off the lower bits. This |
| 821 | * will be adjusted back when we fixup the src_offset in |
| 822 | * mali_attr_meta */ |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 823 | |
Alyssa Rosenzweig | 31d9caa | 2019-04-15 04:08:46 +0000 | [diff] [blame] | 824 | mali_ptr addr = panfrost_vertex_buffer_address(ctx, i) & ~63; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 825 | |
| 826 | /* Offset vertex count by draw_start to make sure we upload enough */ |
Alyssa Rosenzweig | e008d4f | 2019-04-14 22:42:44 +0000 | [diff] [blame] | 827 | attrs[k].stride = buf->stride; |
Alyssa Rosenzweig | 31d9caa | 2019-04-15 04:08:46 +0000 | [diff] [blame] | 828 | attrs[k].size = rsrc->base.width0; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 829 | |
Alyssa Rosenzweig | 31d9caa | 2019-04-15 04:08:46 +0000 | [diff] [blame] | 830 | panfrost_job_add_bo(job, rsrc->bo); |
| 831 | attrs[k].elements = addr | MALI_ATTR_LINEAR; |
Alyssa Rosenzweig | e008d4f | 2019-04-14 22:42:44 +0000 | [diff] [blame] | 832 | |
| 833 | ++k; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 834 | } |
| 835 | |
Alyssa Rosenzweig | e008d4f | 2019-04-14 22:42:44 +0000 | [diff] [blame] | 836 | ctx->payload_vertex.postfix.attributes = panfrost_upload_transient(ctx, attrs, k * sizeof(union mali_attr)); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 837 | |
Alyssa Rosenzweig | b98955e | 2019-03-15 23:25:55 +0000 | [diff] [blame] | 838 | panfrost_emit_varying_descriptor(ctx, invocation_count); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 839 | } |
| 840 | |
Alyssa Rosenzweig | 89b02bf | 2019-04-13 00:10:20 +0000 | [diff] [blame] | 841 | static bool |
| 842 | panfrost_writes_point_size(struct panfrost_context *ctx) |
| 843 | { |
| 844 | assert(ctx->vs); |
| 845 | struct panfrost_shader_state *vs = &ctx->vs->variants[ctx->vs->active_variant]; |
| 846 | |
| 847 | return vs->writes_point_size && ctx->payload_tiler.prefix.draw_mode == MALI_POINTS; |
| 848 | } |
| 849 | |
Alyssa Rosenzweig | 31d9caa | 2019-04-15 04:08:46 +0000 | [diff] [blame] | 850 | /* Stage the attribute descriptors so we can adjust src_offset |
| 851 | * to let BOs align nicely */ |
| 852 | |
| 853 | static void |
| 854 | panfrost_stage_attributes(struct panfrost_context *ctx) |
| 855 | { |
| 856 | struct panfrost_vertex_state *so = ctx->vertex; |
| 857 | |
| 858 | size_t sz = sizeof(struct mali_attr_meta) * so->num_elements; |
| 859 | struct panfrost_transfer transfer = panfrost_allocate_transient(ctx, sz); |
| 860 | struct mali_attr_meta *target = (struct mali_attr_meta *) transfer.cpu; |
| 861 | |
| 862 | /* Copy as-is for the first pass */ |
| 863 | memcpy(target, so->hw, sz); |
| 864 | |
| 865 | /* Fixup offsets for the second pass. Recall that the hardware |
| 866 | * calculates attribute addresses as: |
| 867 | * |
| 868 | * addr = base + (stride * vtx) + src_offset; |
| 869 | * |
| 870 | * However, on Mali, base must be aligned to 64-bytes, so we |
| 871 | * instead let: |
| 872 | * |
| 873 | * base' = base & ~63 = base - (base & 63) |
| 874 | * |
| 875 | * To compensate when using base' (see emit_vertex_data), we have |
| 876 | * to adjust src_offset by the masked off piece: |
| 877 | * |
| 878 | * addr' = base' + (stride * vtx) + (src_offset + (base & 63)) |
| 879 | * = base - (base & 63) + (stride * vtx) + src_offset + (base & 63) |
| 880 | * = base + (stride * vtx) + src_offset |
| 881 | * = addr; |
| 882 | * |
| 883 | * QED. |
| 884 | */ |
| 885 | |
| 886 | for (unsigned i = 0; i < so->num_elements; ++i) { |
| 887 | unsigned vbi = so->pipe[i].vertex_buffer_index; |
| 888 | mali_ptr addr = panfrost_vertex_buffer_address(ctx, vbi); |
| 889 | |
| 890 | /* Adjust by the masked off bits of the offset */ |
| 891 | target[i].src_offset += (addr & 63); |
| 892 | } |
| 893 | |
| 894 | ctx->payload_vertex.postfix.attribute_meta = transfer.gpu; |
| 895 | } |
| 896 | |
Alyssa Rosenzweig | 416fc3b | 2019-06-07 14:25:28 -0700 | [diff] [blame] | 897 | static void |
| 898 | panfrost_upload_sampler_descriptors(struct panfrost_context *ctx) |
| 899 | { |
| 900 | size_t desc_size = sizeof(struct mali_sampler_descriptor); |
| 901 | |
| 902 | for (int t = 0; t <= PIPE_SHADER_FRAGMENT; ++t) { |
Alyssa Rosenzweig | 0219b99 | 2019-06-11 14:21:14 -0700 | [diff] [blame] | 903 | mali_ptr upload = 0; |
Alyssa Rosenzweig | 416fc3b | 2019-06-07 14:25:28 -0700 | [diff] [blame] | 904 | |
Alyssa Rosenzweig | 0219b99 | 2019-06-11 14:21:14 -0700 | [diff] [blame] | 905 | if (ctx->sampler_count[t] && ctx->sampler_view_count[t]) { |
| 906 | size_t transfer_size = desc_size * ctx->sampler_count[t]; |
Alyssa Rosenzweig | 416fc3b | 2019-06-07 14:25:28 -0700 | [diff] [blame] | 907 | |
Alyssa Rosenzweig | 0219b99 | 2019-06-11 14:21:14 -0700 | [diff] [blame] | 908 | struct panfrost_transfer transfer = |
| 909 | panfrost_allocate_transient(ctx, transfer_size); |
Alyssa Rosenzweig | 416fc3b | 2019-06-07 14:25:28 -0700 | [diff] [blame] | 910 | |
Alyssa Rosenzweig | 0219b99 | 2019-06-11 14:21:14 -0700 | [diff] [blame] | 911 | struct mali_sampler_descriptor *desc = |
| 912 | (struct mali_sampler_descriptor *) transfer.cpu; |
Alyssa Rosenzweig | 416fc3b | 2019-06-07 14:25:28 -0700 | [diff] [blame] | 913 | |
Alyssa Rosenzweig | 0219b99 | 2019-06-11 14:21:14 -0700 | [diff] [blame] | 914 | for (int i = 0; i < ctx->sampler_count[t]; ++i) |
| 915 | desc[i] = ctx->samplers[t][i]->hw; |
| 916 | |
| 917 | upload = transfer.gpu; |
| 918 | } |
Alyssa Rosenzweig | 416fc3b | 2019-06-07 14:25:28 -0700 | [diff] [blame] | 919 | |
| 920 | if (t == PIPE_SHADER_FRAGMENT) |
Alyssa Rosenzweig | 0219b99 | 2019-06-11 14:21:14 -0700 | [diff] [blame] | 921 | ctx->payload_tiler.postfix.sampler_descriptor = upload; |
Alyssa Rosenzweig | 416fc3b | 2019-06-07 14:25:28 -0700 | [diff] [blame] | 922 | else if (t == PIPE_SHADER_VERTEX) |
Alyssa Rosenzweig | 0219b99 | 2019-06-11 14:21:14 -0700 | [diff] [blame] | 923 | ctx->payload_vertex.postfix.sampler_descriptor = upload; |
Alyssa Rosenzweig | 416fc3b | 2019-06-07 14:25:28 -0700 | [diff] [blame] | 924 | else |
| 925 | assert(0); |
| 926 | } |
| 927 | } |
| 928 | |
| 929 | /* Computes the address to a texture at a particular slice */ |
| 930 | |
| 931 | static mali_ptr |
| 932 | panfrost_get_texture_address( |
| 933 | struct panfrost_resource *rsrc, |
| 934 | unsigned level, unsigned face) |
| 935 | { |
| 936 | unsigned level_offset = rsrc->bo->slices[level].offset; |
| 937 | unsigned face_offset = face * rsrc->bo->cubemap_stride; |
| 938 | |
| 939 | return rsrc->bo->gpu + level_offset + face_offset; |
| 940 | |
| 941 | } |
| 942 | |
| 943 | static mali_ptr |
| 944 | panfrost_upload_tex( |
| 945 | struct panfrost_context *ctx, |
| 946 | struct panfrost_sampler_view *view) |
| 947 | { |
| 948 | if (!view) |
| 949 | return (mali_ptr) NULL; |
| 950 | |
| 951 | struct pipe_resource *tex_rsrc = view->base.texture; |
| 952 | struct panfrost_resource *rsrc = (struct panfrost_resource *) tex_rsrc; |
| 953 | |
| 954 | /* Do we interleave an explicit stride with every element? */ |
| 955 | |
| 956 | bool has_manual_stride = |
| 957 | view->hw.format.usage2 & MALI_TEX_MANUAL_STRIDE; |
| 958 | |
| 959 | /* Inject the addresses in, interleaving mip levels, cube faces, and |
| 960 | * strides in that order */ |
| 961 | |
| 962 | unsigned idx = 0; |
| 963 | |
| 964 | for (unsigned l = 0; l <= tex_rsrc->last_level; ++l) { |
| 965 | for (unsigned f = 0; f < tex_rsrc->array_size; ++f) { |
| 966 | view->hw.payload[idx++] = |
| 967 | panfrost_get_texture_address(rsrc, l, f); |
| 968 | |
| 969 | if (has_manual_stride) { |
| 970 | view->hw.payload[idx++] = |
| 971 | rsrc->bo->slices[l].stride; |
| 972 | } |
| 973 | } |
| 974 | } |
| 975 | |
| 976 | return panfrost_upload_transient(ctx, &view->hw, |
| 977 | sizeof(struct mali_texture_descriptor)); |
| 978 | } |
| 979 | |
| 980 | static void |
| 981 | panfrost_upload_texture_descriptors(struct panfrost_context *ctx) |
| 982 | { |
| 983 | for (int t = 0; t <= PIPE_SHADER_FRAGMENT; ++t) { |
Alyssa Rosenzweig | 0219b99 | 2019-06-11 14:21:14 -0700 | [diff] [blame] | 984 | mali_ptr trampoline = 0; |
Alyssa Rosenzweig | 416fc3b | 2019-06-07 14:25:28 -0700 | [diff] [blame] | 985 | |
Alyssa Rosenzweig | 0219b99 | 2019-06-11 14:21:14 -0700 | [diff] [blame] | 986 | if (ctx->sampler_view_count[t]) { |
| 987 | uint64_t trampolines[PIPE_MAX_SHADER_SAMPLER_VIEWS]; |
Alyssa Rosenzweig | 416fc3b | 2019-06-07 14:25:28 -0700 | [diff] [blame] | 988 | |
Alyssa Rosenzweig | 0219b99 | 2019-06-11 14:21:14 -0700 | [diff] [blame] | 989 | for (int i = 0; i < ctx->sampler_view_count[t]; ++i) |
| 990 | trampolines[i] = |
| 991 | panfrost_upload_tex(ctx, ctx->sampler_views[t][i]); |
Alyssa Rosenzweig | 416fc3b | 2019-06-07 14:25:28 -0700 | [diff] [blame] | 992 | |
Alyssa Rosenzweig | 0219b99 | 2019-06-11 14:21:14 -0700 | [diff] [blame] | 993 | trampoline = panfrost_upload_transient(ctx, trampolines, sizeof(uint64_t) * ctx->sampler_view_count[t]); |
| 994 | } |
Alyssa Rosenzweig | 416fc3b | 2019-06-07 14:25:28 -0700 | [diff] [blame] | 995 | |
| 996 | if (t == PIPE_SHADER_FRAGMENT) |
| 997 | ctx->payload_tiler.postfix.texture_trampoline = trampoline; |
| 998 | else if (t == PIPE_SHADER_VERTEX) |
| 999 | ctx->payload_vertex.postfix.texture_trampoline = trampoline; |
| 1000 | else |
| 1001 | assert(0); |
| 1002 | } |
| 1003 | } |
| 1004 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1005 | /* Go through dirty flags and actualise them in the cmdstream. */ |
| 1006 | |
| 1007 | void |
| 1008 | panfrost_emit_for_draw(struct panfrost_context *ctx, bool with_vertex_data) |
| 1009 | { |
Alyssa Rosenzweig | 8c26890 | 2019-03-12 23:16:37 +0000 | [diff] [blame] | 1010 | struct panfrost_job *job = panfrost_get_job_for_fbo(ctx); |
| 1011 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1012 | if (with_vertex_data) { |
Alyssa Rosenzweig | e008d4f | 2019-04-14 22:42:44 +0000 | [diff] [blame] | 1013 | panfrost_emit_vertex_data(ctx, job); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1014 | } |
| 1015 | |
Alyssa Rosenzweig | 8c26890 | 2019-03-12 23:16:37 +0000 | [diff] [blame] | 1016 | bool msaa = ctx->rasterizer->base.multisample; |
| 1017 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1018 | if (ctx->dirty & PAN_DIRTY_RASTERIZER) { |
| 1019 | ctx->payload_tiler.gl_enables = ctx->rasterizer->tiler_gl_enables; |
Alyssa Rosenzweig | 8c26890 | 2019-03-12 23:16:37 +0000 | [diff] [blame] | 1020 | |
| 1021 | /* TODO: Sample size */ |
| 1022 | SET_BIT(ctx->fragment_shader_core.unknown2_3, MALI_HAS_MSAA, msaa); |
| 1023 | SET_BIT(ctx->fragment_shader_core.unknown2_4, MALI_NO_MSAA, !msaa); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1024 | } |
| 1025 | |
Alyssa Rosenzweig | 8c26890 | 2019-03-12 23:16:37 +0000 | [diff] [blame] | 1026 | /* Enable job requirements at draw-time */ |
| 1027 | |
| 1028 | if (msaa) |
| 1029 | job->requirements |= PAN_REQ_MSAA; |
| 1030 | |
| 1031 | if (ctx->depth_stencil->depth.writemask) |
| 1032 | job->requirements |= PAN_REQ_DEPTH_WRITE; |
| 1033 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1034 | if (ctx->occlusion_query) { |
Alyssa Rosenzweig | 2d22b53 | 2019-02-14 02:44:03 +0000 | [diff] [blame] | 1035 | ctx->payload_tiler.gl_enables |= MALI_OCCLUSION_QUERY | MALI_OCCLUSION_PRECISE; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1036 | ctx->payload_tiler.postfix.occlusion_counter = ctx->occlusion_query->transfer.gpu; |
| 1037 | } |
| 1038 | |
| 1039 | if (ctx->dirty & PAN_DIRTY_VS) { |
| 1040 | assert(ctx->vs); |
| 1041 | |
| 1042 | struct panfrost_shader_state *vs = &ctx->vs->variants[ctx->vs->active_variant]; |
| 1043 | |
| 1044 | /* Late shader descriptor assignments */ |
Alyssa Rosenzweig | b98955e | 2019-03-15 23:25:55 +0000 | [diff] [blame] | 1045 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1046 | vs->tripipe->texture_count = ctx->sampler_view_count[PIPE_SHADER_VERTEX]; |
| 1047 | vs->tripipe->sampler_count = ctx->sampler_count[PIPE_SHADER_VERTEX]; |
| 1048 | |
| 1049 | /* Who knows */ |
| 1050 | vs->tripipe->midgard1.unknown1 = 0x2201; |
| 1051 | |
| 1052 | ctx->payload_vertex.postfix._shader_upper = vs->tripipe_gpu >> 4; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1053 | } |
| 1054 | |
| 1055 | if (ctx->dirty & (PAN_DIRTY_RASTERIZER | PAN_DIRTY_VS)) { |
| 1056 | /* Check if we need to link the gl_PointSize varying */ |
Alyssa Rosenzweig | 89b02bf | 2019-04-13 00:10:20 +0000 | [diff] [blame] | 1057 | if (!panfrost_writes_point_size(ctx)) { |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1058 | /* If the size is constant, write it out. Otherwise, |
| 1059 | * don't touch primitive_size (since we would clobber |
| 1060 | * the pointer there) */ |
| 1061 | |
| 1062 | ctx->payload_tiler.primitive_size.constant = ctx->rasterizer->base.line_width; |
| 1063 | } |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1064 | } |
| 1065 | |
| 1066 | /* TODO: Maybe dirty track FS, maybe not. For now, it's transient. */ |
| 1067 | if (ctx->fs) |
| 1068 | ctx->dirty |= PAN_DIRTY_FS; |
| 1069 | |
| 1070 | if (ctx->dirty & PAN_DIRTY_FS) { |
| 1071 | assert(ctx->fs); |
| 1072 | struct panfrost_shader_state *variant = &ctx->fs->variants[ctx->fs->active_variant]; |
| 1073 | |
| 1074 | #define COPY(name) ctx->fragment_shader_core.name = variant->tripipe->name |
| 1075 | |
| 1076 | COPY(shader); |
| 1077 | COPY(attribute_count); |
| 1078 | COPY(varying_count); |
| 1079 | COPY(midgard1.uniform_count); |
| 1080 | COPY(midgard1.work_count); |
| 1081 | COPY(midgard1.unknown2); |
| 1082 | |
| 1083 | #undef COPY |
| 1084 | /* If there is a blend shader, work registers are shared */ |
| 1085 | |
| 1086 | if (ctx->blend->has_blend_shader) |
| 1087 | ctx->fragment_shader_core.midgard1.work_count = /*MAX2(ctx->fragment_shader_core.midgard1.work_count, ctx->blend->blend_work_count)*/16; |
| 1088 | |
| 1089 | /* Set late due to depending on render state */ |
| 1090 | /* The one at the end seems to mean "1 UBO" */ |
Alyssa Rosenzweig | 8d1adc0 | 2019-06-07 16:00:49 -0700 | [diff] [blame^] | 1091 | unsigned flags = MALI_EARLY_Z | 0x200 | 0x2000 | 0x1; |
| 1092 | |
| 1093 | /* Any time texturing is used, derivatives are implicitly |
| 1094 | * calculated, so we need to enable helper invocations */ |
| 1095 | |
| 1096 | if (ctx->sampler_view_count[PIPE_SHADER_FRAGMENT]) |
| 1097 | flags |= MALI_HELPER_INVOCATIONS; |
| 1098 | |
| 1099 | ctx->fragment_shader_core.midgard1.unknown1 = flags; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1100 | |
| 1101 | /* Assign texture/sample count right before upload */ |
| 1102 | ctx->fragment_shader_core.texture_count = ctx->sampler_view_count[PIPE_SHADER_FRAGMENT]; |
| 1103 | ctx->fragment_shader_core.sampler_count = ctx->sampler_count[PIPE_SHADER_FRAGMENT]; |
| 1104 | |
| 1105 | /* Assign the stencil refs late */ |
| 1106 | ctx->fragment_shader_core.stencil_front.ref = ctx->stencil_ref.ref_value[0]; |
| 1107 | ctx->fragment_shader_core.stencil_back.ref = ctx->stencil_ref.ref_value[1]; |
| 1108 | |
| 1109 | /* CAN_DISCARD should be set if the fragment shader possibly |
Alyssa Rosenzweig | 97aa054 | 2019-02-10 20:06:21 +0000 | [diff] [blame] | 1110 | * contains a 'discard' instruction. It is likely this is |
| 1111 | * related to optimizations related to forward-pixel kill, as |
| 1112 | * per "Mali Performance 3: Is EGL_BUFFER_PRESERVED a good |
| 1113 | * thing?" by Peter Harris |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1114 | */ |
| 1115 | |
| 1116 | if (variant->can_discard) { |
| 1117 | ctx->fragment_shader_core.unknown2_3 |= MALI_CAN_DISCARD; |
Alyssa Rosenzweig | 8d1adc0 | 2019-06-07 16:00:49 -0700 | [diff] [blame^] | 1118 | ctx->fragment_shader_core.midgard1.unknown1 &= ~MALI_EARLY_Z; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1119 | ctx->fragment_shader_core.midgard1.unknown1 |= 0x4000; |
| 1120 | ctx->fragment_shader_core.midgard1.unknown1 = 0x4200; |
| 1121 | } |
| 1122 | |
Alyssa Rosenzweig | 97aa054 | 2019-02-10 20:06:21 +0000 | [diff] [blame] | 1123 | /* Check if we're using the default blend descriptor (fast path) */ |
| 1124 | |
| 1125 | bool no_blending = |
| 1126 | !ctx->blend->has_blend_shader && |
| 1127 | (ctx->blend->equation.rgb_mode == 0x122) && |
| 1128 | (ctx->blend->equation.alpha_mode == 0x122) && |
| 1129 | (ctx->blend->equation.color_mask == 0xf); |
| 1130 | |
Alyssa Rosenzweig | 09c6692 | 2019-05-01 03:21:06 +0000 | [diff] [blame] | 1131 | /* Even on MFBD, the shader descriptor gets blend shaders. It's |
| 1132 | * *also* copied to the blend_meta appended (by convention), |
| 1133 | * but this is the field actually read by the hardware. (Or |
| 1134 | * maybe both are read...?) */ |
| 1135 | |
| 1136 | if (ctx->blend->has_blend_shader) { |
Alyssa Rosenzweig | 050b934 | 2019-05-04 21:57:01 +0000 | [diff] [blame] | 1137 | ctx->fragment_shader_core.blend.shader = ctx->blend->blend_shader; |
Alyssa Rosenzweig | 09c6692 | 2019-05-01 03:21:06 +0000 | [diff] [blame] | 1138 | } |
| 1139 | |
Tomeu Vizoso | 756f7b9 | 2019-03-08 10:27:07 +0100 | [diff] [blame] | 1140 | if (ctx->require_sfbd) { |
Alyssa Rosenzweig | 97aa054 | 2019-02-10 20:06:21 +0000 | [diff] [blame] | 1141 | /* When only a single render target platform is used, the blend |
| 1142 | * information is inside the shader meta itself. We |
| 1143 | * additionally need to signal CAN_DISCARD for nontrivial blend |
| 1144 | * modes (so we're able to read back the destination buffer) */ |
| 1145 | |
Alyssa Rosenzweig | 09c6692 | 2019-05-01 03:21:06 +0000 | [diff] [blame] | 1146 | if (!ctx->blend->has_blend_shader) { |
Alyssa Rosenzweig | 050b934 | 2019-05-04 21:57:01 +0000 | [diff] [blame] | 1147 | ctx->fragment_shader_core.blend.equation = ctx->blend->equation; |
Alyssa Rosenzweig | 3645c78 | 2019-05-18 20:36:00 +0000 | [diff] [blame] | 1148 | ctx->fragment_shader_core.blend.constant = ctx->blend->constant; |
Alyssa Rosenzweig | 97aa054 | 2019-02-10 20:06:21 +0000 | [diff] [blame] | 1149 | } |
| 1150 | |
| 1151 | if (!no_blending) { |
| 1152 | ctx->fragment_shader_core.unknown2_3 |= MALI_CAN_DISCARD; |
| 1153 | } |
| 1154 | } |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1155 | |
Alyssa Rosenzweig | 050b934 | 2019-05-04 21:57:01 +0000 | [diff] [blame] | 1156 | size_t size = sizeof(struct mali_shader_meta) + sizeof(struct midgard_blend_rt); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1157 | struct panfrost_transfer transfer = panfrost_allocate_transient(ctx, size); |
| 1158 | memcpy(transfer.cpu, &ctx->fragment_shader_core, sizeof(struct mali_shader_meta)); |
| 1159 | |
| 1160 | ctx->payload_tiler.postfix._shader_upper = (transfer.gpu) >> 4; |
| 1161 | |
Tomeu Vizoso | 756f7b9 | 2019-03-08 10:27:07 +0100 | [diff] [blame] | 1162 | if (!ctx->require_sfbd) { |
Alyssa Rosenzweig | 97aa054 | 2019-02-10 20:06:21 +0000 | [diff] [blame] | 1163 | /* Additional blend descriptor tacked on for jobs using MFBD */ |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1164 | |
Alyssa Rosenzweig | 050b934 | 2019-05-04 21:57:01 +0000 | [diff] [blame] | 1165 | unsigned blend_count = 0x200; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1166 | |
Alyssa Rosenzweig | 97aa054 | 2019-02-10 20:06:21 +0000 | [diff] [blame] | 1167 | if (ctx->blend->has_blend_shader) { |
| 1168 | /* For a blend shader, the bottom nibble corresponds to |
| 1169 | * the number of work registers used, which signals the |
| 1170 | * -existence- of a blend shader */ |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1171 | |
Alyssa Rosenzweig | 97aa054 | 2019-02-10 20:06:21 +0000 | [diff] [blame] | 1172 | assert(ctx->blend->blend_work_count >= 2); |
| 1173 | blend_count |= MIN2(ctx->blend->blend_work_count, 3); |
| 1174 | } else { |
| 1175 | /* Otherwise, the bottom bit simply specifies if |
| 1176 | * blending (anything other than REPLACE) is enabled */ |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1177 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1178 | |
Alyssa Rosenzweig | 97aa054 | 2019-02-10 20:06:21 +0000 | [diff] [blame] | 1179 | if (!no_blending) |
| 1180 | blend_count |= 0x1; |
| 1181 | } |
| 1182 | |
Alyssa Rosenzweig | 050b934 | 2019-05-04 21:57:01 +0000 | [diff] [blame] | 1183 | struct midgard_blend_rt rts[4]; |
Alyssa Rosenzweig | 97aa054 | 2019-02-10 20:06:21 +0000 | [diff] [blame] | 1184 | |
Alyssa Rosenzweig | 050b934 | 2019-05-04 21:57:01 +0000 | [diff] [blame] | 1185 | /* TODO: MRT */ |
Alyssa Rosenzweig | 97aa054 | 2019-02-10 20:06:21 +0000 | [diff] [blame] | 1186 | |
Alyssa Rosenzweig | 050b934 | 2019-05-04 21:57:01 +0000 | [diff] [blame] | 1187 | for (unsigned i = 0; i < 1; ++i) { |
| 1188 | rts[i].flags = blend_count; |
Alyssa Rosenzweig | 97aa054 | 2019-02-10 20:06:21 +0000 | [diff] [blame] | 1189 | |
Alyssa Rosenzweig | 3645c78 | 2019-05-18 20:36:00 +0000 | [diff] [blame] | 1190 | if (ctx->blend->has_blend_shader) { |
Alyssa Rosenzweig | 050b934 | 2019-05-04 21:57:01 +0000 | [diff] [blame] | 1191 | rts[i].blend.shader = ctx->blend->blend_shader; |
Alyssa Rosenzweig | 3645c78 | 2019-05-18 20:36:00 +0000 | [diff] [blame] | 1192 | } else { |
Alyssa Rosenzweig | 050b934 | 2019-05-04 21:57:01 +0000 | [diff] [blame] | 1193 | rts[i].blend.equation = ctx->blend->equation; |
Alyssa Rosenzweig | 3645c78 | 2019-05-18 20:36:00 +0000 | [diff] [blame] | 1194 | rts[i].blend.constant = ctx->blend->constant; |
| 1195 | } |
Alyssa Rosenzweig | 09c6692 | 2019-05-01 03:21:06 +0000 | [diff] [blame] | 1196 | } |
Alyssa Rosenzweig | 97aa054 | 2019-02-10 20:06:21 +0000 | [diff] [blame] | 1197 | |
Alyssa Rosenzweig | 050b934 | 2019-05-04 21:57:01 +0000 | [diff] [blame] | 1198 | memcpy(transfer.cpu + sizeof(struct mali_shader_meta), rts, sizeof(rts[0]) * 1); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1199 | } |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1200 | } |
| 1201 | |
Alyssa Rosenzweig | 31d9caa | 2019-04-15 04:08:46 +0000 | [diff] [blame] | 1202 | /* We stage to transient, so always dirty.. */ |
| 1203 | panfrost_stage_attributes(ctx); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1204 | |
Alyssa Rosenzweig | 416fc3b | 2019-06-07 14:25:28 -0700 | [diff] [blame] | 1205 | if (ctx->dirty & PAN_DIRTY_SAMPLERS) |
| 1206 | panfrost_upload_sampler_descriptors(ctx); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1207 | |
Alyssa Rosenzweig | 416fc3b | 2019-06-07 14:25:28 -0700 | [diff] [blame] | 1208 | if (ctx->dirty & PAN_DIRTY_TEXTURES) |
| 1209 | panfrost_upload_texture_descriptors(ctx); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1210 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1211 | const struct pipe_viewport_state *vp = &ctx->pipe_viewport; |
| 1212 | |
Alyssa Rosenzweig | 7e8de5a | 2019-04-03 01:48:09 +0000 | [diff] [blame] | 1213 | for (int i = 0; i <= PIPE_SHADER_FRAGMENT; ++i) { |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1214 | struct panfrost_constant_buffer *buf = &ctx->constant_buffer[i]; |
| 1215 | |
Alyssa Rosenzweig | 7e8de5a | 2019-04-03 01:48:09 +0000 | [diff] [blame] | 1216 | struct panfrost_shader_state *vs = &ctx->vs->variants[ctx->vs->active_variant]; |
| 1217 | struct panfrost_shader_state *fs = &ctx->fs->variants[ctx->fs->active_variant]; |
| 1218 | struct panfrost_shader_state *ss = (i == PIPE_SHADER_FRAGMENT) ? fs : vs; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1219 | |
Alyssa Rosenzweig | 7e8de5a | 2019-04-03 01:48:09 +0000 | [diff] [blame] | 1220 | /* Allocate room for the sysval and the uniforms */ |
| 1221 | size_t sys_size = sizeof(float) * 4 * ss->sysval_count; |
| 1222 | size_t size = sys_size + buf->size; |
| 1223 | struct panfrost_transfer transfer = panfrost_allocate_transient(ctx, size); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1224 | |
Alyssa Rosenzweig | 7e8de5a | 2019-04-03 01:48:09 +0000 | [diff] [blame] | 1225 | /* Upload sysvals requested by the shader */ |
| 1226 | float *uniforms = (float *) transfer.cpu; |
| 1227 | for (unsigned i = 0; i < ss->sysval_count; ++i) { |
| 1228 | int sysval = ss->sysval[i]; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1229 | |
Alyssa Rosenzweig | 7e8de5a | 2019-04-03 01:48:09 +0000 | [diff] [blame] | 1230 | if (sysval == PAN_SYSVAL_VIEWPORT_SCALE) { |
| 1231 | uniforms[4*i + 0] = vp->scale[0]; |
Alyssa Rosenzweig | 2adf35e | 2019-05-23 03:01:32 +0000 | [diff] [blame] | 1232 | uniforms[4*i + 1] = vp->scale[1]; |
Alyssa Rosenzweig | 7e8de5a | 2019-04-03 01:48:09 +0000 | [diff] [blame] | 1233 | uniforms[4*i + 2] = vp->scale[2]; |
| 1234 | } else if (sysval == PAN_SYSVAL_VIEWPORT_OFFSET) { |
| 1235 | uniforms[4*i + 0] = vp->translate[0]; |
Alyssa Rosenzweig | 2adf35e | 2019-05-23 03:01:32 +0000 | [diff] [blame] | 1236 | uniforms[4*i + 1] = vp->translate[1]; |
Alyssa Rosenzweig | 7e8de5a | 2019-04-03 01:48:09 +0000 | [diff] [blame] | 1237 | uniforms[4*i + 2] = vp->translate[2]; |
| 1238 | } else { |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1239 | assert(0); |
| 1240 | } |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1241 | } |
Alyssa Rosenzweig | 7e8de5a | 2019-04-03 01:48:09 +0000 | [diff] [blame] | 1242 | |
| 1243 | /* Upload uniforms */ |
| 1244 | memcpy(transfer.cpu + sys_size, buf->buffer, buf->size); |
| 1245 | |
| 1246 | int uniform_count = 0; |
| 1247 | |
| 1248 | struct mali_vertex_tiler_postfix *postfix; |
| 1249 | |
| 1250 | switch (i) { |
| 1251 | case PIPE_SHADER_VERTEX: |
| 1252 | uniform_count = ctx->vs->variants[ctx->vs->active_variant].uniform_count; |
| 1253 | postfix = &ctx->payload_vertex.postfix; |
| 1254 | break; |
| 1255 | |
| 1256 | case PIPE_SHADER_FRAGMENT: |
| 1257 | uniform_count = ctx->fs->variants[ctx->fs->active_variant].uniform_count; |
| 1258 | postfix = &ctx->payload_tiler.postfix; |
| 1259 | break; |
| 1260 | |
| 1261 | default: |
Alyssa Rosenzweig | c65271c | 2019-05-16 23:42:33 +0000 | [diff] [blame] | 1262 | unreachable("Invalid shader stage\n"); |
Alyssa Rosenzweig | 7e8de5a | 2019-04-03 01:48:09 +0000 | [diff] [blame] | 1263 | } |
| 1264 | |
| 1265 | /* Also attach the same buffer as a UBO for extended access */ |
| 1266 | |
| 1267 | struct mali_uniform_buffer_meta uniform_buffers[] = { |
| 1268 | { |
| 1269 | .size = MALI_POSITIVE((2 + uniform_count)), |
| 1270 | .ptr = transfer.gpu >> 2, |
| 1271 | }, |
| 1272 | }; |
| 1273 | |
| 1274 | mali_ptr ubufs = panfrost_upload_transient(ctx, uniform_buffers, sizeof(uniform_buffers)); |
| 1275 | postfix->uniforms = transfer.gpu; |
| 1276 | postfix->uniform_buffers = ubufs; |
| 1277 | |
| 1278 | buf->dirty = 0; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1279 | } |
| 1280 | |
Alyssa Rosenzweig | 2eb65c2 | 2019-03-13 01:50:40 +0000 | [diff] [blame] | 1281 | /* TODO: Upload the viewport somewhere more appropriate */ |
| 1282 | |
| 1283 | /* Clip bounds are encoded as floats. The viewport itself is encoded as |
| 1284 | * (somewhat) asymmetric ints. */ |
| 1285 | const struct pipe_scissor_state *ss = &ctx->scissor; |
| 1286 | |
| 1287 | struct mali_viewport view = { |
| 1288 | /* By default, do no viewport clipping, i.e. clip to (-inf, |
| 1289 | * inf) in each direction. Clipping to the viewport in theory |
| 1290 | * should work, but in practice causes issues when we're not |
| 1291 | * explicitly trying to scissor */ |
| 1292 | |
| 1293 | .clip_minx = -inff, |
| 1294 | .clip_miny = -inff, |
| 1295 | .clip_maxx = inff, |
| 1296 | .clip_maxy = inff, |
| 1297 | |
| 1298 | .clip_minz = 0.0, |
| 1299 | .clip_maxz = 1.0, |
| 1300 | }; |
| 1301 | |
Alyssa Rosenzweig | bd9446e | 2019-03-24 20:01:15 +0000 | [diff] [blame] | 1302 | /* Always scissor to the viewport by default. */ |
Alyssa Rosenzweig | fc3f57b | 2019-06-14 12:25:26 -0700 | [diff] [blame] | 1303 | int minx = (int) (vp->translate[0] - vp->scale[0]); |
| 1304 | int maxx = (int) (vp->translate[0] + vp->scale[0]); |
Alyssa Rosenzweig | bd9446e | 2019-03-24 20:01:15 +0000 | [diff] [blame] | 1305 | |
Alyssa Rosenzweig | 2adf35e | 2019-05-23 03:01:32 +0000 | [diff] [blame] | 1306 | int miny = (int) (vp->translate[1] - vp->scale[1]); |
| 1307 | int maxy = (int) (vp->translate[1] + vp->scale[1]); |
Alyssa Rosenzweig | bd9446e | 2019-03-24 20:01:15 +0000 | [diff] [blame] | 1308 | |
Alyssa Rosenzweig | fc3f57b | 2019-06-14 12:25:26 -0700 | [diff] [blame] | 1309 | /* Apply the scissor test */ |
Alyssa Rosenzweig | 2adf35e | 2019-05-23 03:01:32 +0000 | [diff] [blame] | 1310 | |
Alyssa Rosenzweig | fc3f57b | 2019-06-14 12:25:26 -0700 | [diff] [blame] | 1311 | if (ss && ctx->rasterizer && ctx->rasterizer->base.scissor) { |
| 1312 | minx = ss->minx; |
| 1313 | maxx = ss->maxx; |
Alyssa Rosenzweig | 2adf35e | 2019-05-23 03:01:32 +0000 | [diff] [blame] | 1314 | miny = ss->miny; |
| 1315 | maxy = ss->maxy; |
Alyssa Rosenzweig | bd9446e | 2019-03-24 20:01:15 +0000 | [diff] [blame] | 1316 | } |
Alyssa Rosenzweig | 2eb65c2 | 2019-03-13 01:50:40 +0000 | [diff] [blame] | 1317 | |
Alyssa Rosenzweig | 2adf35e | 2019-05-23 03:01:32 +0000 | [diff] [blame] | 1318 | /* Hardware needs the min/max to be strictly ordered, so flip if we |
Alyssa Rosenzweig | fc3f57b | 2019-06-14 12:25:26 -0700 | [diff] [blame] | 1319 | * need to. The viewport transformation in the vertex shader will |
| 1320 | * handle the negatives if we don't */ |
| 1321 | |
Alyssa Rosenzweig | 2adf35e | 2019-05-23 03:01:32 +0000 | [diff] [blame] | 1322 | if (miny > maxy) { |
| 1323 | int temp = miny; |
| 1324 | miny = maxy; |
| 1325 | maxy = temp; |
| 1326 | } |
| 1327 | |
Alyssa Rosenzweig | fc3f57b | 2019-06-14 12:25:26 -0700 | [diff] [blame] | 1328 | if (minx > maxx) { |
| 1329 | int temp = minx; |
| 1330 | minx = maxx; |
| 1331 | maxx = temp; |
| 1332 | } |
| 1333 | |
| 1334 | /* Clamp everything positive, just in case */ |
| 1335 | |
| 1336 | maxx = MAX2(0, maxx); |
| 1337 | maxy = MAX2(0, maxy); |
| 1338 | minx = MAX2(0, minx); |
| 1339 | miny = MAX2(0, miny); |
| 1340 | |
| 1341 | /* Clamp to the framebuffer size as a last check */ |
| 1342 | |
| 1343 | minx = MIN2(ctx->pipe_framebuffer.width, minx); |
| 1344 | maxx = MIN2(ctx->pipe_framebuffer.width, maxx); |
| 1345 | |
| 1346 | miny = MIN2(ctx->pipe_framebuffer.height, miny); |
| 1347 | maxy = MIN2(ctx->pipe_framebuffer.height, maxy); |
| 1348 | |
| 1349 | /* Upload */ |
| 1350 | |
| 1351 | view.viewport0[0] = minx; |
| 1352 | view.viewport1[0] = MALI_POSITIVE(maxx); |
| 1353 | |
Alyssa Rosenzweig | 2adf35e | 2019-05-23 03:01:32 +0000 | [diff] [blame] | 1354 | view.viewport0[1] = miny; |
| 1355 | view.viewport1[1] = MALI_POSITIVE(maxy); |
| 1356 | |
Alyssa Rosenzweig | 2eb65c2 | 2019-03-13 01:50:40 +0000 | [diff] [blame] | 1357 | ctx->payload_tiler.postfix.viewport = |
| 1358 | panfrost_upload_transient(ctx, |
| 1359 | &view, |
| 1360 | sizeof(struct mali_viewport)); |
| 1361 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1362 | ctx->dirty = 0; |
| 1363 | } |
| 1364 | |
| 1365 | /* Corresponds to exactly one draw, but does not submit anything */ |
| 1366 | |
| 1367 | static void |
| 1368 | panfrost_queue_draw(struct panfrost_context *ctx) |
| 1369 | { |
| 1370 | /* TODO: Expand the array? */ |
| 1371 | if (ctx->draw_count >= MAX_DRAW_CALLS) { |
Tomeu Vizoso | 97f2d04 | 2019-03-08 15:24:57 +0100 | [diff] [blame] | 1372 | DBG("Job buffer overflow, ignoring draw\n"); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1373 | assert(0); |
| 1374 | } |
| 1375 | |
| 1376 | /* Handle dirty flags now */ |
| 1377 | panfrost_emit_for_draw(ctx, true); |
| 1378 | |
Tomeu Vizoso | 0e1c5cc | 2019-05-29 11:25:20 +0200 | [diff] [blame] | 1379 | /* We need a set_value job before any other draw jobs */ |
| 1380 | if (ctx->draw_count == 0) |
| 1381 | panfrost_set_value_job(ctx); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1382 | |
Tomeu Vizoso | 0e1c5cc | 2019-05-29 11:25:20 +0200 | [diff] [blame] | 1383 | struct panfrost_transfer vertex = panfrost_vertex_tiler_job(ctx, false); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1384 | ctx->u_vertex_jobs[ctx->vertex_job_count] = (struct mali_job_descriptor_header *) vertex.cpu; |
| 1385 | ctx->vertex_jobs[ctx->vertex_job_count++] = vertex.gpu; |
| 1386 | |
Tomeu Vizoso | 0e1c5cc | 2019-05-29 11:25:20 +0200 | [diff] [blame] | 1387 | struct panfrost_transfer tiler = panfrost_vertex_tiler_job(ctx, true); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1388 | ctx->u_tiler_jobs[ctx->tiler_job_count] = (struct mali_job_descriptor_header *) tiler.cpu; |
| 1389 | ctx->tiler_jobs[ctx->tiler_job_count++] = tiler.gpu; |
| 1390 | |
| 1391 | ctx->draw_count++; |
| 1392 | } |
| 1393 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1394 | /* The entire frame is in memory -- send it off to the kernel! */ |
| 1395 | |
| 1396 | static void |
Tomeu Vizoso | 756f7b9 | 2019-03-08 10:27:07 +0100 | [diff] [blame] | 1397 | panfrost_submit_frame(struct panfrost_context *ctx, bool flush_immediate, |
Alyssa Rosenzweig | e008d4f | 2019-04-14 22:42:44 +0000 | [diff] [blame] | 1398 | struct pipe_fence_handle **fence, |
| 1399 | struct panfrost_job *job) |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1400 | { |
| 1401 | struct pipe_context *gallium = (struct pipe_context *) ctx; |
| 1402 | struct panfrost_screen *screen = pan_screen(gallium->screen); |
| 1403 | |
| 1404 | /* Edge case if screen is cleared and nothing else */ |
| 1405 | bool has_draws = ctx->draw_count > 0; |
| 1406 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1407 | #ifndef DRY_RUN |
| 1408 | |
Alyssa Rosenzweig | d43ec10 | 2019-02-05 05:13:50 +0000 | [diff] [blame] | 1409 | bool is_scanout = panfrost_is_scanout(ctx); |
Alyssa Rosenzweig | e008d4f | 2019-04-14 22:42:44 +0000 | [diff] [blame] | 1410 | screen->driver->submit_vs_fs_job(ctx, has_draws, is_scanout); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1411 | |
| 1412 | /* If visual, we can stall a frame */ |
| 1413 | |
Alyssa Rosenzweig | 25bbb44 | 2019-03-04 05:01:45 +0000 | [diff] [blame] | 1414 | if (!flush_immediate) |
Tomeu Vizoso | 756f7b9 | 2019-03-08 10:27:07 +0100 | [diff] [blame] | 1415 | screen->driver->force_flush_fragment(ctx, fence); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1416 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1417 | screen->last_fragment_flushed = false; |
Alyssa Rosenzweig | e008d4f | 2019-04-14 22:42:44 +0000 | [diff] [blame] | 1418 | screen->last_job = job; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1419 | |
| 1420 | /* If readback, flush now (hurts the pipelined performance) */ |
Alyssa Rosenzweig | 25bbb44 | 2019-03-04 05:01:45 +0000 | [diff] [blame] | 1421 | if (flush_immediate) |
Tomeu Vizoso | 756f7b9 | 2019-03-08 10:27:07 +0100 | [diff] [blame] | 1422 | screen->driver->force_flush_fragment(ctx, fence); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1423 | |
Alyssa Rosenzweig | 4c82abb | 2019-02-25 03:31:29 +0000 | [diff] [blame] | 1424 | if (screen->driver->dump_counters && pan_counters_base) { |
Alyssa Rosenzweig | 4a4726a | 2019-02-18 23:32:05 +0000 | [diff] [blame] | 1425 | screen->driver->dump_counters(screen); |
| 1426 | |
| 1427 | char filename[128]; |
Alyssa Rosenzweig | 4c82abb | 2019-02-25 03:31:29 +0000 | [diff] [blame] | 1428 | snprintf(filename, sizeof(filename), "%s/frame%d.mdgprf", pan_counters_base, ++performance_counter_number); |
Alyssa Rosenzweig | 4a4726a | 2019-02-18 23:32:05 +0000 | [diff] [blame] | 1429 | FILE *fp = fopen(filename, "wb"); |
| 1430 | fwrite(screen->perf_counters.cpu, 4096, sizeof(uint32_t), fp); |
| 1431 | fclose(fp); |
| 1432 | } |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1433 | |
| 1434 | #endif |
| 1435 | } |
| 1436 | |
Tomeu Vizoso | de5c882 | 2019-05-14 17:28:17 +0200 | [diff] [blame] | 1437 | static void |
| 1438 | panfrost_draw_wallpaper(struct pipe_context *pipe) |
| 1439 | { |
| 1440 | struct panfrost_context *ctx = pan_context(pipe); |
Tomeu Vizoso | de5c882 | 2019-05-14 17:28:17 +0200 | [diff] [blame] | 1441 | |
| 1442 | /* Nothing to reload? */ |
| 1443 | if (ctx->pipe_framebuffer.cbufs[0] == NULL) |
| 1444 | return; |
| 1445 | |
Alyssa Rosenzweig | a35069a | 2019-06-07 10:32:17 -0700 | [diff] [blame] | 1446 | /* Blit the wallpaper in */ |
| 1447 | panfrost_blit_wallpaper(ctx); |
Tomeu Vizoso | de5c882 | 2019-05-14 17:28:17 +0200 | [diff] [blame] | 1448 | |
| 1449 | /* We are flushing all queued draws and we know that no more jobs will |
| 1450 | * be added until the next frame. |
| 1451 | * We also know that the last jobs are the wallpaper jobs, and they |
| 1452 | * need to be linked so they execute right after the set_value job. |
| 1453 | */ |
| 1454 | |
| 1455 | /* set_value job to wallpaper vertex job */ |
| 1456 | panfrost_link_job_pair(ctx->u_set_value_job, ctx->vertex_jobs[ctx->vertex_job_count - 1]); |
| 1457 | ctx->u_vertex_jobs[ctx->vertex_job_count - 1]->job_dependency_index_1 = ctx->u_set_value_job->job_index; |
| 1458 | |
| 1459 | /* wallpaper vertex job to first vertex job */ |
| 1460 | panfrost_link_job_pair(ctx->u_vertex_jobs[ctx->vertex_job_count - 1], ctx->vertex_jobs[0]); |
| 1461 | ctx->u_vertex_jobs[0]->job_dependency_index_1 = ctx->u_set_value_job->job_index; |
| 1462 | |
| 1463 | /* last vertex job to wallpaper tiler job */ |
| 1464 | panfrost_link_job_pair(ctx->u_vertex_jobs[ctx->vertex_job_count - 2], ctx->tiler_jobs[ctx->tiler_job_count - 1]); |
| 1465 | ctx->u_tiler_jobs[ctx->tiler_job_count - 1]->job_dependency_index_1 = ctx->u_vertex_jobs[ctx->vertex_job_count - 1]->job_index; |
| 1466 | ctx->u_tiler_jobs[ctx->tiler_job_count - 1]->job_dependency_index_2 = 0; |
| 1467 | |
| 1468 | /* wallpaper tiler job to first tiler job */ |
| 1469 | panfrost_link_job_pair(ctx->u_tiler_jobs[ctx->tiler_job_count - 1], ctx->tiler_jobs[0]); |
| 1470 | ctx->u_tiler_jobs[0]->job_dependency_index_1 = ctx->u_vertex_jobs[0]->job_index; |
| 1471 | ctx->u_tiler_jobs[0]->job_dependency_index_2 = ctx->u_tiler_jobs[ctx->tiler_job_count - 1]->job_index; |
| 1472 | |
| 1473 | /* last tiler job to NULL */ |
| 1474 | panfrost_link_job_pair(ctx->u_tiler_jobs[ctx->tiler_job_count - 2], 0); |
| 1475 | } |
| 1476 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1477 | void |
| 1478 | panfrost_flush( |
| 1479 | struct pipe_context *pipe, |
| 1480 | struct pipe_fence_handle **fence, |
| 1481 | unsigned flags) |
| 1482 | { |
| 1483 | struct panfrost_context *ctx = pan_context(pipe); |
Alyssa Rosenzweig | c351cc4 | 2019-02-27 00:30:59 +0000 | [diff] [blame] | 1484 | struct panfrost_job *job = panfrost_get_job_for_fbo(ctx); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1485 | |
Alyssa Rosenzweig | c351cc4 | 2019-02-27 00:30:59 +0000 | [diff] [blame] | 1486 | /* Nothing to do! */ |
| 1487 | if (!ctx->draw_count && !job->clear) return; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1488 | |
Tomeu Vizoso | de5c882 | 2019-05-14 17:28:17 +0200 | [diff] [blame] | 1489 | if (!job->clear) |
| 1490 | panfrost_draw_wallpaper(&ctx->base); |
| 1491 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1492 | /* Whether to stall the pipeline for immediately correct results */ |
| 1493 | bool flush_immediate = flags & PIPE_FLUSH_END_OF_FRAME; |
| 1494 | |
| 1495 | /* Submit the frame itself */ |
Alyssa Rosenzweig | e008d4f | 2019-04-14 22:42:44 +0000 | [diff] [blame] | 1496 | panfrost_submit_frame(ctx, flush_immediate, fence, job); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1497 | |
| 1498 | /* Prepare for the next frame */ |
| 1499 | panfrost_invalidate_frame(ctx); |
| 1500 | } |
| 1501 | |
| 1502 | #define DEFINE_CASE(c) case PIPE_PRIM_##c: return MALI_##c; |
| 1503 | |
| 1504 | static int |
| 1505 | g2m_draw_mode(enum pipe_prim_type mode) |
| 1506 | { |
| 1507 | switch (mode) { |
| 1508 | DEFINE_CASE(POINTS); |
| 1509 | DEFINE_CASE(LINES); |
| 1510 | DEFINE_CASE(LINE_LOOP); |
| 1511 | DEFINE_CASE(LINE_STRIP); |
| 1512 | DEFINE_CASE(TRIANGLES); |
| 1513 | DEFINE_CASE(TRIANGLE_STRIP); |
| 1514 | DEFINE_CASE(TRIANGLE_FAN); |
| 1515 | DEFINE_CASE(QUADS); |
| 1516 | DEFINE_CASE(QUAD_STRIP); |
| 1517 | DEFINE_CASE(POLYGON); |
| 1518 | |
| 1519 | default: |
Alyssa Rosenzweig | c65271c | 2019-05-16 23:42:33 +0000 | [diff] [blame] | 1520 | unreachable("Invalid draw mode"); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1521 | } |
| 1522 | } |
| 1523 | |
| 1524 | #undef DEFINE_CASE |
| 1525 | |
| 1526 | static unsigned |
| 1527 | panfrost_translate_index_size(unsigned size) |
| 1528 | { |
| 1529 | switch (size) { |
| 1530 | case 1: |
| 1531 | return MALI_DRAW_INDEXED_UINT8; |
| 1532 | |
| 1533 | case 2: |
| 1534 | return MALI_DRAW_INDEXED_UINT16; |
| 1535 | |
| 1536 | case 4: |
| 1537 | return MALI_DRAW_INDEXED_UINT32; |
| 1538 | |
| 1539 | default: |
Alyssa Rosenzweig | c65271c | 2019-05-16 23:42:33 +0000 | [diff] [blame] | 1540 | unreachable("Invalid index size"); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1541 | } |
| 1542 | } |
| 1543 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1544 | /* Gets a GPU address for the associated index buffer. Only gauranteed to be |
| 1545 | * good for the duration of the draw (transient), could last longer */ |
| 1546 | |
| 1547 | static mali_ptr |
| 1548 | panfrost_get_index_buffer_mapped(struct panfrost_context *ctx, const struct pipe_draw_info *info) |
| 1549 | { |
| 1550 | struct panfrost_resource *rsrc = (struct panfrost_resource *) (info->index.resource); |
| 1551 | |
| 1552 | off_t offset = info->start * info->index_size; |
| 1553 | |
| 1554 | if (!info->has_user_indices) { |
| 1555 | /* Only resources can be directly mapped */ |
Alyssa Rosenzweig | 6170814 | 2019-03-21 02:54:38 +0000 | [diff] [blame] | 1556 | return rsrc->bo->gpu + offset; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1557 | } else { |
| 1558 | /* Otherwise, we need to upload to transient memory */ |
Alyssa Rosenzweig | 89b02bf | 2019-04-13 00:10:20 +0000 | [diff] [blame] | 1559 | const uint8_t *ibuf8 = (const uint8_t *) info->index.user; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1560 | return panfrost_upload_transient(ctx, ibuf8 + offset, info->count * info->index_size); |
| 1561 | } |
| 1562 | } |
| 1563 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1564 | static void |
| 1565 | panfrost_draw_vbo( |
| 1566 | struct pipe_context *pipe, |
| 1567 | const struct pipe_draw_info *info) |
| 1568 | { |
| 1569 | struct panfrost_context *ctx = pan_context(pipe); |
| 1570 | |
| 1571 | ctx->payload_vertex.draw_start = info->start; |
| 1572 | ctx->payload_tiler.draw_start = info->start; |
| 1573 | |
| 1574 | int mode = info->mode; |
| 1575 | |
Alyssa Rosenzweig | 85e2bb5 | 2019-02-08 02:28:12 +0000 | [diff] [blame] | 1576 | /* Fallback for unsupported modes */ |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1577 | |
Alyssa Rosenzweig | 7c02c4f | 2019-03-15 02:13:34 +0000 | [diff] [blame] | 1578 | if (!(ctx->draw_modes & (1 << mode))) { |
Alyssa Rosenzweig | 85e2bb5 | 2019-02-08 02:28:12 +0000 | [diff] [blame] | 1579 | if (mode == PIPE_PRIM_QUADS && info->count == 4 && ctx->rasterizer && !ctx->rasterizer->base.flatshade) { |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1580 | mode = PIPE_PRIM_TRIANGLE_FAN; |
| 1581 | } else { |
| 1582 | if (info->count < 4) { |
| 1583 | /* Degenerate case? */ |
| 1584 | return; |
| 1585 | } |
| 1586 | |
| 1587 | util_primconvert_save_rasterizer_state(ctx->primconvert, &ctx->rasterizer->base); |
| 1588 | util_primconvert_draw_vbo(ctx->primconvert, info); |
| 1589 | return; |
| 1590 | } |
| 1591 | } |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1592 | |
Alyssa Rosenzweig | 59c9623 | 2019-02-25 05:32:16 +0000 | [diff] [blame] | 1593 | /* Now that we have a guaranteed terminating path, find the job. |
| 1594 | * Assignment commented out to prevent unused warning */ |
| 1595 | |
| 1596 | /* struct panfrost_job *job = */ panfrost_get_job_for_fbo(ctx); |
| 1597 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1598 | ctx->payload_tiler.prefix.draw_mode = g2m_draw_mode(mode); |
| 1599 | |
| 1600 | ctx->vertex_count = info->count; |
| 1601 | |
| 1602 | /* For non-indexed draws, they're the same */ |
| 1603 | unsigned invocation_count = ctx->vertex_count; |
| 1604 | |
Alyssa Rosenzweig | 89b02bf | 2019-04-13 00:10:20 +0000 | [diff] [blame] | 1605 | unsigned draw_flags = 0; |
| 1606 | |
| 1607 | /* The draw flags interpret how primitive size is interpreted */ |
| 1608 | |
| 1609 | if (panfrost_writes_point_size(ctx)) |
| 1610 | draw_flags |= MALI_DRAW_VARYING_SIZE; |
| 1611 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1612 | /* For higher amounts of vertices (greater than what fits in a 16-bit |
| 1613 | * short), the other value is needed, otherwise there will be bizarre |
| 1614 | * rendering artefacts. It's not clear what these values mean yet. */ |
| 1615 | |
Alyssa Rosenzweig | 89b02bf | 2019-04-13 00:10:20 +0000 | [diff] [blame] | 1616 | draw_flags |= (mode == PIPE_PRIM_POINTS || ctx->vertex_count > 65535) ? 0x3000 : 0x18000; |
Alyssa Rosenzweig | 0e4c321 | 2019-03-31 04:26:48 +0000 | [diff] [blame] | 1617 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1618 | if (info->index_size) { |
| 1619 | /* Calculate the min/max index used so we can figure out how |
| 1620 | * many times to invoke the vertex shader */ |
| 1621 | |
Alyssa Rosenzweig | 89b02bf | 2019-04-13 00:10:20 +0000 | [diff] [blame] | 1622 | /* Fetch / calculate index bounds */ |
| 1623 | unsigned min_index = 0, max_index = 0; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1624 | |
Alyssa Rosenzweig | 89b02bf | 2019-04-13 00:10:20 +0000 | [diff] [blame] | 1625 | if (info->max_index == ~0u) { |
| 1626 | u_vbuf_get_minmax_index(pipe, info, &min_index, &max_index); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1627 | } else { |
Alyssa Rosenzweig | 89b02bf | 2019-04-13 00:10:20 +0000 | [diff] [blame] | 1628 | min_index = info->min_index; |
| 1629 | max_index = info->max_index; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1630 | } |
| 1631 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1632 | /* Use the corresponding values */ |
| 1633 | invocation_count = max_index - min_index + 1; |
| 1634 | ctx->payload_vertex.draw_start = min_index; |
| 1635 | ctx->payload_tiler.draw_start = min_index; |
| 1636 | |
| 1637 | ctx->payload_tiler.prefix.negative_start = -min_index; |
| 1638 | ctx->payload_tiler.prefix.index_count = MALI_POSITIVE(info->count); |
| 1639 | |
| 1640 | //assert(!info->restart_index); /* TODO: Research */ |
| 1641 | assert(!info->index_bias); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1642 | |
Alyssa Rosenzweig | 89b02bf | 2019-04-13 00:10:20 +0000 | [diff] [blame] | 1643 | draw_flags |= panfrost_translate_index_size(info->index_size); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1644 | ctx->payload_tiler.prefix.indices = panfrost_get_index_buffer_mapped(ctx, info); |
| 1645 | } else { |
| 1646 | /* Index count == vertex count, if no indexing is applied, as |
| 1647 | * if it is internally indexed in the expected order */ |
| 1648 | |
| 1649 | ctx->payload_tiler.prefix.negative_start = 0; |
| 1650 | ctx->payload_tiler.prefix.index_count = MALI_POSITIVE(ctx->vertex_count); |
| 1651 | |
| 1652 | /* Reverse index state */ |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1653 | ctx->payload_tiler.prefix.indices = (uintptr_t) NULL; |
| 1654 | } |
| 1655 | |
| 1656 | ctx->payload_vertex.prefix.invocation_count = MALI_POSITIVE(invocation_count); |
| 1657 | ctx->payload_tiler.prefix.invocation_count = MALI_POSITIVE(invocation_count); |
Alyssa Rosenzweig | 89b02bf | 2019-04-13 00:10:20 +0000 | [diff] [blame] | 1658 | ctx->payload_tiler.prefix.unknown_draw = draw_flags; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1659 | |
| 1660 | /* Fire off the draw itself */ |
| 1661 | panfrost_queue_draw(ctx); |
| 1662 | } |
| 1663 | |
| 1664 | /* CSO state */ |
| 1665 | |
| 1666 | static void |
| 1667 | panfrost_generic_cso_delete(struct pipe_context *pctx, void *hwcso) |
| 1668 | { |
| 1669 | free(hwcso); |
| 1670 | } |
| 1671 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1672 | static void * |
| 1673 | panfrost_create_rasterizer_state( |
| 1674 | struct pipe_context *pctx, |
| 1675 | const struct pipe_rasterizer_state *cso) |
| 1676 | { |
Tomeu Vizoso | 756f7b9 | 2019-03-08 10:27:07 +0100 | [diff] [blame] | 1677 | struct panfrost_context *ctx = pan_context(pctx); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1678 | struct panfrost_rasterizer *so = CALLOC_STRUCT(panfrost_rasterizer); |
| 1679 | |
| 1680 | so->base = *cso; |
| 1681 | |
| 1682 | /* Bitmask, unknown meaning of the start value */ |
Tomeu Vizoso | 756f7b9 | 2019-03-08 10:27:07 +0100 | [diff] [blame] | 1683 | so->tiler_gl_enables = ctx->is_t6xx ? 0x105 : 0x7; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1684 | |
Alyssa Rosenzweig | 2adf35e | 2019-05-23 03:01:32 +0000 | [diff] [blame] | 1685 | if (cso->front_ccw) |
| 1686 | so->tiler_gl_enables |= MALI_FRONT_CCW_TOP; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1687 | |
| 1688 | if (cso->cull_face & PIPE_FACE_FRONT) |
| 1689 | so->tiler_gl_enables |= MALI_CULL_FACE_FRONT; |
| 1690 | |
| 1691 | if (cso->cull_face & PIPE_FACE_BACK) |
| 1692 | so->tiler_gl_enables |= MALI_CULL_FACE_BACK; |
| 1693 | |
| 1694 | return so; |
| 1695 | } |
| 1696 | |
| 1697 | static void |
| 1698 | panfrost_bind_rasterizer_state( |
| 1699 | struct pipe_context *pctx, |
| 1700 | void *hwcso) |
| 1701 | { |
| 1702 | struct panfrost_context *ctx = pan_context(pctx); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1703 | |
| 1704 | /* TODO: Why can't rasterizer be NULL ever? Other drivers are fine.. */ |
| 1705 | if (!hwcso) |
| 1706 | return; |
| 1707 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1708 | ctx->rasterizer = hwcso; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1709 | ctx->dirty |= PAN_DIRTY_RASTERIZER; |
| 1710 | } |
| 1711 | |
| 1712 | static void * |
| 1713 | panfrost_create_vertex_elements_state( |
| 1714 | struct pipe_context *pctx, |
| 1715 | unsigned num_elements, |
| 1716 | const struct pipe_vertex_element *elements) |
| 1717 | { |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1718 | struct panfrost_vertex_state *so = CALLOC_STRUCT(panfrost_vertex_state); |
| 1719 | |
| 1720 | so->num_elements = num_elements; |
| 1721 | memcpy(so->pipe, elements, sizeof(*elements) * num_elements); |
| 1722 | |
Alyssa Rosenzweig | ec65e1b | 2019-04-28 21:39:20 +0000 | [diff] [blame] | 1723 | /* XXX: What the cornball? This is totally, 100%, unapologetically |
| 1724 | * nonsense. And yet it somehow fixes a regression in -bshadow |
| 1725 | * (previously, we allocated the descriptor here... a newer commit |
| 1726 | * removed that allocation, and then memory corruption led to |
| 1727 | * shader_meta getting overwritten in bad ways and then the whole test |
| 1728 | * case falling apart . TODO: LOOK INTO PLEASE XXX XXX BAD XXX XXX XXX |
| 1729 | */ |
| 1730 | panfrost_allocate_chunk(pan_context(pctx), 0, HEAP_DESCRIPTOR); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1731 | |
| 1732 | for (int i = 0; i < num_elements; ++i) { |
| 1733 | so->hw[i].index = elements[i].vertex_buffer_index; |
| 1734 | |
| 1735 | enum pipe_format fmt = elements[i].src_format; |
| 1736 | const struct util_format_description *desc = util_format_description(fmt); |
| 1737 | so->hw[i].unknown1 = 0x2; |
| 1738 | so->hw[i].swizzle = panfrost_get_default_swizzle(desc->nr_channels); |
| 1739 | |
| 1740 | so->hw[i].format = panfrost_find_format(desc); |
| 1741 | |
| 1742 | /* The field itself should probably be shifted over */ |
| 1743 | so->hw[i].src_offset = elements[i].src_offset; |
| 1744 | } |
| 1745 | |
| 1746 | return so; |
| 1747 | } |
| 1748 | |
| 1749 | static void |
| 1750 | panfrost_bind_vertex_elements_state( |
| 1751 | struct pipe_context *pctx, |
| 1752 | void *hwcso) |
| 1753 | { |
| 1754 | struct panfrost_context *ctx = pan_context(pctx); |
| 1755 | |
| 1756 | ctx->vertex = hwcso; |
| 1757 | ctx->dirty |= PAN_DIRTY_VERTEX; |
| 1758 | } |
| 1759 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1760 | static void * |
| 1761 | panfrost_create_shader_state( |
| 1762 | struct pipe_context *pctx, |
| 1763 | const struct pipe_shader_state *cso) |
| 1764 | { |
| 1765 | struct panfrost_shader_variants *so = CALLOC_STRUCT(panfrost_shader_variants); |
| 1766 | so->base = *cso; |
| 1767 | |
| 1768 | /* Token deep copy to prevent memory corruption */ |
| 1769 | |
| 1770 | if (cso->type == PIPE_SHADER_IR_TGSI) |
| 1771 | so->base.tokens = tgsi_dup_tokens(so->base.tokens); |
| 1772 | |
| 1773 | return so; |
| 1774 | } |
| 1775 | |
| 1776 | static void |
| 1777 | panfrost_delete_shader_state( |
| 1778 | struct pipe_context *pctx, |
| 1779 | void *so) |
| 1780 | { |
Alyssa Rosenzweig | acc52ff | 2019-02-14 04:00:19 +0000 | [diff] [blame] | 1781 | struct panfrost_shader_variants *cso = (struct panfrost_shader_variants *) so; |
| 1782 | |
| 1783 | if (cso->base.type == PIPE_SHADER_IR_TGSI) { |
Tomeu Vizoso | 97f2d04 | 2019-03-08 15:24:57 +0100 | [diff] [blame] | 1784 | DBG("Deleting TGSI shader leaks duplicated tokens\n"); |
Alyssa Rosenzweig | acc52ff | 2019-02-14 04:00:19 +0000 | [diff] [blame] | 1785 | } |
| 1786 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1787 | free(so); |
| 1788 | } |
| 1789 | |
| 1790 | static void * |
| 1791 | panfrost_create_sampler_state( |
| 1792 | struct pipe_context *pctx, |
| 1793 | const struct pipe_sampler_state *cso) |
| 1794 | { |
| 1795 | struct panfrost_sampler_state *so = CALLOC_STRUCT(panfrost_sampler_state); |
| 1796 | so->base = *cso; |
| 1797 | |
| 1798 | /* sampler_state corresponds to mali_sampler_descriptor, which we can generate entirely here */ |
| 1799 | |
| 1800 | struct mali_sampler_descriptor sampler_descriptor = { |
| 1801 | .filter_mode = MALI_TEX_MIN(translate_tex_filter(cso->min_img_filter)) |
| 1802 | | MALI_TEX_MAG(translate_tex_filter(cso->mag_img_filter)) |
| 1803 | | translate_mip_filter(cso->min_mip_filter) |
| 1804 | | 0x20, |
| 1805 | |
| 1806 | .wrap_s = translate_tex_wrap(cso->wrap_s), |
| 1807 | .wrap_t = translate_tex_wrap(cso->wrap_t), |
| 1808 | .wrap_r = translate_tex_wrap(cso->wrap_r), |
| 1809 | .compare_func = panfrost_translate_alt_compare_func(cso->compare_func), |
| 1810 | .border_color = { |
| 1811 | cso->border_color.f[0], |
| 1812 | cso->border_color.f[1], |
| 1813 | cso->border_color.f[2], |
| 1814 | cso->border_color.f[3] |
| 1815 | }, |
Alyssa Rosenzweig | 6170814 | 2019-03-21 02:54:38 +0000 | [diff] [blame] | 1816 | .min_lod = FIXED_16(cso->min_lod), |
| 1817 | .max_lod = FIXED_16(cso->max_lod), |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1818 | .unknown2 = 1, |
| 1819 | }; |
| 1820 | |
| 1821 | so->hw = sampler_descriptor; |
| 1822 | |
| 1823 | return so; |
| 1824 | } |
| 1825 | |
| 1826 | static void |
| 1827 | panfrost_bind_sampler_states( |
| 1828 | struct pipe_context *pctx, |
| 1829 | enum pipe_shader_type shader, |
| 1830 | unsigned start_slot, unsigned num_sampler, |
| 1831 | void **sampler) |
| 1832 | { |
| 1833 | assert(start_slot == 0); |
| 1834 | |
| 1835 | struct panfrost_context *ctx = pan_context(pctx); |
| 1836 | |
| 1837 | /* XXX: Should upload, not just copy? */ |
| 1838 | ctx->sampler_count[shader] = num_sampler; |
| 1839 | memcpy(ctx->samplers[shader], sampler, num_sampler * sizeof (void *)); |
| 1840 | |
| 1841 | ctx->dirty |= PAN_DIRTY_SAMPLERS; |
| 1842 | } |
| 1843 | |
| 1844 | static bool |
Alyssa Rosenzweig | 9ab8d31 | 2019-06-14 10:12:38 -0700 | [diff] [blame] | 1845 | panfrost_variant_matches( |
| 1846 | struct panfrost_context *ctx, |
| 1847 | struct panfrost_shader_state *variant, |
| 1848 | enum pipe_shader_type type) |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1849 | { |
| 1850 | struct pipe_alpha_state *alpha = &ctx->depth_stencil->alpha; |
| 1851 | |
Alyssa Rosenzweig | 9ab8d31 | 2019-06-14 10:12:38 -0700 | [diff] [blame] | 1852 | bool is_fragment = (type == PIPE_SHADER_FRAGMENT); |
| 1853 | |
| 1854 | if (is_fragment && (alpha->enabled || variant->alpha_state.enabled)) { |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1855 | /* Make sure enable state is at least the same */ |
| 1856 | if (alpha->enabled != variant->alpha_state.enabled) { |
| 1857 | return false; |
| 1858 | } |
| 1859 | |
| 1860 | /* Check that the contents of the test are the same */ |
| 1861 | bool same_func = alpha->func == variant->alpha_state.func; |
| 1862 | bool same_ref = alpha->ref_value == variant->alpha_state.ref_value; |
| 1863 | |
| 1864 | if (!(same_func && same_ref)) { |
| 1865 | return false; |
| 1866 | } |
| 1867 | } |
| 1868 | /* Otherwise, we're good to go */ |
| 1869 | return true; |
| 1870 | } |
| 1871 | |
| 1872 | static void |
Alyssa Rosenzweig | 1acffb5 | 2019-06-04 23:48:17 +0000 | [diff] [blame] | 1873 | panfrost_bind_shader_state( |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1874 | struct pipe_context *pctx, |
Alyssa Rosenzweig | 1acffb5 | 2019-06-04 23:48:17 +0000 | [diff] [blame] | 1875 | void *hwcso, |
| 1876 | enum pipe_shader_type type) |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1877 | { |
| 1878 | struct panfrost_context *ctx = pan_context(pctx); |
| 1879 | |
Alyssa Rosenzweig | 1acffb5 | 2019-06-04 23:48:17 +0000 | [diff] [blame] | 1880 | if (type == PIPE_SHADER_FRAGMENT) { |
| 1881 | ctx->fs = hwcso; |
| 1882 | ctx->dirty |= PAN_DIRTY_FS; |
| 1883 | } else { |
Alyssa Rosenzweig | 9ab8d31 | 2019-06-14 10:12:38 -0700 | [diff] [blame] | 1884 | assert(type == PIPE_SHADER_VERTEX); |
Alyssa Rosenzweig | 1acffb5 | 2019-06-04 23:48:17 +0000 | [diff] [blame] | 1885 | ctx->vs = hwcso; |
| 1886 | ctx->dirty |= PAN_DIRTY_VS; |
| 1887 | } |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1888 | |
Alyssa Rosenzweig | 1acffb5 | 2019-06-04 23:48:17 +0000 | [diff] [blame] | 1889 | if (!hwcso) return; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1890 | |
Alyssa Rosenzweig | 1acffb5 | 2019-06-04 23:48:17 +0000 | [diff] [blame] | 1891 | /* Match the appropriate variant */ |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1892 | |
Alyssa Rosenzweig | 1acffb5 | 2019-06-04 23:48:17 +0000 | [diff] [blame] | 1893 | signed variant = -1; |
| 1894 | struct panfrost_shader_variants *variants = (struct panfrost_shader_variants *) hwcso; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1895 | |
Alyssa Rosenzweig | 1acffb5 | 2019-06-04 23:48:17 +0000 | [diff] [blame] | 1896 | for (unsigned i = 0; i < variants->variant_count; ++i) { |
Alyssa Rosenzweig | 9ab8d31 | 2019-06-14 10:12:38 -0700 | [diff] [blame] | 1897 | if (panfrost_variant_matches(ctx, &variants->variants[i], type)) { |
Alyssa Rosenzweig | 1acffb5 | 2019-06-04 23:48:17 +0000 | [diff] [blame] | 1898 | variant = i; |
| 1899 | break; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1900 | } |
| 1901 | } |
| 1902 | |
Alyssa Rosenzweig | 1acffb5 | 2019-06-04 23:48:17 +0000 | [diff] [blame] | 1903 | if (variant == -1) { |
| 1904 | /* No variant matched, so create a new one */ |
| 1905 | variant = variants->variant_count++; |
| 1906 | assert(variants->variant_count < MAX_SHADER_VARIANTS); |
| 1907 | |
| 1908 | variants->variants[variant].base = hwcso; |
| 1909 | |
| 1910 | if (type == PIPE_SHADER_FRAGMENT) |
| 1911 | variants->variants[variant].alpha_state = ctx->depth_stencil->alpha; |
| 1912 | |
| 1913 | /* Allocate the mapped descriptor ahead-of-time. */ |
| 1914 | struct panfrost_context *ctx = pan_context(pctx); |
| 1915 | struct panfrost_transfer transfer = panfrost_allocate_chunk(ctx, sizeof(struct mali_shader_meta), HEAP_DESCRIPTOR); |
| 1916 | |
| 1917 | variants->variants[variant].tripipe = (struct mali_shader_meta *) transfer.cpu; |
| 1918 | variants->variants[variant].tripipe_gpu = transfer.gpu; |
| 1919 | |
| 1920 | } |
| 1921 | |
| 1922 | /* Select this variant */ |
| 1923 | variants->active_variant = variant; |
| 1924 | |
| 1925 | struct panfrost_shader_state *shader_state = &variants->variants[variant]; |
Alyssa Rosenzweig | 9ab8d31 | 2019-06-14 10:12:38 -0700 | [diff] [blame] | 1926 | assert(panfrost_variant_matches(ctx, shader_state, type)); |
Alyssa Rosenzweig | 1acffb5 | 2019-06-04 23:48:17 +0000 | [diff] [blame] | 1927 | |
| 1928 | /* We finally have a variant, so compile it */ |
| 1929 | |
| 1930 | if (!shader_state->compiled) { |
| 1931 | panfrost_shader_compile(ctx, shader_state->tripipe, NULL, |
| 1932 | panfrost_job_type_for_pipe(type), shader_state); |
| 1933 | |
| 1934 | shader_state->compiled = true; |
| 1935 | } |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1936 | } |
| 1937 | |
| 1938 | static void |
Alyssa Rosenzweig | 1acffb5 | 2019-06-04 23:48:17 +0000 | [diff] [blame] | 1939 | panfrost_bind_vs_state(struct pipe_context *pctx, void *hwcso) |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1940 | { |
Alyssa Rosenzweig | 1acffb5 | 2019-06-04 23:48:17 +0000 | [diff] [blame] | 1941 | panfrost_bind_shader_state(pctx, hwcso, PIPE_SHADER_VERTEX); |
| 1942 | } |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1943 | |
Alyssa Rosenzweig | 1acffb5 | 2019-06-04 23:48:17 +0000 | [diff] [blame] | 1944 | static void |
| 1945 | panfrost_bind_fs_state(struct pipe_context *pctx, void *hwcso) |
| 1946 | { |
| 1947 | panfrost_bind_shader_state(pctx, hwcso, PIPE_SHADER_FRAGMENT); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1948 | } |
| 1949 | |
| 1950 | static void |
| 1951 | panfrost_set_vertex_buffers( |
| 1952 | struct pipe_context *pctx, |
| 1953 | unsigned start_slot, |
| 1954 | unsigned num_buffers, |
| 1955 | const struct pipe_vertex_buffer *buffers) |
| 1956 | { |
| 1957 | struct panfrost_context *ctx = pan_context(pctx); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1958 | |
Alyssa Rosenzweig | e008d4f | 2019-04-14 22:42:44 +0000 | [diff] [blame] | 1959 | util_set_vertex_buffers_mask(ctx->vertex_buffers, &ctx->vb_mask, buffers, start_slot, num_buffers); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1960 | } |
| 1961 | |
| 1962 | static void |
| 1963 | panfrost_set_constant_buffer( |
| 1964 | struct pipe_context *pctx, |
| 1965 | enum pipe_shader_type shader, uint index, |
| 1966 | const struct pipe_constant_buffer *buf) |
| 1967 | { |
| 1968 | struct panfrost_context *ctx = pan_context(pctx); |
| 1969 | struct panfrost_constant_buffer *pbuf = &ctx->constant_buffer[shader]; |
| 1970 | |
| 1971 | size_t sz = buf ? buf->buffer_size : 0; |
| 1972 | |
| 1973 | /* Free previous buffer */ |
| 1974 | |
| 1975 | pbuf->dirty = true; |
| 1976 | pbuf->size = sz; |
| 1977 | |
| 1978 | if (pbuf->buffer) { |
| 1979 | free(pbuf->buffer); |
| 1980 | pbuf->buffer = NULL; |
| 1981 | } |
| 1982 | |
| 1983 | /* If unbinding, we're done */ |
| 1984 | |
| 1985 | if (!buf) |
| 1986 | return; |
| 1987 | |
| 1988 | /* Multiple constant buffers not yet supported */ |
| 1989 | assert(index == 0); |
| 1990 | |
| 1991 | const uint8_t *cpu; |
| 1992 | |
| 1993 | struct panfrost_resource *rsrc = (struct panfrost_resource *) (buf->buffer); |
| 1994 | |
| 1995 | if (rsrc) { |
Alyssa Rosenzweig | 6170814 | 2019-03-21 02:54:38 +0000 | [diff] [blame] | 1996 | cpu = rsrc->bo->cpu; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 1997 | } else if (buf->user_buffer) { |
| 1998 | cpu = buf->user_buffer; |
| 1999 | } else { |
Tomeu Vizoso | 97f2d04 | 2019-03-08 15:24:57 +0100 | [diff] [blame] | 2000 | DBG("No constant buffer?\n"); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2001 | return; |
| 2002 | } |
| 2003 | |
| 2004 | /* Copy the constant buffer into the driver context for later upload */ |
| 2005 | |
| 2006 | pbuf->buffer = malloc(sz); |
| 2007 | memcpy(pbuf->buffer, cpu + buf->buffer_offset, sz); |
| 2008 | } |
| 2009 | |
| 2010 | static void |
| 2011 | panfrost_set_stencil_ref( |
| 2012 | struct pipe_context *pctx, |
| 2013 | const struct pipe_stencil_ref *ref) |
| 2014 | { |
| 2015 | struct panfrost_context *ctx = pan_context(pctx); |
| 2016 | ctx->stencil_ref = *ref; |
| 2017 | |
| 2018 | /* Shader core dirty */ |
| 2019 | ctx->dirty |= PAN_DIRTY_FS; |
| 2020 | } |
| 2021 | |
| 2022 | static struct pipe_sampler_view * |
| 2023 | panfrost_create_sampler_view( |
| 2024 | struct pipe_context *pctx, |
| 2025 | struct pipe_resource *texture, |
| 2026 | const struct pipe_sampler_view *template) |
| 2027 | { |
| 2028 | struct panfrost_sampler_view *so = CALLOC_STRUCT(panfrost_sampler_view); |
| 2029 | int bytes_per_pixel = util_format_get_blocksize(texture->format); |
| 2030 | |
| 2031 | pipe_reference(NULL, &texture->reference); |
| 2032 | |
| 2033 | struct panfrost_resource *prsrc = (struct panfrost_resource *) texture; |
Alyssa Rosenzweig | 81b1053 | 2019-05-14 23:18:18 +0000 | [diff] [blame] | 2034 | assert(prsrc->bo); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2035 | |
| 2036 | so->base = *template; |
| 2037 | so->base.texture = texture; |
| 2038 | so->base.reference.count = 1; |
| 2039 | so->base.context = pctx; |
| 2040 | |
| 2041 | /* sampler_views correspond to texture descriptors, minus the texture |
| 2042 | * (data) itself. So, we serialise the descriptor here and cache it for |
| 2043 | * later. */ |
| 2044 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2045 | /* Make sure it's something with which we're familiar */ |
| 2046 | assert(bytes_per_pixel >= 1 && bytes_per_pixel <= 4); |
| 2047 | |
| 2048 | /* TODO: Detect from format better */ |
| 2049 | const struct util_format_description *desc = util_format_description(prsrc->base.format); |
| 2050 | |
| 2051 | unsigned char user_swizzle[4] = { |
| 2052 | template->swizzle_r, |
| 2053 | template->swizzle_g, |
| 2054 | template->swizzle_b, |
| 2055 | template->swizzle_a |
| 2056 | }; |
| 2057 | |
| 2058 | enum mali_format format = panfrost_find_format(desc); |
| 2059 | |
Alyssa Rosenzweig | 2df4537 | 2019-03-08 23:41:12 +0000 | [diff] [blame] | 2060 | bool is_depth = desc->format == PIPE_FORMAT_Z32_UNORM; |
| 2061 | |
Alyssa Rosenzweig | 536bcaa | 2019-03-07 03:52:20 +0000 | [diff] [blame] | 2062 | unsigned usage2_layout = 0x10; |
| 2063 | |
| 2064 | switch (prsrc->bo->layout) { |
| 2065 | case PAN_AFBC: |
Alyssa Rosenzweig | 2df4537 | 2019-03-08 23:41:12 +0000 | [diff] [blame] | 2066 | usage2_layout |= 0x8 | 0x4; |
Alyssa Rosenzweig | 536bcaa | 2019-03-07 03:52:20 +0000 | [diff] [blame] | 2067 | break; |
| 2068 | case PAN_TILED: |
| 2069 | usage2_layout |= 0x1; |
| 2070 | break; |
| 2071 | case PAN_LINEAR: |
Alyssa Rosenzweig | 2df4537 | 2019-03-08 23:41:12 +0000 | [diff] [blame] | 2072 | usage2_layout |= is_depth ? 0x1 : 0x2; |
Alyssa Rosenzweig | 536bcaa | 2019-03-07 03:52:20 +0000 | [diff] [blame] | 2073 | break; |
| 2074 | default: |
| 2075 | assert(0); |
| 2076 | break; |
| 2077 | } |
| 2078 | |
Alyssa Rosenzweig | 81b1053 | 2019-05-14 23:18:18 +0000 | [diff] [blame] | 2079 | /* Check if we need to set a custom stride by computing the "expected" |
| 2080 | * stride and comparing it to what the BO actually wants. Only applies |
Alyssa Rosenzweig | d89e071 | 2019-06-07 17:07:13 -0700 | [diff] [blame] | 2081 | * to linear textures, since tiled/compressed textures have strict |
| 2082 | * alignment requirements for their strides as it is */ |
Alyssa Rosenzweig | 81b1053 | 2019-05-14 23:18:18 +0000 | [diff] [blame] | 2083 | |
Alyssa Rosenzweig | d89e071 | 2019-06-07 17:07:13 -0700 | [diff] [blame] | 2084 | unsigned first_level = template->u.tex.first_level; |
| 2085 | unsigned last_level = template->u.tex.last_level; |
Alyssa Rosenzweig | 81b1053 | 2019-05-14 23:18:18 +0000 | [diff] [blame] | 2086 | |
Alyssa Rosenzweig | d89e071 | 2019-06-07 17:07:13 -0700 | [diff] [blame] | 2087 | if (prsrc->bo->layout == PAN_LINEAR) { |
| 2088 | for (unsigned l = first_level; l <= last_level; ++l) { |
| 2089 | unsigned actual_stride = prsrc->bo->slices[l].stride; |
| 2090 | unsigned width = u_minify(texture->width0, l); |
| 2091 | unsigned comp_stride = width * bytes_per_pixel; |
| 2092 | |
| 2093 | if (comp_stride != actual_stride) { |
| 2094 | usage2_layout |= MALI_TEX_MANUAL_STRIDE; |
| 2095 | break; |
| 2096 | } |
| 2097 | } |
Alyssa Rosenzweig | 81b1053 | 2019-05-14 23:18:18 +0000 | [diff] [blame] | 2098 | } |
| 2099 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2100 | struct mali_texture_descriptor texture_descriptor = { |
| 2101 | .width = MALI_POSITIVE(texture->width0), |
| 2102 | .height = MALI_POSITIVE(texture->height0), |
| 2103 | .depth = MALI_POSITIVE(texture->depth0), |
| 2104 | |
| 2105 | /* TODO: Decode */ |
| 2106 | .format = { |
| 2107 | .swizzle = panfrost_translate_swizzle_4(desc->swizzle), |
| 2108 | .format = format, |
| 2109 | |
| 2110 | .usage1 = 0x0, |
Alyssa Rosenzweig | c87f3ce | 2019-03-28 04:33:28 +0000 | [diff] [blame] | 2111 | .is_not_cubemap = texture->target != PIPE_TEXTURE_CUBE, |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2112 | |
Alyssa Rosenzweig | 536bcaa | 2019-03-07 03:52:20 +0000 | [diff] [blame] | 2113 | .usage2 = usage2_layout |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2114 | }, |
| 2115 | |
| 2116 | .swizzle = panfrost_translate_swizzle_4(user_swizzle) |
| 2117 | }; |
| 2118 | |
| 2119 | /* TODO: Other base levels require adjusting dimensions / level numbers / etc */ |
| 2120 | assert (template->u.tex.first_level == 0); |
| 2121 | |
Alyssa Rosenzweig | 6170814 | 2019-03-21 02:54:38 +0000 | [diff] [blame] | 2122 | /* Disable mipmapping for now to avoid regressions while automipmapping |
| 2123 | * is being implemented. TODO: Remove me once automipmaps work */ |
| 2124 | |
| 2125 | //texture_descriptor.nr_mipmap_levels = template->u.tex.last_level - template->u.tex.first_level; |
| 2126 | texture_descriptor.nr_mipmap_levels = 0; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2127 | |
| 2128 | so->hw = texture_descriptor; |
| 2129 | |
| 2130 | return (struct pipe_sampler_view *) so; |
| 2131 | } |
| 2132 | |
| 2133 | static void |
| 2134 | panfrost_set_sampler_views( |
| 2135 | struct pipe_context *pctx, |
| 2136 | enum pipe_shader_type shader, |
| 2137 | unsigned start_slot, unsigned num_views, |
| 2138 | struct pipe_sampler_view **views) |
| 2139 | { |
| 2140 | struct panfrost_context *ctx = pan_context(pctx); |
| 2141 | |
| 2142 | assert(start_slot == 0); |
| 2143 | |
Alyssa Rosenzweig | 0219b99 | 2019-06-11 14:21:14 -0700 | [diff] [blame] | 2144 | unsigned new_nr = 0; |
| 2145 | for (unsigned i = 0; i < num_views; ++i) { |
| 2146 | if (views[i]) |
| 2147 | new_nr = i + 1; |
| 2148 | } |
| 2149 | |
| 2150 | ctx->sampler_view_count[shader] = new_nr; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2151 | memcpy(ctx->sampler_views[shader], views, num_views * sizeof (void *)); |
| 2152 | |
| 2153 | ctx->dirty |= PAN_DIRTY_TEXTURES; |
| 2154 | } |
| 2155 | |
| 2156 | static void |
| 2157 | panfrost_sampler_view_destroy( |
| 2158 | struct pipe_context *pctx, |
Tomeu Vizoso | 9fe1a92 | 2019-05-23 10:09:33 +0200 | [diff] [blame] | 2159 | struct pipe_sampler_view *view) |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2160 | { |
Tomeu Vizoso | 9fe1a92 | 2019-05-23 10:09:33 +0200 | [diff] [blame] | 2161 | pipe_resource_reference(&view->texture, NULL); |
| 2162 | free(view); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2163 | } |
| 2164 | |
| 2165 | static void |
| 2166 | panfrost_set_framebuffer_state(struct pipe_context *pctx, |
| 2167 | const struct pipe_framebuffer_state *fb) |
| 2168 | { |
| 2169 | struct panfrost_context *ctx = pan_context(pctx); |
| 2170 | |
Alyssa Rosenzweig | 6460442 | 2019-06-14 12:26:19 -0700 | [diff] [blame] | 2171 | /* Flush when switching framebuffers, but not if the framebuffer |
Tomeu Vizoso | de5c882 | 2019-05-14 17:28:17 +0200 | [diff] [blame] | 2172 | * state is being restored by u_blitter |
| 2173 | */ |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2174 | |
Alyssa Rosenzweig | 6460442 | 2019-06-14 12:26:19 -0700 | [diff] [blame] | 2175 | bool is_scanout = panfrost_is_scanout(ctx); |
| 2176 | bool has_draws = ctx->draw_count > 0; |
| 2177 | |
| 2178 | if (!ctx->blitter->running && (!is_scanout || has_draws)) { |
| 2179 | panfrost_flush(pctx, NULL, PIPE_FLUSH_END_OF_FRAME); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2180 | } |
| 2181 | |
| 2182 | ctx->pipe_framebuffer.nr_cbufs = fb->nr_cbufs; |
| 2183 | ctx->pipe_framebuffer.samples = fb->samples; |
| 2184 | ctx->pipe_framebuffer.layers = fb->layers; |
Alyssa Rosenzweig | c70ed4c | 2019-02-15 07:43:43 +0000 | [diff] [blame] | 2185 | ctx->pipe_framebuffer.width = fb->width; |
| 2186 | ctx->pipe_framebuffer.height = fb->height; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2187 | |
| 2188 | for (int i = 0; i < PIPE_MAX_COLOR_BUFS; i++) { |
| 2189 | struct pipe_surface *cb = i < fb->nr_cbufs ? fb->cbufs[i] : NULL; |
| 2190 | |
| 2191 | /* check if changing cbuf */ |
| 2192 | if (ctx->pipe_framebuffer.cbufs[i] == cb) continue; |
| 2193 | |
| 2194 | if (cb && (i != 0)) { |
Tomeu Vizoso | 97f2d04 | 2019-03-08 15:24:57 +0100 | [diff] [blame] | 2195 | DBG("XXX: Multiple render targets not supported before t7xx!\n"); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2196 | assert(0); |
| 2197 | } |
| 2198 | |
| 2199 | /* assign new */ |
| 2200 | pipe_surface_reference(&ctx->pipe_framebuffer.cbufs[i], cb); |
| 2201 | |
| 2202 | if (!cb) |
| 2203 | continue; |
| 2204 | |
Tomeu Vizoso | 756f7b9 | 2019-03-08 10:27:07 +0100 | [diff] [blame] | 2205 | if (ctx->require_sfbd) |
Alyssa Rosenzweig | f9ecca2 | 2019-06-14 11:23:24 -0700 | [diff] [blame] | 2206 | ctx->vt_framebuffer_sfbd = panfrost_emit_sfbd(ctx, ~0); |
Alyssa Rosenzweig | 97aa054 | 2019-02-10 20:06:21 +0000 | [diff] [blame] | 2207 | else |
Alyssa Rosenzweig | f9ecca2 | 2019-06-14 11:23:24 -0700 | [diff] [blame] | 2208 | ctx->vt_framebuffer_mfbd = panfrost_emit_mfbd(ctx, ~0); |
Alyssa Rosenzweig | 97aa054 | 2019-02-10 20:06:21 +0000 | [diff] [blame] | 2209 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2210 | panfrost_attach_vt_framebuffer(ctx); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2211 | |
| 2212 | struct panfrost_resource *tex = ((struct panfrost_resource *) ctx->pipe_framebuffer.cbufs[i]->texture); |
Alyssa Rosenzweig | 31f5a43 | 2019-05-02 02:27:04 +0000 | [diff] [blame] | 2213 | enum pipe_format format = ctx->pipe_framebuffer.cbufs[i]->format; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2214 | |
Alyssa Rosenzweig | d878753 | 2019-06-07 09:39:31 -0700 | [diff] [blame] | 2215 | bool can_afbc = panfrost_format_supports_afbc(format); |
Alyssa Rosenzweig | 7d43999 | 2019-06-10 08:04:10 -0700 | [diff] [blame] | 2216 | bool is_scanout = panfrost_is_scanout(ctx); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2217 | |
Alyssa Rosenzweig | d878753 | 2019-06-07 09:39:31 -0700 | [diff] [blame] | 2218 | if (!is_scanout && tex->bo->layout != PAN_AFBC && can_afbc) |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2219 | panfrost_enable_afbc(ctx, tex, false); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2220 | |
Alyssa Rosenzweig | d878753 | 2019-06-07 09:39:31 -0700 | [diff] [blame] | 2221 | if (!is_scanout && !tex->bo->has_checksum) |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2222 | panfrost_enable_checksum(ctx, tex); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2223 | } |
| 2224 | |
| 2225 | { |
| 2226 | struct pipe_surface *zb = fb->zsbuf; |
| 2227 | |
| 2228 | if (ctx->pipe_framebuffer.zsbuf != zb) { |
| 2229 | pipe_surface_reference(&ctx->pipe_framebuffer.zsbuf, zb); |
| 2230 | |
| 2231 | if (zb) { |
Tomeu Vizoso | 756f7b9 | 2019-03-08 10:27:07 +0100 | [diff] [blame] | 2232 | if (ctx->require_sfbd) |
Alyssa Rosenzweig | f9ecca2 | 2019-06-14 11:23:24 -0700 | [diff] [blame] | 2233 | ctx->vt_framebuffer_sfbd = panfrost_emit_sfbd(ctx, ~0); |
Alyssa Rosenzweig | 97aa054 | 2019-02-10 20:06:21 +0000 | [diff] [blame] | 2234 | else |
Alyssa Rosenzweig | f9ecca2 | 2019-06-14 11:23:24 -0700 | [diff] [blame] | 2235 | ctx->vt_framebuffer_mfbd = panfrost_emit_mfbd(ctx, ~0); |
Alyssa Rosenzweig | 97aa054 | 2019-02-10 20:06:21 +0000 | [diff] [blame] | 2236 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2237 | panfrost_attach_vt_framebuffer(ctx); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2238 | |
Alyssa Rosenzweig | 7d43999 | 2019-06-10 08:04:10 -0700 | [diff] [blame] | 2239 | struct panfrost_resource *tex = pan_resource(zb->texture); |
| 2240 | bool can_afbc = panfrost_format_supports_afbc(zb->format); |
| 2241 | bool is_scanout = panfrost_is_scanout(ctx); |
| 2242 | |
| 2243 | if (!is_scanout && tex->bo->layout != PAN_AFBC && can_afbc) |
| 2244 | panfrost_enable_afbc(ctx, tex, true); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2245 | } |
| 2246 | } |
| 2247 | } |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2248 | } |
| 2249 | |
| 2250 | static void * |
| 2251 | panfrost_create_blend_state(struct pipe_context *pipe, |
| 2252 | const struct pipe_blend_state *blend) |
| 2253 | { |
| 2254 | struct panfrost_context *ctx = pan_context(pipe); |
| 2255 | struct panfrost_blend_state *so = CALLOC_STRUCT(panfrost_blend_state); |
| 2256 | so->base = *blend; |
| 2257 | |
| 2258 | /* TODO: The following features are not yet implemented */ |
| 2259 | assert(!blend->logicop_enable); |
| 2260 | assert(!blend->alpha_to_coverage); |
| 2261 | assert(!blend->alpha_to_one); |
| 2262 | |
| 2263 | /* Compile the blend state, first as fixed-function if we can */ |
| 2264 | |
Alyssa Rosenzweig | 3645c78 | 2019-05-18 20:36:00 +0000 | [diff] [blame] | 2265 | if (panfrost_make_fixed_blend_mode(&blend->rt[0], so, blend->rt[0].colormask, &ctx->blend_color)) |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2266 | return so; |
| 2267 | |
| 2268 | /* If we can't, compile a blend shader instead */ |
| 2269 | |
| 2270 | panfrost_make_blend_shader(ctx, so, &ctx->blend_color); |
| 2271 | |
| 2272 | return so; |
| 2273 | } |
| 2274 | |
| 2275 | static void |
| 2276 | panfrost_bind_blend_state(struct pipe_context *pipe, |
| 2277 | void *cso) |
| 2278 | { |
| 2279 | struct panfrost_context *ctx = pan_context(pipe); |
| 2280 | struct pipe_blend_state *blend = (struct pipe_blend_state *) cso; |
| 2281 | struct panfrost_blend_state *pblend = (struct panfrost_blend_state *) cso; |
| 2282 | ctx->blend = pblend; |
| 2283 | |
| 2284 | if (!blend) |
| 2285 | return; |
| 2286 | |
| 2287 | SET_BIT(ctx->fragment_shader_core.unknown2_4, MALI_NO_DITHER, !blend->dither); |
| 2288 | |
| 2289 | /* TODO: Attach color */ |
| 2290 | |
| 2291 | /* Shader itself is not dirty, but the shader core is */ |
| 2292 | ctx->dirty |= PAN_DIRTY_FS; |
| 2293 | } |
| 2294 | |
| 2295 | static void |
| 2296 | panfrost_delete_blend_state(struct pipe_context *pipe, |
| 2297 | void *blend) |
| 2298 | { |
Alyssa Rosenzweig | acc52ff | 2019-02-14 04:00:19 +0000 | [diff] [blame] | 2299 | struct panfrost_blend_state *so = (struct panfrost_blend_state *) blend; |
| 2300 | |
| 2301 | if (so->has_blend_shader) { |
Tomeu Vizoso | 97f2d04 | 2019-03-08 15:24:57 +0100 | [diff] [blame] | 2302 | DBG("Deleting blend state leak blend shaders bytecode\n"); |
Alyssa Rosenzweig | acc52ff | 2019-02-14 04:00:19 +0000 | [diff] [blame] | 2303 | } |
| 2304 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2305 | free(blend); |
| 2306 | } |
| 2307 | |
| 2308 | static void |
| 2309 | panfrost_set_blend_color(struct pipe_context *pipe, |
| 2310 | const struct pipe_blend_color *blend_color) |
| 2311 | { |
| 2312 | struct panfrost_context *ctx = pan_context(pipe); |
| 2313 | |
| 2314 | /* If blend_color is we're unbinding, so ctx->blend_color is now undefined -> nothing to do */ |
| 2315 | |
| 2316 | if (blend_color) { |
| 2317 | ctx->blend_color = *blend_color; |
| 2318 | |
| 2319 | /* The blend mode depends on the blend constant color, due to the |
| 2320 | * fixed/programmable split. So, we're forced to regenerate the blend |
| 2321 | * equation */ |
| 2322 | |
| 2323 | /* TODO: Attach color */ |
| 2324 | } |
| 2325 | } |
| 2326 | |
| 2327 | static void * |
| 2328 | panfrost_create_depth_stencil_state(struct pipe_context *pipe, |
| 2329 | const struct pipe_depth_stencil_alpha_state *depth_stencil) |
| 2330 | { |
| 2331 | return mem_dup(depth_stencil, sizeof(*depth_stencil)); |
| 2332 | } |
| 2333 | |
| 2334 | static void |
| 2335 | panfrost_bind_depth_stencil_state(struct pipe_context *pipe, |
| 2336 | void *cso) |
| 2337 | { |
| 2338 | struct panfrost_context *ctx = pan_context(pipe); |
| 2339 | struct pipe_depth_stencil_alpha_state *depth_stencil = cso; |
| 2340 | ctx->depth_stencil = depth_stencil; |
| 2341 | |
| 2342 | if (!depth_stencil) |
| 2343 | return; |
| 2344 | |
| 2345 | /* Alpha does not exist in the hardware (it's not in ES3), so it's |
| 2346 | * emulated in the fragment shader */ |
| 2347 | |
| 2348 | if (depth_stencil->alpha.enabled) { |
| 2349 | /* We need to trigger a new shader (maybe) */ |
| 2350 | ctx->base.bind_fs_state(&ctx->base, ctx->fs); |
| 2351 | } |
| 2352 | |
| 2353 | /* Stencil state */ |
| 2354 | SET_BIT(ctx->fragment_shader_core.unknown2_4, MALI_STENCIL_TEST, depth_stencil->stencil[0].enabled); /* XXX: which one? */ |
| 2355 | |
| 2356 | panfrost_make_stencil_state(&depth_stencil->stencil[0], &ctx->fragment_shader_core.stencil_front); |
| 2357 | ctx->fragment_shader_core.stencil_mask_front = depth_stencil->stencil[0].writemask; |
| 2358 | |
| 2359 | panfrost_make_stencil_state(&depth_stencil->stencil[1], &ctx->fragment_shader_core.stencil_back); |
| 2360 | ctx->fragment_shader_core.stencil_mask_back = depth_stencil->stencil[1].writemask; |
| 2361 | |
| 2362 | /* Depth state (TODO: Refactor) */ |
| 2363 | SET_BIT(ctx->fragment_shader_core.unknown2_3, MALI_DEPTH_TEST, depth_stencil->depth.enabled); |
| 2364 | |
| 2365 | int func = depth_stencil->depth.enabled ? depth_stencil->depth.func : PIPE_FUNC_ALWAYS; |
| 2366 | |
| 2367 | ctx->fragment_shader_core.unknown2_3 &= ~MALI_DEPTH_FUNC_MASK; |
| 2368 | ctx->fragment_shader_core.unknown2_3 |= MALI_DEPTH_FUNC(panfrost_translate_compare_func(func)); |
| 2369 | |
| 2370 | /* Bounds test not implemented */ |
| 2371 | assert(!depth_stencil->depth.bounds_test); |
| 2372 | |
| 2373 | ctx->dirty |= PAN_DIRTY_FS; |
| 2374 | } |
| 2375 | |
| 2376 | static void |
| 2377 | panfrost_delete_depth_stencil_state(struct pipe_context *pipe, void *depth) |
| 2378 | { |
| 2379 | free( depth ); |
| 2380 | } |
| 2381 | |
| 2382 | static void |
| 2383 | panfrost_set_sample_mask(struct pipe_context *pipe, |
| 2384 | unsigned sample_mask) |
| 2385 | { |
| 2386 | } |
| 2387 | |
| 2388 | static void |
| 2389 | panfrost_set_clip_state(struct pipe_context *pipe, |
| 2390 | const struct pipe_clip_state *clip) |
| 2391 | { |
| 2392 | //struct panfrost_context *panfrost = pan_context(pipe); |
| 2393 | } |
| 2394 | |
| 2395 | static void |
| 2396 | panfrost_set_viewport_states(struct pipe_context *pipe, |
| 2397 | unsigned start_slot, |
| 2398 | unsigned num_viewports, |
| 2399 | const struct pipe_viewport_state *viewports) |
| 2400 | { |
| 2401 | struct panfrost_context *ctx = pan_context(pipe); |
| 2402 | |
| 2403 | assert(start_slot == 0); |
| 2404 | assert(num_viewports == 1); |
| 2405 | |
| 2406 | ctx->pipe_viewport = *viewports; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2407 | } |
| 2408 | |
| 2409 | static void |
| 2410 | panfrost_set_scissor_states(struct pipe_context *pipe, |
| 2411 | unsigned start_slot, |
| 2412 | unsigned num_scissors, |
| 2413 | const struct pipe_scissor_state *scissors) |
| 2414 | { |
| 2415 | struct panfrost_context *ctx = pan_context(pipe); |
| 2416 | |
| 2417 | assert(start_slot == 0); |
| 2418 | assert(num_scissors == 1); |
| 2419 | |
| 2420 | ctx->scissor = *scissors; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2421 | } |
| 2422 | |
| 2423 | static void |
| 2424 | panfrost_set_polygon_stipple(struct pipe_context *pipe, |
| 2425 | const struct pipe_poly_stipple *stipple) |
| 2426 | { |
| 2427 | //struct panfrost_context *panfrost = pan_context(pipe); |
| 2428 | } |
| 2429 | |
| 2430 | static void |
| 2431 | panfrost_set_active_query_state(struct pipe_context *pipe, |
| 2432 | boolean enable) |
| 2433 | { |
| 2434 | //struct panfrost_context *panfrost = pan_context(pipe); |
| 2435 | } |
| 2436 | |
| 2437 | static void |
| 2438 | panfrost_destroy(struct pipe_context *pipe) |
| 2439 | { |
| 2440 | struct panfrost_context *panfrost = pan_context(pipe); |
Tomeu Vizoso | 756f7b9 | 2019-03-08 10:27:07 +0100 | [diff] [blame] | 2441 | struct panfrost_screen *screen = pan_screen(pipe->screen); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2442 | |
| 2443 | if (panfrost->blitter) |
| 2444 | util_blitter_destroy(panfrost->blitter); |
Tomeu Vizoso | 756f7b9 | 2019-03-08 10:27:07 +0100 | [diff] [blame] | 2445 | |
| 2446 | screen->driver->free_slab(screen, &panfrost->scratchpad); |
| 2447 | screen->driver->free_slab(screen, &panfrost->varying_mem); |
| 2448 | screen->driver->free_slab(screen, &panfrost->shaders); |
| 2449 | screen->driver->free_slab(screen, &panfrost->tiler_heap); |
Alyssa Rosenzweig | 6434f5c | 2019-06-14 07:24:26 -0700 | [diff] [blame] | 2450 | screen->driver->free_slab(screen, &panfrost->tiler_polygon_list); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2451 | } |
| 2452 | |
| 2453 | static struct pipe_query * |
| 2454 | panfrost_create_query(struct pipe_context *pipe, |
| 2455 | unsigned type, |
| 2456 | unsigned index) |
| 2457 | { |
| 2458 | struct panfrost_query *q = CALLOC_STRUCT(panfrost_query); |
| 2459 | |
| 2460 | q->type = type; |
| 2461 | q->index = index; |
| 2462 | |
| 2463 | return (struct pipe_query *) q; |
| 2464 | } |
| 2465 | |
| 2466 | static void |
| 2467 | panfrost_destroy_query(struct pipe_context *pipe, struct pipe_query *q) |
| 2468 | { |
| 2469 | FREE(q); |
| 2470 | } |
| 2471 | |
| 2472 | static boolean |
| 2473 | panfrost_begin_query(struct pipe_context *pipe, struct pipe_query *q) |
| 2474 | { |
| 2475 | struct panfrost_context *ctx = pan_context(pipe); |
| 2476 | struct panfrost_query *query = (struct panfrost_query *) q; |
| 2477 | |
| 2478 | switch (query->type) { |
Alyssa Rosenzweig | 5155bcf | 2019-02-14 02:50:30 +0000 | [diff] [blame] | 2479 | case PIPE_QUERY_OCCLUSION_COUNTER: |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2480 | case PIPE_QUERY_OCCLUSION_PREDICATE: |
| 2481 | case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE: |
| 2482 | { |
| 2483 | /* Allocate a word for the query results to be stored */ |
| 2484 | query->transfer = panfrost_allocate_chunk(ctx, sizeof(unsigned), HEAP_DESCRIPTOR); |
| 2485 | |
| 2486 | ctx->occlusion_query = query; |
| 2487 | |
| 2488 | break; |
| 2489 | } |
| 2490 | |
| 2491 | default: |
Tomeu Vizoso | 97f2d04 | 2019-03-08 15:24:57 +0100 | [diff] [blame] | 2492 | DBG("Skipping query %d\n", query->type); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2493 | break; |
| 2494 | } |
| 2495 | |
| 2496 | return true; |
| 2497 | } |
| 2498 | |
| 2499 | static bool |
| 2500 | panfrost_end_query(struct pipe_context *pipe, struct pipe_query *q) |
| 2501 | { |
| 2502 | struct panfrost_context *ctx = pan_context(pipe); |
| 2503 | ctx->occlusion_query = NULL; |
| 2504 | return true; |
| 2505 | } |
| 2506 | |
| 2507 | static boolean |
| 2508 | panfrost_get_query_result(struct pipe_context *pipe, |
| 2509 | struct pipe_query *q, |
| 2510 | boolean wait, |
| 2511 | union pipe_query_result *vresult) |
| 2512 | { |
| 2513 | /* STUB */ |
| 2514 | struct panfrost_query *query = (struct panfrost_query *) q; |
| 2515 | |
| 2516 | /* We need to flush out the jobs to actually run the counter, TODO |
| 2517 | * check wait, TODO wallpaper after if needed */ |
| 2518 | |
| 2519 | panfrost_flush(pipe, NULL, PIPE_FLUSH_END_OF_FRAME); |
| 2520 | |
| 2521 | switch (query->type) { |
Alyssa Rosenzweig | 5155bcf | 2019-02-14 02:50:30 +0000 | [diff] [blame] | 2522 | case PIPE_QUERY_OCCLUSION_COUNTER: |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2523 | case PIPE_QUERY_OCCLUSION_PREDICATE: |
| 2524 | case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE: { |
| 2525 | /* Read back the query results */ |
| 2526 | unsigned *result = (unsigned *) query->transfer.cpu; |
| 2527 | unsigned passed = *result; |
| 2528 | |
Alyssa Rosenzweig | 5155bcf | 2019-02-14 02:50:30 +0000 | [diff] [blame] | 2529 | if (query->type == PIPE_QUERY_OCCLUSION_COUNTER) { |
| 2530 | vresult->u64 = passed; |
| 2531 | } else { |
| 2532 | vresult->b = !!passed; |
| 2533 | } |
| 2534 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2535 | break; |
| 2536 | } |
| 2537 | default: |
Tomeu Vizoso | 97f2d04 | 2019-03-08 15:24:57 +0100 | [diff] [blame] | 2538 | DBG("Skipped query get %d\n", query->type); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2539 | break; |
| 2540 | } |
| 2541 | |
| 2542 | return true; |
| 2543 | } |
| 2544 | |
Alyssa Rosenzweig | f277bd3 | 2019-03-25 04:57:27 +0000 | [diff] [blame] | 2545 | static struct pipe_stream_output_target * |
| 2546 | panfrost_create_stream_output_target(struct pipe_context *pctx, |
| 2547 | struct pipe_resource *prsc, |
| 2548 | unsigned buffer_offset, |
| 2549 | unsigned buffer_size) |
| 2550 | { |
| 2551 | struct pipe_stream_output_target *target; |
| 2552 | |
| 2553 | target = CALLOC_STRUCT(pipe_stream_output_target); |
| 2554 | |
| 2555 | if (!target) |
| 2556 | return NULL; |
| 2557 | |
| 2558 | pipe_reference_init(&target->reference, 1); |
| 2559 | pipe_resource_reference(&target->buffer, prsc); |
| 2560 | |
| 2561 | target->context = pctx; |
| 2562 | target->buffer_offset = buffer_offset; |
| 2563 | target->buffer_size = buffer_size; |
| 2564 | |
| 2565 | return target; |
| 2566 | } |
| 2567 | |
| 2568 | static void |
| 2569 | panfrost_stream_output_target_destroy(struct pipe_context *pctx, |
| 2570 | struct pipe_stream_output_target *target) |
| 2571 | { |
| 2572 | pipe_resource_reference(&target->buffer, NULL); |
| 2573 | free(target); |
| 2574 | } |
| 2575 | |
| 2576 | static void |
| 2577 | panfrost_set_stream_output_targets(struct pipe_context *pctx, |
| 2578 | unsigned num_targets, |
| 2579 | struct pipe_stream_output_target **targets, |
| 2580 | const unsigned *offsets) |
| 2581 | { |
| 2582 | /* STUB */ |
| 2583 | } |
| 2584 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2585 | static void |
| 2586 | panfrost_setup_hardware(struct panfrost_context *ctx) |
| 2587 | { |
| 2588 | struct pipe_context *gallium = (struct pipe_context *) ctx; |
| 2589 | struct panfrost_screen *screen = pan_screen(gallium->screen); |
| 2590 | |
| 2591 | for (int i = 0; i < ARRAY_SIZE(ctx->transient_pools); ++i) { |
| 2592 | /* Allocate the beginning of the transient pool */ |
| 2593 | int entry_size = (1 << 22); /* 4MB */ |
| 2594 | |
| 2595 | ctx->transient_pools[i].entry_size = entry_size; |
| 2596 | ctx->transient_pools[i].entry_count = 1; |
| 2597 | |
| 2598 | ctx->transient_pools[i].entries[0] = (struct panfrost_memory_entry *) pb_slab_alloc(&screen->slabs, entry_size, HEAP_TRANSIENT); |
| 2599 | } |
| 2600 | |
| 2601 | screen->driver->allocate_slab(screen, &ctx->scratchpad, 64, false, 0, 0, 0); |
Alyssa Rosenzweig | cdca103 | 2019-02-25 02:32:45 +0000 | [diff] [blame] | 2602 | screen->driver->allocate_slab(screen, &ctx->varying_mem, 16384, false, PAN_ALLOCATE_INVISIBLE | PAN_ALLOCATE_COHERENT_LOCAL, 0, 0); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2603 | screen->driver->allocate_slab(screen, &ctx->shaders, 4096, true, PAN_ALLOCATE_EXECUTE, 0, 0); |
Alyssa Rosenzweig | f44d465 | 2019-02-25 02:31:09 +0000 | [diff] [blame] | 2604 | screen->driver->allocate_slab(screen, &ctx->tiler_heap, 32768, false, PAN_ALLOCATE_INVISIBLE | PAN_ALLOCATE_GROWABLE, 1, 128); |
Alyssa Rosenzweig | 6434f5c | 2019-06-14 07:24:26 -0700 | [diff] [blame] | 2605 | screen->driver->allocate_slab(screen, &ctx->tiler_polygon_list, 128*128, false, PAN_ALLOCATE_INVISIBLE | PAN_ALLOCATE_GROWABLE, 1, 128); |
Alyssa Rosenzweig | f9ecca2 | 2019-06-14 11:23:24 -0700 | [diff] [blame] | 2606 | screen->driver->allocate_slab(screen, &ctx->tiler_dummy, 1, false, PAN_ALLOCATE_INVISIBLE, 0, 0); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2607 | |
| 2608 | } |
| 2609 | |
| 2610 | /* New context creation, which also does hardware initialisation since I don't |
| 2611 | * know the better way to structure this :smirk: */ |
| 2612 | |
| 2613 | struct pipe_context * |
| 2614 | panfrost_create_context(struct pipe_screen *screen, void *priv, unsigned flags) |
| 2615 | { |
| 2616 | struct panfrost_context *ctx = CALLOC_STRUCT(panfrost_context); |
Tomeu Vizoso | 756f7b9 | 2019-03-08 10:27:07 +0100 | [diff] [blame] | 2617 | struct panfrost_screen *pscreen = pan_screen(screen); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2618 | memset(ctx, 0, sizeof(*ctx)); |
| 2619 | struct pipe_context *gallium = (struct pipe_context *) ctx; |
Tomeu Vizoso | 756f7b9 | 2019-03-08 10:27:07 +0100 | [diff] [blame] | 2620 | unsigned gpu_id; |
| 2621 | |
| 2622 | gpu_id = pscreen->driver->query_gpu_version(pscreen); |
Alyssa Rosenzweig | 23e0135 | 2019-03-12 22:42:16 +0000 | [diff] [blame] | 2623 | |
| 2624 | ctx->is_t6xx = gpu_id <= 0x0750; /* For now, this flag means T760 or less */ |
| 2625 | ctx->require_sfbd = gpu_id < 0x0750; /* T760 is the first to support MFBD */ |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2626 | |
| 2627 | gallium->screen = screen; |
| 2628 | |
| 2629 | gallium->destroy = panfrost_destroy; |
| 2630 | |
| 2631 | gallium->set_framebuffer_state = panfrost_set_framebuffer_state; |
| 2632 | |
| 2633 | gallium->flush = panfrost_flush; |
| 2634 | gallium->clear = panfrost_clear; |
| 2635 | gallium->draw_vbo = panfrost_draw_vbo; |
| 2636 | |
| 2637 | gallium->set_vertex_buffers = panfrost_set_vertex_buffers; |
| 2638 | gallium->set_constant_buffer = panfrost_set_constant_buffer; |
| 2639 | |
| 2640 | gallium->set_stencil_ref = panfrost_set_stencil_ref; |
| 2641 | |
| 2642 | gallium->create_sampler_view = panfrost_create_sampler_view; |
| 2643 | gallium->set_sampler_views = panfrost_set_sampler_views; |
| 2644 | gallium->sampler_view_destroy = panfrost_sampler_view_destroy; |
| 2645 | |
| 2646 | gallium->create_rasterizer_state = panfrost_create_rasterizer_state; |
| 2647 | gallium->bind_rasterizer_state = panfrost_bind_rasterizer_state; |
| 2648 | gallium->delete_rasterizer_state = panfrost_generic_cso_delete; |
| 2649 | |
| 2650 | gallium->create_vertex_elements_state = panfrost_create_vertex_elements_state; |
| 2651 | gallium->bind_vertex_elements_state = panfrost_bind_vertex_elements_state; |
Alyssa Rosenzweig | 81d3262 | 2019-05-17 00:14:49 +0000 | [diff] [blame] | 2652 | gallium->delete_vertex_elements_state = panfrost_generic_cso_delete; |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2653 | |
| 2654 | gallium->create_fs_state = panfrost_create_shader_state; |
| 2655 | gallium->delete_fs_state = panfrost_delete_shader_state; |
| 2656 | gallium->bind_fs_state = panfrost_bind_fs_state; |
| 2657 | |
| 2658 | gallium->create_vs_state = panfrost_create_shader_state; |
| 2659 | gallium->delete_vs_state = panfrost_delete_shader_state; |
| 2660 | gallium->bind_vs_state = panfrost_bind_vs_state; |
| 2661 | |
| 2662 | gallium->create_sampler_state = panfrost_create_sampler_state; |
| 2663 | gallium->delete_sampler_state = panfrost_generic_cso_delete; |
| 2664 | gallium->bind_sampler_states = panfrost_bind_sampler_states; |
| 2665 | |
| 2666 | gallium->create_blend_state = panfrost_create_blend_state; |
| 2667 | gallium->bind_blend_state = panfrost_bind_blend_state; |
| 2668 | gallium->delete_blend_state = panfrost_delete_blend_state; |
| 2669 | |
| 2670 | gallium->set_blend_color = panfrost_set_blend_color; |
| 2671 | |
| 2672 | gallium->create_depth_stencil_alpha_state = panfrost_create_depth_stencil_state; |
| 2673 | gallium->bind_depth_stencil_alpha_state = panfrost_bind_depth_stencil_state; |
| 2674 | gallium->delete_depth_stencil_alpha_state = panfrost_delete_depth_stencil_state; |
| 2675 | |
| 2676 | gallium->set_sample_mask = panfrost_set_sample_mask; |
| 2677 | |
| 2678 | gallium->set_clip_state = panfrost_set_clip_state; |
| 2679 | gallium->set_viewport_states = panfrost_set_viewport_states; |
| 2680 | gallium->set_scissor_states = panfrost_set_scissor_states; |
| 2681 | gallium->set_polygon_stipple = panfrost_set_polygon_stipple; |
| 2682 | gallium->set_active_query_state = panfrost_set_active_query_state; |
| 2683 | |
| 2684 | gallium->create_query = panfrost_create_query; |
| 2685 | gallium->destroy_query = panfrost_destroy_query; |
| 2686 | gallium->begin_query = panfrost_begin_query; |
| 2687 | gallium->end_query = panfrost_end_query; |
| 2688 | gallium->get_query_result = panfrost_get_query_result; |
| 2689 | |
Alyssa Rosenzweig | f277bd3 | 2019-03-25 04:57:27 +0000 | [diff] [blame] | 2690 | gallium->create_stream_output_target = panfrost_create_stream_output_target; |
| 2691 | gallium->stream_output_target_destroy = panfrost_stream_output_target_destroy; |
| 2692 | gallium->set_stream_output_targets = panfrost_set_stream_output_targets; |
| 2693 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2694 | panfrost_resource_context_init(gallium); |
| 2695 | |
Tomeu Vizoso | 756f7b9 | 2019-03-08 10:27:07 +0100 | [diff] [blame] | 2696 | pscreen->driver->init_context(ctx); |
| 2697 | |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2698 | panfrost_setup_hardware(ctx); |
| 2699 | |
| 2700 | /* XXX: leaks */ |
| 2701 | gallium->stream_uploader = u_upload_create_default(gallium); |
| 2702 | gallium->const_uploader = gallium->stream_uploader; |
| 2703 | assert(gallium->stream_uploader); |
| 2704 | |
Alyssa Rosenzweig | 85e2bb5 | 2019-02-08 02:28:12 +0000 | [diff] [blame] | 2705 | /* Midgard supports ES modes, plus QUADS/QUAD_STRIPS/POLYGON */ |
| 2706 | ctx->draw_modes = (1 << (PIPE_PRIM_POLYGON + 1)) - 1; |
| 2707 | |
| 2708 | ctx->primconvert = util_primconvert_create(gallium, ctx->draw_modes); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2709 | |
| 2710 | ctx->blitter = util_blitter_create(gallium); |
| 2711 | assert(ctx->blitter); |
| 2712 | |
| 2713 | /* Prepare for render! */ |
| 2714 | |
Alyssa Rosenzweig | 59c9623 | 2019-02-25 05:32:16 +0000 | [diff] [blame] | 2715 | panfrost_job_init(ctx); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2716 | panfrost_emit_vertex_payload(ctx); |
| 2717 | panfrost_emit_tiler_payload(ctx); |
| 2718 | panfrost_invalidate_frame(ctx); |
Alyssa Rosenzweig | 7da251f | 2019-02-05 04:32:27 +0000 | [diff] [blame] | 2719 | panfrost_default_shader_backend(ctx); |
| 2720 | panfrost_generate_space_filler_indices(); |
| 2721 | |
| 2722 | return gallium; |
| 2723 | } |